引脚
编号GPIO完全
独立连接关系说明
34PA0WK_UPY1，按键KEY_UP
2，可以做待机唤醒脚(WKUP)
35PA1STM_ADCTPADYADC输入引脚，同时做TPAD检测脚
36PA2USART2_TX485_RXYRS485 RX脚(P5设置)
37PA3USART2_RX485_TXYRS485 TX脚(P5设置)
40PA4STM_DACGBC_KEYY1，DAC_OUT1输出脚
2，ATK-MODULE接口的KEY引脚
41PA5Y未接任何外设
42PA6Y未接任何外设
43PA7Y未接任何外设
100PA8OV_VSYNCYOLED/CAMERA接口的VSYNC脚
101PA9USART1_TXY串口1 TX脚，默认连接CH340的RX(P3设置)
102PA10USART1_RXY串口1 RX脚，默认连接CH340的TX(P3设置)
103PA11USB_D-CRXY1，USB D-引脚(P6设置)
2，CRX引脚(P6设置)
104PA12USB_D+CTXY1，USB D+引脚(P6设置)
2，CTX引脚(P6设置)
105PA13JTMSSWDIONJTAG/SWD仿真接口,没接任何外设
注意：如要做普通IO，需先禁止JTAG&SWD
109PA14JTCKSWDCLKNJTAG/SWD仿真接口,没接任何外设
注意：如要做普通IO，需先禁止JTAG&SWD
110PA15JTDIGBC_LEDN1，JTAG仿真口(JTDI)
2，ATK-MODULE接口的LED引脚(使用时，需
先禁止JTAG，才可以当普通IO使用)
46PB0LCD_BLYTFTLCD接口背光控制脚
47PB1T_SCKYTFTLCD接口触摸屏SCK信号
48PB2BOOT1T_MISON1，BOOT1,启动选择配置引脚(仅上电时用)
2，TFTLCD接口触摸屏MISO信号
133PB3JTDOFIFO_WENN1，JTAG仿真口(JTDO)
2，OLED/CAMERA接口WEN脚(使用时，需先
11
22
33
44
DDCCBBAA
Title
NumberRevisionSize
A4
Date:2011-10-27Sheet of
File:F:\Work\Project\Ctrl\MCU.SchDocDrawn By:OSC_IN12
OSC_OUT13
NRST14PA0-WKUP/USART2_CTS/ADC_IN0/TIM2_CH1_ETR23
PA1/USART2_RTS/ADC_IN1/TIM2_CH224
PA2/USART2_TX/ADC_IN2/TIM2_CH325
PA3/USART2_RX/ADC_IN3/TIM2_CH426
PA4/SPI1_NSS/USART2_CK/ADC_IN429
PA5/SPI1_SCK/ADC_IN530
PA6/SPI1_MISO/ADC_IN6/TIM3_CH131
PA7/SPI1_MOSI/ADC_IN7/TIM3_CH232
PB0/ADC_IN8/TIM3_CH335
PB1/ADC_IN9/TIM3_CH436
PB2 / BOOT137
PB10/I2C2_SCL/USART3_TX47
PB11/I2C2_SDA /USART3_RX48
PB12/SPI2_NSS /I2C2_SMBAl/USART3_CK /TIM1_BKIN51
PB13/SPI2_SCK /USART3_CTS /TIM1_CH1N52
PB14/SPI2_MISO /USART3_RTS /TIM1_CH2N53
PB15/SPI2_MOSITIM1_CH3N54PA8/USART1_CK/TIM1_CH1/MCO67
PA9/USART1_TX/TIM1_CH268
PA10/USART1_RX/TIM1_CH369
PA11 / USART1_CTS/CANRX / USBDM (2)/TIM1_CH470
PA12 / USART1_RTS/CANTX / USBDP (2)/TIM1_ETR71
11
22
33
44
DDCCBBAA
Title
NumberRevisionSize
A4
Date:2011-10-27Sheet of
File:F:\Work\Project\Ctrl\4in1.SchDocDrawn By:JTMS/SWDIO
JTCK/SWCLK
JTDI
JTDO/TRACESWO
JNTRSTUSART1_TX
USART2_TX
USART3_TXUSART1_RX
USART2_RX
USART3_RX
USART4_RXUSART4_TX
RSTUSB_DM
USB_DP
USB_DisconnectPC[0..11]PD[0..15]
SCL
SDA
BEEP
AD1
PUL1PUL2PUL3PUL4
DIR1DIR2DIR3DIR4
ENA1ENA2ENA3ENA4
LED1LED2LED3LED4ADC12_IN0
ADC12_IN1
USART1_CK
SPI_NSS
SPI_SCK
SPI_MISO
SPI_MOSIAD2SMBAUSART5_TX
USART5_RX
ANTI_TAMPU_MCU
MCU.SchDoc
JTMS/SWDIO
JTCK/SWCLK
JTDI
JTDO/TRACESWO
JNTRSTU_JTAG&SWD
JTAG&SWD.SchDoc
RSTU_Power
Power.SchDocUSART1_RX
USART2_RX
USART3_RXUSART1_TX
USART2_TX
USART3_TX
USART4_RXUSART4_TX
USART5_TX
USART5_RXU_RS232
RS232.SchDoc
USB_DM
USB_DP
USB_DisconnectSCL
SDA
BEEP
AD1ADC12_IN0
ADC12_IN1
USART1_CK
SPI_MOSISPI_MISOSPI_SCKSPI_NSSAD2SMBAANTI_TAMPU_Peripherals
Peripherals.SchDoc
PC[0..11]PD[0..15]
This is information on a product in full production. June 2013DocID022152 Rev 41/185
1STM32F405xx
STM32F407xx
Datasheet - production data
Features
•Core: ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168MHz, memory protection unit, 210DMIPS/1.25DMIPS/MHz (Dhrystone 2.1), and DSP instructions
•Memories–Up to 1 Mbyte of Flash memory–Up to 192+4Kbytes of SRAM including 64-Kbyte of CCM (core coupled memory) data RAM–Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR and NAND memories
•LCD parallel interface, 8080/6800 modes
•Clock, reset and supply management–1.8 V to 3.6 V application supply and I/Os–POR, PDR, PVD and BOR–4-to-26MHz crystal oscillator–Internal 16 MHz factory-trimmed RC (1% accuracy)–32 kHz oscillator for RTC with calibration–Internal 32 kHz RC with calibration•Low power–Sleep, Stop and Standby modes–VBAT supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM
