Fixed vs. dynamic sub-transfer in reinforcement learning
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Aabrasive grinding 强力磨削abrasive[☜'breisiv]a.磨料的, 研磨的absence ['✌bs☜ns] n.不在,缺席accesssory[✌k'ses☜ri] n.附件accommodate[☜'k m☜deit]v. 适应accordingly[☜'k :di☠li]adv.因此,从而,相应地accuracy['✌kjur☜si]n精度,准确性actuate['✌ktjueit]vt.开动(机器), 驱动adequate['✌dikwit] a. 足够的adhesive[☜d'hi:siv] n. 粘合剂adjacent[☜'d✞eisnt] a. 邻近的adopt[☜'d pt] vt. 采用advance [☜d'v✌:ns] n.进步advisable [☜d'vaizbl]adj. 可取的agitate['✌d✞iteit] v. 摇动a large extent 很大程度algorithm ['✌l♈☜ri❆☜m] n. 算法align [☜'lain] v 定位,调准alignment[☜'lainm☜nt] n. 校直all-too-frequent 频繁allowance[☜'l☜uens]n. 容差, 余量alternate[' :lt☜nit] v.交替,轮流alternative[ :l't☜:n☜tiv]n. 替换物alternatively[ :l't☜:n☜tivli]ad. 做为选择, 也许aluminiun[ ✌lju'minj☜m] n.铝ample['✌mpl] adj. 充足的analysis [☜'n✌l☜sis] n. 分析ancillary['✌nsil☜ri]a.补助的, 副的angular ['✌♈jul☜] adj. 有角的annealing[☜'li:li☠] n.退火aperture ['✌p☜t☞☜] n.孔applied loads 作用力appropriate [☜'pr☜uprieit]a. 适当的arc[a:k] n.弧, 弓形arise[☜'raiz] vi. 出现, 发生arrange[☜'reid✞] v. 安排article['a:tikl] n.制品, 产品ascertain[ ✌s☜'tein]vt. 确定, 查明assemble[☜'sembl] vt.组装attitude ['✌titju:d] n 态度auxiliary [ :♈'zilj☜ri]adj. 辅助的avoid[☜'v id] v.避免axis['✌ksis] n.轴axle['✌ksl] n.轮轴, 车轴Bbackup['b✌k ✈p] n. 备份batch [b✌t☞] n 一批bearing['b☪☜ri☠] n.轴承,支座bed[bed] n. 床身behavior[bi'heivj☜] n. 性能bench-work 钳工工作bend[bend] v. 弯曲beneath[bi'ni: ] prep在···bin [bin] n. 仓,料架blank [bl✌☠k] n. 坯料blank [bl✌☠k] v. 冲裁,落料blanking tool 落料模blast [bl✈st] n.一阵(风)blemish['blemi☞]n. 缺点, 污点bolster['b☜ulst☜] n. 模座,垫板boost[bu:st] n. 推进boring['b :ri☠] n.镗削, 镗孔bracket ['br✌kit] n. 支架brass [br✌s] n.黄铜break down 破坏breakage ['breikid✞] n.破坏bridge piecebrine[brain] n. 盐水brittle['britl] adv.易碎的buffer [b✈f☜] n.缓冲器built-in 内装的bulging [b✈ld✞i☠] n. 凸肚burr [b☜:] n. 毛刺bush [bu☞] n. 衬套bush[bu☞] n. 衬套by far (修饰比较级, 最高级)···得多, 最by means of 借助于Ccabinet ['k✌binit] n.橱柜call upon 要求carbide['ka:baid] n.碳化物carburzing['ka:bjureti☠] n. 渗碳carriage['k✌rid✞]n.拖板, 大拖板carry along 一起带走carry down over 从···上取carry out 完成case hardening 表面硬化case[keis] n. 壳, 套cast steel 铸钢casting['ka:sti☠] n. 铸造,铸件category['k✌t☜♈☜uri] n. 种类caution ['k :☞☜n]n. 警告,警示cavity and core plates凹模和凸模板cavity['k✌viti] n.型腔, 腔, 洞centre-drilling 中心孔ceramic[si'r✌mik] n.陶瓷制品chain doted line 点划线channel['t☞✌nl] n.通道, 信道characteristic[k✌r☜kt☜'ristik]n.特性check[t☞ek] v.核算chip[t☞ip] n.切屑, 铁屑chuck [t☞✈k] n.卡盘chute [☞u:t] n. 斜道circa ['s☜k☜:] adv. 大约circlip['s☜:klip] n.(开口)簧环circuit['s☜:kit] n. 回路, 环路circular supoport block circulate['s☜:kjuleid]v.(使)循环clamp [kl✌mp] vt 夹紧clamp[kl✌mp] n.压板clay[klei] n. 泥土clearance ['kli☜r☜ns] n. 间隙clip [klip] vt. 切断,夹住cold hobbing 冷挤压cold slug well 冷料井collapse[k☜'l✌ps]vi. 崩塌, 瓦解collapsible[k☜'l✌ps☜bl]adj. 可分解的combination [k mbi'nei☞☜n] n. 组合commence[k☜'mens]v. 开始, 着手commence[k☜'mens] v. 开始commercial [k☜'m☜:☞☜l]adj. 商业的competitive[k☜m'petitiv]a. 竞争的complementary[ k mpli'ment☜ri]a. 互补的complexity [kem'pleksiti]n. 复杂性complicated['k mpl☜keitid]adj. 复杂的complication [k mpli'kei☞☜n] n. 复杂化compression [k☜m'pre☞☜n] n.压缩comprise[k☜m'prais] vt.包含compromise['k mpr☜maiz]n. 妥协, 折衷concern with 关于concise[k☜n'sais]a. 简明的, 简练的confront[k☜n'fr✈nt] vt. 使面临connector[k☜'nekt☜]n. 连接口, 接头consequent['k nsikw☜nt]a. 随之发生的, 必然的console ['k nsoul] n.控制台consume [k☜n'sjum]vt. 消耗, 占用consummate [k☜n's✈meit]vt. 使完善container[k☜n'tein☜] n. 容器contingent[ken'tind✞☜nt]a.可能发生的contour['k☜ntu☜] n.轮廓conventional[k☜n'ven☞☜nl]a. 常规的converge[k☜n'v☜:d✞]v. 集中于一点conversant[k n'v☜:s☜nt]a. 熟悉的conversion[k☜n'v☜:☞☜n]n 换算, 转换conveyer[ken'vei☜]n. 运送装置coolant['ku:l☜nt] n. 冷却液coordinate [k☜u' :dnit]vt. (使)协调copy machine 仿形(加工)机床core[k :] n. 型芯, 核心corresponding [ka:ri'sp di☠]n.相应的counteract [kaunt☜'r✌kt]vt. 反作用,抵抗couple with 伴随CPU (central processing unit)中央处理器crack[kr✌k ] v.(使)破裂,裂纹critical['kritikl] adj.临界的cross-hatching 剖面线cross-section drawn 剖面图cross-slide 横向滑板CRT (cathoder-ray tube)阴极射线管crush[kr✈☞] vt.压碎cryogenic[ krai☜'d✞enik ]a. 低温学的crystal['kristl] adj.结晶状的cubic['kju:bik]a. 立方的, 立方体的cup [k✈p]vt (使)成杯状, 引伸curable ['kjur☜bl]adj. 可矫正的curvature['k☜:v☜t☞☜] n.弧线curve [k☜:v] vt. 使弯曲cutter bit 刀头, 刀片cyanide['sai☜naid] n.氰化物Ddash [d✌☞] n. 破折号daylight ['deilait] n. 板距decline[di'klain]v. 下落,下降,减少, ,deform[di'f :m] v. (使)变形demonstrate['dem☜streit ]v 证明depict[di'pikt ] vt 描述deposite [di'p zit] vt. 放置depression[di'pre☞☜n] n. 凹穴descend [di'sent] v. 下降desirable[di'zair☜bl] a. 合适的detail ['diteil] n.细节,详情deterioration[diti☜ri:☜'rei☞☜n]n. 退化, 恶化determine[di't☜:min] v.决定diagrammmatic[ dai☜gr☜'m✌tik] a. 图解的,图表的dictate['dikteit] v. 支配die[dai] n.模具, 冲模, 凹模dielectric[daii'lektrik]n. 电介质die-set 模架digital ['did✞itl ]n. 数字式数字, a.数字的dimensional[dddi'men☞☜nl]a. 尺寸的, 空间的discharge[dis't☞a:d✞]n.v. 放电, 卸下, 排出discharge[dis't☞a:d✞] v.卸下discrete [dis'cri:t]adj. 离散的,分立的dislodge[dis'l d✞]v. 拉出, 取出dissolution[dis☜'lu:☞☜n] n.结束distinct [dis'ti☠kt]a.不同的,显著的distort [dis'd :t] vt. 扭曲distort[dis't :t]vt. (使)变形, 扭曲distributed system分布式系统dowel ['dau☜l] n. 销子dramaticlly [dr☜'m✌tikli]adv. 显著地drastic ['dr✌stik] a.激烈的draughting[dra:fti☠] n. 绘图draughtsman['dr✌ftsm☜n]n. 起草人drawing['dr :i☠] n. 制图drill press 钻床drum [dr✈m] n.鼓轮dual ['dju:☜l]adv. 双的,双重的ductility [d✈k'tiliti ] n.延展性dynamic [dai'n✌mik ]adj 动力的Eedge [ed✞] n .边缘e.g.(exempli gratia) [拉] 例如ejector [i'd✞ekt☜] n.排出器,ejector plate 顶出板ejector rob 顶杆elasticity[il✌'stisiti] n.弹性electric dicharge machining电火花加工electrochemical machining电化学加工electrode[i'lektr☜ud] n. 电极electro-deposition 电铸elementary [el☜'ment☜ri]adj.基本的eliminate[i'limineit]vt. 消除, 除去elongate[i'l ☠♈et]vt. (使)伸长, 延长emerge [i'm☜:d✞]vi. 形成, 显现emphasise['emf☜saiz]vt. 强调endeavour[en'dev☜] n. 尽力engagement[in'♈eid✞ment]n. 约束, 接合enhance[in'h✌ns]vt. 提高, 增强ensure [in'☞u☜] vt. 确保,保证envisage[in'vizid✞] vt.设想erase[i'reis] vt. 抹去, 擦掉evaluation[i'v✌lju ei☞☜n]n. 评价, 估价eventually[i'v☜nt☞u☜li ]adv. 终于evolution[ev☜'lu:☞☜n] n.进展excecution[eksi'kju:☞☜n]n. 执行, 完成execute ['ekskju:t] v. 执行exerte [i♈'z☜:t] vt. 施加experience[iks'piri☜ns] n. 经验explosive[iks'pl☜usiv]adj.爆炸(性)的extend[eks'tend] v. 伸展external[eks't☜:nl] a. 外部的extract[eks'tr✌kt] v. 拔出extreme[iks'tri:m] n. 极端extremely[iks'tri:mli]adv. 非常地extremity[iks'tmiti] n. 极端extrusion[eks'tru:✞☜n]n. 挤压, 挤出FF (Fahrenheit)['f✌r☜nhait]n. 华氏温度fabricate ['f✌brikeit]vt. 制作,制造facilitate [f☜'siliteit] vt. 帮助facility[f☜'siliti] n. 设备facing[feisi☠] n. 端面车削fall within 属于, 适合于fan[f✌n] n.风扇far from 毫不, 一点不, 远非fatigue[f☜'ti♈] n.疲劳feasible ['fi:z☜bl] a 可行的feature ['fi:t☞☜] n.特色, 特征feed[fi:d] n.. 进给feedback ['fi:db✌k] n. 反馈female['fi:meil]a. 阴的, 凹形的ferrule['fer☜l] n. 套管file system 文件系统fitter['fit☜] n.装配工, 钳工fix[fiks]vt. 使固定, 安装, vi. 固定fixed half and moving half定模和动模flat-panel technology平面(显示)技术flexibility[fleksi'biliti]n. 适应性, 柔性flexible['fleks☜bl] a. 柔韧的flow mark 流动斑点follow-on tool 连续模foregoing ['f :'♈☜ui☠]adj.在前的,前面的foretell[f :'tell]vt. 预测, 预示, 预言forge[f :d✞] n. v. 锻造forming[f :mi☠] n. 成型four screen quadrants四屏幕象限fracture['fr✌kt☞☜] n.破裂free from 免于Ggap[♈✌p] n. 裂口, 间隙gearbox['♈i☜b ks] n.齿轮箱general arrangementgovern['♈✈v☜n]v. 统治, 支配, 管理grain [♈rein] n. 纹理graphic ['♈r✌fik] adj. 图解的grasp [♈r✌sp] vt. 抓住grid[♈rid] n. 格子, 网格grind[♈raind]v. 磨, 磨削, 研磨grinding ['♈raindi☠]n. 磨光,磨削grinding machine 磨床gripper[♈rip☜] n. 抓爪, 夹具groove[♈ru:v] n. 凹槽guide bush 导套guide pillar 导柱guide pillars and bushes导柱和导套Hhandset['h✌ndset] n. 电话听筒hardness['ha:dnis] n.硬度hardware ['ha:dw☪☜] n. 硬件headstock['hedst k] n.床头箱, 主轴箱hexagonal[hek's✌♈☜nl]a. 六角形的, 六角的hindrance['hindr☜ns]n.障碍, 障碍物hob[h b] n. 滚刀, 冲头hollow-ware 空心件horizontal[h ri'z ntl]a. 水平的hose[h☜uz] n. 软管, 水管hyperbolic [haip☜'b lik]adj. 双曲线的Ii.e. (id est) [拉] 也就是identical[ai'dentikl] a同样的identify [ai'dentifai] v. 确定,识别idle ['aidl] adj.空闲的immediately[i'mi:dj☜tli] adv.正好, 恰好impact['imp✌kt] n.冲击impart [im'pa:t] v.给予implement ['implim☜nt]vt 实现impossibility[imp s☜'biliti]n.不可能impression[im'pre☞☜n] n. 型腔in contact with 接触in terms of 依据inasmuch (as)[in☜z'm✈t☞]conj. 因为, 由于inch-to-metric conversions英公制转换inclinable [in'klain☜bl]adj. 可倾斜的inclusion [in'klu☞☜n]n. 内含物inconspicuous[ink☜n'spikju☜s]a. 不显眼的incorporate [in'k :p☜reit]v 合并,混合indentation[ inden'tei☞☜n ]n. 压痕indenter[in'dent☜] n. 压头independently[indi'pein☜ntli]a. 独自地, 独立地inevitably[in'evit☜bli]ad. 不可避免地inexpensive[inik'spensiv]adj. 便宜的inherently [in'hi☜r☜ntli]adv. 固有的injection mould 注塑模injection[in'd✞ek☞☜n] n. 注射in-line-of-draw 直接脱模insert[in's☜:t] n. 嵌件inserted die 嵌入式凹模inspection[in'spek☞☜n]n. 检查,监督installation[inst☜'lei☞☜n]n. 安装integration [inti'♈rei☞☜n]n.集成intelligent[in'telid✞☜nt]a. 智能的intentinonally [in'ten☞☜n☜li]adv 加强地,集中地interface ['int☜feis] n.. 界面internal[in't☜:nl] a. 内部的interpolation [int☜p☜'lei☞☜n]n.插值法investment casting 熔模铸造irregular [i'regjul☜]adj. 不规则的,无规律irrespective of 不论, 不管irrespective[iri'spektiv]a. 不顾的, 不考虑的issue ['isju] vt. 发布,发出Jjoint line 结合线Kkerosene['ker☜si:n] n.煤油keyboard ['ki:b :d ] n. 健盘knock [n k] v 敲,敲打Llance [la:ns] v. 切缝lathe[lei❆] n. 车床latitude ['l✌titju:d] n. 自由lay out 布置limitation[limi'tei☞☜n]n. 限度,限制,局限(性)local intelligence 局部智能locate [l☜u'keit] vt. 定位logic ['l d✞ik] n. 逻辑longitudinal['l nd✞☜'tju:dinl]a. 纵向的longitudinally['l nd✞☜'tju:dinl]a. 纵向的look upon 视作, 看待lubrication[lju:bri'kei☞☜n ]n. 润滑Mmachine shop 车间machine table 工作台machining[m☜'☞i:ni☠] n. 加工made-to-measure 定做maintenance['meintin☜ns]n.维护,维修majority[m☜'d✞a:riti] n.多数make use of 利用male[meil] a. 阳的, 凸形的malfunction['m✌l'f✈☠☞☜n]n. 故障mandrel['m✌dtil] n.心轴manifestation[m✌nif☜s'tei☞☜n] n. 表现, 显示massiveness ['m✌sivnis ]厚实,大块measure['me✞☜] n. 大小, 度量microcomputer 微型计算机microns['maikr n] n.微米microprocessor 微处理器mild steel 低碳钢milling machine 铣床mineral['min☜r☜l] n.矿物, 矿产minimise['minimaiz]v.把···减到最少, 最小化minute['minit] a.微小的mirror image 镜像mirror['mir☜] n. 镜子MIT (Massachusetts Institute ofTechnology) 麻省理工学院moderate['m d☜rit]adj. 适度的modification [m difi'kei☞☜n ]n. 修改, 修正modulus['m djul☜s] n.系数mold[m☜uld]n. 模, 铸模, v. 制模, 造型monitor ['m nit☜ ] v. 监控monograph['m n☜♈ra:f]n. 专著more often than not 常常motivation[m☜uti'vei☞☜n]n. 动机mould split line 模具分型线moulding['m☜udi☠] n. 注塑件move away from 抛弃multi-imprssion mould多型腔模Nnarrow['n✌r☜u] a. 狭窄的NC (numerical control ) 数控nevertheless[ nev☜❆☜'les]conj.,adv.然而,不过nonferrous['n n'fer☜s]adj.不含铁的, 非铁的normally['n :mli] adv.通常地novice['n vis]n. 新手, 初学者nozzle['n zl] n. 喷嘴, 注口numerical [nju'merikl]n. 数字的Oobjectionable [☜b'd✞ek☞☜bl]adj. 有异议的,讨厌的observe[☜b'z☜:v] vt. 观察obviously [' bvi☜sli]adv 明显地off-line 脱机的on-line 联机operational [ p☜'rei☞☜nl]adj. 操作的, 运作的opportunity[ p☜'tju:niti]n. 时机, 机会opposing[☜'p☜uzi☠]a. 对立的, 对面的opposite[' p☜zit]n. 反面a.对立的,对面的optimization [ ptimai'zei☞☜n]n. 最优化orient [' :ri☜nt] vt. 确定方向orthodox [' : ☜d ks]adj. 正统的,正规的overall['☜uv☜r :l]a. 全面的,全部的overbend v.过度弯曲overcome[☜uv☜'k✈m]vt. 克服, 战胜overlaping['☜uv☜'l✌pi☠]n. 重叠overriding[☜uv☜'raidi☠]a. 主要的, 占优势的Ppack[p✌k] v. 包装package ['p✌kid✞] vt.包装pallet ['p✌lit] n.货盘panel ['p✌nl] n.面板paraffin['p✌r☜fin] n. 石蜡parallel[p✌r☜lel] a.平行的penetration[peni'trei☞☜n ]n.穿透peripheral [p☜'rif☜r☜l] adj外围的periphery [p☜'rif☜ri] n. 外围permit[p☜'mit] v. 许可, 允许pessure casting 压力铸造pillar['pil☜] n. 柱子, 导柱pin[pin] n. 销, 栓, 钉pin-point gate 针点式浇口piston ['pist☜n] n.活塞plan view 主视图plasma['pl✌zm☜] n. 等离子plastic['pl✌stik] n. 塑料platen['pl✌t☜n] n. 压板plotter[pl t☜] n. 绘图机plunge [pl✈nd✞] v翻孔plunge[pl✈nd✞] v.投入plunger ['pl✈nd✞☜ ] n. 柱塞pocket-size 袖珍portray[p :'trei] v.描绘pot[p t] n.壶pour[p :] vt. 灌, 注practicable['pr✌ktik☜b]a. 行得通的preferable['pref☜r☜bl]a.更好的, 更可取的preliminary [pri'limin☜ri]adj 初步的,预备的press setter 装模工press[pres]n. 压,压床,冲床,压力机, prevent [pri'vent] v. 妨碍primarily['praim☜rili]adv. 主要地procedure[pr☜'si:d✞☜]n. 步骤, 方法, 程序productivity.[pr☜ud✈k'tiviti] n. 生产力profile ['pr☜ufail] n. 轮廓progressively[pr☜'♈resiv]ad. 渐进地project[pr☜'d✞ekt] n.项目project[pr☜'d✞ekt] v. 凸出projection[pr☜'d✞ek☞☜n]n. 突出部分proper['pr p☜] a. 本身的property['pr p☜ti] n.特性prototype ['pr☜ut☜taip] n. 原形proximity[pr k'simiti] n.接近prudent['pru:d☜nt] a. 谨慎的punch [p✈nt☞] v. 冲孔punch shapper tool 刨模机punch-cum-blanking die凹凸模punched tape 穿孔带purchase ['p☜:t☞☜s] vt. 买,购买push back pin 回程杆pyrometer[pai'n mit☜] n. 高温计Qquality['kwaliti] n. 质量quandrant['kw dr☜nt] n. 象限quantity ['kw ntiti] n. 量,数量quench[kwent☞] vt. 淬火Rradial['reidi☜l] adv.放射状的ram [r✌m] n 撞锤.rapid['r✌pid]adj. 迅速的rapidly['r✌pidli] adv. 迅速地raster['r✌st☜] n. 光栅raw [r :] adj. 未加工的raw material 原材料ream [ri:m] v 铰大reaming[ri:mi☠]n. 扩孔, 铰孔recall[ri'k :l] vt. 记起, 想起recede [ri'si:d] v. 收回, 后退recess [ri'ses]n. 凹槽,凹座,凹进处redundancy[ri'd✈nd☜nsi]n. 过多re-entrant 凹入的refer[ri'f☜:]v. 指, 涉及, 谈及,reference['ref☜r☜ns]n.参照,参考refresh display 刷新显示register ring 定位环register['red✞st☜]v. 记录, 显示, 记数regrind[ri:'♈aind](reground[ri:'gru:nd]) vt. 再磨研relative['rel☜tiv]a. 相当的, 比较的relay ['ri:lei] n. 继电器release[ri'li:s] vt. 释放relegate['rel☜geit] vt.把··降低到reliability [rilai☜'biliti] n. 可靠性relief valves 安全阀relief[ri'li:f] n. 解除relieve[ri'li:v ] vt.减轻, 解除remainder[ri'meind☜]n. 剩余物, 其余部分removal[ri'mu:vl] n. 取出remove[ri'mu:v] v. 切除, 切削reposition [rip☜'zi☞☜n]n. 重新安排represent[ repri'zent☜]v 代表,象征reputable['repjut☜bl]a. 有名的, 受尊敬的reservoir['rez☜vwa: ]n.容器, 储存器resident['rezid☜nt] a. 驻存的resist[ri'zist] vt. 抵抗resistance[ri'zist☜ns]n.阻力, 抵抗resolution[ rez☜'lu:☞☜n] n.分辨率respective[ri'spektiv]a. 分别的,各自的respond[ris'p nd]v. 响应, 作出反应responsibility[risp ns☜'biliti]n. 责任restrain[ris'trein] v. 抑制restrict [ris'trikt] vt 限制,限定restriction[ris'trik☞☜n] n. 限制retain[ri'tein] vt.保持, 保留retaining plate 顶出固定板reveal [ri'vil] vt.显示,展现reversal [ri'v☜sl] n. 反向right-angled 成直角的rigidity[ri'd✞iditi] n. 刚度rod[r d] n. 杆, 棒rotate['r☜uteit] vt.(使)旋转rough machining 粗加工rough[r✈f] a. 粗略的routine [ru:'ti:n] n. 程序rubber['r✈b☜] n.橡胶runner and gate systems 流道和浇口系统Ssand casting 砂型铸造satisfactorily[ s✌tis'f✌ktrili] adv. 满意地saw[a :] n. 锯子scale[skeil] n. 硬壳score[sk :] v. 刻划scrap[skr✌p]n. 废料, 边角料, 切屑, screwcutting 切螺纹seal[si:l] vt.密封secondary storagesection cutting plane 剖切面secure[si'kju☜] v. 固定secure[si'kju☜]vt. 紧固,夹紧,固定segment['se♈m☜nt] v. 分割sensitive['sensitiv] a. 敏感的sequence ['si:kw☜ns] n. 次序sequential[si'kwen☞☜l]a. 相继的seriously['si☜ri☜sli] adv.严重地servomechanism['s☜:v☜'mek☜nizm] n.伺服机构Servomechanism aboratoies 伺服机构实验室servomotor ['s☜:v☜m☜ut☜] n. 伺服马达setter ['set☜] n 安装者set-up 机构sever ['sev☜] v 切断severity [si'veriti] n. 严重shaded[☞✌did] adj. 阴影的shank [☞✌☠k] n. 柄.shear[☞i☜] n.剪,切shot[☞t] n. 注射shrink[☞ri☠k] vi. 收缩side sectional view 侧视图signal ['si♈nl] n. 信号similarity[simi'l✌riti] n.类似simplicity[sim'plisiti] n. 简单single-point cutting tool 单刃刀具situate['sitjueit] vt. 使位于, 使处于slide [slaid] vi. 滑动, 滑落slideway['slaidwei] n. 导轨slot[sl t] n. 槽slug[sl✈♈] n. 嵌条soak[s☜uk] v. 浸, 泡, 均热software ['s ftw☪☜] n. 软件solid['s lid] n.立体, 固体solidify[s☜'lidifai] vt.vi. (使)凝固, (使)固solution[s☜'lu:☞☜n] n.溶液sophisiticated [s☜'fistikeitid]adj.尖端的,完善的sound[saund] a. 结实的, 坚固的)spark erosion 火花蚀刻spindle['spindl] n. 主轴spline[splain] n.花键split[split] n. 侧向分型, 分型spool[spu:l] n. 线轴springback n.反弹spring-loaded 装弹簧的sprue bush 主流道衬套sprue puller 浇道拉杆square[skw☪☜] v. 使成方形stage [steid✞] n. 阶段standardisation[ st✌nd☜dai'zei☞☜n] n. 标准化startling['sta:tli☠]a. 令人吃惊的steadily['sted☜li ] adv. 稳定地step-by-step 逐步stickiness['stikinis] n.粘性stiffness['stifnis] n. 刚度stock[st k] n.毛坯, 坯料storage tube display储存管显示storage['st :rid✞] n. 储存器straightforward[streit'f :w☜d]a.直接的strain[strein] n. 应变strength[stre☠] n.强度stress[stres] n. 压力,应力stress-strain 应力--应变stretch[stret☞] v.伸展strike [straik] vt. 冲击stringent['strind✞☜nt ] a.严厉的stripper[strip☜] n. 推板stroke[strouk] n. 冲程, 行程structrural build-up 结构上形成的sub-base 垫板subject['s✈bd✞ikt] vt.使受到submerge[s☜b'm☜:d✞] v.淹没subsequent ['s✈bsikwent] adj.后来的subsequently ['s✈bsikwentli]adv. 后来, 随后substantial[s☜b'st✌n☞☜l] a.实质的substitute ['s✈bstitju:t] vt. 代替,.替换subtract[s☜b'tr✌kt] v.减, 减去suitable['su:t☜bl]a. 合适的, 适当的suitably['su:t☜bli] ad.合适地sunk[s✈☠k](sink的过去分词)v. 下沉, 下陷superior[s☜'pi☜ri☜] adj.上好的susceptible[s☜'sept☜bl]adj.易受影响的sweep away 扫过symmetrical[si'metrikl]a. 对称的synchronize ['si☠kr☜naiz]v. 同步,同时发生Ttactile['t✌ktail] a. 触觉的, 有触觉的tailstock['teilst k] n.尾架tapered['teip☜d] a. 锥形的tapping['t✌pi☠] n. 攻丝technique[tek'ni:k] n. 技术tempering['temp☜r☠] n.回火tendency['tend☜nsi]n. 趋向, 倾向tensile['tensail]a. 拉力的, 可拉伸的拉紧的, 张紧的tension ['ten☞☜n] n.拉紧,张紧terminal ['t☜:m☜nl ] n. 终端机terminology[t☜:mi'n l☜d✞i ] n. 术语, 用辞theoretically [ i:☜'retikli ] adv.理论地thereby['❆☪☜bai] ad. 因此, 从而thermoplastic[' ☜:m☜u'pl✌stik] a. 热塑性的,n. 热塑性塑料thermoset[' ☜:m☜set] n.热固性thoroughly[' ✈r☜uli] adv.十分地, 彻底地thread pitch 螺距thread[ red] n. 螺纹thrown up 推上tilt [tilt] n. 倾斜, 翘起tolerance ['t l☜r☜ns] n..公差tong[t ☠] n. 火钳tonnage['t✈nid✞]n. 吨位, 总吨数tool point 刀锋tool room 工具车间toolholder['tu:lh☜uld☜]n. 刀夹,工具柄toolmaker ['tu:l'meik☜]n 模具制造者toolpost grinder 工具磨床toolpost['tu:l'p☜ust] n. 刀架torsional ['t :☞☜nl] a扭转的.toughness['t fnis] n. 韧性trace [treis] vt.追踪tracer-controlled milling machine仿形铣床transverse[tr✌ns'v☜:s]a. 横向的tray [trei] n. 盘,盘子,蝶treatment['tri:tm☜nt] n.处理tremendous[tri'mend☜s]a. 惊人的, 巨大的trend [trend] n.趋势trigger stop 始用挡料销tungsten['t✈☠st☜n] n.钨turning['t☜:ni☠] n.车削twist[twist ] v.扭曲,扭转two-plate mould双板式注射模Uultimately['✈ltimitli] adv终于.undercut moulding侧向分型模undercut['✈nd☜k✈t]n. 侧向分型undercut['✈nd☜k✈t] n. 底切underfeed['✈nd☜'fi:d]a 底部进料的undergo[✈nd☜'♈☜u] vt. 经受underside['✈nd☜said]n 下面,下侧undue[✈n'dju:]a.不适当的, 过度的uniform['ju:nif :m]a. 统一的, 一致的utilize ['ju:tilaiz] v 利用Utopian[ju't☜upi☜n]adj. 乌托邦的, 理想化的Vvalve[v✌lv] n. 阀vaporize['veip☜raiz]vt.vi. 汽化, (使)蒸发variation [v☪☜ri'ei☞☜n] n.变化various ['v☪☜ri☜s]a. 不同的,各种的,vector feedrate computation向量进刀速率计算vee [vi:] n. v字形velocity[vi'l siti] n.速度versatile['v☜s☜tail]a. 多才多艺的,万用的vertical['v☜:tikl] a. 垂直的via [vai☜] prep.经,通过vicinity[v☜'siniti] n. 附近viewpoint['vju:p int] n. 观点Wwander['w nd☜] v. 偏离方向warp[w :p] v. 翘曲washer ['w ☞☜] n. 垫圈wear [w☪☜] v. 磨损well line 结合线whereupon [hw☪☜r☜'p n]adv. 于是winding ['waindi☠] n. 绕, 卷with respect to 相对于withstand[wi❆'st✌nd]vt. 经受,经得起work[w☜:k] n. 工件workstage 工序wrinkle['ri☠kl] n.皱纹vt.使皱Yyield[ji:ld] v. 生产Zzoom[zu:] n. 图象电子放大。
★专业英語★XiaoYingLiu121GLOSSARY GLOSSARY((术语术语表表)Aabrasive grinding 强力磨削abrasive[E 'breisiv]a.磨料的,研磨的absence ['A bs E ns]n..不在,缺席accesssory[A k'ses E ri]n.附件accommodate[E 'k C m E deit]v.适应accordingly[E 'k C :di N li]adv.因此,从而,相应地accuracy['A kjur E si]n 精度,准确性actuate['A ktjueit]vt.开动(机器),驱动adequate['A dikwit]a.足够的adhesive[E d'hi:siv]n.粘合剂adjacent[E 'd V eisnt]a.邻近的adopt[E 'd C pt]vt.采用advance [E d'v A :ns]n.进步advisable [E d'vaizbl]adj.可取的agitate['A d V iteit]v.摇动a large extent 很大程度algorithm ['A l ^E ri T E m]n.算法align [E 'lain]v 定位,调准alignment[E 'lainm E nt]n.校直all-too-frequent 频繁allowance[E 'l E uens]n.容差,余量alternate['C :lt E nit]v.交替,轮流alternative[C :l't E :n E tiv]n.替换物alternatively[C :l't E :n E tivli]ad.做为选择,也许aluminiun[7A lju'minj E m]n.铝ample['A mpl]adj.充足的analysis [E 'n A l E sis]n.分析ancillary['A nsil E ri]a.补助的,副的angular ['A ^jul E ]adj.有角的annealing[E 'li:li N ]n.退火aperture ['A p E t F E ]n.孔applied loads 作用力appropriate [E 'pr E uprieit]a.适当的arc[a:k]n.弧,弓形arise[E 'raiz]vi.出现,发生arrange[E 'reid V ]v.安排article['a:tikl]n.制品,产品ascertain[7A s E 'tein]vt.确定,查明assemble[E 'sembl]vt.组装attitude ['A titju:d]n 态度auxiliary [C :^'zilj E ri]adj.辅助的avoid[E 'v C id]v.避免axis['A ksis]n.轴axle['A ksl]n.轮轴,车轴Bbackup['b A k 7Q p]n.备份batch [b A t F ]n 一批bearing['b Z E ri N ]n.轴承,支座bed[bed]n.床身behavior[bi'heivj E ]n.性能bench-work 钳工工作bend[bend]v.弯曲beneath[bi'ni:W ]prep 在···下bin [bin]n.仓,料架blank [bl A N k]n.坯料blank [bl A N k]v.冲裁,落料blanking tool 落料模blast [bl Q st]n.一阵(风)blemish['blemi F ]n.缺点,污点bo l s t e r ['b E ul s t E ]n.模座,垫板★专业英語★boost[bu:st]n.推进boring['b C:ri N]n.镗削,镗孔bracket['br A kit]n.支架brass[br A s]n.黄铜break down破坏breakage['breikid V]n.破坏bridge piecebrine[brain]n.盐水brittle['britl]adv.易碎的buffer[b Q f E]n.缓冲器built-in内装的bulging[b Q ld V i N]n.凸肚burr[b E:]n.毛刺bush[bu F]n.衬套bush[bu F]n.衬套by far(修饰比较级,最高级)··得多,最by means of借助于Ccabinet['k A binit]n.橱柜call upon要求carbide['ka:baid]n.碳化物carburzing['ka:bjureti N]n.渗碳carry along一起带走carry down over从···上取下carry out完成case hardening表面硬化case[keis]n.壳,套cast steel铸钢casting['ka:sti N]n.铸造,铸件category['k A t E^E uri]n.种类caution['k C:F E n]n.警告,警cavity and core plates凹模和凸模板cavity['k A viti]n.型腔,腔,洞centre-drilling中心孔ceramic[si'r A mik]n.陶瓷制品complexity[kem'pleksiti]n.复杂性complicated['k C mpl E keitid]adj.复杂的complication[k C mpli'kei F E n]n.复杂化compression[k E m'pre F E n]n.压缩corresponding[ka:ri'sp C di N]n.相应的counteract[kaunt E'r A kt]vt.反作用,抵抗couple with伴随CPU(central processing unit)中央处理器crack[kr A k]v.(使)破裂,裂纹critical['kritikl]adj.临界的cross-hatching剖面线cross-section drawn剖面图cross-slide横向滑板CRT(cathoder-ray tube)阴极射线管crush[kr Q F]vt.压碎cryogenic[7krai E'd V enik]a.低温学的crystal['kristl]adj.结晶状的cubic['kju:bik]a.立方的,立方体的cup[k Q p]vt(使)成杯状,引伸curable['kjur E bl]adj.可矫正的curvature['k E:v E t F E]n.弧线curve[k E:v]vt.使弯曲cutter bit刀头,刀片cyanide['sai E naid]n.氰化物Ddash[d A F]n.破折号daylight['deilait]n.板距decline[di'klain]v.下落,下降,减少, deform[di'f C:m]v.(使)变形★专业英語★demonstrate['dem E streit]v证明depict[di'pikt]vt描述deposite[di'p C zit]vt.放置depression[di'pre F E n]n.凹穴descend[di'sent]v.下降desirable[di'zair E bl]a.合适的de ta il['di t ei l]n.细节,详情deterioration[diti E ri:E'rei F E n]n.退化,恶化determine[di't E:min]v.决定diagrammmatic[7dai E gr E'm A tik] .a.图解的,图表的dictate['dikteit]v.支配die[dai]n.模具,冲模,凹模dielectric[daii'lektrik]n.电介质die-set模架digital['did V itl]n.数字式数字,a.数字的dimensional[dddi'men F E nl]a.尺寸的,空间的discharge[dis't F a:d V]n.v.放电,卸下,排出discharge[dis't F a:d V]v.卸下discrete[dis'cri:t]adj.离散的,分立的dislodge[dis'l C d V]v.拉出,取出dissolution[dis E'lu:F E n]n.结束distinct[dis'ti N kt]a.不同的,显著的distort[dis'd C:t]vt.扭曲distort[dis't C:t]vt.(使)变形,扭曲distributed system分布式系统dowel['dau E l]n.销子dramaticlly[dr E'm A tikli]adv.显著地drastic['dr A stik]a.激烈的draughting[dra:fti N]n.绘图draughtsman['dr A ftsm E n]n.起草人drawing['dr C:i N]n.制图drill press钻床drum[dr Q m]n.鼓轮dual['dju:E l]adv.双的,双重的ductility[d Q k'tiliti]n.延展性dynamic[dai'n A mik]adj动力的Eedge[ed V]n.边缘e.g.(exempli gratia)[拉]例如ejector[i'd V ekt E]n.排出器,ejector plate顶出板ejector rob顶杆elasticity[il A'stisiti]n.弹性electric dicharge machining电火花加工electrical discharge machining电火花加工electrochemical machining电化学加工electrode[i'lektr E ud]n.电极electro-deposition电铸elementary[el E'ment E ri]adj.基本的eliminate[i'limineit]vt.消除,除去elongate[i'l C N^et]vt.(使)伸长,延长emphasise['emf E saiz]vt.强调endeavour[en'dev E]n.尽力engagement[in'^eid V ment]n.约束,接合enhance[in'h A ns]vt.提高,增强ensure[in'F u E]vt.确保,保证envisage[in'vizid V]vt.设想erase[i'reis]vt.抹去,擦掉evaluation[i'v A lju7ei F E n]n.评价,估价eventually[i'v E nt F u E li]adv.终于evolution[ev E'lu:F E n]n.进展★专业英語★excecution[eksi'kju:F E n]n.执行,完成execute['ekskju:t]v.执行exerte[i^'z E:t]vt.施加experience[iks'piri E ns]n.经验explosive[iks'pl E usiv]adj.爆炸(性)的extend[eks'tend]v.伸展external[eks't E:nl]a.外部的extract[eks'tr A kt]v.拔出extreme[iks'tri:m]n.极端extremely[iks'tri:mli]adv.非常地extremity[iks'tmiti]n.极端extrusion[eks'tru:V E n]n.挤压,挤出FF(Fahrenheit)['f A r E nhait]n.华氏温度fabricate['f A brikeit]vt.制作,制造facilitate[f E'siliteit]vt.帮助facility[f E'siliti]n.设备facing[feisi N]n.端面车削fall within属于,适合于fan[f A n]n.风扇far from毫不,一点不,远非fatigue[f E'ti^]n.疲劳feasible['fi:z E bl]a可行的feature['fi:t F E]n.特色,特征feed[fi:d]n..进给feedback['fi:db A k]n.反馈female['fi:meil]a.阴的,凹形的ferrule['fer E l]n.套管file system文件系统fitter['fit E]n.装配工,钳工fix[fiks]vt.使固定,安装,vi.固定fixed half and moving half定模和动模flat-panel technology平面(显示)技术flexibility[fleksi'biliti]n.适应性,柔性flexible['fleks E bl]a.柔韧的flow mark流动斑点follow-on tool连续模foregoing['f C:'^E ui N]adj.在前的,前面的foretell[f C:'tell]vt.预测,预示,预言forge[f C:d V]n.v.锻造forming[f C:mi N]n.成型four screen quadrants四屏幕象限fracture['fr A kt F E]n.破裂free from免于Ggap[^A p]n.裂口,间隙gearbox['^i E b C ks]n.齿轮箱general arrangementgovern['^Q v E n]v.统治,支配,管理grain[^rein]n.纹理graphic['^r A fik]adj.图解的grasp[^r A sp]vt.抓住grid[^rid]n.格子,网格grind[^raind]v.磨,磨削,研磨grinding['^raindi N]n.磨光,磨削grinding machine磨床gripper[^rip E]n.抓爪,夹具groove[^ru:v]n.凹槽guide bush导套guide pillar导柱guide pillars and bushes导柱和导套Hhandset['h A ndset]n.电话听筒hardness['ha:dnis]n.硬度hardware['ha:dw Z E]n.硬件headstock['hedst C k]n.床头箱,★专业英語★主轴箱hexagonal[hek's A^E nl]a.六角形的,六角的hindrance['hindr E ns]n.障碍,障碍物hob[h C b]n.滚刀,冲头hollow-ware空心件horizontal[h C ri'z C ntl]a.水平的hose[h E uz]n.软管,水管hyperbolic[haip E'b C lik]adj.双曲线的Ii.e.(id est)[拉]也就是identical[ai'dentikl]a同样的identify[ai'dentifai]v.确定,识别idle['aidl]adj.空闲的immediately[i'mi:dj E tli]adv.正好,恰好impact['imp A kt]n.冲击impart[im'pa:t]v.给予implement['implim E nt]vt实现impossibility[imp C s E'biliti]n.不可能impression[im'pre F E n]n.型腔in contact with接触in terms of依据inasmuch(as)[in E z'm Q t F]conj.因为,由于inch-to-metric conversions英公制转换inclinable[in'klain E bl]adj.可倾斜的inclusion[in'klu F E n]n.内含物inconspicuous[ink E n'spikju E s]a.不显眼的incorporate[in'k C:p E reit]v合并,混合indentation[7inden'tei F E n]n.压痕indenter[in'dent E]n.压头independently[indi'pein E ntli]a.独自地,独立地inevitably[in'evit E bli]ad.不可避免地inexpensive[inik'spensiv]adj.便宜的inherently[in'hi E r E ntli]adv.固有的injection mould注塑模injection[in'd V ek F E n]n.注射in-line-of-draw直接脱模insert[in's E:t]n.嵌件inserted die嵌入式凹模inspection[in'spek F E n]n.检查,监督installation[inst E'lei F E n]n.安装integration[inti'^rei F E n]n.集成intelligent[in'telid V E nt]a.智能的intentinonally[in'ten F E n E li] adv加强地,集中地interface['int E feis]n..界面internal[in't E:nl]a.内部的interpolation[int E p E'lei F E n]n.插值法investment casting熔模铸造irregular[i'regjul E]adj.不规则的,无规律irrespective of不论,不管irrespective[iri'spektiv]a.不顾的,不考虑的issue['isju]vt.发布,发出Jjoint line结合线Kkerosene['ker E si:n]n.煤油keyboard['ki:b C:d]n.健盘knock[n R k]v敲,敲打L★专业英語★lance[la:ns]v.切缝lathe[lei T]n.车床latitude['l A titju:d]n.自由lay out布置limitation[limi'tei F E n]n.限度,限制,局限(性)local intelligence局部智能locate[l E u'keit]vt.定位logic['l C d V ik]n.逻辑longitudinal['l C nd V E'tju:dinl]a.纵向的longitudinally['l C nd V E'tju:dinl]a.纵向的look upon视作,看待lubrication[lju:bri'kei F E n]n.润滑Mmachine shop车间machine table工作台machining[m E'F i:ni N]n.加工made-to-measure定做maintenance['meintin E ns]n.维护,维修majority[m E'd V a:riti]n.多数make use of利用male[meil]a.阳的,凸形的malfunction['m A l'f Q N F E n]n.故障mandrel['m A dtil]n.心轴manifestation[m A nif E s'tei F E n]n.表现,显示massiveness['m A sivnis]厚实,大块measure['me V E]n.大小,度量microcomputer微型计算机microns['maikr C n]n.微米microprocessor微处理器mild steel低碳钢milling machine铣床mineral['min E r E l]n.矿物,矿产minimise['minimaiz]v.把···减到最少,最小化minute['minit]a.微小的mirror image镜像mirror['mir E]n.镜子MIT(Massachusetts Institute of Technology)麻省理工学院moderate['m C d E rit]adj.适度的modification[m R difi'kei F E n]n.修改,修正modulus['m C djul E s]n.系数mold[m E uld]n.模,铸模,v.制模,造型monitor['m C nit E]v.监控monograph['m C n E^ra:f]n.专著more often than not常常motivation[m E uti'vei F E n]n.动机mould split line模具分型线moulding['m E udi N]n.注塑件move away from抛弃multi-imprssion mould多型腔模Nnarrow['n A r E u]a.狭窄的NC(numerical control)数控nevertheless[7nev E T E'les]conj.,adv.然而,不过nonferrous['n C n'fer E s]adj.不含铁的,非铁的normally['n C:mli]adv.通常地novice['n C vis]n.新手,初学者nozzle['n C zl]n.喷嘴,注口numerical[nju'merikl]n.数字的O objectionable[E b'd V ek F E bl]adj.有异议的,讨厌的★专业英語★observe[E b'z E:v]vt.观察obviously['C bvi E sli]adv明显地off-line脱机的on-line联机operational[C p E'rei F E nl]adj.操作的,运作的opportunity[C p E'tju:niti]n.时机,机会opposing[E'p E uzi N]a.对立的,对面的opposite['C p E zit]n.反面a.对立的,对面的optimization[R ptimai'zei F E n]n.最优化orient['C:ri E nt]vt.确定方向orthodox['C:W E d C ks]adj.正统的,正规的overall['E uv E r C:l]a.全面的,全部的overbend v.过度弯曲overcome[E uv E'k Q m]vt.克服,战胜overlaping['E uv E'l A pi N]n.重叠overriding[E uv E'raidi N]a.主要的,占优势的Ppack[p A k]v.包装package['p A kid V]vt.包装pallet['p A lit]n.货盘panel['p A nl]n.面板paraffin['p A r E fin]n.石蜡parallel[p A r E lel]a.平行的penetration[peni'trei F E n]n.穿透peripheral[p E'rif E r E l]adj外围的periphery[p E'rif E ri]n.外围permit[p E'mit]v.许可,允许pessure casting压力铸造pillar['pil E]n.柱子,导柱pin[pin]n.销,栓,钉pin-point gate针点式浇口piston['pist E n]n.活塞plan view主视图plasma['pl A zm E]n.等离子plastic['pl A stik]n.塑料platen['pl A t E n]n.压板plotter[pl C t E]n.绘图机plunge[pl Q nd V]v翻孔plunge[pl Q nd V]v.投入plunger['pl Q nd V E]n.柱塞pocket-size袖珍portray[p C:'trei]v.描绘pot[p C t]n.壶pour[p C:]vt.灌,注practicable['pr A ktik E b]a.行得通的preferable['pref E r E bl]a.更好的,更可取preliminary[pri'limin E ri]adj初步的,预备的press setter装模工press[pres]n.压,压床,冲床,压力机prevent[pri'vent]v.妨碍primarily['praim E rili]adv.主要地procedure[pr E'si:d V E]n.步骤,方法,程序productivity.[pr E ud Q k'tiviti]n.生产力profile['pr E ufail]n.轮廓progressively[pr E'^resiv]ad.渐进地project[pr E'd V ekt]n.项目project[pr E'd V ekt]v.凸出projection[pr E'd V ek F E n]n.突出部分proper['pr C p E]a.本身的property['pr C p E ti]n.特性prototype['pr E ut E taip]n.原★专业英語★形proximity[pr C k'simiti]n.接近prudent['pru:d E nt]a.谨慎的punch[p Q nt F]v.冲孔punch shapper tool刨模机punch-cum-blanking die凹凸模punched tape穿孔带purchase['p E:t F E s]vt.买,购买push back pin回程杆pyrometer[pai'n C mit E]n.高温计Qquality['kwaliti]n.质量quandrant['kw C dr E nt]n.象限quantity['kw C ntiti]n.量,数量quench[kwent F]vt.淬火Rradial['reidi E l]adv.放射状的ram[r A m]n撞锤.rapid['r A pid]adj.迅速的rapidly['r A pidli]adv.迅速地raster['r A st E]n.光栅raw[r C:]adj.未加工的raw material原材料ream[ri:m]v铰大reaming[ri:mi N]n.扩孔,铰孔recall[ri'k C:l]vt.记起,想起recede[ri'si:d]v.收回,后退recess[ri'ses]n.凹槽,凹座,凹进处redundancy[ri'd Q nd E nsi]n.过多re-entrant凹入的r e f e r[r i'f E:]v.指,涉及,谈及reference['ref E r E ns]n.参照,参考refresh display刷新显示register['red V st E]v.记录,显示,记数regrind[ri:'^aind](reground[ri:'gru:nd]) vt.再磨研relative['rel E tiv]a.相当的,比较的relay['ri:lei]n.继电器release[ri'li:s]vt.释放relegate['rel E7geit]vt.把··降低到reliability[rilai E'biliti]n.可靠性relief valves安全阀relief[ri'li:f]n.解除relieve[ri'li:v]vt.减轻,解除remainder[ri'meind E]n.剩余物,其余部分removal[ri'mu:vl]n.取出remove[ri'mu:v]v.切除,切削reposition[rip E'zi F E n]n.重新安排represent[7repri'zent E]v代表,象征reputable['repjut E bl]a.有名的,受尊敬的reservoir['rez E vwa:]n.容器,储存器resident['rezid E nt]a.驻存的resist[ri'zist]vt.抵抗resistance[ri'zist E ns]n.阻力,抵抗resolution[7rez E'lu:F E n]n.分辨率respective[ri'spektiv]a.分别的,各自的respond[ris'p C nd]v.响应,作出反应responsibility[risp C ns E'biliti]n.责任restrain[ris'trein]v.抑制restrict[ris'trikt]vt限制,限定restriction[ris'trik F E n]n.限制retain[ri'tein]vt.保持,保留retaining plate顶出固定板reveal[ri'vil]vt.显示,展现★专业英語★reversal[ri'v E sl]n.反向right-angled成直角的rigidity[ri'd V iditi]n.刚度rod[r C d]n.杆,棒rotate['r E uteit]vt.(使)旋转rough machining粗加工rough[r Q f]a.粗略的routine[ru:'ti:n]n.程序rubber['r Q b E]n.橡胶runner and gate systems流道和浇口系统Ssand casting砂型铸造satisfactorily[7s A tis'f A ktrili]adv.满意地saw[a C:]n.锯子scale[skeil]n.硬壳score[sk C:]v.刻划scrap[skr A p]n.废料,边角料,切屑screwcutting切螺纹seal[si:l]vt.密封secondary storagesection cutting plane剖切面secure[si'kju E]v.固定secure[si'kju E]vt.紧固,夹紧,固定segment['se^m E nt]v.分割sensitive['sensitiv]a.敏感的sequence['si:kw E ns]n.次序sequential[si'kwen F E l]a.相继的seriously['si E ri E sli]adv.严重地servomechanism['s E:v E'mek E nizm] n.伺服机构Servomechanism Laboratoies伺服机构实验室servomotor['s E:v E m E ut E]n.伺服马达setter['set E]n安装者set-up机构sever['sev E]v切断severity[si'veriti]n.严重shaded[F A did]adj.阴影的shank[F A N k]n.柄.shear[F i E]n.剪,切shot[F C t]n.注射shrink[F ri N k]vi.收缩side sectional view侧视图signal['si^nl]n.信号similarity[simi'l A riti]n.类似simplicity[sim'plisiti]n.简单single-point cutting tool单刃刀具situate['sitjueit]vt.使位于,使处于slide[slaid]vi.滑动,滑落slideway['slaidwei]n.导轨slot[sl C t]n.槽slug[sl Q^]n.嵌条soak[s E uk]v.浸,泡,均热software['s C ftw Z E]n.软件solid['s C lid]n.立体,固体solidify[s E'lidifai]vt.vi.(使)凝固,(使)固化solution[s E'lu:F E n]n.溶液sophisiticated[s E'fistikeitid]adj.尖端的,完善的sound[saund]a.结实的,坚固的)s p a r k e r o s i o n火花蚀刻spindle['spindl]n.主轴spline[splain]n.花键split[split]n.侧向分型,分型spool[spu:l]n.线轴springback n.反弹spring-loaded装弹簧的sprue bush主流道衬套sprue puller浇道拉杆★专业英語★square[skw Z E]v.使成方形stage[steid V]n.阶段standardisation[7st A nd E dai'zei F E n] n.标准化startling['sta:tli N]a.令人吃惊的steadily['sted E li]adv.稳定地step-by-step逐步stickiness['stikinis]n.粘性stiffness['stifnis]n.刚度stock[st C k]n.毛坯,坯料storage tube display储存管显示storage['st C:rid V]n.储存器straightforward[streit'f C:w E d]a.直接的strain[strein]n.应变strength[stre N W]n.强度stress[stres]n.压力,应力stress-strain应力--应变stretch[stret F]v.伸展strike[straik]vt.冲击stringent['strind V E nt]a.严厉的stripper[strip E]n.推板stroke[strouk]n.冲程,行程structrural build-up结构上形成的sub-base垫板subject['s Q bd V ikt]vt.使受到submerge[s E b'm E:d V]v.淹没subsequent['s Q bsikwent]adj.后来的subsequently['s Q bsikwentli]adv.后来,随后substantial[s E b'st A n F E l]a.实质的substitute['s Q bstitju:t]vt.代替,.替换subtract[s E b'tr A kt]v.减,减去suitable['su:t E bl]a.合适的,适当的suitably['su:t E bli]ad.合适地sunk[s Q N k](sink的过去分词)v.下沉,下陷superior[s E'pi E ri E]adj.上好的susceptible[s E'sept E bl]adj.易受影响的sweep away扫过symmetrical[si'metrikl]a.对称的synchronize['si N kr E naiz]v.同步,同时发生Ttactile['t A ktail]a.触觉的,有触觉的tailstock['teilst C k]n.尾架tapered['teip E d]a.锥形的tapping['t A pi N]n.攻丝technique[tek'ni:k]n.技术tempering['temp E r N]n.回火tendency['tend E nsi]n.趋向,倾向tensile['tensail]a.拉力的,可拉伸的L2拉紧的,张紧的tension['ten F E n]n.拉紧,张紧terminal['t E:m E nl]n.终端机terminology[t E:mi'n C l E d V i]n.术语,用辞theoretically[W i:E'retikli]adv.理论地thereby['T Z E bai]ad.因此,从而thermoplastic['W E:m E u'pl A stik] a.热塑性的,n.热塑性塑料thermoset['W E:m E set]n.热固性thoroughly['W Q r E uli] adv.十分地,彻底地thread pitch螺距thread[W red]n.螺纹thrown up推上tilt[tilt]n.倾斜,翘起tolerance['t C l E r E ns]n..公差tong[t CN]n.火钳tonnage['t Q nid V]n.吨位,总吨数tool point刀锋tool room工具车间★专业英語★XiaoYingLiu131toolholder['tu:lh E uld E ]n.刀夹,工具柄toolmaker ['tu:l'meik E ]n 模具制造者toolpost grinder 工具磨床toolpost['tu:l'p E ust]n.刀架torsional ['t C :F E nl]a 扭转的.toughness['t C fnis]n.韧性trace [treis]vt.追踪tracer-controlled milling machine 仿形铣床transverse[tr A ns'v E :s]a.横向的tray [trei]n.盘,盘子,蝶treatment['tri:tm E nt]n.处理tremendous[tri'mend E s]a.惊人的,巨大的trend [trend]n.趋势trigger stop 始用挡料销tungsten['t Q N st E n]n.钨turning['t E :ni N ]n.车削twist[twist ]v.扭曲,扭转two-plate mould 双板式注射模Uultimately['Q ltimitli]adv 终于.un de r c ut mou l d i ng 侧向分型模undercut['Q nd E k Q t]n.侧向分型undercut['Q nd E k Q t]n.底切underfeed['Q nd E 'fi:d]a,底部进料的undergo[Q nd E '^E u]vt.经受underside['Q nd E said]n 下面,下侧undue[Q n'dju:]a.不适当的,过度的uniform['ju:nif C :m]a.统一的,一致的utilize ['ju:tilaiz]v 利用Utopian[ju't E upi E n]adj.乌托邦的,理想化的Vvalve[v A lv]n.阀vaporize['veip E raiz]vt.vi.汽化,(使)蒸发variation [v Z E ri'ei F E n]n.变化various ['v Z E ri E s]a.不同的,各种的vector feedrate computation 向量进刀速率计算vee [vi:]n.v 字形velocity[vi'l C siti]n.速度versatile['v E s E tail]a.多才多艺的,万用的vertical['v E :tikl]a.垂直的via [vai E ]prep.经,通过vicinity[v E 'siniti]n.附近viewpoint['vju:p C int]n.观点Wwander['w C nd E ]v.偏离方向warp[w C :p]v.翘曲washer ['w CF E ]n.垫圈wear [w Z E ]v.磨损well line 结合线whereupon [hw Z E r E 'p C n]adv.于是winding ['waindi N ]n.绕,卷with respect to 相对于withstand[wi T 'st A nd]vt.经受,经得起work[w E :k]n.工件workstage 工序wrinkle['ri N kl]n.皱纹vt.使皱Yyield[ji:ld]v.生产Zzoom[zu:]n.图象电子放大。
fix协议 resend(最新版)目录1.Fix 协议概述2.Resend 的作用和原理3.Fix 协议与 Resend 的结合应用4.Fix 协议与 Resend 在证券市场的重要性正文1.Fix 协议概述Fix(Financial Information eXchange)协议是一种用于证券市场信息传输的国际标准协议,主要用于实时报价、交易指令、交易确认等信息的传输。
Fix 协议采用统一的数据格式和传输方式,能够确保信息在各个系统间的准确传输,从而提高了证券市场的效率和安全性。
2.Resend 的作用和原理Resend(重传)是 Fix 协议中的一种机制,用于处理在传输过程中可能出现的数据丢失或损坏问题。
当发送方发现接收方未收到数据或接收方反馈错误信息时,发送方会重新发送数据,以确保信息的完整性和准确性。
Resend 机制的原理是在发送方维护一个待重传数据列表,当发现数据未到达接收方时,将该数据加入待重传列表并发送。
接收方收到重传数据后,将数据与本地存储的数据进行比对,如数据一致则更新本地数据,如不一致则反馈错误信息。
3.Fix 协议与 Resend 的结合应用Fix 协议与 Resend 机制的结合应用在证券市场中具有重要意义。
首先,Fix 协议统一了证券市场信息传输的标准,使得各个系统间的信息传输更加高效、准确。
而 Resend 机制则保证了在传输过程中可能出现的数据丢失或损坏问题得到及时解决,从而提高了证券市场的稳定性和可靠性。
4.Fix 协议与 Resend 在证券市场的重要性Fix 协议与 Resend 机制在证券市场中具有举足轻重的地位。
它们为证券市场的参与者提供了一个高效、稳定、安全的信息传输平台,使得市场参与者能够及时获取市场信息,进行投资决策。
同时,它们也为证券市场的监管者提供了有力的监管手段,有助于维护市场的公平、公正、公开。
TMS320VC5416Fixed-Point Digital Signal Processor Data ManualPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.Literature Number:SPRS095PMarch1999–Revised October2008Revision HistoryTMS320VC5416Fixed-Point Digital Signal ProcessorSPRS095P–MARCH 1999–REVISED OCTOBER 2008NOTE:Page numbers for previous revisions may differ from page numbers in the current version.This data sheet revision history highlights the technical changes made to the SPRS095O device-specific data sheet to make it an SPRS095P revision.Scope:This document has been reviewed for technical accuracy;the technical content is up-to-date as of the specified release date with the following corrections.2Revision History Submit Documentation FeedbackContentsTMS320VC5416Fixed-Point Digital Signal ProcessorSPRS095P–MARCH 1999–REVISED OCTOBER 2008Revision History ...........................................................................................................................1TMS320VC5416Features.......................................................................................................2Introduction.......................................................................................................................2.1Description ..................................................................................................................2.2PinAssignments............................................................................................................2.2.1TerminalAssignments forthe GGUPackage...............................................................2.2.2Pin AssignmentsforthePGEPackage......................................................................2.2.3Signal Descriptions ..............................................................................................3Functional Overview ...........................................................................................................3.1Memory ......................................................................................................................3.1.1Data Memory .....................................................................................................3.1.2Program Memory ................................................................................................3.1.3Extended Program Memory ...................................................................................3.2On-Chip ROM With Bootloader ...........................................................................................3.3On-Chip RAM ...............................................................................................................3.4On-Chip Memory Security .................................................................................................3.5Memory Map ................................................................................................................3.5.1Relocatable Interrupt Vector Table ............................................................................3.6On-Chip Peripherals .......................................................................................................3.6.1Software-Programmable Wait-State Generator .............................................................3.6.2Programmable Bank-Switching ................................................................................3.6.3Bus Holders ......................................................................................................3.7Parallel I/O Ports ...........................................................................................................3.7.1Enhanced 8-/16-Bit Host-Port Interface (HPI8/16)..........................................................3.7.2HPI Nonmultiplexed Mode ......................................................................................3.8Multichannel Buffered Serial Ports (McBSPs)..........................................................................3.9Hardware Timer ............................................................................................................3.10Clock Generator ............................................................................................................3.11Enhanced External Parallel Interface (XIO2)...........................................................................3.12DMA Controller .............................................................................................................3.12.1Features ..........................................................................................................3.12.2DMA External Access ...........................................................................................3.12.3DMA Memory Maps .............................................................................................3.12.4DMA Priority Level ...............................................................................................3.12.5DMA Source/Destination Address Modification .............................................................3.12.6DMA in Autoinitialization Mode ................................................................................3.12.7DMA Transfer Counting .........................................................................................3.12.8DMA Transfer in Doubleword Mode ..........................................................................3.12.9DMA Channel Index Registers .................................................................................3.12.10DMA Interrupts ..................................................................................................3.12.11DMA Controller Synchronization Events .....................................................................3.13General-Purpose I/O Pins .................................................................................................3.13.1McBSP Pins as General-Purpose I/O .........................................................................3.13.2HPI Data Pins as General-Purpose I/O ......................................................................3.14Device ID Register .........................................................................................................3.15Memory-Mapped Registers ...............................................................................................3.16McBSP Control Registers and Subaddresses ..........................................................................3.17DMA Subbank Addressed Registers ....................................................................................3.18Interrupts ....................................................................................................................4Support .............................................................................................................................Contents3TMS320VC5416Fixed-Point Digital Signal ProcessorSPRS095P–MARCH1999–REVISED 4.1Documentation Support...................................................................................................4.2Device and Development-Support Tool Nomenclature................................................................5Electrical Specifications......................................................................................................5.1Absolute Maximum Ratings...............................................................................................5.2Recommended Operating Conditions...................................................................................5.3Electrical Characteristics.................................................................................................5.3.1Test Loading.....................................................................................................5.3.2Timing Parameter Symbology............................................................................................5.3.3Internal Oscillator With External Crystal.................................................................................5.4Clock Options...............................................................................................................5.4.1Divide-By-Two and Divide-By-Four Clock Options..........................................................5.4.2Multiply-By-N Clock Option(PLL Enabled)...................................................................5.5Memory and Parallel I/O Interface Timing..............................................................................5.5.1Memory Read....................................................................................................5.5.2Memory Write....................................................................................................5.5.3I/O Read..........................................................................................................5.5.4I/O Write..........................................................................................................5.5.5Ready Timing for Externally Generated Wait States..................................................................5.5.6and Timings...............................................................................................5.5.7Reset,BIO,Interrupt,and MP/MC Timings.............................................................................5.5.8Instruction Acquisition and Interrupt Acknowledge Timings..........................................5.5.9External Flag(XF)and TOUT Timings..................................................................................5.5.10Multichannel Buffered Serial Port(McBSP)Timing...................................................................5.5.10.1McBSP Transmit and Receive Timings....................................................................5.5.10.2McBSP General-Purpose I/O Timing.......................................................................5.5.10.3McBSP as SPI Master or Slave Timing....................................................................5.5.11Host-Port Interface Timing...............................................................................................5.5.11.1HPI8Mode.....................................................................................................5.5.11.2HPI16Mode....................................................................................................6Mechanical Data.................................................................................................................6.1Package Thermal Resistance Characteristics..........................................................................4Contents Submit Documentation FeedbackTMS320VC5416Fixed-Point Digital Signal Processor SPRS095P–MARCH1999–REVISED OCTOBER2008List of Figures2-1144-Ball GGU MicroStar BGA™(Bottom View).............................................................................2-2144-Pin PGE Low-Profile Quad Flatpack(Top View).......................................................................3-1TMS320VC5416Functional Block Diagram..................................................................................3-2Program and Data Memory Map................................................................................................3-3Extended Program Memory Map...............................................................................................3-4Process Mode Status Register..................................................................................................3-5Software Wait-State Register(SWWSR)[Memory-Mapped Register(MMR)Address0028h].........................3-6Software Wait-State Register(SWWSR)[Memory-Mapped Register(MMR)Address0028h].........................3-7Bank-Switching Control Register BSCR)[MMR Address0029h]...........................................................3-8Host-Port Interface—Nonmulltiplexed Mode.................................................................................3-9HPI Memory Map.................................................................................................................3-10Multichannel Control Register(MCR1).........................................................................................3-11Multichannel Control Register(MCR2).........................................................................................3-12Pin Control Register(PCR)......................................................................................................3-13Nonconsecutive Memory Read and I/O Read Bus Sequence.............................................................3-14Consecutive Memory Read Bus Sequence(n=3reads)..................................................................3-15Memory Write and I/O Write Bus Sequence.................................................................................3-16DMA Transfer Mode Control Register(DMMCRn)...........................................................................3-17On-Chip DMA Memory Map for Program Space(DLAXS=0and SLAXS=0).........................................3-18On-Chip DMA Memory Map for Data and IO Space(DLAXS=0and SLAXS=0)....................................3-19DMPREC Register................................................................................................................3-20General-Purpose I/O Control Register(GPIOCR)[MMR Address003Ch]................................................3-21General-Purpose I/O Status Register(GPIOSR)[MMR Address003Dh].................................................3-22Device ID Register(CSIDR)[MMR Address003Eh].........................................................................3-23IFR and IMR Registers...........................................................................................................5-1Tester Pin Electronics............................................................................................................5-2Internal Divide-By-Two Clock Option With External Crystal...............................................................5-3External Divide-By-Two Clock Timing.........................................................................................5-4Multiply-By-One Clock Timing..................................................................................................5-5Nonconsecutive Mode Memory Reads.......................................................................................5-6Consecutive Mode Memory Reads............................................................................................5-7Memory Write(MSTRB=0)....................................................................................................5-8Parallel I/O Port Read(IOSTRB=0).........................................................................................5-9Parallel I/O Port Write(IOSTRB=0)..........................................................................................5-10Memory Read With Externally Generated Wait States.....................................................................5-11Memory Write With Externally Generated Wait States.....................................................................5-12I/O Read With Externally Generated Wait States...........................................................................5-13I/O Write With Externally Generated Wait States...........................................................................5-14HOLD and HOLDA Timings(HM=1).........................................................................................List of Figures5TMS320VC5416Fixed-Point Digital Signal ProcessorSPRS095P–MARCH1999–REVISED 5-15Reset and BIO Timings.........................................................................................................5-16Interrupt Timing..................................................................................................................5-17MP/MC Timing...................................................................................................................5-18Instruction Acquisition(IAQ)and Interrupt Acknowledge(IACK)Timings................................................5-19External Flag(XF)Timing......................................................................................................5-20TOUT Timing.....................................................................................................................5-21McBSP Receive Timings.......................................................................................................5-22McBSP Transmit Timings.......................................................................................................5-23McBSP General-Purpose I/O Timings........................................................................................5-24McBSP Timing as SPI Master or Slave:CLKSTP=10b,CLKXP=0....................................................5-25McBSP Timing as SPI Master or Slave:CLKSTP=11b,CLKXP=0....................................................5-26McBSP Timing as SPI Master or Slave:CLKSTP=10b,CLKXP=1....................................................5-27McBSP Timing as SPI Master or Slave:CLKSTP=11b,CLKXP=1....................................................5-28Using HDS to Control Accesses(HCS Always Low)........................................................................5-29Using HCS to Control Accesses...............................................................................................5-30HINT Timing......................................................................................................................5-31GPIOx Timings...................................................................................................................5-32Nonmultiplexed Read Timings.................................................................................................5-33Nonmultiplexed Write Timings.................................................................................................5-34HRDY Relative to CLKOUT....................................................................................................6List of Figures Submit Documentation FeedbackTMS320VC5416Fixed-Point Digital Signal Processor SPRS095P–MARCH1999–REVISED OCTOBER2008List of Tables2-1Terminal Assignments for the TMS320VC5416GGU(144-Pin BGA Package).........................................2-2Signal Descriptions...............................................................................................................3-1Standard On-Chip ROM Layout...............................................................................................3-2Processor Mode Status(PMST)Register Bit Fields........................................................................3-3Software Wait-State Register(SWWSR)Bit Fields.........................................................................3-4Software Wait-State Control Register(SWCR)Bit Fields..................................................................3-5Bank-Switching Control Register(BSCR)Fields..............................................................................3-6Bus Holder Control Bits..........................................................................................................3-7Sample Rate Input Clock Selection...........................................................................................3-8Clock Mode Settings at Reset.................................................................................................3-9DMD Section of the DMMCRn Register......................................................................................3-10DMA Reload Register Selection...............................................................................................3-11DMA Interrupts...................................................................................................................3-12DMA Synchronization Events..................................................................................................3-13DMA Channel Interrupt Selection..............................................................................................3-14Device ID Register(CSIDR)Bits................................................................................................3-15CPU Memory-Mapped Registers................................................................................................3-16Peripheral Memory-Mapped Registers for Each DSP Subsystem........................................................3-17McBSP Control Registers and Subaddresses.................................................................................3-18DMA Subbank Addressed Registers...........................................................................................3-19Interrupt Locations and Priorities................................................................................................5-1Input Clock Frequency Characteristics.........................................................................................5-2Clock Mode Pin Settings for the Divide-By-2and By Divide-By-4Clock Options.......................................5-3Divide-By-2and Divide-By-4Clock Options Timing Requirements.......................................................5-4Divide-By-2and Divide-By-4Clock Options Switching Characteristics...................................................5-5Multiply-By-N Clock Option Timing Requirements..........................................................................5-6Multiply-By-N Clock Option Switching Characteristics......................................................................5-7Memory Read Timing Requirements..........................................................................................5-8Memory Read Switching Characteristics.....................................................................................5-9Memory Write Switching Characteristics.....................................................................................5-10I/O Read Timing Requirements................................................................................................5-11I/O Read Switching Characteristics...........................................................................................5-12I/O Write Switching Characteristics............................................................................................5-13Ready Timing Requirements for Externally Generated Wait States......................................................5-14Ready Switching Characteristics for Externally Generated Wait States..................................................5-15HOLD and HOLDA Timing Requirements....................................................................................5-16HOLD and HOLDA Switching Characteristics...............................................................................5-17Reset,BIO,Interrupt,and MP/MC Timing Requirements..................................................................5-18Instruction Acquisition(IAQ)and Interrupt Acknowledge(IACK)Switching Characteristics...........................List of Tables7TMS320VC5416Fixed-Point Digital Signal ProcessorSPRS095P–MARCH1999–REVISED 5-19External Flag(XF)and TOUT Switching Characteristics...................................................................5-20McBSP Transmit and Receive Timing Requirements.......................................................................5-21McBSP Transmit and Receive Switching Characteristics..................................................................5-22McBSP General-Purpose I/O Timing Requirements........................................................................5-23McBSP General-Purpose I/O Switching Characteristics...................................................................5-24McBSP as SPI Master or Slave Timing Requirements(CLKSTP=10b,CLKXP=0).................................5-25McBSP as SPI Master or Slave Switching Characteristics(CLKSTP=10b,CLKXP=0).............................5-26McBSP as SPI Master or Slave Timing Requirements(CLKSTP=11b,CLKXP=0).................................5-27McBSP as SPI Master or Slave Switching Characteristics(CLKSTP=11b,CLKXP=0).............................5-28McBSP as SPI Master or Slave Timing Requirements(CLKSTP=10b,CLKXP=1).................................5-29McBSP as SPI Master or Slave Switching Characteristics(CLKSTP=10b,CLKXP=1).............................5-30McBSP as SPI Master or Slave Timing Requirements(CLKSTP=11b,CLKXP=1).................................5-31McBSP as SPI Master or Slave Switching Characteristics(CLKSTP=11b,CLKXP=1).............................5-32HPI8Mode Timing Requirements.............................................................................................5-33HPI8Mode Switching Characteristics..........................................................................................5-34HPI16Mode Timing Requirements............................................................................................5-35HPI16Mode Switching Characteristics.......................................................................................6-1Thermal Resistance Characteristics............................................................................................8Submit Documentation Feedback List of Tables1TMS320VC5416FeaturesTMS320VC5416 Fixed-Point Digital Signal Processor SPRS095P–MARCH1999–REVISED OCTOBER2008Reads•Advanced Multibus Architecture With ThreeSeparate16-Bit Data Memory Buses and One•Arithmetic Instructions With Parallel Store and Program Memory Bus Parallel Load•40-Bit Arithmetic Logic Unit(ALU)Including a•Conditional Store Instructions40-Bit Barrel Shifter and Two Independent•Fast Return From Interrupt 40-Bit Accumulators•On-Chip Peripherals•17-×17-Bit Parallel Multiplier Coupled to a–Software-Programmable Wait-State 40-Bit Dedicated Adder for Non-Pipelined Generator and ProgrammableSingle-Cycle Multiply/Accumulate(MAC)Bank-SwitchingOperation–On-Chip Programmable Phase-Locked •Compare,Select,and Store Unit(CSSU)for the Loop(PLL)Clock Generator With External Add/Compare Selection of the Viterbi Operator Clock Source–One16-Bit Timer•Exponent Encoder to Compute an Exponent–Six-Channel Direct Memory Access(DMA) Value of a40-Bit Accumulator Value in aControllerSingle Cycle–Three Multichannel Buffered Serial Ports •Two Address Generators With Eight Auxiliary(McBSPs)Registers and Two Auxiliary Register–8/16-Bit Enhanced Parallel Host-Port Arithmetic Units(ARAUs)Interface(HPI8/16)•Data Bus With a Bus Holder Feature•Power Consumption Control With IDLE1,•Extended Addressing Mode for8M×16-Bit IDLE2,and IDLE3Instructions With Maximum Addressable External ProgramPower-Down ModesSpace•CLKOUT Off Control to Disable CLKOUT •128K×16-Bit On-Chip RAM Composed of:•On-Chip Scan-Based Emulation Logic,IEEE –Eight Blocks of8K×16-Bit On-ChipStd1149.1(JTAG)Boundary Scan Logic(1) Dual-Access Program/Data RAM•144-Pin Ball Grid Array(BGA)(GGU Suffix)–Eight Blocks of8K×16-Bit On-ChipSingle-Access Program RAM•144-Pin Low-Profile Quad Flatpack(LQFP)(PGE Suffix)•16K×16-Bit On-Chip ROM Configured forProgram Memory• 6.25-ns Single-Cycle Fixed-Point InstructionExecution Time(160MIPS)•Enhanced External Parallel Interface(XIO2)•8.33-ns Single-Cycle Fixed-Point Instruction •Single-Instruction-Repeat and Block-RepeatExecution Time(120MIPS) Operations for Program Code• 3.3-V I/O Supply Voltage(160and120MIPS)•Block-Memory-Move Instructions for BetterProgram and Data Management• 1.6-V Core Supply Voltage(160MIPS)•Instructions With a32-Bit Long Word Operand• 1.5-V Core Supply Voltage(120MIPS)(1)IEEE Standard1149.1-1990Standard-Test-Access Port and •Instructions With Two-or Three-OperandBoundary Scan ArchitectureTMS320C54x,TMS320are trademarks of Texas Instruments.All other trademarks are the property of their respective owners.PRODUCTION DATA information is current as of publication date.Copyright©1999–2008,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.。
国内图书分类号:F830.91国际图书分类号:339.743管理学硕士学位论文黑龙江省固定资产投资结构优化研究硕士研究生:张学发导师:胡珑瑛教授申请学位:管理学硕士学科、专业:技术经济及管理所在单位:黑龙江省财政厅答辩日期:2007年3月授予学位单位:哈尔滨工业大学Classified Index:F830.91U.D.C.: 339.743Dissertation for the Master Degree in ManagementHEILONGJIANG FIXED ASSETSCAPITAL CONSTRUCTION INVESTMENT CONSTRUCTION IS EXCELLENT TO TURN THE RESEARCHCandidate:Zhang XuefaSupervisor: Prof. Hu LongyingAcademic Degree Applied for: Master Degree of Management Specialty: Technical Economy and Management Affiliation:Heilongjiang Province Treasure Bureau Defense: March, 2007ofDateDegree-Offering-Institution: Harbin Institute of Technology哈尔滨工业大学管理学硕士学位论文摘要投资是经济增长和经济发展必不可少的重要手段,从经济学的角度看,投资增长与经济增长为互相联动的关系。
改革开放以来,固定资产投资一直在我国的经济增长中发挥着十分重要的作用,投资调控始终是政府宏观调控中一个非常重要的组成部分,无论是抑制经济过热还是扩大国内需求,投资结构调整都首当其冲。
研究固定资产投资结构优化不仅可以促进产业结构调整、能最大限度的利用各种资源,实现资源的优化配置,而且对保持整个国民经济稳定、协调、快速发展具有十分重要的意义。
使⽤SSIS对DynamicsCRM系统进⾏数据迁移嗨,各位。
近期项⽬⼀直都⾮常忙,⽽且⾃⼰也⼀直在思考职业发展的问题,所以有⾮常长⼀段时间没静下⼼写⼏篇Blog 了。
近期我參与的项⽬是Dynamics CRM 2011 到 Dynamics CRM 2013 Online的数据迁移,刚好接着今天这个机会和⼤家分析⼀下数据迁移的⼼得吧。
读过我之前⽂章的朋友肯定记得我把Dynamics CRM的接⼝分为了两⼤类:1)功能接⼝,2)数据接⼝。
今天要说的数据迁移能够理解为数据接⼝,实现数据接⼝的⽅式有⾮常多种,⽐⽅C#制作的程序,数据库层的SQL 脚本,以及今天我要和给⼤家介绍的主⾓SQL Server Integration Service(SSIS)。
为什么要使⽤SSIS呢?肯定是简单了,SSIS提供了功能丰富的控件给我们使⽤,⽐⽅:FTP控件,Excel控件,以及⼤量五花⼋门的控件以及第三⽅组件。
回到今天我们的话题,怎样使⽤SSIS实现Dynamics CRM 2011 与 Dynamics CRM 2013之前的数据迁移呢?我们有两种⽅案可选:1)使⽤Script Component编写Proxy来处理Dynamics CRM数据的CRUD操作,2)使⽤第三⽅的Dynamics CRM Component实现Dynamics CRM数据的CRUD操作。
这⾥就要依据项⽬情况来进⾏把控了,假设数据量不是⾮常多,且数据结构简单,当然是⽤ScriptComponent了,反之则是第三反的收费组件,⽐如:Cozyroc, SSIS Integration Toolkit for Dynamics CRM。
顺便提下,第⼆个组件是⼜咱们的Denical Cai开发的。
在数据迁移的过程中,最⿇烦的事情还是处理特殊结构的实体,⽐如活动类型的实体Service Appointment,以及包括Party List 控件的Opportunity实体。
模具制造业常用英语中文解说作者:佚名来源:不详发布时间:2008-3-9 0:58:18 发布人:admin减小字体增大字体Aabrasive grinding 强力磨削 L3abrasive[E'breisiv] a.磨料的, 研磨的 L2,3absence ['AbsEns] n.. 不在,缺席 L17accesssory[Ak'sesEri] n.附件 L10accommodate[E'kCmEdeit] v. 适应 L5accordingly[E'kC:diNli] adv.因此,从而,相应地 L7,13accuracy['AkjurEsi] n精度,准确性 L1,3actuate['Aktjueit] vt.开动(机器), 驱动 L8adequate['Adikwit] a. 足够的 L13adhesive[Ed'hi:siv] n. 粘合剂 L22adjacent[E'dVeisnt] a. 邻近的 L13adopt[E'dCpt] vt. 采用 L4advance [Ed'vA:ns] n.进步 L7advisable [Ed'vaizbl] adj. 可取的 L20agitate['AdViteit] v. 摇动 L2a large extent 很大程度 L4,13algorithm ['Al^EriTEm] n. 算法 L6align [E'lain] v 定位,调准 L17alignment[E'lainmEnt] n. 校直 L11all-too-frequent 频繁 L17allowance[E'lEuens] n. 容差, 余量 L5alternate['C:ltEnit]v.交替,轮流 L1alternative[C:l'tE:nEtiv] n. 替换物 L3alternatively[C:l'tE:nEtivli] ad. 做为选择, 也许 L5aluminiun[7Alju'minjEm] n.铝 L2ample['Ampl] adj. 充足的 L20analysis [E'nAlEsis] n. 分析 L6ancillary['AnsilEri] a.补助的, 副的 L4angular ['A^julE] adj. 有角的 L20annealing[E'li:liN] n.退火 L2aperture ['ApEtFE] n.孔 L17applied loads 作用力 L1appropriate [E'prEuprieit] a. 适当的 L6,20arc[a:k] n.弧, 弓形 L10arise[E'raiz] vi. 出现, 发生 L21arrange[E'reidV] v. 安排 L12article['a:tikl] n.制品, 产品 L21ascertain[7AsE'tein] vt. 确定, 查明 L1assemble[E'sembl] vt.组装 L4attitude ['Atitju:d] n 态度 L17auxiliary [C:^'ziljEri]adj. 辅助的 L8avoid[E'vCid] v.避免 L7axis['Aksis] n.轴 L5axle['Aksl] n.轮轴, 车轴 L1Bbackup['bAk7Qp] n. 备份 L9batch [bAtF] n 一批 L17bearing['bZEriN] n.轴承,支座 L21bed[bed] n. 床身 L5behavior[bi'heivjE] n. 性能 L1bench-work 钳工工作 L4bend[bend] v.弯曲 L1beneath[bi'ni:W] prep在···下 L4bin [bin] n. 仓,料架 L19blank [blANk] n. 坯料 L20blank [blANk] v. 冲裁,落料 L17blanking tool 落料模 L17blast [blQst] n.一阵(风) L18blemish['blemiF] n. 缺点, 污点 L13bolster['bEulstE] n. 模座,垫板 L4,5boost[bu:st] n. 推进 L9boring['bC:riN] n.镗削, 镗孔 L4,5bracket ['brAkit] n. 支架 L19brass [brAs] n.黄铜 L2break down 破坏 L1breakage ['breikidV] n.破坏 L17bridge piece L16brine[brain] n. 盐水 L2brittle['britl] adv.易碎的 L1buffer [bQfE] n.缓冲器 L8built-in 内装的 L9bulging [bQldViN] n. 凸肚 L22burr [bE:] n. 毛刺 L17bush [buF] n. 衬套 L17bush[buF]n. 衬套 L5by far (修饰比较级, 最高级)···得多, 最 L3 by means of 借助于 L5Ccabinet ['kAbinit] n.橱柜 L7call upon 要求 L17carbide['ka:baid] n.碳化物 L10carburzing['ka:bjuretiN] n. 渗碳 L2carriage['kAridV] n.拖板, 大拖板 L5carry along 一起带走 L18carry down over 从···上取下 L21carry out 完成 L17case hardening 表面硬化 L2case[keis] n. 壳, 套 L2cast steel 铸钢 L17casting['ka:stiN] n. 铸造,铸件 L3category['kAtE^Euri] n. 种类 L6,15caution ['kC:FEn] n. 警告,警示 L17cavity and core plates 凹模和凸模板 L11cavity['kAviti] n.型腔, 腔, 洞 L4,10centre-drilling 中心孔 L5ceramic[si'rAmik] n.陶瓷制品 L3chain doted line 点划线 L11channel['tFAnl] n.通道, 信道 L8characteristic[kArEktE'ristik] n.特性 L1check[tFek] v.核算 L21chip[tFip] n.切屑, 铁屑 L3chuck [tFQk] n.卡盘 L5,8chute [Fu:t] n. 斜道 L19circa ['sEkE:] adv. 大约 L7circlip['sE:klip] n.(开口)簧环 L22circuit['sE:kit] n. 回路, 环路 L13circular supoport block L5circulate['sE:kjuleid] v.(使)循环 L13clamp [klAmp] vt 夹紧 L17clamp[klAmp] n.压板 L12clay[klei] n. 泥土 L2,7clearance ['kliErEns] n. 间隙 L17clip [klip] vt. 切断,夹住 L19cold hobbing 冷挤压 L4cold slug well 冷料井 L12collapse[kE'lAps] vi.崩塌, 瓦解 L22collapsible[kE'lApsEbl] adj.可分解的 L22combination [kCmbi'neiFEn] n. 组合 L18commence[kE'mens] v. 开始, 着手 L16commence[kE'mens]v. 开始 L21commercial [kE'mE:FEl] adj. 商业的 L7competitive[kEm'petitiv] a. 竞争的 L9complementary[7kCmpli'mentEri] a. 互补的 L5 complexity [kem'pleksiti] n.复杂性 L8complicated['kCmplEkeitid] adj.复杂的 L2complication [kCmpli'keiFEn] n. 复杂化 L5,20compression [kEm'preFEn] n.压缩 L1comprise[kEm'prais] vt.包含 L16compromise['kCmprEmaiz] n. 妥协, 折衷 L13 concern with 关于 L6concise[kEn'sais] a. 简明的, 简练的 L9confront[kEn'frQnt] vt. 使面临 L14connector[kE'nektE] n. 连接口, 接头 L14consequent['kCnsikwEnt] a. 随之发生的, 必然的 L3 console ['kCnsoul] n.控制台 L8consume [kEn'sjum] vt. 消耗, 占用 L7consummate [kEn'sQmeit] vt. 使完善 L6container[kEn'teinE] n. 容器 L11contingent[ken'tindVEnt] a.可能发生的 L9contour['kEntuE] n.轮廓 L5,21conventional[kEn'venFEnl] a. 常规的 L4converge[kEn'vE:dV] v.集中于一点 L21conversant[kCn'vE:sEnt] a. 熟悉的 L15conversion[kEn'vE:FEn] n 换算, 转换 L7conveyer[ken'veiE] n. 运送装置 L12coolant['ku:lEnt] n. 冷却液 L13coordinate [kEu'C:dnit] vt. (使)协调 L8copy machine 仿形(加工)机床 L4core[kC:] n. 型芯, 核心 L2,4corresponding [ka:ri'spCdiN] n.相应的 L7counteract [kauntE'rAkt] vt. 反作用,抵抗 L20 couple with 伴随 L20CPU (central processing unit) 中央处理器 L9 crack[krAk ] v.(使)破裂,裂纹 L1,17critical['kritikl] adj.临界的 L2cross-hatching 剖面线 L16cross-section drawn 剖面图 L11cross-slide 横向滑板 L5CRT (cathoder-ray tube) 阴极射线管 L9crush[krQF]vt.压碎 L1cryogenic[7kraiE'dVenik ]a.低温学的 L1crystal['kristl] adj.结晶状的 L1cubic['kju:bik] a. 立方的, 立方体的 L3cup [kQp] vt (使)成杯状, 引伸 L18curable ['kjurEbl] adj. 可矫正的 L20curvature['kE:vEtFE] n.弧线 L21curve [kE:v] vt. 使弯曲 L20cutter bit 刀头, 刀片 L3cyanide['saiEnaid] n.氰化物 L2Ddash [dAF] n. 破折号 L6daylight ['deilait] n. 板距 L12decline[di'klain] v.下落,下降,减少, L3,9deform[di'fC:m] v. (使)变形 L1,3demonstrate['demEstreit ] v证明 L21depict[di'pikt ] vt 描述 L18deposite [di'pCzit] vt. 放置 L20depression[di'preFEn] n. 凹穴 L12descend [di'sent] v. 下降 L20desirable[di'zairEbl] a. 合适的 L2detail ['diteil] n.细节,详情 L17deterioration[ditiEri:E'reiFEn] n. 退化, 恶化 L12 determine[di'tE:min] v.决定 L16diagrammmatic[7daiEgrE'mAtik].a.图解的,图表的 L10 dictate['dikteit] v. 支配 L12die[dai] n.模具, 冲模, 凹模 L2dielectric[daii'lektrik] n. 电介质 L10die-set 模架 L19digital ['didVitl ] n.数字式数字, a.数字的 L3,6 dimensional[dddi'menFEnl] a. 尺寸的, 空间的 L3 discharge[dis'tFa:dV] n.v. 放电, 卸下, 排出 L3 discharge[dis'tFa:dV] v.卸下 L8discrete [dis'cri:t] adj. 离散的,分立的 L7dislodge[dis'lCdV] v. 拉出, 取出 L12dissolution[disE'lu:FEn] n.结束 L9distinct [dis'tiNkt] a.不同的,显著的 L6distort [dis'dC:t] vt. 扭曲 L20distort[dis'tC:t] vt. (使)变形, 扭曲 L1distributed system 分布式系统 L9dowel ['dauEl] n. 销子 L19dramaticlly [drE'mAtikli] adv. 显著地 L7drastic ['drAstik] a.激烈的 L17draughting[dra:ftiN] n. 绘图 L16draughtsman['drAftsmEn] n. 起草人 L16drawing['drC:iN] n. 制图 L11drill press 钻床 L8drum [drQm] n.鼓轮 L8dual ['dju:El] adv. 双的,双重的 L18ductility [dQk'tiliti ] n.延展性 L1,21dynamic [dai'nAmik ] adj 动力的 L6Eedge [edV] n .边缘 L20e.g.(exempli gratia) [拉] 例如 L12ejector [i'dVektE] n.排出器, L18ejector plate 顶出板 L16ejector rob 顶杆 L5elasticity[ilA'stisiti] n.弹性 L1electric dicharge machining 电火花加工L3electrical discharge machining电火花加工 L10electrochemical machining 电化学加工L3electrode[i'lektrEud] n. 电极 L10electro-deposition 电铸 L4elementary [elE'mentEri] adj.基本的 L2eliminate[i'limineit] vt. 消除, 除去 L10elongate[i'lCN^et] vt. (使)伸长, 延长 L1emerge [i'mE:dV] vi. 形成, 显现 L20emphasise['emfEsaiz] vt. 强调 L4endeavour[en'devE] n. 尽力 L17engagement[in'^eidVment] n. 约束, 接合 L22 enhance[in'hAns] vt. 提高, 增强 L9ensure [in'FuE] vt. 确保,保证 L17envisage[in'vizidV] vt.设想 L15erase[i'reis] vt. 抹去, 擦掉 L16evaluation[i'vAlju7eiFEn] n. 评价, 估价L1eventually[i'vEntFuEli ] adv.终于 L21evolution[evE'lu:FEn] n.进展 L16excecution[eksi'kju:FEn] n. 执行, 完成 L9 execute ['ekskju:t] v. 执行 L8exerte [i^'zE:t] vt. 施加 L20experience[iks'piriEns] n. 经验 L16explosive[iks'plEusiv]adj.爆炸(性)的 L22extend[eks'tend] v. 伸展 L2external[eks'tE:nl] a. 外部的 L5,11extract[eks'trAkt] v. 拔出 L14extreme[iks'tri:m] n. 极端 L13extremely[iks'tri:mli] adv. 非常地 L12extremity[iks'tmiti] n. 极端 L13extrusion[eks'tru:VEn] n. 挤压, 挤出 L3FF (Fahrenheit)['fArEnhait]n.华氏温度 L2fabricate ['fAbrikeit] vt.制作,制造 L7facilitate [fE'siliteit] vt. 帮助 L6facility[fE'siliti] n. 设备 L4facing[feisiN] n. 端面车削 L5fall within 属于, 适合于 L15fan[fAn] n.风扇 L7far from 毫不, 一点不, 远非 L9fatigue[fE'ti^] n.疲劳 L1feasible ['fi:zEbl] a 可行的 L18feature ['fi:tFE] n.特色, 特征 L7,17feed[fi:d] n.. 进给 L5feedback ['fi:dbAk] n. 反馈 L8female['fi:meil] a. 阴的, 凹形的 L11ferrule['ferEl] n. 套管 L14file system 文件系统 L9fitter['fitE] n.装配工, 钳工 L4fix[fiks] vt. 使固定, 安装, vi. 固定 L11fixed half and moving half 定模和动模 L11 flat-panel technology 平面(显示)技术 L9flexibility[fleksi'biliti] n. 适应性, 柔性 L9flexible['fleksEbl] a. 柔韧的 L13flow mark 流动斑点 L13follow-on tool 连续模 L18foregoing ['fC:'^EuiN]adj. 在前的,前面的L8foretell[fC:'tell] vt. 预测, 预示, 预言 L9forge[fC:dV] n. v. 锻造 L3forming[fC:miN] n. 成型 L3four screen quadrants 四屏幕象限 L9fracture['frAktFE] n.破裂 L21free from 免于 L21Ggap[^Ap] n. 裂口, 间隙 L10gearbox['^iEbCks] n.齿轮箱 L5general arrangement L16govern['^QvEn] v.统治, 支配, 管理 L13grain [^rein] n. 纹理 L20graphic ['^rAfik] adj. 图解的 L6grasp [^rAsp] vt. 抓住 L8grid[^rid] n. 格子, 网格 L16grind[^raind] v. 磨, 磨削, 研磨 L3grinding ['^raindiN] n. 磨光,磨削 L3,20grinding machine 磨床 L5gripper[^ripE] n. 抓爪, 夹具 L9groove[^ru:v] n. 凹槽 L12guide bush 导套 L5guide pillar 导柱 L5guide pillars and bushes 导柱和导套 L11Hhandset['hAndset] n. 电话听筒 L4hardness['ha:dnis] n.硬度 L1,2hardware ['ha:dwZE] n. 硬件 L6headstock['hedstCk] n.床头箱, 主轴箱 L5hexagonal[hek'sA^Enl] a. 六角形的, 六角的 L11 hindrance['hindrEns] n.障碍, 障碍物 L11hob[hCb] n. 滚刀, 冲头 L4hollow-ware 空心件 L21horizontal[hCri'zCntl] a. 水平的 L16hose[hEuz] n. 软管, 水管 L13hyperbolic [haipE'bClik] adj.双曲线的 L7Ii.e. (id est) [拉] 也就是 L12identical[ai'dentikl] a同样的 L16identify [ai'dentifai] v. 确定, 识别 L7idle ['aidl] adj.空闲的 L8immediately[i'mi:djEtli] adv. 正好, 恰好 L12 impact['impAkt] n.冲击 L1impart [im'pa:t] v.给予 L11,17implement ['implimEnt] vt 实现 L6impossibility[impCsE'biliti] n.不可能 L21impression[im'preFEn] n. 型腔 L11in contact with 接触 L1in terms of 依据 L1inasmuch (as)[inEz'mQtF] conj.因为, 由于L3inch-to-metric conversions 英公制转换 L7 inclinable [in'klainEbl] adj. 可倾斜的 L20inclusion [in'kluFEn] n. 内含物 L19inconspicuous[inkEn'spikjuEs] a. 不显眼的 L14 incorporate [in'kC:pEreit] v 合并,混合L17indentation[7inden'teiFEn ] n.压痕 L1indenter[in'dentE] n. 压头 L1independently[indi'peinEntli] a. 独自地, 独立地 L16 inevitably[in'evitEbli] ad. 不可避免地 L14inexpensive[inik'spensiv]adj. 便宜的 L2inherently [in'hiErEntli] adv.固有的 L7injection mould 注塑模 L11injection[in'dVekFEn] n. 注射 L11in-line-of-draw 直接脱模 L14insert[in'sE:t] n. 嵌件 L16inserted die 嵌入式凹模 L19inspection[in'spekFEn] n.检查,监督 L9installation[instE'leiFEn] n. 安装 L10integration [inti'^reiFEn] n.集成 L6intelligent[in'telidVEnt]a. 智能的 L9intentinonally [in'tenFEnEli] adv 加强地,集中地 L17 interface ['intEfeis] n.. 界面 L6internal[in'tE:nl] a. 内部的 L1,5interpolation [intEpE'leiFEn] n.插值法 L7investment casting 熔模铸造 L4irregular [i'regjulE] adj. 不规则的,无规律 L17 irrespective of 不论, 不管 L11irrespective[iri'spektiv] a. 不顾的, 不考虑的 L11 issue ['isju] vt. 发布,发出 L6Jjoint line 结合线 L14Kkerosene['kerEsi:n] n.煤油 L10keyboard ['ki:bC:d ] n. 健盘 L6knock [nRk] v 敲,敲打 L17Llance [la:ns] v. 切缝 L19lathe[leiT] n. 车床 L4latitude ['lAtitju:d] n. 自由 L17lay out 布置 L13limitation[limi'teiFEn] n.限度,限制,局限(性) L3 local intelligence局部智能 L9locate [lEu'keit] vt. 定位 L18logic ['lCdVik] n. 逻辑 L7longitudinal['lCndVE'tju:dinl] a. 纵向的 L5longitudinally['lCndVE'tju:dinl] a. 纵向的 L13 look upon 视作, 看待 L17lubrication[lju:bri'keiFEn ] n.润滑 L21Mmachine shop 车间 L2machine table 工作台 L8machining[mE'Fi:niN] n. 加工 L3made-to-measure 定做 L15maintenance['meintinEns] n.维护,维修 L7majority[mE'dVa:riti] n.多数 L21make use of 利用 L2male[meil] a. 阳的, 凸形的 L11malfunction['mAl'fQNFEn] n. 故障 L9mandrel['mAdtil] n.心轴 L22manifestation[mAnifEs'teiFEn] n. 表现, 显示 L9 massiveness ['mAsivnis ] 厚实,大块 L19measure['meVE] n. 大小, 度量 L1microcomputer 微型计算机 L9microns['maikrCn] n.微米 L10microprocessor 微处理器 L9mild steel 低碳钢 L17milling machine 铣床 L4mineral['minErEl] n.矿物, 矿产 L2minimise['minimaiz] v.把···减到最少, 最小化 L13 minute['minit] a.微小的 L10mirror image 镜像 L16mirror['mirE] n. 镜子 L16MIT (Massachusetts Institute of Technology) 麻省理工学院 L7 moderate['mCdErit]adj. 适度的 L1,2modification [mRdifi'keiFEn ] n. 修改, 修正 L6 modulus['mCdjulEs] n.系数 L1mold[mEuld] n. 模, 铸模, v. 制模, 造型 L3monitor ['mCnitE ] v. 监控 L6monograph['mCnE^ra:f] n. 专著 L4more often than not 常常 L20motivation[mEuti'veiFEn] n. 动机 L9mould split line 模具分型线 L12moulding['mEudiN] n. 注塑件 L5,11move away from 抛弃 L17multi-imprssion mould 多型腔模 L12Nnarrow['nArEu] a. 狭窄的 L12NC (numerical control ) 数控 L7nevertheless[7nevETE'les] conj.,adv.然而,不过 L11 nonferrous['nCn'ferEs] adj.不含铁的, 非铁的 L2 normally['nC:mli]adv.通常地 L22novice['nCvis] n. 新手, 初学者 L16nozzle['nCzl] n. 喷嘴, 注口 L12numerical [nju'merikl] n. 数字的 L6Oobjectionable [Eb'dVekFEbl] adj. 有异议的,讨厌的 L17 observe[Eb'zE:v] vt. 观察 L2obviously ['CbviEsli] adv 明显地 L17off-line 脱机的 L6on-line 联机 L9operational [CpE'reiFEnl] adj.操作的, 运作的 L8 opportunity[CpE'tju:niti] n. 时机, 机会 L13 opposing[E'pEuziN] a.对立的, 对面的L12opposite['CpEzit] n. 反面 L1 a.对立的,对面的 L12 optimization [Rptimai'zeiFEn] n.最优化 L6orient ['C:riEnt] vt. 确定方向 L8orthodox ['C:WEdCks] adj. 正统的,正规的 L19overall['EuvErC:l] a.全面的,全部的 L8,13overbend v.过度弯曲 L20overcome[EuvE'kQm] vt.克服, 战胜 L10overlaping['EuvE'lApiN] n. 重叠 L4overriding[EuvE'raidiN] a. 主要的, 占优势的 L11Ppack[pAk] v. 包装 L2package ['pAkidV] vt.包装 L7pallet ['pAlit] n.货盘 L8panel ['pAnl] n.面板 L7paraffin['pArEfin] n. 石蜡 L10parallel[pArElel] a.平行的 L5penetration[peni'treiFEn ] n.穿透 L1peripheral [pE'rifErEl] adj 外围的 L6periphery [pE'rifEri] n. 外围 L18permit[pE'mit] v. 许可, 允许 L16pessure casting 压力铸造 L4pillar['pilE] n. 柱子, 导柱 L5,17pin[pin] n. 销, 栓, 钉 L5,17pin-point gate 针点式浇口 L12piston ['pistEn] n.活塞 L1plan view 主视图 L16plasma['plAzmE] n. 等离子 L9plastic['plAstik] n. 塑料 L3platen['plAtEn] n. 压板 L12plotter[plCtE] n. 绘图机 L9plunge [plQndV] v翻孔 L18plunge[plQndV] v.投入 L2plunger ['plQndVE ] n. 柱塞 L19pocket-size 袖珍 L9portray[pC:'trei] v.描绘 L21pot[pCt] n.壶 L21pour[pC:] vt. 灌, 注 L22practicable['prAktikEb] a. 行得通的 L14preferable['prefErEbl] a.更好的, 更可取的 L3 preliminary [pri'liminEri] adj 初步的,预备的 L19 press setter 装模工 L17press[pres] n.压,压床,冲床,压力机 L2,8prevent [pri'vent] v. 妨碍 L20primarily['praimErili] adv.主要地 L4procedure[prE'si:dVE] n.步骤, 方法, 程序 L2,16 productivity.[prEudQk'tiviti] n. 生产力 L9profile ['prEufail] n.轮廓 L10progressively[prE'^resiv] ad.渐进地 L15project[prE'dVekt] n.项目 L2project[prE'dVekt] v. 凸出 L11projection[prE'dVekFEn] n.突出部分 L21proper['prCpE] a. 本身的 L10property['prCpEti] n.特性 L1prototype ['prEutEtaip] n. 原形 L7proximity[prCk'simiti] n.接近 L9prudent['pru:dEnt] a. 谨慎的 L16punch [pQntF] v. 冲孔 L3punch shapper tool 刨模机 L17punch-cum-blanking die 凹凸模 L18punched tape 穿孔带 L3purchase ['pE:tFEs] vt. 买,购买 L6push back pin 回程杆 L5pyrometer[pai'nCmitE] n. 高温计 L2Qquality['kwaliti] n. 质量 L1,3quandrant['kwCdrEnt] n. 象限 L9quantity ['kwCntiti] n. 量,数量 L17quench[kwentF] vt. 淬火 L2Rradial['reidiEl] adv.放射状的 L22ram [rAm] n 撞锤. L17rapid['rApid]adj. 迅速的 L2rapidly['rApidli]adv. 迅速地 L1raster['rAstE] n. 光栅 L9raw [rC:] adj. 未加工的 L6raw material 原材料 L3ream [ri:m] v 铰大 L17reaming[ri:miN] n. 扩孔, 铰孔 L8recall[ri'kC:l] vt. 记起, 想起 L13recede [ri'si:d] v. 收回, 后退 L20recess [ri'ses] n. 凹槽,凹座,凹进处 L4,18redundancy[ri'dQndEnsi] n. 过多 L9re-entrant 凹入的 L12refer[ri'fE:] v. 指, 涉及, 谈及 L1,12reference['refErEns] n.参照,参考 L21refresh display 刷新显示 L9register ring 定位环 L11register['redVstE] v. 记录, 显示, 记数 L2regrind[ri:'^aind](reground[ri:'gru:nd]) vt. 再磨研 L12 relative['relEtiv] a. 相当的, 比较的 L12relay ['ri:lei] n. 继电器 L7release[ri'li:s] vt. 释放 L1relegate['relE7geit] vt. 把··降低到 L9reliability [rilaiE'biliti] n. 可靠性 L7relief valves 安全阀 L22relief[ri'li:f] n.解除 L22relieve[ri'li:v ]vt.减轻, 解除 L2remainder[ri'meindE] n. 剩余物, 其余部分 L4 removal[ri'mu:vl] n. 取出 L14remove[ri'mu:v] v. 切除, 切削 L4reposition [ripE'ziFEn] n.重新安排 L17represent[7repri'zentE] v 代表,象征 L11reputable['repjutEbl] a. 有名的, 受尊敬的 L15 reservoir['rezEvwa: ] n.容器, 储存器 L22resident['rezidEnt] a. 驻存的 L9resist[ri'zist] vt.抵抗 L1resistance[ri'zistEns] n.阻力, 抵抗 L1resolution[7rezE'lu:FEn] n. 分辨率 L9respective[ri'spektiv] a.分别的,各自的 L11respond[ris'pCnd] v.响应, 作出反应 L9responsibility[rispCnsE'biliti] n.责任 L13restrain[ris'trein]v.抑制 L21restrict [ris'trikt] vt 限制,限定 L18restriction[ris'trikFEn] n. 限制 L12retain[ri'tein] vt.保持, 保留 L2,12retaining plate 顶出固定板 L16reveal [ri'vil] vt.显示,展现 L17reversal [ri'vEsl] n. 反向 L1,20right-angled 成直角的 L20rigidity[ri'dViditi] n. 刚度 L1rod[rCd] n. 杆, 棒 L1,5rotate['rEuteit] vt.(使)旋转 L5rough machining 粗加工 L5rough[rQf] a. 粗略的 L5,21routine [ru:'ti:n] n. 程序 L7rubber['rQbE] n.橡胶 L3,22runner and gate systems 流道和浇口系统 L11Ssand casting 砂型铸造 L3satisfactorily[7sAtis'fAktrili] adv. 满意地 L1 saw[aC:] n. 锯子 L4scale[skeil]n. 硬壳 L2score[skC:] v. 刻划 L14scrap[skrAp] n.废料, 边角料, 切屑 L2,3screwcutting 切螺纹 L4seal[si:l] vt.密封 L22secondary storage L9section cutting plane 剖切面 L16secure[si'kjuE] v.固定 L22secure[si'kjuE] vt.紧固,夹紧,固定 L5,22segment['se^mEnt] v. 分割 L10sensitive['sensitiv]a.敏感的 L1,7sequence ['si:kwEns] n. 次序 L6sequential[si'kwenFEl] a.相继的 L16seriously['siEriEsli] adv.严重地 L1servomechanism ['sE:vE'mekEnizm] n.伺服机构 L7 Servomechanism Laboratoies 伺服机构实验室 L7 servomotor ['sE:vEmEutE] n.伺服马达 L8setter ['setE] n 安装者 L17set-up 机构 L20sever ['sevE] v 切断 L17severity [si'veriti] n. 严重 L20shaded[FAdid] adj.阴影的 L21shank [FANk] n. 柄. L17shear[FiE]n.剪,切 L1shot[FCt] n. 注射 L12shrink[FriNk] vi. 收缩 L11side sectional view 侧视图 L16signal ['si^nl] n.信号 L8similarity[simi'lAriti] n.类似 L15simplicity[sim'plisiti] n. 简单 L12single-point cutting tool 单刃刀具 L5situate['sitjueit] vt. 使位于, 使处于 L11slide [slaid] vi. 滑动, 滑落 L20slideway['slaidwei] n. 导轨 L5slot[slCt] n. 槽 L4slug[slQ^] n. 嵌条 L12soak[sEuk] v. 浸, 泡, 均热 L2software ['sCftwZE] n. 软件 L6solid['sClid] n.立体, 固体 L9solidify[sE'lidifai] vt.vi. (使)凝固, (使)固化 L13 solution[sE'lu:FEn] n.溶液 L2sophisiticated [sE'fistikeitid] adj.尖端的,完善的 L8 sound[saund] a. 结实的, 坚固的) L1spark erosion 火花蚀刻 L10spindle['spindl] n. 主轴 L5,8spline[splain] n.花键 L4split[split] n. 侧向分型, 分型 L12,14spool[spu:l] n. 线轴 L14springback n.反弹 L20spring-loaded 装弹簧的 L18sprue bush 主流道衬套 L11sprue puller 浇道拉杆 L12square[skwZE] v. 使成方形 L4stage [steidV] n. 阶段 L16,19standardisation[7stAndEdai'zeiFEn] n. 标准化 L15 startling['sta:tliN] a. 令人吃惊的 L10steadily['stedEli ] adv. 稳定地 L21step-by-step 逐步 L8stickiness['stikinis] n.粘性 L22stiffness['stifnis] n. 刚度 L1stock[stCk] n.毛坯, 坯料 L3storage tube display 储存管显示 L9storage['stC:ridV] n. 储存器 L9straightforward[streit'fC:wEd]a.直接的 L10strain[strein] n.应变 L1strength[streNW] n.强度 L1stress[stres] n.压力,应力 L1stress-strain应力--应变 L6stretch[stretF] v.伸展 L1,21strike [straik] vt. 冲击 L20stringent['strindVEnt ] a.严厉的 L22stripper[stripE] n. 推板 L15stroke[strouk] n. 冲程, 行程 L12structrural build-up 结构上形成的 L11sub-base 垫板 L19subject['sQbdVikt] vt.使受到 L21submerge[sEb'mE:dV] v.淹没 L22subsequent ['sQbsikwent] adj. 后来的 L20subsequently ['sQbsikwentli] adv. 后来, 随后 L5 substantial[sEb'stAnFEl] a. 实质的 L10substitute ['sQbstitju:t] vt. 代替,.替换 L7subtract[sEb'trAkt] v.减, 减去 L15suitable['su:tEbl] a. 合适的, 适当的 L5suitably['su:tEbli] ad.合适地 L15sunk[sQNk](sink的过去分词) v. 下沉, 下陷 L11 superior[sE'piEriE] adj.上好的 L22susceptible[sE'septEbl] adj.易受影响的 L7sweep away 扫过 L17symmetrical[si'metrikl] a. 对称的 L14synchronize ['siNkrEnaiz] v.同步,同时发生L8Ttactile['tAktail] a. 触觉的, 有触觉的 L9tailstock['teilstCk] n.尾架 L5tapered['teipEd] a. 锥形的 L12tapping['tApiN] n. 攻丝 L8technique[tek'ni:k] n. 技术 L16tempering['tempErN] n.回火 L2tendency['tendEnsi] n. 趋向, 倾向 L13tensile['tensail] a.拉力的, 可拉伸的 L2 拉紧的, 张紧的 L1tension ['tenFEn] n.拉紧,张紧 L1terminal ['tE:mEnl ] n. 终端机 L6terminology[tE:mi'nClEdVi ] n. 术语, 用辞 L11 theoretically [Wi:E'retikli ] adv.理论地 L21thereby['TZEbai] ad. 因此, 从而 L15thermoplastic['WE:mEu'plAstik] a. 热塑性的, n. 热塑性塑料 L3 thermoset['WE:mEset] n.热固性 L12thoroughly['WQrEuli] adv.十分地, 彻底地 L2thread pitch 螺距 L5thread[Wred] n. 螺纹 L5thrown up 推上 L17tilt [tilt] n. 倾斜, 翘起 L20tolerance ['tClErEns] n..公差 L17tong[tCN] n. 火钳 L2tonnage['tQnidV] n.吨位, 总吨数 L3tool point 刀锋 L3tool room 工具车间 L10toolholder['tu:lhEuldE] n.刀夹,工具柄 L5toolmaker ['tu:l'meikE] n 模具制造者 L17toolpost grinder 工具磨床 L4toolpost['tu:l'pEust] n. 刀架 L4torsional ['tC:FEnl] a扭转的 . L1toughness['tCfnis] n. 韧性 L2trace [treis] vt.追踪 L7tracer-controlled milling machine 仿形铣床 L4 transverse[trAns'vE:s] a. 横向的 L5tray [trei] n. 盘,盘子,蝶 L19treatment['tri:tmEnt] n.处理 L2tremendous[tri'mendEs] a. 惊人的, 巨大的 L9trend [trend] n.趋势 L7trigger stop 始用挡料销 L17tungsten['tQNstEn] n.钨 L10turning['tE:niN] n.车削 L4,5twist[twist ] v.扭曲,扭转 L1two-plate mould 双板式注射模 L12Uultimately['Qltimitli] adv终于. L6undercut moulding 侧向分型模 L14undercut['QndEkQt] n. 侧向分型 L14undercut['QndEkQt] n.底切 L12underfeed['QndE'fi:d] a, 底部进料的 L15undergo[QndE'^Eu] vt.经受 L1underside['QndEsaid] n 下面,下侧 L11undue[Qn'dju:] a.不适当的, 过度的 L4,10uniform['ju:nifC:m] a.统一的, 一致的 L12utilize ['ju:tilaiz] v 利用 L17Utopian[ju'tEupiEn] adj.乌托邦的, 理想化的 L21 Vvalve[vAlv] n.阀 L22vaporize['veipEraiz] vt.vi. 汽化, (使)蒸发 L10 variation [vZEri'eiFEn] n. 变化 L20various ['vZEriEs] a.不同的,各种的 L1,20vector feedrate computation 向量进刀速率计算 L7 vee [vi:] n. v字形 L20velocity[vi'lCsiti] n.速度 L1versatile['vEsEtail] a.多才多艺的,万用的 L5,8 vertical['vE:tikl] a. 垂直的 L16via [vaiE] prep.经,通过 L8vicinity[vE'siniti] n.附近 L13viewpoint['vju:pCint] n. 观点 L4Wwander['wCndE] v. 偏离方向 L13warp[wC:p] v. 翘曲 L2washer ['wCFE] n. 垫圈 L18wear [wZE] v.磨损 L7well line 结合线 L13whereupon [hwZErE'pCn] adv. 于是 L19winding ['waindiN] n. 绕, 卷 L8with respect to 相对于 L1,5withstand[wiT'stAnd] vt.经受,经得起 L1work[wE:k] n. 工件 L4workstage 工序 L19wrinkle['riNkl] n.皱纹vt.使皱 L21Yyield[ji:ld] v. 生产 L9Zzoom[zu:] n. 图象电子放大 L9。
Fast, Voltage-Out DC–440 MHz,95 dB Logarithmic AmplifierAD8310 Rev.EInformation furnished by Analog Devices is believed to be accurate and reliable.However, no responsibility is assumed by Analog Devices for its use, nor for anyinfringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: Fax: 781.461.3113© 2005 Analog Devices, Inc. All rights reserved.FEATURESMultistage demodulating logarithmic amplifierVoltage output, rise time <15 nsHigh current capacity: 25 mA into grounded R L95 dB dynamic range: −91 dBV to +4 dBVSingle supply of 2.7 V min at 8 mA typDC–440 MHz operation, ±0.4 dB linearitySlope of +24 mV/dB, intercept of −108 dBVHighly stable scaling over temperatureFully differential dc-coupled signal path100 ns power-up time, 1 mA sleep current APPLICATIONSConversion of signal level to decibel formTransmitter antenna power measurementReceiver signal strength indication (RSSI)Low cost radar and sonar signal processingNetwork and spectrum analyzersSignal-level determination down to 20 HzTrue-decibel ac mode for multimetersGENERAL DESCRIPTIONThe AD8310 is a complete, dc−440 MHz demodulating logarithmic amplifier (log amp) with a very fast voltage mode output, capable of driving up to 25 mA into a grounded load in under 15 ns. It uses the progressive compression (successive detection) technique to provide a dynamic range of up to 95 dB to ±3 dB law conformance or 90 dB to a ±1 dB error bound up to 100 MHz. It is extremely stable and easy to use, requiring no significant external components. A single-supply voltage of 2.7 V to 5.5 V at 8 mA is needed, corresponding to a power consumption of only 24 mW at 3 V. A fast-acting CMOS-compatible enable pin is provided.Each of the six cascaded amplifier/limiter cells has a small-signal gain of 14.3 dB, with a −3 dB bandwidth of 900 MHz.A total of nine detector cells are used to provide a dynamic range that extends from −91 dBV (where 0 dBV is defined as the amplitude of a 1 V rms sine wave), an amplitude of about ±40 μV, up to +4 dBV (or ±2.2 V). The demodulated outputis accurately scaled, with a log slope of 24 mV/dB and an intercept of −108 dBV. The scaling parameters are supply-and temperature-independent.FUNCTIONAL BLOCK DIAGRAMSUPPLY+INPUT–INPUTCOMMON184-1Figure 1.The fully differential input offers a moderately high impedance (1 kΩ in parallel with about 1 pF). A simple network can match the input to 50 Ω and provide a power sensitivity of −78 dBm to+17 dBm. The logarithmic linearity is typically within ±0.4 dBup to 100 MHz over the central portion of the range, but it is somewhat greater at 440 MHz. There is no minimum frequency limit; the AD8310 can be used down to low audio frequencies. Special filtering features are provided to support this wide range.The output voltage runs from a noise-limited lower boundary of 400 mV to an upper limit within 200 mV of the supply voltagefor light loads. The slope and intercept can be readily altered using external resistors. The output is tolerant of a wide varietyof load conditions and is stable with capacitive loads of 100 pF. The AD8310 provides a unique combination of low cost, small size, low power consumption, high accuracy and stability, high dynamic range, a frequency range encompassing audio to UHF, fast response time, and good load-driving capabilities, making this product useful in numerous applications that require the reduction of a signal to its decibel equivalent.The AD8310 is available in the industrial temperature range of−40°C to +85°C in an 8-lead MSOP package.AD8310Rev. E | Page 2 of 24TABLE OF CONTENTSSpecifications.....................................................................................3 Absolute Maximum Ratings............................................................4 ESD Caution..................................................................................4 Pin Configuration and Function Descriptions.............................5 Typical Performance Characteristics.............................................6 Theory of Operation........................................................................9 Progressive Compression............................................................9 Slope and Intercept Calibration................................................10 Offset Control.............................................................................10 Product Overview...........................................................................11 Enable Interface..........................................................................11 Input Interface............................................................................11 Offset Interface...........................................................................12 Output Interface.........................................................................12 Using the AD8310..........................................................................14 Basic Connections......................................................................14 Transfer Function in Terms of Slope and Intercept...............15 dBV vs. dBm...............................................................................15 Input Matching...........................................................................15 Narrow-Band Matching............................................................16 General Matching Procedure....................................................16 Slope and Intercept Adjustments.............................................17 Increasing the Slope to a Fixed Value......................................17 Output Filtering..........................................................................18 Lowering the High-Pass Corner Frequency of the OffsetCompensation Loop..................................................................18 Applications.....................................................................................19 Cable-Driving.............................................................................19 DC-Coupled Input.....................................................................19 Evaluation Board............................................................................20 Outline Dimensions.......................................................................22 Ordering Guide.. (22)REVISION HISTORY6/05—Rev. D to Rev. EChanges to Figure 6..........................................................................6 Change to Basic Connections Section.........................................14 Changes to Equation 10.................................................................17 Changes to Ordering Guide..........................................................22 10/04—Rev. C to Rev. DFormat Updated..................................................................Universal Typical Performance Characteristics Reordered..........................6 Changes to Figures 41 and 42.......................................................20 7/03—Rev. B to Rev. CReplaced TPC 12...............................................................................5 Change to DC-Coupled Input Section........................................14 Replaced Figure 20.........................................................................15 Updated Outline Dimensions.......................................................16 2/03—Rev. A to Rev. BChange to Evaluation Board Section...........................................15 Change to Table III.........................................................................16 Updated Outline Dimensions.......................................................16 1/00—Rev. 0 to Rev. A10/99—Revision 0: Initial VersionAD8310SPECIFICATIONST A = 25°C, V S = 5 V, unless otherwise noted.Table 1.Parameter Conditions Min Typ Max Unit INPUT STAGE Inputs INHI, INLOMaximum Input1Single-ended, p-p ±2.0 ±2.2 V4 dBV Equivalent Power in 50 Ω Termination resistor of 52.3 Ω 17 dBmDifferential drive, p-p 20 dBmNoise Floor Terminated 50 Ω source 1.28 nV/√Hz Equivalent Power in 50 Ω 440 MHz bandwidth −78 dBm Input Resistance From INHI to INLO 800 1000 1200 ΩInput Capacitance From INHI to INLO 1.4 pFDC Bias Voltage Either input 3.2 V LOGARITHMIC AMPLIFIER Output VOUT±3 dB Error Dynamic Range From noise floor to maximum input 95 dB Transfer Slope 10 MHz ≤ f ≤ 200 MHz 22 24 26 mV/dBOvertemperature, –40°C < T A < +85°C 20 26 mV/dB Intercept (Log Offset)210 MHz ≤ f ≤ 200 MHz −115 −108 −99 dBVEquivalent dBm (re 50 Ω) −102 −95 −86 dBmOvertemperature, −40°C ≤ T A ≤ +85°C −120 −96 dBVEquivalent dBm (re 50 Ω) −107 −83 dBmTemperature sensitivity −0.04 dB/°C Linearity Error (Ripple) Input from –88 dBV (–75 dBm) to +2 dBV (+15 dBm) ±0.4 dBOutput Voltage Input = –91 dBV (–78 dBm) 0.4 VInput = 9 dBV (22 dBm) 2.6 V Minimum Load Resistance, R L100 Ω Maximum Sink Current 0.5 mAOutput Resistance 0.05 ΩVideo Bandwidth 25 MHzRise Time (10% to 90%) Input Level = −43 dBV (−30 dBm), R L ≥ 402 Ω, C L ≤ 68 pF 15 nsInput Level = −3 dBV (+10 dBm), R L ≥ 402 Ω, C L ≤ 68 pF 20 nsFall Time (90% to 10%) Input Level = −43 dBV (−30 dBm), R L ≥ 402 Ω, C L ≤ 68 pF 30 nsInput Level = −3 dBV (+10 dBm), R L ≥ 402 Ω, C L ≤ 68 pF 40 nsOutput Settling Time to 1% Input Level = −13 dBV (0 dBm), R L ≥ 402 Ω, C L ≤ 68 pF 40 ns POWER INTERFACESSupply Voltage, VPOS 2.7 5.5 V Quiescent Current Zero-signal 6.5 8.0 9.5 mA Overtemperature −40°C < T A < +85°C 5.5 8.5 10 mA Disable Current 0.05 μALogic Level to Enable Power High condition, −40°C < T A < +85°C 2.3 VInput Current when High 3 V at ENBL 35 μALogic Level to Disable Power Low condition, −40°C < T A < +85°C 0.8 V1 The input level is specified in dBV, because logarithmic amplifiers respond strictly to voltage, not power. 0 dBV corresponds to a sinusoidal single-frequency input of1 V rms. A power level of 0 dBm (1 mW) in a 50 Ω termination corresponds to an input of 0.2236 V rms. Therefore, the relationship between dBV and dBm is a fixedoffset of 13 dBm in the special case of a 50 Ω termination.2 Guaranteed but not tested; limits are specified at six sigma levels.Rev. E | Page 3 of 24AD8310Rev. E | Page 4 of 24ABSOLUTE MAXIMUM RATINGSTable 2.Parameter Value Supply Voltage, V S 7.5 V Input Power (re 50 Ω), Single-Ended 18 dBm Differential Drive 22 dBm Internal Power Dissipation 200 mW θJA 200°C/W Maximum Junction Temperature 125°COperating Temperature Range −40°C to +85°C Storage Temperature Range−65°C to +150°C Lead Temperature (Soldering 60 sec)300°CStresses above those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.ESD CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performancedegradation or loss of functionality.AD8310Rev. E | Page 5 of 24PIN CONFIGURATION AND FUNCTION DESCRIPTIONS01084-002INLOCOMM OFLT VOUTFigure 2. Pin ConfigurationTable 3. Pin Function DescriptionsPin No. Mnemonic Function1 INLO One of Two Balanced Inputs. Biased roughly to VPOS/2.2 COMM Common Pin. Usually grounded.3 OFLT Offset Filter Access. Nominally at about 1.75 V.4 VOUT Low Impedance Output Voltage. Carries a 25 mA maximum load. 5 VPOS Positive Supply. 2.7 V to 5.5 V at 8 mA quiescent current.6 BFIN Buffer Input. Used to lower post-detection bandwidth.7 ENBL CMOS Compatible Chip Enable. Active when high. 8INHISecond of Two Balanced Inputs.AD8310Rev. E | Page 6 of 24TYPICAL PERFORMANCE CHARACTERISTICSINPUT LEVEL (dBV)3.00–12020–100(–87dBm)R S S I O U T P U T (V )–80–60–40–200(+13dBm)2.52.01.51.00.501084-011Figure 3. RSSI Output vs. Input Level, 100 MHz Sine Input at T A = −40°C,+25°C, and +85°C, Single-Ended InputINPUT LEVEL (dBV)3.0–120–100(–87dBm)R S S I O U T P U T (V )–80–60–40–20(+13dBm)202.52.01.51.00.5001084-012Figure 4. RSSI Output vs. Input Level at T A = 25°C for Frequencies of 10 MHz, 50 MHz, and 100 MHzINPUT LEVEL (dBV)3.00–12020–100(–87dBm)R S S I O U T P U T (V )–80–60–40–200(+13dBm)2.52.01.51.00.501084-013Figure 5. RSSI Output vs. Input Level at T A = 25°C for Frequencies of 200 MHz, 300 MHz, and 440 MHz01084-043P IN (dBm)R S S I O U T P U T (V )E R R O R (d B )Figure 6. Log Linearity of RSSI Output vs. Input Level, 100 MHz Sine Input at T A = −40°C, +25°C, and +85°CINPUT LEVEL (dBV)–12020–100(–87dBm)E R R O R (d B )–80–60–40–20(+13dBm)01084-015Figure 7. Log Linearity of RSSI Output vs. Input Level, at T A = 25°C, for Frequencies of 10 MHz, 50 MHz, and 100 MHzINPUT LEVEL (dBV)–12020–100(–87dBm)E R R O R (d B )–80–60–40–20(+13dBm)01084-016Figure 8. Log Linearity of RSSI Output vs. Input Level at T A = 25°Cfor Frequencies of 200 MHz, 300 MHz, and 440 MHzAD8310Rev. E | Page 7 of 2401084-009Figure 9. Small-Signal AC Response of RSSI Output with External BFINCapacitance of 100 pF, 3300 pF, and 0.01 μFFigure 10. Large-Signal RSSI Pulse Response with C L = 100 pFand RL = 100 Ω, 154 Ω, and 200 Ω01084-006Figure 11. RSSI Pulse Response with R L = 402 Ω and C L = 68 pF,for Inputs Stepped from 0 dBV to −33 dBV, −23 dBV, −13 dBV, and −3 dBV 01084-010Figure 12. Small-Signal RSSI Pulse Responsewith R L = 402 Ω and C L = 68 pF01084-007Figure 13. Large-Signal RSSI Pulse Response with R L = 100 Ωand C L = 33 pF, 68 pF, and 100 pF01084-008Figure 14. Small-Signal RSSI Pulse Response with R L = 50 Ω and Back Termination of 50 Ω (Total Load = 100 Ω)AD8310Rev. E | Page 8 of 24ENABLE VOLTAGE (V)1000.000010.52.50.7S U P P L Y C U R R E N T (m A )0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.31010.10.010.0010.000101084-003Figure 15. Supply Current vs. Enable Voltage at T A = −40°C, +25°C, and +85°CFREQUENCY (MHz)3029201100010R S S I S L O P E(m V /d B )100242322212625282701084-017Figure 16. RSSI Slope vs. FrequencySLOPE (mV/dB)21.522.0C O U N T22.523.023.524.024.501084-019Figure 17. Transfer Slope Distribution, V S= 5 V, Frequency = 100 MHz, 25°C01084-004Figure 18. Power-On/Off Response Time with RF Input of −83 dBV to −3 dBVFREQUENCY (MHz)–99–101–1191100010R S S I I N T E R C E P T (d B V )100–111–113–115–117–107–109–103–10501084-018Figure 19. RSSI Intercept vs. FrequencyINTERCEPT (dBV)1240–115–113C O U N T210861416–111–109–107–105–103–101–99–971820222401084-020Figure 20. Intercept Distribution V S = 5 V, Frequency = 100 MHz, 25°CAD8310Rev. E | Page 9 of 24THEORY OF OPERATIONLogarithmic amplifiers perform a more complex operation than classical linear amplifiers, and their circuitry is significantlydifferent. A good grasp of what log amps do and how they do itcan help users avoid many pitfalls in their applications. For a complete discussion of the theory, see the AD8307 data sheet. The essential purpose of a log amp is not to amplify (though amplification is needed internally), but to compress a signal of wide dynamic range to its decibel equivalent. It is, therefore, a measurement device. An even better term might be logarithmic converter, because the function is to convert a signal from one domain of representation to another via a precise nonlinear transformation:⎟⎟⎠⎞⎜⎜⎝⎛=X IN Y OUT V V V V log (1) where:V OUT is the output voltage. V Y is the slope voltage. The logarithm is usually taken to base ten, in which case V Y is also the volts-per-decade. V IN is the input voltage. V X is the intercept voltage. Log amps implicitly require two references (here V X and V Y )that determine the scaling of the circuit. The accuracy of a log amp cannot be any better than the accuracy of its scaling reference s . In the AD8310, these are provided by a band gapreference.VFigure 21. General Form of the Logarithmic FunctionWhile Equation 1, plotted in Figure 21, is fundamentally correct, a different formula is appropriate for specifying the calibration attributes or demodulating log amps like theAD8310, operating in RF applications with a sine wave input.()O IN SLOPE OUT P P V V −= (2)where:V OUT is the demodulated and filtered baseband (video or RSSI) output.V SLOPE is the logarithmic slope, now expressed in V/dB (25 mV/dB for the AD8310).P IN is the input power, expressed in dB relative to some reference power level.P O is the logarithmic intercept, expressed in dB relative to the same reference level.A widely used reference in RF systems is dB above 1 mW in 50 Ω, a level of 0 dBm. Note that the quantity (P IN – P O ) is dB. The logarithmic function disappears from the formula, because the conversion has already been implicitly performed in stating the input in decibels. This is strictly a concession to popular convention. Log amps manifestly do not respond to power(tacitly, power absorbed at the input), but rather to input voltage. The input is specified in dBV (decibels with respect to 1 V rms) throughout this data sheet. This is more precise, although still incomplete, because the signal waveform is also involved. Many users specify RF signals in terms of power(usually in dBm/50 Ω), and this convention is used in this datasheet when specifying the performance of the AD8310.PROGRESSIVE COMPRESSION High speed, high dynamic-range log amps use a cascade ofnonlinear amplifier cells to generate the logarithmic functionas a series of contiguous segments, a type of piecewise linear technique. The AD8310 employs six cells in its main signal path, each having a small-signal gain of 14.3 dB (×5.2) and a −3 dB bandwidth of about 900 MHz. The overall gain is about 20,000 (86 dB), and the overall bandwidth of the chain is approximately 500 MHz, resulting in a gain-bandwidth product(GBW) of 10,000 GHz, about a million times that of a typical op amp. This very high GBW is essential to accurate operationunder small-signal conditions and at high frequencies. The AD8310 exhibits a logarithmic response down to inputs as small as 40 μV at 440 MHz.Progressive compression log amps either provide a baseband video response or accept an RF input and demodulate thissignal to develop an output that is essentially the envelope of the input represented on a logarithmic or decibel scale. TheAD8310 is the latter kind. Demodulation is performed in a total of nine detector cells. Six are associated with the amplifier stages, and three are passive detectors that receive a progres-sively attenuated fraction of the full input. The maximum signal frequency can be 440 MHz, but, because all the gain stages are dc-coupled, operation at very low frequencies is possible.AD8310Rev. E | Page 10 of 24SLOPE AND INTERCEPT CALIBRATIONAll monolithic log amps from Analog Devices use precision design techniques to control the logarithmic slope and intercept. The primary source of this calibration is a pair of accurate voltage references that provide supply- andtemperature-independent scaling. The slope is set to 24 mV/dB by the bias chosen for the detector cells and the subsequent gain of the postdetector output interface. With this slope, the full 95 dB dynamic range can be easily accommodated within the output swing capacity, when operating from a 2.7 V supply. Intercept positioning at −108 dBV (−95 dBm re 50 Ω) has likewise been chosen to provide an output centered in the available voltage range.Precise control of the slope and intercept results in a log amp with stable scaling parameters, making it a true measurement device as, for example, a calibrated received signal strength indicator (RSSI). In this application, the input waveform is invariably sinusoidal. The input level is correctly specified in dBV . It can alternatively be stated as an equivalent power, in dBm, but in this case, it is necessary to specify the impedance in which this power is presumed to be measured. In RF practice, it is common to assume a reference impedance of 50 Ω, in which 0 dBm (1 mW) corresponds to a sinusoidal amplitude of 316.2 mV (223.6 mV rms). However, the power metric is correct only when the input impedance is lowered to 50 Ω, either by a termination resistor added across INHI and INLO, or by the use of a narrow-band matching network.Note that log amps do not inherently respond to power, but to the voltage applied to their input. The AD8310 presents a nominal input impedance much higher than 50 Ω (typically 1 kΩ at low frequencies). A simple input matching network can considerably improve the power sensitivity of this type of log amp. This increases the voltage applied to the input and, therefore, alters the intercept. For a 50 Ω reactive match, the voltage gain is about 4.8, and the whole dynamic range moves down by 13.6 dB. The effective intercept is a function of wave-form. For example, a square-wave input reads 6 dB higher than a sine wave of the same amplitude, and a Gaussian noise input reads 0.5 dB higher than a sine wave of the same rms value. OFFSET CONTROLIn a monolithic log amp, direct coupling is used between the stages for several reasons. First, it avoids the need for coupling capacitors, which typically have a chip area at least as large as that of a basic gain cell, considerably increasing die size. Second, the capacitor values predetermine the lowest frequency at which the log amp can operate. For moderate values, this can be as high as 30 MHz, limiting the application range. Third, the parasitic back-plate capacitance lowers the bandwidth of the cell, further limiting the scope of applications.However, the very high dc gain of a direct-coupled amplifier raises a practical issue. An offset voltage in the early stages of the chain is indistinguishable from a real signal. If it were as high as 400 μV , it would be 18 dB larger than the smallest ac signal (50 μV), potentially reducing the dynamic range by this amount. This problem can be averted by using a global feedback path from the last stage to the first, which corrects this offset in a similar fashion to the dc negative feedback applied around an op amp. The high frequency components of the feedback signal must, of course, be removed to prevent a reduction of the HF gain in the forward path.An on-chip filter capacitor of 33 pF provides sufficient suppres-sion of HF feedback to allow operation above 1 MHz. The −3 dB point in the high-pass response is at 2 MHz, but theusable range extends well below this frequency. To further lower the frequency range, an external capacitor can be added at OFLT (Pin 3). For example, 300 pF lowers it by a factor of 10. Operation at low audio frequencies requires a capacitor of about 1 μF. Note that this filter has no effect for input levels well above the offset voltage, where the frequency range would extend down to dc (for a signal applied directly to the input pins). The dc offset can optionally be nulled by adjusting the voltage on the OFLT pin (see the Applications section).PRODUCT OVERVIEWThe AD8310 has six main amplifier/limiter stages. These six cells and their and associated g m styled full-wave detectors handle the lower two-thirds of the dynamic range. Three top-end detectors, placed at 14.3 dB taps on a passive attenuator, handle the upper third of the 95 dB range. The first amplifier stage provides a low noise spectral density (1.28 nV/√Hz). Biasing for these cells is provided by two references: onedetermines their gain, and the other is a band gap circuit that determines the logarithmic slope and stabilizes it against supply and temperature variations. The AD8310 can be enabled or disabled by a CMOS-compatible level at ENBL (Pin 7). The differential current-mode outputs of the nine detectors are summed and then converted to single-sided form, nominally scaled 2 μA/dB. The output voltage is developed by applying this current to a 3 kΩ load resistor followed by a high speed gain-of-four buffer amplifier, resulting in a logarithmic slope of 24 mV/dB (480 mV/decade) at VOUT (Pin 4). The unbuffered voltage can be accessed at BFIN (Pin 6), allowing certain functional modifications such as the addition of an external postdemodulation filter capacitor and the alteration or adjustment of slope and intercept.–INPUT01084-022Figure 22. Main Features of the AD8310The last gain stage also includes an offset-sensing cell. This generates a bipolarity output current, if the main signal path exhibits an imbalance due to accumulated dc offsets. This current is integrated by an on-chip capacitor that can beincreased in value by an off-chip component at OFLT (Pin 3). The resulting voltage is used to null the offset at the output of the first stage. Because it does not involve the signal inputconnections, whose ac-coupling capacitors otherwise introduce a second pole into the feedback path, the stability of the offset correction loop is assured.The AD8310 is built on an advanced, dielectrically isolated, complementary bipolar process. In the following interface diagrams shown in Figure 23 to Figure 26, resistors labeled as R are thin-film resistors that have a low temperature coefficient of resistance (TCR) and high linearity under large-signal conditions. Their absolute tolerance is typically within ±20%.Similarly, capacitors labeled as C have a typical tolerance of ±15% and essentially zero temperature or voltage sensitivity. Most interfaces have additional small junction capacitances associated with them, due to active devices or ESD protection, which might not be accurate or stable. Component numbering in these interface diagrams is local.ENABLE INTERFACEThe chip-enable interface is shown in Figure 23. The currents in the diode-connected transistors control the turn-on and turn-off states of the band gap reference and the bias generator. They are a maximum of 100 μA when ENBL is taken to 5 V under worst-case conditions. For voltages below 1 V , the AD8310 is disabled and consumes a sleep current of less than 1 μA. When tied to the supply or a voltage above 2 V , it is fully enabled. The internal bias circuitry is very fast (typically <100 ns for either off or on). In practice, however, the latency period before the log amp exhibits its full dynamic range is more likely to be limited by factors relating to the use of ac-coupling at the input or the settling of the offset-control loop (see the following sections).01084-023Figure 23. Enable InterfaceINPUT INTERFACEFigure 24 shows the essentials of the input interface. C P and C M are parasitic capacitances, and C D is the differential input capacitance, largely due to Q1 and Q2. In most applications, both input pins are ac-coupled. The S switches close whenenable is asserted. When disabled, bias current I E is shut off and the inputs float; therefore, the coupling capacitors remain charged. If the log amp is disabled for long periods, small leakage currents discharge these capacitors. Then, if they are poorly matched, charging currents at power-up can generate a transient input voltage that can block the lower reaches of the dynamic range until it becomes much less than the signal. A single-sided signal can be applied via a blocking capacitor to either Pin 1 or Pin 8, with the other pin ac-coupled to ground. Under these conditions, the largest input signal that can be handled is 0 dBV (a sine amplitude of 1.4 V) when using a 3 V supply; a 5 dBV input (2.5 V amplitude) can be handled with a 5 V supply. When using a fully balanced drive, this maximum input level is permissible for supply voltages as low as 2.7 V . Above 10 MHz, this is easily achieved using an LC matching network. Such a network, having an inductor at the input, usefully eliminates the input transient noted above.。
使⽤dynamic引发的异常:⽆法对null引⽤执⾏运⾏时绑定今天上午运营反映有商户的账单没有⽣成。
查看⽇志,在批量⽣成账单服务执⾏过程中,因为如下异常⽽中断了:跑批异常 Microsoft.CSharp.RuntimeBinder.RuntimeBinderException: ⽆法对 null 引⽤执⾏运⾏时绑定在 CallSite.Target(Closure , CallSite , Object )在 System.Dynamic.UpdateDelegates.UpdateAndExecute1[T0,TRet](CallSite site, T0 arg0)在 GateWay.BLL.Orders.PayFilesGenerator.Generate()接下来看程序代码:1try2 {3//查找distinct后的“商户&⽇期”4var map = orderDal.GetMerchantsForSettlement(_frDate, _toDate);5if (map == null)6 {7 _logHelper.WriteLog("no records");8return;9 }10 _logHelper.WriteLog("获取到{0}条“商户&⽇期”对⼉", map.Count);11int i = 0;12//遍历“商户&⽇期”集合,逐⼀查询出来订单然后⽣成⽂件13foreach (var p in map)14 {15 i++;16 _logHelper.WriteLog("[{2}] 商户:{0}-⽂件⽇期:{1}", p.MerCode, p.Date.ToShortDateString(), i);17try18 {19var isOK = Generate(p.MerCode, p.Date);20 _logHelper.WriteLog("[{0}]⽣成⽂件返回{1}", i, isOK);21 }22catch (Exception ex)23 {24if (ex is ResponseErrorException)25 {26 _logHelper.WriteLog("[{0}]{1}", i, ex.Message);27 }28else29 {30 _logHelper.WriteLog("[{0}]⽂件⽣成异常 {1}", i, ex.ToString());31 }32 }33 }34 }35catch (Exception ex)36 {37 _logHelper.WriteLog("跑批异常 {0}", ex.ToString());38 }3940 _logHelper.WriteLog("本次批量⽣成账单⽂件结束.");41 }其中,GetMerchantsForSettlement⽅法的返回值是⼀个List<dynamic>分析可知,异常⼀定是在第16⾏抛出的。
Fixed vs.Dynamic Sub-transfer in Reinforcement LearningJames L.Carroll,Todd PetersonBrigham Young University,3350Talmage bldgProvo Ut.84601USAjames@,todd@April30,2002AbstractWe survey various task transfer methods in Q-learning and present a variation onfixed sub-transfer which we call dynamic sub-transfer.We discuss the benefits and drawbacks of dynamic sub-transfer as compared with the other transfer methods,and we describe qualitatively the situations where this method would be preferred over thefixed version of sub-transfer.We test this method against several other transfer methods in a simple three room grid world where portions of the source’s policy are rel-evant to the target task and other portions are not. In this situation we found that dynamic sub-transfer converged to the optimal solution,avoiding the sub-optimality inherent infixed sub-transfer,while also avoiding some of the convergence problems often ex-perienced byfixed sub-transfer.1IntroductionIn a reinforcement learning context task transfer is the process whereby information from one task,called the source task,is used by another task,known as the target task.Typically this is done by allowing the source task to bias the learning of the target task in the hope that this shared information can improve performance on the target task.Task transfer has many practical uses in reinforcement learning.One use for task transfer is a process known asshaping[1][2].Shaping increases the complexity of the tasks that an agent can acquire by learning sim-ple tasksfirst.Through task transfer the source in-formation from the simple task is used to aid in the learning of the next task which is more complex.This process can then be repeated in order to build up in-creasingly complex behaviors.Task transfer is also important in the“lifelong learning”[3][4]paradigm for machine learning.In the lifelong learning approach,an agent encounters a variety of tasks over its lifetime.The agent can then apply information from tasks that it has al-ready learned in order to speed the learning of each subsequent task.This approach can potentially re-duce the training time and increase the adaptability of a reinforcement-learning agent.This approach is more complex than simple shaping because there is no constraint on the order in which tasks of various complexities are encountered.In section2we discuss the previous work that has been done in task transfer,first summarizing Q-learning in general,and then giving a brief overview of several previous task transfer methods.We then discuss two of those methods,direct transfer and fixed sub-transfer,in greater detail.Section3intro-duces a new transfer method which we call dynamic sub-transfer.Section4describes our experimental methodology whereby we will compare these transfer mechanisms.Section5summarizes our experimental results.Sections6and7give our conclusions and discuss future work that we plan to do in this area. 12Previous WorkOur reinforcement learning research has focused on a subset of reinforcement learning known as Q-learning. In Q-learning,the agent stores the online discounted expected reward for performing each action a in state s at time step t,and these“Q-values”are updated according to the equation:∆Q(s t,a t)=α[R(s t,a t)+γmax a Q(s t+1,a)], whereαis the learning rate andγis a discount fac-tor.Before learning can begin these Q-values must be initialized to some initial value which we call I. This value is important because it is often manipu-lated in the task transfer process.We shall discuss how this is usually done in greater detail later. Many methods have been proposed to accom-plish task transfer in Q-learning.Some methods are model-based and focus on transferring action mod-els and other model information from one task to another.Other transfer mechanisms are model-free. We have focused our research on the model-free tech-niques.Some of the past model free techniques that are related to our research are:•Direct-transfer[5][6][7][8][9]which uses the learned Q-values from the source task as the I for the target task•Soft-transfer[7][8]which uses a weighted average of direct transfer and learning from scratch to make the transferred policy more adaptable•Memory-guided exploration[7][8]which uses the past task to guide the initial exploration of the agent in the target task•Fixed sub-transfer[5][6]which is a piecewise transfer mechanism that uses a portion of the source policy in the target task.This paper introduces a new model-free technique for task transfer known as dynamic sub-transfer.Be-cause direct transfer andfixed sub-transfer are di-rectly related to our work on dynamic sub-transfer, we willfirst discuss those methods in more detail be-fore we introduce dynamic sub-transfer.2.1Direct TransferDirect transfer of Q-values is the most straight-forward method of performing task transfer in Q-learning.Rather than using afixed value for I,Direct transfer takes thefinal Q-values from the source task, and initializes the target task with the Q-values from the earlier source task.∀s,∀a,I target(s,a)=Q source(s,a).In some situations direct transfer can perform poorly.When tasks are sufficiently dissimilar,direct transfer of Q-values can be much worse than learning from scratch[7].This is because it often takes longer to unlearn the incorrect portion of the prior policy than it would take to learn the entire policy from scratch.This is known as the“unlearning”problem. Another problem with direct transfer is the“infor-mation loss”problem.Until the Q-values converge to theirfinal values,valuable information can be lost. Even in the similar portion of the Q-space where cor-rect information was transferred,incorrect updates can mar this correctly transferred information.This means that the agent sometimes loses all the relevant transferred information,while attempting to unlearn the irrelevant portion.We describe this situation in detail and give examples where this effect can be seen in[7].2.2Fixed Sub-transferAnother model-free method for task transfer we call fixed sub-transfer.This method was introduced by Bowling and Veloso[6][5]and attempts to over-come the difficulties inherent in direct transfer.This method grew out of the SKILLS algorithm,which was introduced by Thrun and Schwartz in1995[10].The SKILLS algorithm attempts tofind partially defined action policies called skills which occur in more than one task.Skills are found using a de-scription length argument.The SKILLS algorithm minimizes a function of the formE=P L+µ∗DL,where P L is a performance loss,and DL is a descrip-tion length.By minimizing E this algorithm effects a 2piecewise decomposition across multiple tasks.The skills so identified are the skills that are applicable across many separate tasks.It would be reasonable to use these partially defined policies over multiple tasks.Infixed sub-transfer a portion of the source task is used in the target task.The portions that are used by the target task are those that have been deemed “similar.”From the perspective of the target task the source task and the target task share the same Q-values in the similar section,and the Q-values are not updated in that section(they arefixed).In the portion that is not deemed similar,the agent initial-izes its Q-values to some I and learns these sections from scratch[6].We have dubbed this techniquefixed sub-transfer because only a portion of the source task is used by the target task and the Q-values in the similar portion arefixed.There are several advantages to this approach aside from a reduced description length.This method avoids the unlearning problem because the sections that are not similar are not transferred.The informa-tion loss problem is also avoided because the correct portions of the policy arefixed.However there are several drawbacks to this ap-proach:•Some method is required to determine which sub-skill(s)should be used by the target task.This usually requires“design intervention”be-cause until the new task is learned it is difficult to determine its similarity with the skills which the agent already knows.•Any technique thatfixes portions of the Q-space is prone to divergence along the boundary be-tween thefixed portions of the policy and the unfixed portion.•Fixing portions of the policy often leads to a sub-optimal end policy.The sub-optimality of sucha solution has been quantitatively bounded by[6][5].Bowling and Veloso never mention how they dealt with the divergence issues.We chose the simple so-lution of updating all transitions that cross back intothefixed portion with an expected discounted reward of0.This“Quickfix”would not work in all situa-tions and these divergence issues are a major draw-back offixed sub-transfer.These problems should be more thoroughly addressed before this method could be used extensively in real world applications.As will be shown,dynamic sub-transfer elegantly sidesteps these divergence issues.The design intervention necessary infixed sub-transfer is problematic,but is not insurmountable, especially if the task has been broken down into sub-tasks by the SKILLS algorithm.It should be possible to notice from simple observation which of the auto-matically extracted skills are still valid in the new context.An example where this can be done,previ-ously discussed by[6],is robot soccer.In robot soccer a user might notice that a policy learned in a simu-lator performs well in the real world when the agent is not shooting the ball,and is at a distance from the wall,but performs poorly otherwise.The sec-tions away from the ball and the wall can therefore be deemed“similar.”3Dynamic Sub-transferIn dynamic sub-transfer the agent transfers informa-tion in the portions of the state space that are con-sidered similar while initializing the rest of the state space to afixed I.The portions that are transferred are notfixed as infixed sub-transfer,but allowed to adjust normally.We hypothesized that most of the speedup found infixed sub-transfer came from its initialization, and not from thefixing of the policy;therefore we believed that this method would retain most of the learning-rate improvements seen withfixed sub-transfer while ensuring convergence,and removing any sub-optimality in thefinal solution.The dynamic sub-transfer algorithm specifically deals with the problems of divergence and sub-optimality associated withfixed sub-transfer.To date this approach doesn’t deal with the necessity of design intervention inherent in all sub-transfer meth-ods.The user must still manually decide which por-tions of the state space to consider similar.34MethodologyTo visualize how these transfer methods function we chose a simple illustrative task.We used the simple stochastic three-room maze worldfirst introduced by Sebastian Thrun[10]and used by Bowling and Veloso [6][5][see Figure1].This world has multiple positions for the start and the goal.Wefirst learned the task with the start and the goal in the bottom positions and then moved the start and the goal to their coun-terpart positions toward thetop.Figure1:Simple three room stochastic environment. The policies learned when the start and the goal are moved are nearly identical in thefirst room.In the second room the two policies are similar,and in the third room the policies are different.This synthetic environment models what happens in transfer when a portion of a policy changes while another portion of the policy remains the same,the situations where the sub-transfer techniques are useful.5Results5.1Direct TransferWe felt that direct transfer should perform better than learning from scratch in this world despite oth-ers’experiments to the contrary[6]because the differ-ence between the two policies is not great.We foundthat direct transfer did indeed outperform learning from scratch[see Figure2].However,other transfer methods that can outperform direct transfer need to be developed because others have shown that under other conditions direct transfer performs much worse than tabula rasa learning[7].Furthermore,the di-rect transfer results in the three room experiment still leave much room for improvement.0.0050.010.0150.020.0250.030.0350.04050000100000150000200000250000300000 AverageRewardIterations"direct""scratch"2:Direct transfer as compared to learningscratch.5.2Fixed Sub-transferWe compared our results for learning from scratch and direct transfer to the results obtained fromfixed sub-transfer byfixing the policy in the left room only, and then byfixing the left two rooms[See Figure 3].The results were similar to those obtained by[6] who performed the same experiment.Notice that when thefirst room isfixed there is a substantial im-provement in learning rate.When the second room is fixed this improvement is even greater but the policy learned is sub-optimal.Infixed sub-transfer the majority of the speedup in the learning rate comes from the initialization.In fixed sub-transfer direct transfer of Q-values is effec-tively performed on the portions of the policy that are similar,while the rest of the Q-space is initial-ized to afixed I.This removes the difficulty inherent in the unlearning problem discussed in section2.The40.0050.010.0150.020.0250.030.0350.04050000100000150000200000250000300000A v e r a g e R e w a r dIterations"fixing2""fixing1""scratch"Figure 3:Fixed Sub-transfer:fixing the first two rooms,fixing the first room only,as compared to learning from scratch.fact that the similar portions of the state space are fixed has less to do with the speedup,as informa-tion loss is not a major problem in this world.These observations lead us to dynamic sub-transfer.5.3Dynamic Sub-transferWe tested dynamic sub-transfer and found that it had a learning rate comparable to those obtained through the fixed sub-transfer strategy in the three-room problem.The dynamic version lagged just a few time steps behind fixed sub-transfer because it wasted some time with the information loss problem.More importantly,the agent achieved an optimal pol-icy over time [See Figure 4].Thus,in the three room problem,at least,dynamic sub-transfer is preferable.The amount of time wasted by information loss was small and could possibly have been recovered by tem-porarily fixing the similar portion,and then releasing it.6ConclusionsIn cases where the designer knows which portions of the policy are similar beforehand the sub-transfer methods are preferable to direct transfer,soft trans-00.0050.010.0150.020.0250.030.0350.04050000100000150000200000250000300000A v e r a g e R e w a r dIterations"dynamic""fixing2""fixing1""scratch"Figure 4:Fixed sub-transfer:fixing the first room,and first two rooms vs.dynamic sub-transfer and learning from scratch.fer,or memory guided exploration,while the latter methods are preferable when such design interven-tion needs to be avoided.Fixed sub-transfer allows an agent to use one skill to represent the policy in multiple tasks.In many cases dynamic sub-transfer is preferable to fixed sub-transfer in that it learns just as quickly,but doesn’t converge to a sub optimal pol-icy.In worlds where states have vastly different Q-values in comparison to their neighbors information loss is more of a problem,and fixed-transfer may per-form better than dynamic sub-transfer [7].In such situations a hybrid method may be most effective.It is also possible to fix portions of the policy initially,and then release them later,allowing the agent to adjust after the new portion has been learned.This avoids the sub optimality found in fixed sub-transfer while retaining all of the speedup in the learning rate associated with fixed sub-transfer.7Future WorkMethods for automatically determining sub-problemsimilarity need to be developed,and hybrids of the above methods should be explored.In worlds where information loss is a serious issue,portions of the pol-5icy should befixed until the agent has learned the rest of the state space to avoid information loss.These portions could then be released to allow the agent to adjust,thereby avoiding sub-optimality while retain-ing a fast learning rate.This process could perhaps be automated by watching the change in average re-ward,and releasing thefixed portions when it levels out.A better method for dealing with the divergence issues involved withfixed sub-transfer needs to be developed.This is important because the current methods only function in select,carefully controlled situations.Once an adequate feel for the various strengths and weaknesses of these methods has been reached and their effects have been quantified,we believe that the future course of this research should be to automate the entire transfer mechanism.When an agent en-counters a new situation it should automatically de-termine that a new task is necessary.Then the agent should automatically choose the best transfer mecha-nism for the current situation,and adapt that mech-anism as more information becomes available.Any such agent should incorporate the model-based ap-proaches to task transfer as well as the model-free approaches.References[1]B.F.Skinner,The Behavior of Organisms:AnExperimental Analysis,Prentice Hall,Engle-wood Cliffs,New Jersey,1938.[2]B.F.Skinner,Science and Human Behavior.,Colliler-Macmillian,New York,1953.[3]Sebastian Thrun and Tom M.Mitchell,“Life-long robot learning,”Technical Report,IAI-TR-93-7.[4]Rich Caruana,“Multitask learning,”in Learn-ing to Learn,Lorien Pratt Sebastian Thrun,Ed., chapter5,pp.95–1133.Kluwer Academic Pub-lsishers,Norwell Massachusetts,1998.[5]Michael H.Bowling and Manuela M.Veloso,“Bounding the suboptimality of reusing sub-problem,”in IJCAI,1999,pp.1340–1347.[6]Mike Bowling and Manuela Veloso,“Reusinglearned policies between similar problems,”inProceedings of the AI*AI-98Workshop on NewTrends in Robotics,Padua,Italy,October1998.[7]Nancy Owens Todd Peterson and James L.Car-roll,“Automated shaping as applied to robotnavigation,”in IEEE International Conferenceon Robotics and Automation,Korea,2001.[8]Todd Peterson James L.Carroll and NancyOwens,“Memory-guided exploration in rein-forcement learning,”in In IJCNN2001,Wash-ington,D.C.,2001.[9]Kevin R.Dixon,Richard J.Malak,andPradeep K.Khosla,“Incorporating prior knowl-edge and previously learned information intoreinforcement learning agents,”in Institutefor Complex Engineered Systems Technical Re-port Series,Carnegie Mellon University,January2000.[10]Sebastian Thrun and Anton Schwartz,“Find-ing structure in reinforcement learning,”in Ad-vances in Neural Information Processing Sys-tems7,D.Touretzky G.Tesauro and T.Leen,Eds.,1995,p.pages385392.6。