STB120NH03L中文资料

1/11October 2003STB120NH03LN-CHANNEL 30V - 0.005 Ω - 60A D 2PAKSTripFET™ III POWER MOSFET FOR DC-DC CONVERSIONs TYPICAL R DS (on) = 0.005 Ω @ 10 Vs R DS(ON) * Qg INDUSTRY’s BENCHMARK s CONDUCTION LOSSES REDUCED s SWITCHING LOSSES REDUCED s LOW THRESHOLD DEVICEsSURFACE-MOUNTING D 2PAK (TO-263)POWER PACKAGE IN TUBE (NO SUFFIX) OR IN TAPE & REEL (SUFFIX “T4”)DESCRIPTIONThe STB120NH03L utilizes the latest advanced design rules of ST’s proprietary STripFET™ technology. It is ideal in high performance DC-DC converter applications where efficiency is to be achieved at very high output currents.APPLICATIONSs SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY DC-DC CONVERTERSO rdering InformationsTYPE V DSS R DS(on)I D STB120NH03L30 V<0.0055 Ω60 A(#)SALES TYPEMARKING PACKAGE PACKAGING STB120NH03LT4B120NH03LTO-252TAPE & REELABSOLUTE MAXIMUM RATINGS(•) Pulse width limited by safe operating area.(#) Value limited by wire bonding(1) Starting T j = 25 o C, I D = 30A, V DD = 15VSymbol ParameterValue Unit V DSDrain-source Voltage (V GS = 0)30V V DGR Drain-gate Voltage (R GS = 20 k Ω)30V V GS Gate- source Voltage± 20V I D (#)Drain Current (continuous) at T C = 25°C 60A I D (#)Drain Current (continuous) at T C = 100°C 60A I DM (•)Drain Current (pulsed)240A P tot Total Dissipation at T C = 25°C 115W Derating Factor0.77W/°C E AS (1)Single Pulse Avalanche Energy 700mJ T stg Storage Temperature-55 to 175°CT jMax. Operating Junction TemperatureSTB120NH03L2/11THERMAL DATAELECTRICAL CHARACTERISTICS (T case = 25 °C unless otherwise specified)OFFON (*)DYNAMICRthj-case Rthj-ambT lThermal Resistance Junction-case Thermal Resistance Junction-ambientMaximum Lead Temperature For Soldering PurposeMax Max1.3062.5300°C/W °C/W °CSymbol ParameterTest ConditionsMin.Typ.Max.Unit V (BR)DSS Drain-sourceBreakdown Voltage I D = 250 µAV GS = 030V I DSS Zero Gate VoltageDrain Current (V GS = 0)V DS = Max RatingV DS = Max Rating T C = 125°C 110µA µA I GSSGate-body Leakage Current (V DS = 0)V GS = ± 20V±100nASymbol ParameterTest ConditionsMin.Typ.Max.Unit V GS(th)Gate Threshold Voltage V DS = V GS I D = 250 µA 11.82.5V R DS(on)Static Drain-source On ResistanceV GS = 10 V I D = 30 A V GS = 5 VI D = 30 A0.0050.0060.00550.0105ΩΩSymbol ParameterTest ConditionsMin.Typ.Max.Unit g fs (*)Forward Transconductance V DS = 10 VI D = 30 A40S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer CapacitanceV DS = 15V f = 1 MHz V GS = 0410068070pF pF pFR GGate Input Resistancef = 1 MHz Gate DC Bias = 0 Test Signal Level = 20 mV Open Drain1.3Ω3/11STB120NH03LSWITCHING ON (*)SWITCHING OFF (*)SOURCE DRAIN DIODE (*)(*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (1) Q oss = C oss *∆ V in , C oss = C gd + C ds . See Appendix A (•)Pulse width limited by T jmax (2) Gate charge for synchronous operationSymbol ParameterTest ConditionsMin.Typ.Max.Unit t d(on)t r Turn-on Time Rise TimeV DD = 15 VI D = 30 A R G =4.7 ΩV GS = 10 V (Resistive Load, Figure 3)1695ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD =15V I D =60A V GS =10V5711.87.377nC nC nC Q oss (1)Output ChargeV DS = 16 V V GS = 0 V 27nC Q gls (2)Third-quadrant Gate ChargeV DS < 0 V V GS = 10 V55nCSymbol ParameterTest ConditionsMin.Typ.Max.Unit t d(off)t fTurn-off Delay Time Fall TimeV DD = 15 V I D = 30 A R G =4.7Ω,V GS = 10 V4823ns nsSymbol ParameterTest ConditionsMin.Typ.Max.Unit I SD I SDM Source-drain CurrentSource-drain Current (pulsed)60240A A V SD (*)Forward On Voltage I SD = 30 AV GS = 01.4V t rr Q rr I RRMReverse Recovery Time Reverse Recovery Charge Reverse Recovery CurrentI SD = 60 A di/dt = 100A/µsV DD = 30 VT j = 150°C (see test circuit, Figure 5)46642.86286ns nC AELECTRICAL CHARACTERISTICS (continued)STB120NH03LSTB120NH03LSTB120NH03L6/11Fig. 3: Switching Times Test Circuits For ResistiveFig. 5: Test Circuit For Inductive Load Switching7/11STB120NH03LDIM.mm.inch.MIN.TYP. MAX.MIN.TYP. TYP .A 4.4 4.60.1730.181A1 2.49 2.690.0980.106A20.030.230.0010.009B 0.70.930.0280.037B2 1.14 1.70.0450.067C 0.450.60.0180.024C2 1.21 1.360.0480.054D 8.959.350.3520.368D180.315E 1010.40.3940.409E18.50.334G 4.88 5.280.1920.208L 1515.850.5910.624L2 1.27 1.40.0500.055L3 1.4 1.750.0550.069M 2.43.20.0940.126R 0.40.015V20°8°0°8°D 2PAK MECHANICAL DATASTB120NH03L8/11DIM.mm inchMIN.MAX.MIN.MAX.A010.510.70.4130.421B015.715.90.6180.626D 1.5 1.60.0590.063D1 1.59 1.610.0620.063E 1.65 1.850.0650.073F11.411.60.4490.456K0 4.8 5.00.1890.197P0 3.9 4.10.1530.161P111.912.10.4680.476P2 1.9 2.100750.082R50 1.574T0.250.35.0.00980.0137W23.724.30.9330.956DIM.mm inchMIN.MAX.MIN.MAX.A33012.992B 1.50.059C12.813.20.5040.520D20.20.795G24.426.40.960 1.039N100 3.937T30.4 1.197BASE QTY BULK QTY10001000REEL MECHANICAL DATA* on sales typeTUBE SHIPMENT (no suffix)* TAPE AND REEL SHIPMENT (suffix ”T4”)*D2PAK FOOTPRINTTAPE MECHANICAL DATA9/11STB120NH03LSW1SW2APPENDIX ABuck Converter: Power Losses EstimationThe power losses associated with the FETs in a Synchronous Buck converter can be estimated using the equations shown in the table below. The formulas give a good approximation, for the sake of performan ce comparison, of how different pairs of devices affect the converter efficiency. However a very important parameter, the working temperature, is not considered. The real device behavior is really dependent on how the heat generated inside the devices is r e moved to allow for a safer working junction temperature.The low side (SW2) device requires:• Very low R DS(on) to reduce conduction losses • Small Q gls to reduce the gate charge losses• Small C oss to reduce losses due to output capacitance • Small Q rr to reduce losses on SW 1 during its turn-on • The C gd /C gs ratio lower than V th /V gg ratio especially with low drain to sourcevoltage to avoid the cross conduction phenomenon;The high side (SW1) device requires:• Small R g and L s to allow higher gate current peak an d to limit the voltagefeedback on the gate• Small Q g to have a faster commutation and to reduce gate charge losses• Low R DS(on) to reduce the conduction losses.STB120NH03L元器件交易网STB120NH03L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequencesof use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is grantedby implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subjectto change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are notauthorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is registered trademark of STMicroelectronicsAll other names are the property of their respective owners.® 2003 STMicroelectronics - All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco -Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.11/11。