General DescriptionThe TD1501 is a of easy to use adjustable step-down (buck) switch-mode DC/DC converter. The device is available in an adjustable or fixed output version. It is capable of driving a 3A load with excellent line and load regulation.The output voltage is guaranteed to ±3% tolerance under specified input voltage and output load conditions. The oscillator frequency is guaranteed to ±15%.The PWM control circuit is able to adjust the duty ratio linearly from 0 to 100%. External shutdown is included, featuring typically 80 µA standby current. Self protection features include a two stage frequency reducing current limit for the output switch and an over temperature shutdown for complete protection under fault conditions. Requiring a minimum number of external components, these regulators are simple to use and include internal frequency compensation, and a fixed-frequency oscillator.The TD1501 is available in TO-220B-5L and TO-263-5L packages. Features• Voltage mode non-synchronous PWM control • Built- in switching transistor on chip• Guaranteed 3A output load current• Input voltage range up to 45V• 3,3V,5V and Adjustable output versions• adjustable version output from 1.23V to 42V • Fixed 150KHz frequency internal oscillator• Up to 90% efficiency• ON/OFF shutdown control input• Low power standby mode, I Q typically 80 µA • Thermal shutdown , current limit and short circuit protection• Available in TO-220B and TO-263 packages • RoHS Compliant (100% Green available) • The minimum dropout @ Vout=5V/0.5A up to 0.9 VApplications• Simple High-efficiency step-down regulator• On-card switching regulators• Positive to negative converter• LCD monitor and LCD TV• DVD recorder and PDP TV• Battery charger• Step-down to 1.8/2.5/3.3/5.0 V formicroprocessorsPackage TypesTO220-5LJune, 01, 2013 Rev 2.3 Techcode Semiconductor LimitedPin AssignmentsPin DescriptionsOrdering InformationName DescriptionVin Input supply voltageOutput SwitchingoutputGnd GroundFeedbackOutput voltage feedbackinputON/OFFON/OFF shutdownActive is “Low” or Ground 5 ON/OFF4 Feedback3 Gnd2 Output1 VinGNDTAB ISGNDTO220-5LTO263-5LFunction DescriptionPin Functions+V INThis is the positive input supply for the IC switching regulator. A suitable input bypass capacitor must be present at this pin to minimize voltage transients and to supply the switching currents needed by the regulator.GNDCircuit ground.OutputInternal switch. The voltage at this pin switches between (+V IN – V SAT) and approximately – 0.5V, with a duty cycle of approximately V OUT / V IN. To minimize coupling to sensitive circuitry, the PC board copper area connected to this pin should be kept a minimum.FeedbackSenses the regulated output voltage to complete the feedback loop.ON/OFFAllows the switching regulator circuit to be shutdown using logic level signals thus dropping the total input supply current to approximately 80uA. Pulling this pin below a threshold voltage of approximately 1.3V turns the regulator on, and pulling this pin above 1.3V (up to a maximum of 32V) shuts the regulator down. If this shutdown feature is not needed, the ON /OFF pin can be wired to the ground pin , the regulator will be in the ON condition. The ON /OFF pin should not be left open .Functional Block DiagramFigure 2. Functional Block Diagram of TD1501Typical ApplicationFigure 3. Typical Application of TD1501Absolute Maximum RatingsUnitValueParameter SymbolInput Voltage V IN-0.3 to 45 VFeedback Pin Voltage V FB-0.3 to 40 VEnable Pin Voltage Von-off -0.3 to 40 VOutput Voltage to Ground (Steady State)e V OUT-1 V Power Dissipation P D Internally limited mWOperating Junction Temperature T J150 ºC Storage Temperature T STG-65 to 150 ºCLead Temperature (Soldering, 10 sec) T LEAD260 ºCESD (HBM) V ESD2000 VNote1: Stresses greater than those listed under Maximum Ratings may cause permanent damage tothe device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation is not implied. Exposure to absolute maximumrating conditions for extended periods may affect reliability.Recommended Operating ConditionsUnitMax.Parameter SymbolMin.Input Voltage V IN 3.6 45 V Operating Junction Temperature T J -40 125 ºC Operating Ambient Temperature T A -40 85 ºCElectrical Characteristics (All Output Voltage Versions)Unless otherwise specified, VIN = 12V for 3.3V, 5V, adjustable version . I LOAD = 0.5A Ta = 25ºC.Symbol ParameterConditionsMin. Typ. Max. UnitV IN Input voltage 4.5 45 VI Q Quiescent current V FB =12V force driver off34mAOutput=0VNo outside circuitV FB =12V force driver off50 uAI LOutput=-1VOutputleakage currentV IN =40V 2 30 mAI STBYStandby quiescentcurrentON/OFF pin=5V, V IN =32V80 200uAFosc Oscillator Frequency 125 150 170 KHz FSCPOscillator Frequency of Short Circuit ProtectWhen current limit occurred and VFB < 0.5V, Ta = 25℃ 10 30 50 KHz V SAT Saturation voltageI OUT =3ANo outside circuitV FB = 0V force driver on 1.16 1.4 V Max. Duty Cycle (ON)V FB = 0V force driver on 100 DCMin. Duty Cycle (OFF) V FB =12V force driver off% V FBFeedback Voltage V IN = 4.5V to 45 V1.21 1.235 1.26VI FB Feedback bias current V FB =1.3V(Adjustable version only)10 50 nAI CL Current LimitPeak Current (V FB =0V) 3.8 5.5 A V IL Low (Regulator ON) 1.30.6V V IH ON/OFF pin logic inputThreshold voltage High (Regulator OFF)2.01.3VI H ON/OFF pin logic input currentV LOGIC =2.5V(OFF)-0.01 uA I L ON/OFF pin input currentV LOGIC =0.5V(ON) -0.1 uA θJC Thermal ResistanceTO220B-5LTO263-5L Junction toCase2.53.5OC/W θJA Thermal Resistance with a copper area of approximately 3 in 2TO220B-5L TO263-5LJunction to Ambient2823OC/WElectrical Characteristics ( Continued )Specifications with boldface type are for full operationg temperature range, the other type are for T J=25O C.Typical Performance CharacteristicsFigure 4. Efficiency vs. Load (Vin=12V)Figure 5. Output Voltage vs. TemperatureFigure 6. Output Saturation Characteristics Figure 7. Switching Frequency vs. TemperatureFigure 9. ON/OFF Pin Voltage Figure 10. ON/OFF Pin Sink CurrentFigure 8. Quiescent Current vs. TemperatureFigure 11. Output Saturation CharacteristicsTypical Application Circuit (3.3V Fixed Output Voltage Version)Output ComponentInput Voltage Inductor(L1)Through HoleElectrolytic(Cout)Surface MountTantalum(Cout)Schottky Diode(D1)4.5V ~ 18V 47uh 470uf/25V 330uf/6.3V 18V ~ 45V 68uh 560uf/25V 330uf/6.3V ref. Table 5Figure 11. Typical Application of TD1501 For 3.3VTable 1. TD1501 Series Buck Regulator Design Procedure For 3.3VTypical Application Circuit (5V Fixed Output Voltage Version)Output ComponentInput Voltage Inductor(L1)Through HoleElectrolytic(Cout)Surface MountTantalum(Cout)Schottky Diode(D1)7V ~ 18V 33uh 330uf/25V 220uf/10V 18V ~ 45V 47uh 470uf/25V 330uf/10V ref. Table 5Figure 12. Typical Application of TD1501 For 5VTable 2. TD1501 Series Buck Regulator Design Procedure For 5VTypical Application Circuit (Adjustable Output Voltage Version)Vout R1 R2 Cf (Optional)3.3V 1.6K 2.7K33nf 5V 3.6K 11K 10nf 9V 6.8K43K 1.5nf 12V 1.5K 13K1nfOutput ComponentOutputVoltage Input Voltage Inductor (L1)Through Hole Electrolytic (Cout) Schottky Diode( D1 )4.5V ~ 18V 47uh 470uf/25V 3.3V 18V ~45V 68uh 560uf/25V 7V ~ 18V 33uh 330uf/25V 5V 18V ~45V 47uh 470uf/25V 12V ~18V 47uh 330uf/25V 9V 18V ~45V 47uh 470uf/25V 15V ~ 18V 47uh 220uf/25V 12V18V ~45V47uh330uf/25Vref. Table 5Figure 13. Typical Application of TD1501 For ADJ Table 3. Vout VS. R1, R2, Cf Select Table Table 4. Typical Application Buck Regulator Design ProcedureSchottky Rectifier Selection GuideVin2A Load Current 3A Load Current(Max) Part Number Package Vendor Part Number Package Vendor B220/A SMB/SMA 1 B320/B/ASMC/B/A 1 SS22 SMA 2,3 SS32 SMC 2,320 V- - - MBRS320 SMC 4- - - SK32 SMC 6- - - IN5820 D0-201AD 6 B230/A SMB 1 B330/B/ASMC/B/A 1 SS23 SMB 2,3 SS33 SMC 2,330 V20BQ030 SMB 4 MBRS330SMC 4,5 MBRS230 SMB 5 SK33 SMC 3,6SK23 SMB 6 IN5821 D0-201AD 2,6B240/A SMB/SMA 1 B340/B/ASMC/B/A 1 SS24 SMB 2,3,5 SS34 SMC 2,3MBRS240 SMB 5 30BQ040SMC 440 V- - - MBRS340TRSMC 4,5- - - SK34 SMC 6- - - IN5822 DC-201AD 6 B250/A SMB/SMA 1 B350/B/ASMC/B/A 1 SS25 SMB 2,3 SS35 SMC 2,350 VSK23 SMB 6 MBRS330SMC 4,5- - - SK35 SMC 3,64A Load Current 5A Load CurrentVin(Max) Part Number Package Vendor Part Number Package Vendor SL42 SMC 2,3 B520C SMC 1- - - SR502 D0-201AD 120 V- - - SB520 D0-201AD 2- - - IN5823 D0-201AD 6 SL43 SMC 2,3 B530C SMC 1- - - SR503 D0-201AD 130 V- - - SB530 D0-201AD 2,- - - SSC53L SMC 3- - - IN5824 D0-201AD 6 SL44 SMC 2,3,5 B540C SMC 1- - - SR504 D0-201AD 1- - - SB540 DC-201AD 240 V- - - SSC54 SMC 3- - - MBRS540T3 SMC 5- - - IN5825 DC-201AD 6- - - B550C SMC 150 V- - - SB550 DC-201AD 2- - - - - -Table 5 Lists some rectifier manufacturers.No. Vendor WebSiteInc. 1 Diodes,2 FairchildSemiconductor Semiconductor 3 GeneralRectifier 4 International5 OnSemiconductor 6 Pan Jit International Table 6 Schottky Diode manufacturers.Application Hints and Layout GuidelinesHeat Sink / Thermal ConsiderationsThe TD1501 is available in two packages, a 5-pin TO-220B/TO220 and a 5-pin surface mount TO-263. The TO-220B/TO220 package needs a heat sink under most conditions. The size of the heatsink depends on the input voltage, the output voltage, the load current and the ambient temperature. The TD1501 junction temperature rises above ambient temperature for a 3A load and different input and output voltages. The data for these curves was taken with the TD1501 (TO-220B/TO220 package) operating as a buck switching regulator in an ambient temperature of 25o C (still air). These temperature rise numbers are all approximate and there are many factors that can affect these temperatures. Higher ambient temperatures require more heat sinking.The TO-263 surface mount package tab is designed to be soldered to the copper on a printed circuit board. The copper and the board are the heat sink for this package and the other heat producing components, such as the catch diode and inductor. The PC board copper area that the package is soldered to should be at least 0.4 in2, and ideally should have 2 or more square inches of 2 oz. Additional copper area improves the thermal characteristics, but with copper areas greater than approximately 6 in2, only small improvements in heat dissipation are realized. If further thermal improvements are needed, double sided, multilayer PC board with large copper areas and/or airflow are recommended.The TD1501 (TO-263 package) junction temperature rise above ambient temperature with a 3A load for various input and output voltages. This data was taken with the circuit operating as a buck switching regulator with all components mounted on a PC board to simulate the junction temperature under actual operating conditions. This curve can be used for a quick check for the approximate junction temperature for various conditions, but be aware that there are many factors that can affect the junction temperature. When load currents higher than 3A are used, double sided or multilayer PC boards with large copper areas and/or airflow might be needed, especially for high ambient temperatures and high output voltages.For the best thermal performance, wide copper traces and generous amounts of printed circuit board copper should be used in the board layout. (Once exception to this is the output (switch) pin, which should not have large areas of copper.) Large areas of copper provide the best transfer of heat (lower thermal resistance) to the surrounding air, and moving air lowers the thermal resistance even further. Output Voltage Ripple and TransientsThe output voltage of a switching power supply will contain a sawtooth ripple voltage at the switcher frequency, typically about 1% of the output voltage, and may also contain short voltage spikes at the peaks of the sawtooth waveform.The output ripple voltage is due mainly to the inductor sawtooth ripple current multiplied by the ESR of the output capacitor.The voltage spikes are present because of the fast switching action of the output switch, and the parasitic inductance of the output filter capacitor, To minimize these voltage spikes, special low inductance capacitors can be used, and their lead lengths must be kept short. Wiring inductance, stray capacitance, as well as the scope probe used to evaluate these transients, all contribute to the amplitude of these spikes.A large value inductor will also result in lower output ripple voltage , but will have a larger physical size,higher series reistance,and/or lower saturation current. An additional small LC filter can be added to the output (as shown in Figure 14) to further reduce the amount of output ripple and transients.Layout GuidelinesAs in any switching regulator, layout is very important. Rapidly switching currents associated with wiring inductance can generate voltage transients which can cause problems. For minimal inductance and ground loops, the wires indicated by heavy lines should be wide printed circuit traces and should be kept as short as possible. For best results, external components should be located as close to the switcher IC as possible using ground plane construction or single point grounding.If open core inductors are used, special care must be taken as to the location and positioning of this type of inductor. Allowing the inductor flux to intersect sensitive feedback, IC groundpath and C OUT wiring can cause problems.When using the adjustable version, special care must be taken as to the location of the feedback resistors and the associated wiring. Physically locate both resistors near the IC, and route the wiring away form the inductor especially an open core type of inductor.Figure 14, Layout Guidelines and Post Ripple FilterTDxxxxxTDxxxxxPackage Information (TO220B-5L)Dimensions In Millimeters Dimensions In Inches SymbolMin. Max. Min. Max.A 0.44 0.47 0.175 0.185b 0.07 0.09 0.027 0.037D 0.84 0.89 0.330 0.350d1 0.10 0.039d2 0.63 0.248E 9.91 10.41 0.390 0.410e 0.16 0.18 0.062 0.072F 0.12 0.13 0.048 0.052H1 0.64 0.250H2 2.08 2.24 0.820 0.880H3 2.39 2.55 0.942 1.002J1 0.27 0.105J2 0.37 0.53 0.147 0.207J3 0.84 0.331Q 0.25 0.30 0.100 0.120Package Information (TO220-5L)Package Information (TO263-5L)Dimensions In Millimeters Dimensions In Inches SymbolMin. Max. Min. Max.A 4.45 4.7 0.175 0.185B 0.71 0.97 0.028 0.038C 0.38 0.76 0.015 0.030C2 1.22 1.32 0.048 0.052D 8.38 8.89 0.330 0.350E 9.91 10.16 0.390 0.410e 1.57 1.85 0.062 0.070F 6.61 7.11 0.260 0.280L - 14.35 - 0.565L2 - 1.27 - 0.050Packing InformationTO263-5L Carrier Tape Outline DimensionsCarrier Tape, Number of Components Per Reel and Reel SizePackage Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size TO263-5L 24.0 ± 0.1mm 4.0 ± 0.1mm 800 PCS 330 ± 2mm。
30W,Ultra wide input isolated ®ulated dual/single output,DC/DC converterCB Patent ProtectionRoHSFEATURES●Ultra wide input voltage range (4:1)●High efficiency up to 90%with full load ●High efficiency up to 82%with 5%load●No-load power consumption as low as 0.14W ●Isolation voltage:1.5K VDC●Input under-voltage protection,output short circuit,over-voltage,over-current protection ●Operating temperature range:-40℃to +80℃●Meet CISPR32/EN55032CLASS A,without external components●Six-sided metal shielding package●Reverse voltage protection available with A2S(Chassis mounting)or A4S(35mm DIN-Rail mounting)●IEC60950,UL60950,EN60950approvalURA_LD-30WR3&URB_LD-30WR3series are isolated 30W DC-DC products with 4:1input voltage.They feature efficiency up to 90%,1.5K VDC isolation,operating temperature of -40℃to +80℃,Input under-voltage protection,output short circuit protection,over-voltage protection,over-current protection and EMI meets CISPR32/EN55032CLASS A,which make them widely applied in data transmission device,battery power supply device,tele-comunication device,distributed power supply system,remote control system,industrial robot fields.And extension package A2S and A4S also enable them with reverse voltage protection.Product Characteristic CurveFig.1Apply model ：URA2405LD-30W(H)R3（9-18V input voltage ）、URA2424LD-30W(H)R3（9-18V input voltage ）、URA4805LD-30W(H)R3（18-36V input voltage ）Fig.2Apply model ：URA2405LD-30W(H)R3（18-36V input voltage ）、URA2424LD-30W(H)R3（18-36V input voltage ）、URA4805LD-30W(H)R3（36-75V input voltage ）、URA2412LD-30W(H)R3、URA2415LD-30W(H)R3、URA4812LD-30W(H)R3、URA4815LD-30W(H)R3Fig.3Apply model ：URB2403LD-30W(H)R3、URB2405LD-30W(H)R3、URB4803LD-30W(H)R3、URB4805LD-30W(H)R3Fig.4Apply model ：URB2409LD-30W(H)R3、URB2412LD-30W(H)R3、URB2415LD-30W(H)R3、URB2424LD-30W(H)R3、URB4812LD-30W(H)R3、URB4815LD-30W(H)R3、URB4824LD-30W(H)R3All the DC/DC converters of this series are tested according to the recommended circuit(see Fig.5)before delivery.If it is required to further reduce input and output ripple,properly increase the input&output of additional capacitors Cin and Cout or select capacitors of low equivalent impedance provided that the capacitance is no larger than the max.capacitive load of the product.V in0VV in0VDual outp ut:Single outputvoltage(VDC)Cout(µF)Cin(µF)Dual outputvoltage(VDC)Cout(µF)Cin(µF)3.3/5/9220100±5/±12/±1522010012/15/24100±241002.EMC solution-recommended circuitSingle outputFig.6Notes:Part①in the Fig.6is used for EMC test and part②for EMI filtering;selected based on needs.Parameter descriptionModel Vin:24V Vin:48VFUSEChoose according to actual inputcurrentMOV S20K30S14K60C0680µF/50V330µF/100VC1330µF/50V330µF/100VC2 4.7µF/50V 2.2µF/100VC3Refer to the Cout in Fig.5LCM1mH,recommended to useMORNSUN’s FL2D-30-102sCY1、CY21nF/2KVDual outputFig.7Notes:Part①in the Fig.7is used for EMC test and part②for EMI filtering;selected based on needs.Model Vin:24V Vin:48VFUSE Choose according to actual inputcurrentMOV S20K30S14K60C0680µF/50V330µF/100VC1 2.2µF/50V 2.2µF/100VC2 2.2µF/50V 2.2µF/100VC3330µF/50V330µF/100VC4Refer to the Cout in Fig.5LDM1 3.3µHCY1、CY2 2.2nF/400V AC Safety Y Capacitor3.Application of Trim and calculation of Trim resistanceTrim up Trim downApplied circuits of Trim(Part in broken line is the interior of models)Calculation formula of Trim resistance:up: a=VrefVo’-VrefR1R=TaR2R-a2-R3down: a=VrefVo’-VrefR2R=TaR1R-a1-R3R T is Trim resistance,a is a self-definedparameter,with no real meaning.Vo’for the actual needs of the up ordown regulated voltageVout(VDC)R1(KΩ)R2(KΩ)R3(KΩ)Vref(V)3.34.801 2.8712.4 1.245 2.883 2.8710 2.597.500 2.8715 2.51211.000 2.8715 2.51514.494 2.8715 2.52424.872 2.8717.8 2.54.It is not allowed to connect modules output in parallel to enlarge the power5.For more information please find DC-DC converter application notes on Horizontal Package(without heat sink)Dimensions and Recommended LayoutHorizontal Package(with heat sink)DimensionsURA_LD-30WR3A2S&URB_LD-30WR3A2S(without heat sink)DimensionsNotes:1.Packing information please refer to Product Packing Information which can be downloaded from .Horizontal Packing Bag Number:58200035(without heat sink),58200051(with heat sink),A2S/A4S Packing Bag Number:58220022;2.The maximum capacitive load offered were tested at input voltage range and full load;3.Unless otherwise specified,parameters in this datasheet were measured under the conditions of Ta=25℃,humidity<75%RH with nominalinput voltage and rated output load;4.All index testing methods in this datasheet are based on Company’s corporate standards;5.We can provide product customization service,please contact our technicians directly for specific information;6.Products are related to laws and regulations:see"Features"and"EMC";7.Our products shall be classified according to ISO14001and related environmental laws and regulations,and shall be handled byqualified units.Mornsun Guangzhou Science&Technology Co.,Ltd.Address:No.5,Kehui St.1,Kehui Development Center,Science Ave.,Guangzhou Science City,Luogang District,Guangzhou,P.R.China Tel:86-20-38601850-8801Fax:86-20-38601272E-mail:***************。
Layout Considerations for Non-Isolated DC-DC ConvertersDC-DC converters are an excellent source of electric fields and magnetic fields. Their EMI spectrum begins at the switching frequency and often extends over 100MHz. To minimize capacitive couplings and magnetic couplings care must be exercised in printed circuit board (PCB) layout. Parasitic capacitance and parasitic inductance of the circuit must be evaluated so that the proper trade-off can be made early in the design phase.For many years, repeated introductions of integrated DC-DCpower-supply controllers have given us ever-higher levels of performance. These ICs unburden the systems engineer by removing the task of power-supply design, but this simplification has led to a loss of knowledge. Switching converters should therefore serve as a reminder to be careful. The following discussion presents rules for avoiding surprises when designing board layouts for non-isolated DC-DC converters.The first rule in optimizing such a layout is to isolate the converter. DC-DC converters are an excellent source of electric and magnetic fields. Their EMI spectrum begins at the switching frequency and often extends over 100MHz. To minimize capacitive couplings and "magnetic-field-to-loop" couplings, you should locate the converter away from other circuitry, especially from low-level analog circuitry. Isolating the converter is not always easy. Some boards accept input voltage on one side of the converter and distribute output voltages on the other side. VME cards or telecom cards, for example, include very complex routings with currents as high as 20A. A single connector brings in the input voltage and distributes several output voltages to the backplane. Therefore, there's a strong temptation to place the converter near this connector to reduce resistive drop. The area, however, is dense with interface drivers, backplane buses, and so forth, with the associated risk of noise coupling. A power connector can be added in some cases, but that solution entails extra board area and cost.Resistance in the copper traces is the most constraining factor. For a trace of a given length and thickness, this resistance iswhere l is the trace length in meters, S is the trace area in square meters, and (the resistivity of copper) is 1.7x10-8/m at 20°C, or 2.1x10-8/m at 70°C. As an example, the resistance of a 20°C trace 0.5cm wide and 35µm thick is 1m/cm. That value may appear negligible, but it commands attention if you are distributing 2.5V at 10A through two connectors and a backplane board.On some boards, the trace thickness includes a tin-lead layer. This layer can nearly double the equivalent resistance:lead resistivity = 2.07x10-7/m at 20°Ctin resistivity = 1.14x10-7/m at 20°CA trade-off between accuracy and trace loss lets you move the converter away from the connector. You can limit the effect of a resistive drop by performing a remote V OUT measurement near the connector, but beware of capactive couplings! To confine large currents to a defined area, route all the supply lines through pins at one end of the connector.MOSFET DriversAs switching frequencies increase, the switching time becomes shorter and shorter: typically 10ns for a 500kHz converter. At that frequency, even the shortest trace has a significant impedance. It's also important to note that a peak gate current can rise to several amperes in an extremely short time. Therefore, the proper routing of MOSFET-drive signals begins with an analysis of the converter's block diagram.For example, consider a synchronous step-down controller for notebook computers (Figure 1). The MOSFETs are driven by the transference of energy from the tank capacitors (C6 and C7) to the gates through the few ohms of the driver outputs. Note that the gate drive for the high-side n-channel MOSFET (Q1) is floating. Then-channel driver works like a charge pump!For larger image, click on figures.Figure 1. Operation of the MAX1710 synchronous step-down controller is depicted by an application circuit (a) and an internal block diagram (b). Figure 2 highlights the current paths during turn-on. Any series inductance can lead to disaster. In the best case, the spikes are higher, but simply increase the switching losses. In the worst case, the two MOSFETs can blow up due to cross conduction (simultaneous turn-on). Consequently, an optimal routing implies very short and wide traces between:C6 and V ddC6 and Q2(S)C7 and BST, and C7 and LXQ1(G) and DHQ2(G) and DLQ1(S) and LXQ2(S) and PGNDKeep in mind that the parasitic inductance for a 1cm trace is about 10nH.Looking closely at C6, you can see that it supplies Q1 and Q2, but not in the same way. It acts as a filter capacitor for Q1 and as a tank capacitor for Q2. Because we cannot place C6 near the high-side and low-side drivers at the same time, we place it as close as possible to V dd and PGND (where the peak currents flow), and also near C7 (almost average current). Notice that the PGND, DL, and V dd pins are side by side, and not by chance! Q2 and C6 are placed to minimize theground-trace lengths between PGND, C6(-), and Q2(S). Connect this ground trace to the ground plane at a single point, near the PGND pin. To avoid common-impedance coupling, LX should be connected to Q1, and PGND/C6(-) to the source of Q2. Figure 3 highlights the current paths during turn-off.Figure 2. The dotted lines indicate heavy current flow in the gate-drive circuits for Q1 (a) and Q2 (b).Figure 3. The dotted lines indicate heavy current flow in the gate-discharge (turn-off) paths for Q1 (a) and Q2 (b).The number of "via" should be limited as much as possible. Indeed,the few tens of nanohenries added by a via is embarrassing whendi/dt is high. For that reason, you should place all power components on the component layer, even the SMD ones. If you have no other choice, put several via in parallel.We must remember that controllers are often oversized for the application at hand. Common practice, for instance, employs a 10A controller to produce a 3A output. Because we generally choose minimum-sized MOSFETs for cost reasons, the on-chip drivers remain oversized and therefore capable of more gate drive than is necessary. Because the earlier discussion sought to avoid slowing the MOS gate drive, it seems paradoxical to place a small (10 to 100) resistor in series with the gate drive. Oversized and/or fast drive waveforms, however, produce more switching noise and RF interference. At the other extreme, slow waveforms produce more switching loss in the MOSFET(s) and diode (if any). A good compromise is to reduce EMI by slowing the waveform slopes as much as possible, while maintaining an acceptable level of efficiency. (Components in the gate drive of Figure 4b let you trim the rise and fall times separately.) Fortunately, large drivers allow a final bit of optimization.Routing the Power StageFigure 4 illustrates the two high-current loops common to many power converters. In responding to the perturbations caused by switching, these loops support high di/dt, and (at some nodes) high dv/dt as well. Identifying these loops helps to reduce their effects. Note that di/dt is great within the converter (at the switching node) but small outside the converter. Indeed, currents before the input capacitor and after the output capacitor reach a high value, but they are nearly continuous. Their AC components are low when the converter is well designed.Figure 4. These simple schematics illustrate the basic operation of the step-up (a) and step-down (b) switching converters.First, minimize parasitic inductance. We will consider a step-up converter, but the reasoning can be transposed for a step-down type. Figure 5 illustrates the kinds of parasitic inductance that cause the most problems.Figure 5. When the main switching transistor (T) turns off, the diode capacitance discharges as shown.Without describing the 10 phases of a switching cycle, we can consider the MOSFET turn-off, when inductor current has been short-circuited by the MOSFET. The diode's inverse capacitor chargesextremely fast via loop two, and the node-voltage Va at the diode's anode (normally at Vout - Vd) goes to near 0V. The serial inductors (LfT + LfD + LfC) increase this discharge time, thereby increasing switching loss in the MOSFET. These types of inductance also generate noise.Peak current is limited by the transistor, which operates as a current source (Vds still equals a few volts). For a 2A MOSFET, this current source could be 10A! The current level is large for a very short time (a few 10ns). Remember that varying the current through an inductor produces a voltage proportional to the current variation:This transition phase is a good spike generator! Once more, we minimize parasitic inductance by minimizing trace lengths and using short, wide traces around the MOSFET, diode, and Cout. You can now see how noise can be reduced by the control of slopes in thegate-drive waveforms.To limit resistive voltage drops and the number of via, power-stage SMD components should be placed on the component side of the board and power traces routed on its component layer. If possible, the power ground should also be routed on the same layer. This arrangement has another benefit: less perturbation of the ground plane. To cancel radiated fields, take care to minimize the area of the power-current loop.When it becomes necessary to route a power trace on a layer other than the component layer, choose a trace from the inductor or filter capacitors (i.e., Cout for a step-down converter, or Cin for a step-up converter). Because current through such traces is nearly continuous, it produces no noise, just a resistive drop. Parasitic inductance will be smaller if you route this trace on the layer just under the component layer. To avoid coupling by common impedance, you should separate PGND, the power-circuit ground, and the general ground plane (Figure 6).Figure 6. These details illustrate the routing of PGND versus gate-control traces in the controller circuit.Capacitors and Other ComponentsIt's important to pay close attention to the routing of traces from capacitor terminals in a DC-DC converter circuit. Large-valuedlow-ESR capacitors are expensive, and bad routings can cancel their performance. A good routing, on the other hand, can lower the output noise from 150mV to 50mV!Ripple is directly related to the inductor value, the capacitor ESR, the switching frequency, and so forth, but HF noise (spikes) depend on parasitic elements and the switching action. We can anticipate spiking frequencies from 1MHz to 10MHz, depending on the switching frequency.In a bad routing (Figure 7a), parasitic inductance associated with trace lengths causes trouble: L1 brings about an increase in noise, and L2 limits the attenuation of HF capacitor CoHF. The fix (Figure 7b) is to bring the input trace in on one side of the capacitor pad, and theoutput trace out on the other side of the pad.Figure 7. Improper routing of capacitor traces introduces unwanted parasitic inductance.Now, having placed and routed the bulkiest parts, we turn our attention to the inductor. A deliberate but unwanted coupling (Figure 8a) allows current in the power loop to pollute the controller supply (Vcc). High di/dt produced by switching through Lp1 causes Vcc overshoots that easily reach several hundred millivolts. Usingwith L = 10nH, I = 1A, and t = 50ns, V = 0.2V!As mentioned earlier, the first precaution is to separate the powertraces and be careful with PGND. The second precaution is to avoid connecting traces to the power loop (see Figure 8b). Traces that distribute the input voltage should be connected before the input capacitor and the controller's Vcc connection. Output voltage is distributed after the connections to the HF output capacitor.Figure 8. Unwanted common-impedance coupling (a) is prevented by the connections shown in (b).Finally, some miscellaneous advice: Bad routing of the PGND trace can cause common-impedance coupling (one reason for the PGND terminal is to avoid polluting the controller's internal ground node). Move high-impedance traces (especially the output resistor divider that adjusts the output voltage) away from nodes that support high dV/dt. Currents induced by such coupling can make the controller oscillate.z。
