CS8405资料
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PreliminaryProductInformationThisdocumentcontainsinformationforanewproduct.CirrusLogicreservestherighttomodifythisproductwithoutnotice.
1Copyright©CirrusLogic,Inc.2002(AllRightsReserved)CirrusLogic,Inc.P.O.Box17847,Austin,Texas78760(512)4457222FAX:(512)4457581
http://www.cirrus.comCS8405A
96kHzDigitalAudioInterfaceTransmitterFeatures
CompleteEIAJCP1201,IEC-60958,AES3,
S/PDIFcompatibletransmitter
+5VDigitalSupply(VD)
+3Vto5VDigitalInterface(VL)
On-chipChannelStatusandUserbitbuffer
memoriesallowblocksizedupdates
Flexible3-wireserialdigitalaudioinputport
Upto96kHzframerate
MicrocontrollerwriteaccesstoChannel
StatusandUserbitdata
On-chipdifferentiallinedriver
GeneratesCRCcodesandparitybits
Standalonemodeallowsusewithouta
microcontrollerGeneralDescription
TheCS8405AisamonolithicCMOSdevicewhichen-
codesandtransmitsaudiodataaccordingtotheAES3,
IEC60958,S/PDIF,orEIAJCP1201.TheCS8405Aac-
ceptsaudioanddigitaldata,whichisthenmultiplexed,
encodedanddrivenontoacable.
Theaudiodataisinputthroughaconfigurable,3-wirein-
putport.Thechannelstatusanduserbitdataareinput
throughanSPIorTwo-Wiremicrocontrollerport,and
maybeassembledinblocksizedbuffers.Forsystems
withnomicrocontroller,astandalonemodeallowsdi-
rectaccesstochannelstatusanduserbitdatapins.
TargetapplicationsincludeA/VReceivers,CD-R,DVD
receivers,digitalmixingconsoles,effectsprocessors,
set-topboxes,andcomputerandautomotiveaudio
systems.
ORDERINGINFORMATION
CS8405A-CS28-pinSOIC-10to+70°C
CS8405A-CZ28-pinTSSOP-10to+70°C
CS8405A-IS28-pinSOIC-40to+85°C
CS8405A-IZ28-pinTSSOP-40to+85°C
CDB8415AEvaluationBoard
SerialAudioInput
Misc.ControlAES3S/PDIFEncoderC&UbitDataBuffer
ControlPort&RegistersOutputClockGeneratorRXP
ILRCK
ISCLK
SDINTXP
TXN
RSTOMCKUTCBLSDA/CDOUTSCL/CCLKAD1/CDINAD0/CSINTVL+DGND
Driver
AD2H/SVD+
JUN‘02
DS469PP4CS8405A
2DS469PP4TABLEOFCONTENTS
1.CHARACTERISTICSANDSPECIFICATIONS........................................................................4
POWERANDTHERMALCHARACTERISTICS.......................................................................4
ABSOLUTEMAXIMUMRATINGS...........................................................................................4
DIGITALCHARACTERISTICS.................................................................................................5
SWITCHINGCHARACTERISTICS..........................................................................................5
SWITCHINGCHARACTERISTICS-SERIALAUDIOPORTS.................................................6
SWITCHINGCHARACTERISTICS-CONTROLPORT-SPIMODE......................................7
SWITCHINGCHARACTERISTICS-CONTROLPORT-TWO-WIREMODE.........................8
2.TYPICALCONNECTIONDIAGRAM........................................................................................9
3.GENERALDESCRIPTION.....................................................................................................10
3.1AES3andS/PDIFStandardsDocuments........................................................................10
4.THREE-WIRESERIALINPUTAUDIOPORT........................................................................10
5.AES3TRANSMITTER............................................................................................................12
5.1TransmittedFrameandChannelStatusBoundaryTiming..............................................12
5.2TXNandTXPDrivers......................................................................................................12
5.3MonoModeOperation.....................................................................................................12
6.CONTROLPORTDESCRIPTIONANDTIMING....................................................................14
6.1SPIMode.........................................................................................................................14
6.2Two-WireMode...............................................................................................................15
6.3Interrupts..........................................................................................................................15
7.CONTROLPORTREGISTERSUMMARY.............................................................................16
7.1MemoryAddressPointer(MAP).......................................................................................16
8.CONTROLPORTREGISTERBITDEFINITIONS..................................................................17
8.1Control1(1h)....................................................................................................................17
8.2Control2(2h)....................................................................................................................18