BD-LM3S9B96原理图

Stellaris® LM3S9B96 Development Kit User’s ManualCopyrightCopyright © 2009 Texas Instruments, Inc. All rights reserved. Stellaris and StellarisWare are registered trademarks of Texas Instruments. ARM and Thumb are registered trademarks, and Cortex is a trademark of ARM Limited. Other names and brands may be claimed as the property of others. Texas Instruments108 Wild Basin, Suite 350Austin, TX 78746Main: +1-512-279-8800Fax: +1-512-279-8879Stellaris® LM3S9B96 Development Kit User’s ManualTable of ContentsChapter 1: Stellaris® LM3S9B96 Development Board Overview (7)Features (7)Development Kit Contents (10)Block Diagram (11)Development Board Specifications (11)Chapter 2: Stellaris® LM3S9B96 Development Board Hardware Description (13)LM3S9B96 Microcontroller Overview (13)Jumpers and GPIO Assignments (13)Clocking (14)Reset (15)Power Supplies (15)USB (15)Debugging (16)Color QVGA LCD Touch Panel (17)I2S Audio (19)User Switch and LED (19)Chapter 3: Stellaris® LM3S9B96 Development Board External Peripheral Interface (EPI) (21)SDRAM Expansion Board (21)Flash and SRAM Memory Expansion Board (21)Chapter 4: Using the In-Circuit Debugger Interface (23)Appendix A: Stellaris® LM3S9B96 Development Board Schematics (25)Appendix B: Stellaris® LM3S9B96 Development Board Component Locations (33)Appendix C: Stellaris® LM3S9B96 Development Board Connection Details (35)DC Power Jack (35)ARM Target Pinout (35)Appendix D: Stellaris® LM3S9B96 Development Board Microcontroller GPIO Assignments (37)Appendix E: Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board (41)Installation (41)Features (42)Hardware Description (43)Functional Description (43)Memory Map (45)Component Locations (46)Schematics (46)Appendix F: References (49)List of FiguresFigure1-1.DK-LM3S9B96 Development Board (9)Figure1-2.DK-LM3S9B96 Development Board Block Diagram (11)Figure2-1.Factory Default Jumper Settings (14)Figure4-1.ICD Interface Mode (23)Figure ponent Placement Plot for Top (34)Figure E-1.DK-LM3S9B96-EXP-FS8 Board Image (41)Figure E-2.DK-LM3S9B96 Development Board (42)Figure E-3.DK-LM3S9B96-EXP-FS8 Flash/SRAM/LCD IF Expansion Board Block Diagram (43)Figure ponent Placement Plot for Top and Bottom (46)Stellaris® LM3S9B96 Development Kit User’s ManualList of TablesTable2-1.Board Features and Peripherals that are Disconnected in Factory Default Configuration (13)B-Related Signals (15)Table2-3.Hardware Debugging Configurations (16)Table2-4.Debug-Related Signals (17)Table2-5.LCD-Related Signals (18)Table2-6.I2S Audio-Related Signals (19)Table2-7.Navigation Switch-Related Signals (19)Table C-1.Debug Interface Pin Assignments (35)Table D-1.Microcontroller GPIO Assignments (37)Table E-1.Flash and SRAM Memory Expansion Board Memory Map (45)Table E-2.LCD Latch Register (45)C H A P T E R1Stellaris® LM3S9B96 Development Board Overview The Stellaris® LM3S9B96 Development Board provides a platform for developing systems aroundthe advanced capabilities of the LM3S9B96 ARM® Cortex™-M3-based microcontroller.The LM3S9B96 is a member of the Stellaris Tempest-class microcontroller family. Tempest-classdevices include capabilities such as 80MHz clock speeds, an External Peripheral Interface (EPI)and Audio I2S interfaces. In addition to new hardware to support these features, theDK-LM3S9B96 board includes a rich set of peripherals found on other Stellaris boards.The development board includes an on-board in-circuit debug interface (ICDI) that supports bothJTAG and SWD debugging. A standard ARM 20-pin debug header supports an array of debuggingsolutions.The Stellaris® LM3S9B96 Development Kit accelerates development of Tempest-classmicrocontrollers. The kit also includes extensive example applications and complete source code. FeaturesThe Stellaris® LM3S9B96 Development Board includes the following features.Simple set-up—USB cable provides debugging, communication, and powerFlexible development platform with a wide range of peripheralsColor LCD graphics display–TFT LCD module with 320 x 240 resolution–Resistive touch interface80 MHz LM3S9B96 microcontroller with 256 K Flash, 96 K SRAM, and integrated EthernetMAC+PHY, USB OTG, and CAN communications–– 8 MB SDRAM (plug-in EPI option board)–– EPI break-out board (plug-in option board)1MB serial Flash memoryPrecision 3.00V voltage referenceSAFE RTOS™ operating system in microcontroller ROMI2S stereo audio codec–Line In/Out–Headphone Out–Microphone InController Area Network (CAN) Interface10/100 BaseT EthernetUSB On-The-Go (OTG) Connector–Device, Host, and OTG modesUser LED and push buttonThumbwheel potentiometer (can be used for menu navigation)MicroSD card slotSupports a range of debugging options–Integrated In-circuit Debug Interface (ICDI)–JTAG, SWD, and SWO all supported–Standard ARM® 20-pin JTAG debug connectorUSB Virtual COM PortJumper shunts to conveniently reallocate I/O resourcesDevelop using tools supporting the DK-LM3S9B96 from Keil, IAR, Code Sourcery, and Code RedSupported by StellarisWare® software including the graphics library, the USB library, and the peripheral driver libraryAn optional Flash and SRAM memory expansion board (DK-LM3S9B96-EXP-FS8) is also available for use with the DK-LM3S9B96 development board–Works with the External Peripheral Interface (EPI) of the Stellaris microcontroller–Provides Flash memory, SRAM, and an improved performance LCD interfaceFor more information on the DK-LM3S9B96-EXP-FS8 memory expansion board, seeAppendix E, “Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board,” on page 41.The DK-LM3S9B96-EXP-FS8 memory expansion board is available for purchase separately.Stellaris® LM3S9B96 Development Kit User’s Manual Figure1-1.DK-LM3S9B96 Development BoardAudio Line Output1MB Serial Flash Memory3.5" LCD Touch PanelDevelopment Kit ContentsThe Stellaris® LM3S9B96 Development Kit contains everything needed to develop and run arange of applications using Stellaris microcontrollers:LM3S9B96 development board8MB SDRAM expansion boardEPI signal breakout boardRetractable Ethernet cableUSB Mini-B cable for debugger useUSB Micro-B cable for OTG-to-PC connectionUSB Micro-A to USB A adapter for USB HostUSB Flash memory stickmicroSD Card20-position ribbon cableCDs containing evaluation versions of the following tools:–StellarisWare with example code for this board–ARM RealView® Microcontroller Development Kit (MDK)–IAR Embedded Workbench® Kickstart Edition–Code Red Technologies Red Suite™–CodeSourcery Sourcery G++™ GNU tools.Stellaris® LM3S9B96 Development Kit User’s Manual Block DiagramFigure1-2.DK-LM3S9B96 Development Board Block DiagramDevelopment Board SpecificationsBoard supply voltage: 4.75–5.25 Vdc from one of the following sources:–Debugger (ICDI) USB cable (connected to a PC)–USB Micro-B cable (connected to a PC)–DC power jack (2.1x5.5mm from external power supply)Break-out power output: 3.3 Vdc (100 mA max)Dimensions (excluding LCD panel):– 4.50” x 4.25” x 0.60” (LxWxH) with SDRAM board– 4.50” x 4.25” x 0.75” (LxWxH) with EPI breakout boardAnalog Reference: 3.0V +/-0.2%RoHS status: CompliantNOTE:When the LM3S9B96 Development Board is used in USB Host mode, the host connector is capable of supplying power to the connected USB device. The available supply current is limited to ~200mA unless the development board is powered from an external 5Vsupply with a =600mA rating.C H A P T E R2Stellaris® LM3S9B96 Development Board Hardware DescriptionIn addition to an LM3S9B96 microcontroller, the development board includes a range of usefulperipheral features and an integrated in-circuit debug interface (ICDI). This chapter describes howthese peripherals operate and interface to the microcontrollerLM3S9B96 Microcontroller OverviewThe Stellaris LM3S9B96 is an ARM Cortex-M3-based microcontroller with 256-KB flash memory,80-MHz operation, Ethernet, USB, EPI, SAFE RTOS™ in ROM, and a wide range of peripherals.See the LM3S9B96 Microcontroller Data Sheet (order number DS-LM3S9B96) for completemicrocontroller details.The LM3S9B96 microcontroller is factory-programmed with a quickstart demo program. Thequickstart program resides in on-chip flash memory and runs each time power is applied, unlessthe quickstart has been replaced with a user program.Jumpers and GPIO AssignmentsEach peripheral circuit on the development board is interfaced to the LM3S9B96 microcontrollerthrough a 0.1” pitch jumper/shunt. Figure2-1 on page 14 shows the factory default positions of thejumpers. The jumpers must be in these positions for the quickstart demo program to functioncorrectly.The development board offers capabilities that the LM3S9B96 cannot support simultaneously dueto pin count and GPIO multiplexing limitations. For example, as configured, the board does notsupport SDRAM and I2S receive (microphone or line input) functions at the same time. Thejumpers associated with I2S receive are omitted in the default configuration.Table2-1 lists all features and peripherals that are disconnected in the factory defaultconfiguration. Using these peripherals requires that other peripherals be disconnected.Appendix D, “Stellaris® LM3S9B96 Development Board Microcontroller GPIO Assignments,” onpage 37 lists alternative jumper configurations used in conjunction with some of theStellarisWare™ example applications for this board.Table2-1.Board Features and Peripherals that are Disconnected in Factory DefaultConfigurationPeripheral JumpersI2S Receive (Audio Input)JP44, 45, 47, 49Controller Area Network (CAN) JP14, 15Ethernet Yellow Status LED (LED2)JP2Analog 3.0V Reference JP33See Appendix D, “Stellaris® LM3S9B96 Development Board Microcontroller GPIO Assignments,”on page 37, for a complete list of GPIO assignments. The table lists all default and alternateassignments that are supported by the 0.1”jumpers and PCB routing. The LM3S9B96 hasadditional internal multiplexing that enables additional configurations which may require discretewiring between peripherals and GPIO pins.The ICDI section of the board has a GND-GND jumper that serves no function other than toprovide a convenient place to ‘park’ a spare jumper. This jumper may be reused as required.ClockingThe development board uses a 16.0-MHz (Y2) crystal to complete the LM3S9B96microcontroller's main internal clock circuit. An internal PLL, configured in software, multiples thisclock to higher frequencies for core and peripheral timing.A 25.0-MHz (Y1) crystal provides an accurate timebase for the Ethernet PHY.Stellaris® LM3S9B96 Development Kit User’s ManualResetThe RESETn signal into the LM3S9B96 microcontroller connects to the reset switch (SW2) and tothe ICDI circuit for a debugger-controlled reset.External reset is asserted (active low) under any one of the three following conditions:Power-on reset (filtered by an R-C network)Reset push switch SW2 held downBy the ICDI circuit (U12 FT2232, U13D 74LVC125A) when instructed by the debugger (this capability is optional, and may not be supported by all debuggers)The LCD module has special Reset timing requirements requiring a dedicated control line from themicrocontroller.Power SuppliesThe development board requires a regulated 5.0V power source. Jumpers JP34-36 select thepower source, with the default source being the ICDI USB connector. Only one +5V source shouldbe selected at any time to avoid conflict between the power sources.When using USB in Host mode, the power source should be set to either ICDI or to EXT if a +5Vpower supply (not included in the kit) is available.The development board has two main power rails. A +3.3V supply powers the microcontroller andmost other circuitry. +5V is used by the OTG USB port and In-circuit Debug Interface (ICDI) USBcontroller. A low drop-out (LDO) regulator (U5) converts the +5V power rail to +3.3V. Both railsare routed to test loops for easy access.USBThe LM3S9B96’s full-speed USB controller supports On-the-Go, Host, and Device configurations.See Table2-2 for USB-related signals. The 5-pin microAB OTG connector supports all threeinterfaces in conjunction with the cables included in the kit.The USB port has additional ESD protection diode arrays (D1, D2,D5) for up to 15kV of ESDprotection.B-Related SignalsMicrocontroller Pin Board Function Jumper NamePin 70 USB0DM USB Data--Pin 71 USB0DP USB Data+-Pin 73 USB0RBIAS USB bias resistor-Pin 66 USB0ID OTG ID signal (input to microcontroller)OTG IDPin 67 USB0VBUS Vbus Level monitoring+VBUSPin 34 USB0EPE Host power enable (active high)EPENPin 35 USB0PFLT Host power fault signal (active low)PFLTU6, a fault-protected switch, controls and monitors power to the USB host port. USB0EPEN, thecontrol signal from the microcontroller, has a pull-down resistor to ensure host-port power remainsoff during reset. The power switch will immediately cut power if the attached USB device drawsmore than 1Amp, or if the switches’ thermal limits are exceeded by a device drawing more than 500mA. USB0PFLT indicates the over-current status back to the microcontroller.The development board can be either a bus-powered USB device or self-powered USB device depending on the power-supply configuration jumpers.When using the development board in USB-host mode, power to the EVB should be supplied by the In-circuit Debugger (ICDI) USB cable or by a +5V source connected to the DC power jack. Note that the LM3S9B96’s USB capabilities are completely independent from the In-Circuit Debug Interface USB functionality.DebuggingStellaris microcontrollers support programming and debugging using either JTAG or SWD. JTAG uses the TCK, TMS, TDI, and TDO signals. SWD requires fewer signals (SWCLK, SWDIO, and, optionally, SWO for trace). The debugger determines which debug protocol is used.Debugging ModesThe LM3S9B96 development board supports a range of hardware debugging configurations. Table 2-3 summarizes these configurations.Debug In ConsiderationsDebug Mode 3 supports board debugging using an external debug interface such as a Segger J-Link or Keil ULINK. Most debuggers use Pin 1 of the Debug connector to sense the target voltage and, in some cases, power the output logic circuit. Installing the VDD/PIN1 jumper will apply 3.3V power to this pin in order to support external debuggers.Debug USB OverviewAn FT2232 device from Future Technology Devices International Ltd implements USB-to-serial conversion. The FT2232 is factory-configured to implement a JTAG/SWD port (synchronous serial) on channel A and a Virtual COM Port (VCP) on channel B. This feature allows two simultaneous communications links between the host computer and the target device using a single USB cable. Separate Windows drivers for each function are provided on the Documentation and Software CD.The In-Circuit Debug Interface USB capabilities are completely independent from the LM3S9B96’s on-chip USB functionality.Table 2-3.Hardware Debugging ConfigurationsMode Debug Function UseSelected by (1)Internal ICDIDebug on-board LM3S9B96 microcontroller over Debug USB interface.Default mode2ICDI out to JTAG/ SWD headerThe development board is used as a USB to SWD/ JTAG interface to an external target.Connecting to an external target and starting debug software.3 In from JTAG/SWD headerFor users who prefer an external debug interface (ULINK, JLINK, etc.) with the EVB.Connecting an externaldebugger to the JTAG/SWD headerStellaris® LM3S9B96 Development Kit User’s ManualA small serial EEPROM holds the FT2232 configuration data. The EEPROM is not accessible bythe LM3S9B96 microcontroller. For full details on FT2232 operation, go to . USB to JTAG/SWDThe FT2232 USB device performs JTAG/SWD serial operations under the control of the debugger.A simple logic circuit multiplexes SWD and JTAG functions and, when working in SWD mode,provides direction control for the bidirectional data line.Virtual COM PortThe Virtual COM Port (VCP) allows Windows applications (such as HyperTerminal) tocommunicate with UART0 on the LM3S9B96 over USB. Once the FT2232 VCP driver is installed,Windows assigns a COM port number to the VCP channel. Table2-4 shows the debug-relatedsignals.Table2-4.Debug-Related SignalsMicrocontroller Pin Board Function Jumper NamePin 77 TDO/SWO JTAG data out or trace data out TDOPin 78 TDI JTAG data in TDIPin 79 TMS/SWDIO JTAG TMS or SWD data in/out TMSPin 80 TCK/SWCLK JTAG Clock or SWD clock TCKPin 26 PA0/U0RX Virtual Com port data to LM3S9B96VCPRXPin 27 PA1/U0TX Virtual Com port data from LM3S9B96VCPTXPin 64 RSTn System Reset RSTnSerial Wire Out (SWO)The development board supports the Cortex-M3 Serial-Wire Output (SWO) trace capabilities.Under debugger control, on-board logic can route the SWO datastream to the VCP transmitchannel. The debugger software can then decode and interpret the trace information receivedfrom the Virtual Com Port. The normal VCP connection to UART0 is interrupted when using SWO.Not all debuggers support SWO.See the Stellaris LM3S9B96 Microcontroller Data Sheet for additional information on the TracePort Interface Unit (TPIU).Color QVGA LCD Touch PanelThe development board features a TFT Liquid Crystal graphics display with 320 x 240 pixelresolution. The display is protected during shipping by a thin, protective plastic film which shouldbe removed before use.FeaturesFeatures of the LCD module include:Kitronix K350QVG-V1-F display320 x RGB x 240 dots3.5” 262K colorsWide temperature range White LED backlight Integrated RAMResistive touch panelControl InterfaceThe Color LCD module has a built-in controller IC with a multi-mode parallel interface. The development board uses an 8-bit 8080 type interface with GPIO Port D providing the data bus. Table 2-4 shows the LCD-related signals.BacklightThe white LED backlight must be powered for the display to be clearly visible. U7 (FAN5331B) implements a 20mA constant-current LED power source to the backlight. The backlight is not normally controlled by the microcontroller, however, the control signal is available on a header. A jumper may be installed to disable the backlight by connecting it to GND. Alternatively, a wire may be used to control this signal from a spare microcontroller GPIO line.Because the FAN5331B operates in a constant current mode, its output voltage will jump up if the LCD should become disconnected. To prevent over-voltage failure of the IC or diode D3, a zener (D4) clamps the voltage. The current will limit to 20mA, but the total board current will be higher than when the LCD panel is connected. To avoid over-heating the backlighting circuit, install the BLON jumper to completely shut-down the backlighting circuit.PowerThe LCD module has internal bias voltage generators and requires only a single 3.3V dc supply.Resistive Touch PanelThe 4-wire resistive touch panel interfaces directly to the microcontroller, using 2 ADC channels and 2 GPIO signals. See the StellarisWare™ source code for additional information on touch panel implementation.Table 2-5.LCD-Related SignalsMicrocontroller Pin Board Function Jumper Name PE6/ADC1Touch X+X+PE3Touch Y-Y-PE2Touch X-X-PE7/ADC0Touch Y+Y+PB7 LCD Reset LRSTn PD0..7LCD Data Bus 0..7LD0..7PH7LCD Data/Control Select LDC PB5LCD Read Strobe LRDn PH6LCD Write Strobe LWRn -Backlight controlBLONStellaris® LM3S9B96 Development Kit User’s ManualI2S AudioThe LM3S9B96 development board has advanced audio capabilities using an I2S-connectedAudio TLV320AIC23 CODEC. The factory default configuration has Audio output (Line Out and/orHeadphone output) enabled. Four additional I2S signals are required for Audio input (Line Inputand/or Microphone). All four audio interfaces are through 1/8” (3.5mm) stereo jacks. Table2-6shows the I2S audio-related signals.Table2-6.I2S Audio-Related SignalsMicrocontroller Pin Board Function Jumper NameI2C0SDA CODEC Configuration Data SDAI2C0SCL CODEC Configuration Clock SCLI2STXSD Audio Out Serial Data TXSDI2STXWS Audio Out Framing signal TXWSI2STXSCK Audio Out Bit Clock BCLK aI2STXMCLK Audio Out System Clock MCLKI2SRXSD Audio In Serial Data RXSD bI2SRXWS Audio In Framing signal RXWS bI2SRXSCK Audio In Bit Clock BCLK bI2SRXMCLK Audio In System Clock MCLK ba.Shares GPIO line with Analog voltage reference. Jumper installed by default.b.Shares GPIO line with LCD data bus – Port D. Jumper omitted by default.The Audio CODEC has a number of control registers which are configured using the I2C bussignals. CODEC settings can only be written, but not read, using I2C. See the StellarisWare™example applications for programming information and the TLV320AIX23B data sheet forcomplete register details.The Headphone output can be connected directly to any standard headphones. The Line Output issuitable for connection to an external amplifier, including PC desktop speaker sets.User Switch and LEDThe development board provides a user push-switch and LED (see Table2-7).Table2-7.Navigation Switch-Related SignalsMicrocontroller Pin Board Function Jumper NamePJ7User Switch SWITCHPF3User LED LED aa.Shared with Ethernet Jack Yellow LED. This jumper is installed by default.C H A P T E R3Stellaris® LM3S9B96 Development Board External Peripheral Interface (EPI)The External Peripheral Interface (EPI) is a high-speed 8/16/32-bit parallel bus for connectingexternal peripherals or memory without glue logic. Supported modes include SDRAM, SRAM, andFlash memories, as well as Host-bus and FIFO modes.The LM3S9B96 development kit includes an 8MB SDRAM board in addition to an EPI break-outboard. Other EPI expansion boards may be available.SDRAM Expansion BoardThe SDRAM board provides 8MB of memory (4M x 16) which, once configured, becomes part ofthe LM3S9B96’s memory map at either 0x6000.0000 or 0x8000.0000. The SDRAM interfacemultiplexes DQ00..14 and AD/BA0..14 without requiring external latches or buffers. Of the 32 EPIsignals, only 24 are used in SDRAM mode, with the remaining signals used for non-EPI functionson the board.Flash and SRAM Memory Expansion BoardThe optional Flash and SRAM memory expansion board (DK-LM3S9B96-EXP-FS8) is a plug-in forthe DK-LM3S9B96 development board. This expansion board works with the External PeripheralInterface (EPI) of the Stellaris microcontroller and provides Flash memory, SRAM, and animproved performance LCD interface.For more information on the DK-LM3S9B96-EXP-FS8 memory expansion board (sold separately),see Appendix E, “Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board,” on page 41.C H A P T E R4Using the In-Circuit Debugger InterfaceThe Stellaris® LM3S9B96 Development Kit can operate as an In-Circuit Debugger Interface(ICDI). ICDI acts as a USB to the JTAG/SWD adaptor, allowing debugging of any external targetboard that uses a Stellaris microcontroller. See “Debugging Modes” on page16 for a description ofhow to enter Debug Out mode.Figure4-1.ICD Interface Mode`The debug interface operates in either serial-wire debug (SWD) or JTAG mode, depending on theconfiguration in the debugger IDE.The IDE/debugger does not distinguish between the on-board Stellaris microcontroller and anexternal Stellaris microcontroller. The only requirement is that the correct Stellaris device isselected in the project configuration.The Stellaris target board should have a 2x10 0.1” pin header with signals as indicated inTable C-1 on page35. This applies to both an external Stellaris microcontroller target (DebugOutput mode) and to external JTAG/SWD debuggers (Debug Input mode).ICDI does not control RST (device reset) or TRST (test reset) signals. Both reset functions areimplemented as commands over JTAG/SWD, so these signals are usually not necessary.It is recommended that connections be made to all GND pins; however, both targets and externaldebug interfaces must connect pin 5 and at least one other GND pin to GND. Some externaldebug interfaces may require a voltage on Pin 1 to set line driver thresholds. The developmentboard ICDI circuit automatically sets Pin 1 high if an external debugger is connected. In othermodes this pin is unused.A P P E N D I X AStellaris® LM3S9B96 Development Board SchematicsThis section contains the schematics for the DK-LM3S9B96 development board.Micro, EPI connector, USB, and Ethernet on page26LCD CAN, Serial Memory, and User I/O on page27Power Supplies on page28I2S Audio Expansion Board on page29EPI and SDRAM Expansion Boards on page30In-circuit Debug Interface (ICDI) on page3132October 3, 2009A P P E N D I X BStellaris® LM3S9B96 Development Board Component LocationsThis appendix contains details on component locations, including:Component placement plot for top (Figure B-1)October 3, 20093334October 3, 2009October 3, 200935Stellaris® LM3S9B96 Development Board Connection DetailsThis appendix contains the following sections: DC Power Jack (see page 35)ARM Target Pinout (see page 35)DC Power JackThe EVB provides a DC power jack for connecting an external +5V regulated (+/-5%) power source.The socket is 5.5 mm dia with a 2.1 mm pin.ARM Target PinoutIn ICDI input and output mode, the Stellaris® LM3S9B96 Development Kit supports ARM’sstandard 20-pin JTAG/SWD configuration. The same pin configuration can be used for debugging over serial-wire debug (SWD) and JTAG interfaces.Insert Jumper VDD/PIN1 Jumper (JP57) only when using the development board with an external debug interface such as a ULINK or JLINK.Table C-1.Debug Interface Pin AssignmentsFunction Pin Number TDI 5TDO/SWO 13TMS/SWDIO 7TCK/SWCLK 9System Reset 15VDD 1GND 4, 6, 8, 10, 12, 14, 16, 18, 20No Connect2, 3, 11, 17, 19A P P E N D I XC36October 3, 2009A P P E N D I X DStellaris® LM3S9B96 Development Board Microcontroller GPIO AssignmentsTable D-1 shows the pin assignments for the LM3S9B96 microcontroller.Table D-1.Microcontroller GPIO AssignmentsLM3S9B96 GPIO Pin Development Board UseNumber Description Default Function Default Use Alt. Function Alternate Use 26PA0U0Rx Virtual Com Port27PA1U0Tx Virtual Com Port28PA2SSI0Clk SPI29PA3SSI0Fss SD Card CSn30PA4SSI0Rx SPI31PA5SSI0Tx SPI34PA6USB0EPEN USB Pwr Enable CAN0RX35PA7USB0PFLT USB Pwr Fault CAN0TX66PB0USB0ID USB OTG ID67PB1USB0VBUS USB Vbus72PB2I2C0SCL Audio I2C65PB3I2C0SDA Audio I2C92PB4ADC10Potentiometer EPI0S23EPI Breakout91PB5PB5LCD RDn EPI0S22EPI Breakout90PB6PB6I2STXSCK AVREF Ext Volt Ref89PB7PB7LCD RST80PC0TCK/SWCLK JTAG79PC1TMS/SWDIO JTAG78PC2TDI JTAG77PC3TDO/SWO JTAG25PC4EPI0S2SDRAM D02EPI0S0224PC5EPI0S3SDRAM D03EPI0S0323PC6EPI0S4SDRAM D04EPI0S0422PC7EPI0S5SDRAM D05EPI0S05October 3, 200937。

PROCESS AUTOMATION INSTRUMENTATION Vol.34No.8August 2013国家863计划基金资助项目(编号:2011AA05AA103);上海市教育发展基金资助项目(编号:LM201135);上海市科技发展基金资助项目(编号:11195802100)㊂修改稿收到日期:2012-08-20㊂第一作者徐颖晟(1984-),男,现为上海交通大学电机与电器专业在读硕士研究生;主要从事锂电池充电器方面的研究㊂三环控制锂电池充电器的设计Design of the 3⁃closed⁃loop Controlled Lithium Battery Charger徐颖晟1　王志新1　余俊宏1　邹建龙2(上海交通大学电子信息与电气工程学院1,上海　200240;嘉兴清源电气科技有限公司2,浙江嘉兴　314031)摘　要:针对现有充电器存在的不足,设计了基于DK⁃LM3S9B96嵌入式处理器的锂电池充电器,阐述了充电器的硬件电路结构㊁工作原理及软件程序设计㊂该充电器增加了温度环,根据锂电池取样电流㊁电压值及电池温度等信息,由DK⁃LM3S9B96输出PWM 信号用以控制DC /DC 变换器工作和锂电池充电过程,从而实现锂电池充电器的数字化和智能化㊂试验结果表明,所设计的锂电池充电器具有三段式充电功能,能够满足锂电池高效充电的要求,同时也避免了使用集成芯片控制容易引起的温升㊁控制精度不高等问题㊂关键词:嵌入式处理器　整流电路　通信系统　智能控制　数字化中图分类号:TP368 文献标志码:AAbstract :Aiming at the shortcomings of the existing charger ,the lithium battery charger based on DK⁃LM3S9B96embedded process has been designed.The structure of hardware circuitry ,principle and software program design of the charger are described.In accordance with the sampled information including current ,voltage and temperature of the battery ,the DC /DC converter and the charging procedures of the battery are controlled by PWM signal output by DK⁃LM3S9B96,thus the digitized and intelligent battery charger is implemented.The test results show that this charger features 3sectional charging function ,and meets high efficient charging requirement for lithium battery ,in addition ,it avoids the demerits of IC control ,e.g.,easily leads to temperature rise and low control accuracy.Keywords :Embedded processor　Rectification circuit　Communication system　Intelligent control　Digitalization0　引言目前,锂电池因其电压高㊁循环性能好和无记忆效应等特点,被用作移动便携式仪器的核心储能装置,而与之相匹配的锂电池充电器也越来越被人们所重视㊂充电器的好坏不仅对仪器设备的性能有影响,而且对电池的寿命和设备工作效率也有影响㊂现在市面上较为典型的一种充电器是用一个专用集成芯片来控制充电电流㊁电压的变化,这种充电方式的充电器虽然芯片体积小,但是也存在一些不足,如充电效率低㊁易发热而降低电池寿命㊁控制精度低[1-2]等㊂针对集成芯片的发热问题[3],通常采用加入温度保护模块予以解决㊂本文针对锂电池的充放电特性及实际使用中的需求,选用新型的嵌入式处理器LM3S9B96为主控制器,克服了采用集成IC 带来的易发热的问题㊂同时,在锂电池充电过程中进行智能控制,严格控制充电电流㊁电压㊁温度等参数,从而提高了充电效率,实现了充电过程的数字化和智能化㊂1　充电器的硬件设计锂电池充电器的硬件设计主要包括整流电路和充电器主电路(包括电源变换电路㊁采样电路及保护电路等部分)㊂1.1　PFC 电路由于电力电子装置和非线性负载的广泛使用,电力系统电压及波形容易产生畸变,从而产生大量的谐波,导致电源输入功率因数降低,电网环境严重污染,用电设备所处环境恶化等问题㊂同时,也给周围的通信系统和公共电网以外的设备带来了危害[4]㊂为了克服以上问题,设计的锂电池充电器采用功率因数补偿(power factor compensation,PFC)电路进行交直流转换,如图1所示㊂图1　功率因数补偿电路Fig.1　PFC circuit图1中:S 1为双向开关管㊂当开关管导通时,输47三环控制锂电池充电器的设计　徐颖晟,等‘自动化仪表“第34卷第8期　2013年8月入电流先后流经电感和开关管,对电感进行储能,同时直流侧滤波电容给负载供电;当开关管断开时,输入电流经过电感和整流二极管到达负载端,电感储能和交流电源同时给负载和电容供电㊂该电路使用平均电流控制模式[5],可以消除许多严重问题,诸如较差抗噪声能力㊁斜坡补偿以及峰值平均电流误差等[6]㊂1.2　充电器主电路1.2.1　DC /DC 电源变换电路在给锂电池充电的过程中,充电器通过改变充电电压和电流来实现不同的充电策略[7]㊂DC /DC 双管正激电路如图2所示㊂在考虑电压㊁电流影响的同时,也将温度控制放入了充电策略中㊂正激电路的优点是可以提高效率㊁降低设计的复杂性[8-9]㊂图2　双管正激电路Fig.2　Double⁃tube positive excited circuit图2中:U in 为输入电压;D 1㊁D 2㊁D 3㊁D 4为续流二极管㊂DC /DC 双管正激变换器的工作原理是:当PWM输出高电平时,MOSFET 管导通,电流流经晶体管和电感到达电池㊂在这一阶段,电感吸收能量,电容被充电;当PWM 输出低电平时,MOSFET 关断,电流经续流二极管续流,电感电压反向,电感㊁电容作为滤波器输出电压电流[10]㊂1.2.2　采样电路采样及保护电路如图3所示㊂图3　采样及保护电路Fig.3　Sampling and protection circuit图3中:R 3=10kΩ,为精密电阻;R 4为NTC⁃10KPX3⁃42H⁃S1热敏电阻㊂采样包括对充电电流㊁充电电池端电压和电池温度的采样㊂采样的电压㊁电流和温度经过ADC 模块发送到LM3S9B96控制芯片中,由LM3S9B96对数据进行分析与处理㊂①电压采样电路锂电池充电电压检测采用电阻分压原理㊂电压采样电路通过1个10kΩ和1个2kΩ的滑动变阻器分压,将检测电压转换为0~3V 的电压㊂保护电路由RC 电路和嵌位二极管组成,采集的电压信号经过保护电路后导入A IN 0口,以保证A /D 口不会因为流经电压太大而致使芯片被烧毁㊂②电流采样电路电流采样不外加传感器,通过1个传感电阻把流过电池的电流转换为电压后,再经ADC 转换取样㊂根据功率计算公式P =I 2R 可知,若传感电阻R 越大,消耗的功率也就越大,从而导致传感电阻本身发热严重㊂因此,传感电阻取值设计为0.1Ω,经MCP6031运算放大器电压放大到3V 左右,再通过保护电路,最终传送到A IN 1管脚㊂③温度采样电路温度控制对于锂电池充电器而言非常重要,这是因为充电过程中电池温度过高,可能导致锂电池发生永久性损坏,甚至发生爆炸现象㊂基于以上因素的考虑,设计的锂电池充电器加入了温度控制环路,并采用运放AD823进行电压跟随,运放输出后经过RC 滤波及钳位保护电路接入A IN 2口,进行数模转换㊂温度传感器使用热敏电阻,选用的热敏电阻型号为NTC⁃10KPX3⁃42H⁃S1㊂该热敏电阻为负温度系数直插类型,25℃时电阻为10kΩ,精度为1%㊂2　充电器的软件设计2.1　DK⁃LM3S9B96简介本文采用LM3S9B96芯片作为中央处理器㊂该芯片包括1个低压降的稳压器,集成掉电复位和上电复位功能以及16bit 的ADC㊁DMA㊁GPIO 等各种丰富的外设功能,可直接通向GPIO 管脚㊂LM3S9B96芯片有2路ADC,即ADC 0和ADC 1㊂ADC 0和ADC 1都有16位输入,即A IN 0~A IN 15,这十分适合所设计的锂电池充电器㊂从采样电路处实时采集到的充电电压㊁电流及温度信息,通过A IN 0㊁A IN 1和A IN 2口送入处理器,再通过计算决定下阶段的充电电流,并利用PWM 信号控制充电电流㊂57三环控制锂电池充电器的设计　徐颖晟,等PROCESS AUTOMATION INSTRUMENTATION Vol.34No.8August 20132.2　软件程序设计本次设计的锂电池充电器主要采用分时处理模式,由电池电压采集模块㊁电池电流采集模块和温度采集模块组成㊂充电器流程图如图2所示㊂图4　充电器流程图Fig.4　The flowchart of charge 系统启动时先检测电压端电压值,如果符合充电要求,则继续充电,否则终止充电㊂充电器的充电控制单元LM3S9B96通过检测电池端电压值来选择进行哪一阶段的充电模式㊂由于锂电池在温度高时工作效率和寿命都受很大影响,并且可能发生爆炸,因此,本次设计的锂电池充电器着重在恒定电流充电㊁恒定电压充电两个充电状态检测电池的本身温度,再选择充电模式㊂当温度超过给定的温度值时,就停止工作;当温度低于给定值时,则继续进行充电㊂3　试验结果及分析对基于微处理器DK⁃LM3S9B96控制的锂电池充电器的关键参数电压和电流进行测试,并针对24V /40Ah 锂电池进行试验,采用的电压表㊁电流表型号为VICTOR⁃VC890D,示波器型号为TDS2024C㊂实际测得的锂电池充电过程测试数据如表1所示㊂由表1可知,在充电初期,锂电池组处在深度放电状态,需要进行预充电,由DK⁃LM3S9B96控制的PWM 波产生小电流进行充电,这段时间锂电池电压缓缓上升,时间间隔取20min㊂随后,在各节电池电压达到最低充电门限电压后,进入6A 电流值恒流充电模式,此过程中的数据记录间隔为30min㊂当单节锂电池电压达到最高充电门限电流时,锂电池两端电池已经基本稳定,但是锂电池的电流还没减小到设定值,当电流减小到接近600mA 时,充电结束㊂表1　锂电池的充电记录Tab.1　The charging records of the lithium battery开始时刻电压/V 电流/A 开始时刻电压/V 电流/A 8∶5024.6 6.0214∶5028.2 2.6710∶5026.0 6.0015∶3028.5 2.2711∶5026.5 6.0116∶0028.7 1.3813∶5027.9 4.2017∶2029.10.6214∶0028.03.804　结束语本文采用DK⁃LM3S9B96作为核心处理器,以锂电池为应用对象,设计了三环控制的锂电池充电器,并制造搭建了样机㊂试验表明,本次设计的充电器具有以下优点:硬件电路和软件相结合,采用数字控制技术,大大提升了系(下转第80页)67三环控制锂电池充电器的设计　徐颖晟,等。

图文精讲液位继电器原理图，没见过这么全的！液位控制器是指通过机械式或电子式的方法来进行高低液位的控制，可以控制电磁阀、水泵等，从而来实现半自动化或者全自动化，方法有多种，根据选用不同的产品而不同。

下面小编给大家介绍一下液位继电器原理图。

1.通过电子式液位开关（BZ2401或BZ0501）和搭配的水位控制器(BZ201、BZ202)来进行控液位控制自动化。

电子式液位开关原理是通过电子探头对液位进行检测，再由液位检测专用芯片对检测到的信号进行处理,当被测液体到达动作点时，芯片输出高或低电平信号，再配合水位控制器，从而实现对液位的控制。

不需浮球和干簧管,外部无机械动作,耐污耐用,不怕漂浮物影响，任意角度安装,竖向安装有一定的防波浪功能，适宜长时间浸在水中,工作电压是直流5-24V，很安全。

这种方式较实用，寿命长，安全，价格实惠。

2.通过浮球开关来控制液位：一种是带着大金属球的浮球开关，浸在液体中时浮力大，可以控制两个液位，比如液体满了，浮球因为浮力而上升，带动球阀运动，使阀门关闭，停止进水，当水少了，浮球下降，阀门打开，又再进水，如此循环。

这种方式较多应用在煮开水器上。

另一种是带干簧管的微型浮球开关，由外面的带有磁性小浮球使杆里面的干簧管闭合，从而控制液位，多数应用在清水的液位控制，一般几块钱就有交易了，但易受污物影响。

还有一种是电缆式浮球开关，该装置通过一弹性电线与水泵连接，可用于水塔、水池各种浮球开关水位高低的自动控制和缺水保护，允许接的用电器是220V,10A左右，平衡锤或弹性电线的某一固定点到浮筒间的电线长度，决定水位的高低。

这种水位开关应用广泛，价格便宜，对于一些要求不太严格的场合适用。

但存在这样的问题：有一定耐污能力，浮球易受外界杂物影响其稳定性，特别是纤维状的杂物缠绕而有失误，同一小水箱里不宜使用多个，否则会相缠绕。

使用寿命相对短些，而且多数直接接220V,存在一定的安全隐患，终有一天因为电线破损而漏电电人。

执行标准
产品型号
额定电压220V～额定频率50HZ 额定总功率218W照明功率LED 2W
转速H：995r/min
M:803r/min
L:628r/min
风压
H：>328Pa
M: >280Pa
L: >230Pa
风量H：16.8m³/min
M:13m³/min
L: 9m³/min
全压效率>23%
噪音72dB(A)烟管直径Φ185mm 注意事项
⊙请使用单相220V～/50Hz交流电源，机器应有可靠的接地措施。

⊙当吸油烟机与燃烧气或其他燃料的炉灶同时使用时，房间必须通风良好。

⊙宜用中性洗涤剂对吸油烟机进行清洁保养，如果不按说明书规定的方法清洗，吸油烟机有起火的危险。

⊙禁止炉具空烧或炉火直接烘烤吸油烟机。

⊙吸油烟机排出的气体不应排到用于排出燃烧气或其他燃料的烟雾使用的热烟道中。

⊙吸油烟机与灶具烹调器具的支承架最短距离应大于65CM.
⊙不要用水或其他洗涤剂直接喷淋机身或电机等电器元件，否则有触电的危险。

⊙维修保养时，必须要断开电源再进行相关操作，并请有专业维修资质人员进行。

吸油烟机技术性能参数
GB/T17713-2011 GB29539-2013
CXW-220
中国国家强制性产品安全认证
M ~电容（黄色）电容（黄色）
快（红色）
中（黑色）
慢（白色）
电脑控制板
零线（蓝色）5A
220V～/50Hz
三速单电机吸油烟机电气原理图
(线路图仅供参考，若有更改以实物为准.)。

基于LM3S9B96的心电监护系统一功能介绍心血管疾病是威胁人类健康的主要疾病之一。

随着人们生活节奏的加快和工作压力的加大，越来越多的人不幸患有甚至死于心血管疾病。

由于心血管疾病具有发病突然、死亡率高等特点，因此，很有必要研制一种能够对心血管疾病患者及潜在患者进行实时监测并迅速报警的便携式心电监控设备。

现阶段市场中常见心电图仪在便携性与实时分析报警的结合方面仍有待改进，例如，当病人独自在家时，监测装置大多只能进行心电监测与记录，若有突发异常状况不能及时报警，很可能导致无法挽回的后果。

因此，本方案以价格低廉，携带方便，实时分析心电数据并及时对异常情况进行报警为研究出发点，提出了一种基于LM3S9B96的心电监护系统,针对LM3S9B96微处理器的特点提出了心电监护系统设计方案，能够实现对心电信号的实时分析处理，对异常情况的及时报警以及对病人的准确定位。

二方案描述硬件框图：基于LM3S9B96的心电监护系统由心电信号采集放大模块、LCD触摸屏号码输入与波形显示模块、GPS模块与EM310短信报警模块组成。

（1）将心电电极贴片贴到人体皮肤表面的固定位置，采集峰峰值为2mV左右的微弱心电信号，并通过导联线输入到心电信号采集放大模块进行放大，其输出电压范围应与LM3S9B96中ADC10模块的参考电压相匹配；（2）心电信号采集放大模块通过GPIO口与LM3S9B96相连，LM3S9B96内部的ADC10模块对心电信号采集放大模块的输出模拟信号进行模数转换，以便LM3S9B96对数字化的心电信号进行后续处理；（3）LM3S9B96内部的μDMA（Micro Direct Memory Access,微型直接存储器访问）控制器将模数转换后的心电信号传送到SRAM进行处理，设置μDMA通道在乒乓模式下工作，这样便可以在无需CPU 进行过多干预的条件下完成心电信号从ADC10到SRAM的连续传输；（4）LM3S9B96对传输到SRAM中的数据进行处理，包括小波分解与重构、动态R波阈值计算、病理逻辑诊断分类等步骤；（5）实时心电波形和心率由Kitronix公司的K350QVG-V1-F TFT LCD触摸显示屏显示，同时LCD显示屏还作为报警所需短信报警的电话号码的输入端，电话号码存储在Flash存储器中，确保掉电后不需要重新输入，便于使用；（6）LM3S9B96微控制器内部的两个UART模块分别与GPS模块和EM310模块相连，GPS模块用来采集观测对象的GPS地理位置信息，当检测到心电信号出现异常时，通过EM310模块将诊断信息和GPS地理位置信息以短信形式发送给指定号码进行报警。

图说三极管的三个工作状态大家都知道三极管是电流控制型元件，三极管工作在放大状态下存在Ic=βIb的关系，怎么理解三极管的放大模型呢？这儿我们抛开三极管内部空穴和电子的运动，还是那句话只谈应用不谈原理，希望通过下面的“图解”让初学者对三极管有一个形象的认识。

三极管是一个以b(基极)电流Ib 来驱动流过CE 的电流Ic 的器件，它的工作原理很像一个可控制的阀门。

IcIbIe图1左边细管子里蓝色的小水流冲动杠杆使大水管的阀门开大，就可允许较大红色的水流通过这个阀门。

当蓝色水流越大，也就使大管中红色的水流更大。

如果放大倍数是100，那么当蓝色小水流为1 千克/小时，那么就允许大管子流过100 千克/小时的水。

三极管的原理也跟这个一样，放大倍数为100 时，当Ib(基极电流)为1mA 时，就允许100mA 的电流通过Ice。

有了这个形象的解释之后，我们再来看一个单片机里常用的电路。

图2我们来分析一下这个电路，如果它的放大倍数是100，基极电压我们不计。

基极电流就是10V÷10K＝1mA，集电极电流就应该是100mA。

根据欧姆定律，这样Rc 上的电压就是0.1A×50Ω＝5V。

那么剩下的5V 就吃在了三极管的C、E 极上了。

好！现在我们假如让Rb 为1K，那么基极电流就是10V÷1K＝10mA，这样按照放大倍数100 算，Ic 就是不是就为1000mA 也就是1A 了呢？假如真的为1安，那么Rc 上的电压为1A×50Ω＝50V。

啊？50V！都超过电源电压了，三极管都成发电机了吗？其实不是这样的。

见下图：图3我们还是用水管内流水来比喻电流，当这个控制电流为10mA 时使主水管上的阀开大到能流过1A 的电流，但是不是就能有1A 的电流流过呢？不是的，因为上面还有个电阻，它就相当于是个固定开度的阀门，它串在这个主水管的上面，当下面那个可控制的阀开度到大于上面那个固定电阻的开度时，水流就不会再增大而是等于通过上面那个固定阀开度的水流了，因此，下面的三极管再开大开度也没有用了。