DS96172中文资料

MAX7219是MAXIM公司生产的串行输入/输出共阴极数码管显示驱动芯片，一片MAX7219可驱动8个7段（包括小数点共8段）数字LED、LED条线图形显示器、或64个分立的LED发光二级管。

该芯片具有10MHz传输率的三线串行接口可与任何微处理器相连，只需一个外接电阻即可设置所有LED的段电流。

它的操作很简单，MCU只需通过模拟SPI三线接口就可以将相关的指令写入MAX721 9的内部指令和数据寄存器，同时它还允许用户选择多种译码方式和译码位。

此外它还支持多片7219串联方式，这样MCU就可以通过3根线（即串行数据线、串行时钟线和芯片选通线）控制更多的数码管显示。

MAX7219的外部引脚分配如图1所示及内部结构如图2所示。

图1 MAX7219的外部引脚分配图2 MAX7219的内部引脚分配各引脚的功能为：DIN：串行数据输入端DOUT：串行数据输出端，用于级连扩展LOAD：装载数据输入CLK：串行时钟输入DIG0~DIG7：8位LED位选线，从共阴极LED中吸入电流SEG A~SEG G DP 7段驱动和小数点驱动ISET：通过一个10k电阻和Vcc相连，设置段电流MAX7219有下列几组寄存器：（如图3）MAX7219内部的寄存器如图3，主要有：译码控制寄存器、亮度控制寄存器、扫描界限寄存器、关断模式寄存器、测试控制寄存器。

编程时只有正确操作这些寄存器，MAX7219才可工作。

图 3 MAX7219内部的相关寄存器分别介绍如下：（１）译码控制寄存器（X9H）如图4所示，MAX7219有两种译码方式：B译码方式和不译码方式。

当选择不译码时，8个数据为分别一一对应7个段和小数点位；B译码方式是BCD译码，直接送数据就可以显示。

实际应用中可以按位设置选择B译码或是不译码方式。

图4 MAX7219的译码控制寄存器（２）扫描界限寄存器（XBH）如图5所示，此寄存器用于设置显示的LED的个数（1~8），比如当设置为0xX4时，LED 0~5显示。

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4.3 报警管理 .............................................................................................................................................. 31 4.4 视频上墙 .............................................................................................................................................. 32 4.5 电子地图 .............................................................................................................................................. 33 4.6 语音对讲及广播 .................................................................................................................................. 34
1.1 DSS7016 客户端简介 ............................................................................................................................. 1 1.2 配置要求 ................................................................................................................................................ 1

DS0026Dual High-Speed MOS DriverGeneral DescriptionDS0026is a low cost monolithic high speed two phase MOS clock driver and interface circuit.Unique circuit design pro-vides both very high speed operation and the ability to drive large capacitive loads.The device accepts standard TTL out-puts and converts them to MOS logic levels.The device may be driven from standard 54/74series and 54S/74S series gates and flip-flops or from drivers such as the DS8830or DM7440.The DS0026is intended for applications in which the output pulse width is logically controlled;i.e.,the output pulse width is equal to the input pulse width.The DS0026is designed to fulfill a wide variety of MOS inter-face rmation on the correct usage of the DS0026in these as well as other systems is included in the application note AN-76.Featuresn Fast rise and fall times —20ns 1000pF load n High output swing —20Vn High output current drive —±1.5amps n TTL compatible inputsnHigh rep rate —5to 10MHz depending on power dissipationn Low power consumption in MOS “0”state —2mW n Drives to 0.4V of GND for RAM address driveConnection Diagrams (Top Views)Dual-In-Line PackageDS005853-2Order Number DS0026CN See NS Package Number N08EFebruary 2000DS0026Dual High-Speed MOS Driver©2000National Semiconductor Corporation Absolute Maximum Ratings (Note 1)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.V +−V −Differential Voltage 22V Input Current100mA Input Voltage (V IN −V −) 5.5V Peak Output Current1.5AMaximum Power Dissipation *at T A =25˚C420mW Operating Temperature Range 0˚C to +70˚C Storage Temperature Range −65˚C to +150˚CLead Temperature (Soldering,10sec.)300˚CNote:*Derate N08E package 9.3mW/˚C for T A above 25˚C.θJ A =107˚C/WElectrical Characteristics (Notes 2,3,4)Symbol ParameterConditions Min Typ Max Units V IH Logic “1”Input Voltage V −=0V 21.5V I IH Logic “1”Input Current V IN −V −=2.4V 1015mA V IL Logic “0”Input Voltage V −=0V0.60.4V I IL Logic “0”Input Current V IN −V −=0V−3−10µA V OL Logic “1”Output Voltage V IN −V −=2.4V,I OL =1mAV −+0.7V −+1.0V V OH Logic “0”Output Voltage V IN −V −=0.4V,V SS ≥V ++1.0V I OH =−1mAV +−1.0V +−0.8VI CC(ON)“ON”Supply Current (one side on)V +−V −=20V,V IN −V −=2.4V3040mA I CC(OFF)“OFF”Supply CurrentV +−V −=20V,V IN −V −=0V10100µASwitching Characteristics(T A =25˚C)(Notes 5,6)Symbol Parameter ConditionsMin Typ Max Units t ON Turn-On Delay (Figure 1)57.512ns (Figure 2)11ns t OFF Turn-Off Delay (Figure 1)1215ns (Figure 2)13ns t rRise Time(Figure 1),(Note 5)C L =500pF 1518ns C L =1000pF 2035ns (Figure 2),(Note 5)C L =500pF 3040ns C L =1000pF 3650ns t fFall Time(Figure 1),(Note 5)C L =500pF 1216ns C L =1000pF 1725ns (Figure 2),(Note 5)C L =500pF 2835ns C L =1000pF3140nsNote 1:“Absolute Maximum Ratings”are those values beyond which the safety of the device cannot be guaranteed.Except for “Operating Temperature Range”they are not meant to imply that the devices should be operated at these limits.The table of “Electrical Characteristics provides conditions for actual device operation.Note 2:These specifications apply for V +−V −=10V to 20V,C L =1000pF,over the temperature range of 0˚C to +70˚C for the DS0026CN.Note 3:All currents into device pins shown as positive,out of device pins as negative,all voltages referenced to ground unless otherwise noted.All values shown as max or min on absolute value basis.Note 4:All typical values for T A =25˚C.Note 5:Rise and fall time are given for MOS logic levels;i.e.,rise time is transition from logic “0”to logic “1”which is voltage fall.Note 6:The high current transient (as high as 1.5A)through the resistance of the internal interconnecting V −lead during the output transition from the high state to the low state can appear as negative feedback to the input.If the external interconnecting lead from the driving circuit to V −is electrically long,or has significant dc resistance,it can subtract from the switching response.D S 0026 2Typical VBBConnectionTypical Performance CharacteristicsDS005853-8Input Current vs Input VoltageDS005853-22Supply Current vs TemperatureDS005853-23Turn-On and Turn-Off Delayvs TemperatureDS005853-24Rise Time vs LoadCapacitanceDS005853-25Fall Time vs LoadCapacitanceDS005853-26DS00263Typical Performance Characteristics(Continued)Schematic DiagramRecommended Input Coding CapacitanceDS005853-27DC Power (P DC )vs Duty CycleDS005853-281/2DS0026DS005853-10D S 0026 4AC Test Circuits and Switching Time WaveformsTypical ApplicationsApplication HintsDRIVING THE MM5262WITH THE DS0026CLOCK DRIVERThe clock signals for the MM5262have three requirements which have the potential of generating problems for the user.These requirements,high speed,large voltage swing and large capacitive loads,combine to provide ample opportunity for inductive ringing on clock lines,coupling clock signals to other clocks and/or inputs and outputs and generating noise on the power supplies.All of these problems have the poten-tial of causing the memory system to malfunction.Recogniz-ing the source and potential of these problems early in the design of a memory system is the most critical step.The ob-ject here is to point out the source of these problems and give a quantitative feel for their magnitude.Line ringing comes from the fact that at a high enough fre-quency any line must be considered as a transmission line with distributed inductance and capacitance.To see how much ringing can be tolerated we must examine the clock voltage specification.Figure 3shows the clock specification,in diagram form,with idealized ringing sketched in.The ring-ing of the clock about the V SS level is particularly critical.If the V SS −1V OH is not maintained,at all times,the informa-tion stored in the memory could be altered.Referring to Fig-ure 1,if the threshold voltage of a transistor were −1.3V,the clock going to V SS −1would mean that all the devices,whose gates are tied to that clock,would be only 300mV from turning on.The internal circuitry needs this noise mar-gin and from the functional description of the RAM it is easy to see that turning a clock on at the wrong time can have di-sastrous results.DS005853-12DS005853-13FIGURE 1.DS005853-14DS005853-15FIGURE 2.AC Coupled MOS Clock DriverDS005853-16DC Coupled RAM Memory Address or PrechargeDriver (Positive Supply Only)DS005853-17DS00265Application Hints(Continued)Controlling the clock ringing is particularly difficult because ofthe relative magnitude of the allowable ringing,compared tomagnitude of the transition.In this case it is1V out of20V oronly5%.Ringing can be controlled by damping the clockdriver and minimizing the line inductance.Damping the clock driver by placing a resistance in serieswith its output is effective,but there is a limit since it alsoslows down the rise and fall time of the clock signal.Becausethe typical clock driver can be much faster than the worstcase driver,the damping resistor serves the useful functionof limiting the minimum rise and fall time.This is very impor-tant because the faster the rise and fall times,the worse theringing problem becomes.The size of the damping resistorvaries because it is dependent on the details of the actualapplication.It must be determined empirically.In practice aresistance of10Ωto20Ωis usually optimum.Limiting the inductance of the clock lines can be accom-plished by minimizing their length and by laying out the linessuch that the return current is closely coupled to the clocklines.When minimizing the length of clock lines it is impor-tant to minimize the distance from the clock driver output tothe furthest point being driven.Because of this,memoryboards are usually designed with clock drivers in the centerof the memory array,rather than on one side,reducing themaximum distance by a factor of2.Using multilayer printed circuit boards with clock lines sand-wiched between the V DD and V SS power plains minimizesthe inductance of the clock lines.It also serves the functionof preventing the clocks from coupling noise into input andoutput lines.Unfortunately multilayer printed circuit boardsare more expensive than two sided boards.The user mustmake the decision as to the necessity of multilayer boards.Suffice it to say here,that reliable memory boards can be de-signed using two sided printed circuit boards.Because of the amount of current that the clock driver mustsupply to its capacitive load,the distribution of power to theclock driver must be considered.Figure4gives the idealizedvoltage and current waveforms for a clock driver driving a1000pF capacitor with20ns rise and fall time.As can be seen the current is significant.This current flowsin the V DD and V SS power lines.Any significant inductance inthe lines will produce large voltage transients on the powersupplies.A bypass capacitor,as close as possible to theclock driver,is helpful in minimizing this problem.This by-pass is most effective when connected between the V SS andV DD supplies.The size of the bypass capacitor depends onthe amount of capacitance being ing a low induc-tance capacitor,such as a ceramic or silver mica,is most ef-fective.Another helpful technique is to run the V DD and V SSlines,to the clock driver,adjacent to each other.This tends toreduce the lines inductance and therefore the magnitude ofthe voltage transients.While discussing the clock driver,it should be pointed outthat the DS0026is a relatively low input impedance device.It is possible to couple current noise into the input withoutseeing a significant voltage.Since the noise is difficult to de-tect with an oscilloscope it is often overlooked.Lastly,the clock lines must be considered as noise genera-tors.Figure5shows a clock coupled through a parasitic cou-pling capacitor,C C,to eight data input lines being driven bya7404.A parasitic lumped line inductance,L,is also shown.Let us assume,for the sake of argument,that C C is1pF andthat the rise time of the clock is high enough to completelyisolate the clock transient from the7404because of the in-ductance,L.DS005853-18FIGURE3.Clock WaveformDS005853-19FIGURE4.Clock Waveforms(Voltage and Current)DS266Application Hints(Continued)With a clock transition of20V the magnitude of the voltagegenerated across C L is:This has been a hypothetical example to emphasize thatwith20V low rise/fall time transitions,parasitic elements cannot be neglected.In this example,1pF of parasitic capaci-tance could cause system malfunction,because a7404without a pull up resistor has typically only0.3V of noise mar-gin in the“1”state at25˚C.Of course it is stretching things toassume that the inductance,L,completely isolates the clocktransient from the7404.However,it does point out the needto minimize inductance in input/output as well as clock lines.The output is current,so it is more meaningful to examinethe current that is coupled through a1pF parasitic capaci-tance.The current would be:This exceeds the total output current swing so it is obviouslysignificant.Clock coupling to inputs and outputs can be minimized byusing multilayer printed circuit boards,as mentioned previ-ously,physically isolating clock lines and/or running clocklines at right angles to input/output lines.All of these tech-niques tend to minimize parasitic coupling capacitance fromthe clocks to the signals in question.In considering clock coupling it is also important to have adetailed knowledge of the functional characteristics of thedevice being used.As an example,for the MM5262,cou-pling noise from theφ2clock to the address lines is of no par-ticular consequence.On the other hand the address inputswill be sensitive to noise coupled fromφ1clock.DS005853-20FIGURE5.Clock CouplingDS00267Packaging Information Physical Dimensionsinches (millimeters)unless otherwise notedLIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systems which,(a)are intended for surgical implant into the body,or (b)support or sustain life,and whose failure to perform when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.National Semiconductor Corporation AmericasTel:1-800-272-9959Fax:1-800-737-7018Email:support@National Semiconductor EuropeFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)6995086208English Tel:+44(0)8702402171Français Tel:+33(0)141918790National Semiconductor Asia Pacific Customer Response Group Tel:65-2544466Fax:65-2504466Email:ap.support@National Semiconductor Japan Ltd.Tel:81-3-5639-7560Fax:81-3-5639-7507Molded Dual-In-Line Package (N)Order Number DS0026CN NS Package Number N08ED S 0026D u a l H i g h -S p e e d M O S D r i v e rNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.。