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IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. T o minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third−party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Mailing Address:Texas InstrumentsPost Office Box 655303Dallas, Texas 75265Copyright 2001, Texas Instruments IncorporatedEVM IMPORTANT NOTICETexas Instruments (TI) provides the enclosed product(s) under the following conditions:This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may not meet the technical requirements of the directive.Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge.EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein.Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM User’s Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact the TI application engineer.Persons handling the product must have electronics training and observe good laboratory practice standards. No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used.Mailing Address:Texas InstrumentsPost Office Box 655303Dallas, Texas 75265Copyright 2001, Texas Instruments IncorporatedEVM WARNINGS AND RESTRICTIONSIt is important to operate this EVM within the input voltage range of 85 V to 265 V and the output voltage of 12 V +/− 5%.Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.During normal operation, some circuit components may have case temperatures greater than 50°C. The EVM is designed to operate properly with certain components above 50°C as long as the input and output ranges are maintained. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified using the EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch.Mailing Address:Texas InstrumentsPost Office Box 655303Dallas, Texas 75265Copyright 2001, Texas Instruments IncorporatedContentsContents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1General Information1-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.1Features1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.2Description1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.3Operating Guidelines1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.3.1Step 1. Load Connections1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.3.2Step2. Applying Input Power1-3. . . . . . . . . . . . .1.3.3Step 3. Evaluating the Demonstration’s Boards Performance.1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.3.4Additional Information1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.4DM38500 EVM Performance1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2Reference2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.1DM38500 EVM Part Descriptions2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.2DM38500 Board Layouts2-4Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . .1−1.DM38500 Evaluation Module Application Schematic1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1−2.DM38500 EVM Response, VCC = +15 V1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1−3.DM38500 Response, VCC = +15 V1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1−4.DM38500 Response, VCC = +15 V1-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2−1.DM38500 EVM PC Board: Top Assembly2-4Chapter 1GeneralInformationThis chapter details the Texas Instruments (TI) DM38500 PFC/PWM Combination Controller 100W Power Factor Correction Preregulator Evaluation Module (EVM) SLUU068. It includes a list of EVM features, a brief description of the module illustrated with a pictorial, schematic diagrams, and EVM specifications.Topic Page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.1Features1−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.2Description1−2 1.3Operating Guidelines1−3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.4DM38500 EVM Performance1−5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .General Information1-1Features1.1FeaturesUCC38500 PFC/PWM Combination Controller 100W Power Factor Correc-tion Preregulator include:J Combines PFC and 2nd Stage Down Converter ControlsJ Controls Boost Preregulator to Near-unity Power FactorJ Accurate Power LimitingJ Improved Feedforward Line RegulationJ Peak Current Mode Control in Second StageJ Programmable OscillatorJ Leading Edge/Trailing Edge Modulation for Reduced Output RippleJ Low Startup Supply CurrentJ Synchronized Second Stage with Programmable Soft-startJ Programmable Second Stage Shut-down1.2DescriptionThe UCC38500 provides all the functions necessary for active power factorcorrection and a second stage dc-to-dc converter all in one integrated circuit.The control IC uses leading edge modulation for the boost stage and trailingedge modulation for the step down converter to reduce the RMS current in theboost capacitor. The dc-to-dc controller uses peak current mode control foreasy loop compensation.The UCC38500 evaluation board is designed to illustrate the performance ofthe IC in a complete off-line 100W two-stage power converter using power fac-tor correction. The demonstration board was designed to operate with a uni-versal input voltage range (i.e. 85−265 Vac) with a regulated 12V dc output.CautionHigh-voltage levels are present on the evaluation module whenever it isenergized. Proper precautions must be taken when working with theEVM. The output capacitor has high levels of energy storage and it mustbe discharged before the load is removed. Serious injury can occur ifproper safety precautions are not followed.1-2Description1-3General Information 1.3Operating GuidelinesThe operating guidelines for the evaluation board are provided with reference to the schematic in Figure 1−1 and the component layout in Figure 2−1.1.3.1Step 1. Load ConnectionsA resistive or electronic load can be applied to the output terminals labeled OUT− and OUT+.Note: For safety reasons the load should be connected before power is sup-plied to the demonstration board.1.3.2Step2. Applying Input PowerA 60 Hz AC power source not exceeding 265 V RMS needs be applied across terminals AC−N and AC−L for proper operation.1.3.3Step 3. Evaluating the Demonstration’s Boards Performance.With the AC source set between 85−265 V RMS the output voltage should be regulated and the input current should track the input voltage shape with near unity power factor. The operation of the circuit is verified over the line and load range and shows efficiency as high as 85%. At lighter loads, there may be some distortion in the line current due to Discontinuous Conduction Mode (DCM) operation. Please refer to Figures 1−2, 1−3 and 1−4 for typical EVM performance.1.3.4Additional InformationFor more information, pin description and specifications for the UCC38500PFC/PWM Combination Controller, please refer to the datasheet or contact the Texas Instruments Semiconductor Product Information Center at 1-800-336-5236 or 1-972-644-5580. Product Information can also be found on the World Wide Web at .Description1-4Figure 1−1.DM38500 Evaluation Module Application SchematicUDG−000941210952611137843116171518191420O V P /E N B L V S E N S E V A O U T I S E N S E M O U TC A O U T I A C V F FP K L I M I T V R E F G T 1G T 2V C C C T R T G N D P W R G N D S S 2V E R R I S E N S E 2U C C 38500V R E FQ 5R 25V C CR 7R 6G T 1G T 2D 10D 9C 27P K L I M I TC 28R 17C 19C 22R 28C 25R 23R 34R 21R 22R 33R 20C 2R 15R 5L 1D 3D 1G T 1R 14R 29P K L I M I TR 19C 26V R E F R 18R 24C 29C 30I S E N S E 2G T 2R 13R 2C 5P W R G N D G T 212 V 100 W +−L 2T 1Q 2Q 1Q 3D 11V A C 85−265V R M SD 6D 4T 2D 8U 4C 7S G N DS G N D S G N DP G N D 2P G N DP G N DP G N DP G N DS G N D P G N D D 5D 7C 12C 20L 1V C C B I A S C I R C U I TV C CV C C B I A S C I R C U I TP G N D C 23P G N D 2P G N D 2R 26D 14R 36R 16C 14R 35R 32R 27D 13R 31C 8R 30R 10R 12R 11C 21C 16C 3P G N D C 24D 2R 1C 4C 18R 4D 15D 12D 16A C −NA C −LO U T +O U T −V R E FR 3R 39C 13I S E N S E 2C 17H 11A V 1321456U 3S G N D C 6C 38H I G H V O L T A G E −S E E E V M W A R N I N G S A N D R E S T R I C T I O N SH I G H T E M P E R A T U R E −S E E E V M W A R N I N G S A N D R E S T R I C T I O N SH I G H V O L T A G E −S E E E V M W A R N I N G S A N D R E S T R I C T I O N S H I G H T E M P E R A T U R E −S E E E V M W A R N I N G S A N D R E S T R I C T I O N S Note: High-Voltage component. See EVM Warnings and Restrictions at the back of this document. Note: High-T emperature component. See EVM Warnings and Restrictions at the back of this document.DM38500 EVM Performance1-5General Information 1.4DM38500 EVM PerformanceFigure 1−2 through 1−4 shows the typical evaluation module performance.Figure 1−2.DM38500 EVM EfficiencyUCC38500 EFFICIENCYvsOUTPUT POWER 505560657075808590201040306050807090100V IN = 85 VV IN = 175 VV IN = 265 VP OUT − WE f f i c i e n c y −%Figure 1−3.DM38500 Power FactorUCC38500 PFvsOUTPUT POWERP OUT − WP o w e r F a c t o r0.852010403060508070901000.900.951.00V IN = 85 V V IN = 175 VV IN = 265 VDM38500 EVM Performance1-6Figure 1−4.DM38500 Total Harmonic Distortion5101520253020104030605080709010035UCC38500 TOTAL HARMONIC DISTORTIONvsOUTPUT POWERP OUT − WT o t a l H a r m o n i c D i s t o r t i o nV IN = 85 VV IN = 175 VV IN = 265 V2-1ReferenceReferenceThis chapter includes a parts list and PCB layout illustrations for the DM38500EVM.TopicPage2.1DM38500 EVM Part Descriptions 2−2. . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2DM38500 Board Layouts 2−4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chapter 2DM38500 EVM Part Descriptions2-22.1DM38500 EVM Part DescriptionsTable 2−1.DM38500 Part DescriptionsDescriptionReference Qty Value/Type Number Manufacturer Part Number C12, C20,C293 1 µF, 50 V, polypropylene Panasonic ECQ−V1H105JL C13147 pF, 50 V, ceramic Panasonic ECU−S2A470JCA C7, C16,C14310 nF, 50 V, ceramic Panasonic ECU−S1H103JCB C17, C382100 pF, 50 V, ceramic Panasonic ECU−S1H101JCA C191 2.2 nF, 50 V, ceramic Panasonic ECU−S1H222JCB C21470 nF, 400 V, polypropylenePanasonic ECQ−E4474KZ C211680 pF, 50 V, ceramic Panasonic ECU−S1H681JCB CapacitorsC221390 pF, 50 V, ceramic Panasonic ECU−S1H391JCA C241100 pF, 50 V, ceramic Panasonic ECU−S1H101JCA C251150 nF, 50 V, ceramicPanasonic ECU−S1H154KBB C26147 nF, 600 V, polypropylene Panasonic ECQ−E6473KF C27, C182100 pF, 50 V, ceramic Panasonic ECU−S1H105KBB C28, C232 2.2 µF, 50 V, ceramicPanasonic ECU−S1H225MEB C31100 µF, 450 V, electrolytic Panasonic ECO−S2WB101BA C3011800 µF, 25 V, electrolytic Panasonic ECA−IEFQ182C4, C5, C830.1 µF, 50 V, ceramic Panasonic ECU−S1H104KBB C61100 µF, 25 V, electrolytic Panasonic EEU−FCIE101S D11 6 A, 600 V, GI756CTGeneral Inst.GI756CT D111 6 A, 600 V, bridge rectifier,PB66Diodes Inc.PB66D121 1 A, 40 V, Shottky SR103CT D131TL431CLPTITL431C D14110 V, 1 W, Zener 1N4740D15, D2218 V, 1 W, Zener 1N4746DiodesD31 6 A, 600 V, ultra fast IR HFA08TB60−ND D4, D62 1 A, 600 V, fast recovery PhilipsBYV26C D5,D7,D9,D10, D165 1 A, 40 V, Shottky 1N5819D81 6 A, 600 V, full wave rectifierIRHBR2045FH1, FH223AG Fuse clip Fuses F11 6 A, 250 V HS31For Q3Aavid 513201HS4, HS52For D3 and D8Aavid 579302 B 0 00 00Heat sinks HS1, HS22For Q1 and Q2Avid 593002 B 0 34 00L11 1.7 mH, 2.5 A, coupled Cooper CTX08−14730Inductors L2135 µH, 8.3 ACooper CTX08−14279Q1,Q228 A, 500 V, n−channel IR IRF840Q3114 A, 500 V, n−channel IRIRFP450MOSFETsQ51NPN transistor MJE13005Not usedQ4, R8, R9,C9, C15,C106Not usedDM38500 EVM Part Descriptions2-3Reference DescriptionReference Qty Value/Type Number ManufacturerPart Number R1, R122ShortR10, R362200 Ω, ¼ W R25, R29,R27310 k Ω, ¼ WR131 2 k Ω, ¼ W R141 1.5 k Ω, ¼ W R15, R192 3.92 k Ω, ¼ W R161750 Ω, ¼ W R1717.5 k Ω, ¼ W R18, R242392 k Ω, ¼ W R2, R112 1 k Ω, ¼ W R20122.1 k Ω, ¼ W R2118.25 k Ω, ¼ W R22, R332562 k Ω, ¼ W ResistorsR231200 k Ω, ¼ W R261100 Ω, ¼ WR281100 k Ω, ¼ W R30130.1 k Ω, ¼ W R31133.2 k Ω, ¼ W R321 4.75 k Ω, ¼ W R341221 k Ω, ¼ W R35116.2 k Ω, ¼ W R391 1 k Ω, 1 W R41 1 Ω, 1 W, ±5%R510.33 Ω, 3 W, ±5%R6, R7220 Ω, ¼ WR3151 k Ω, 2 W, 400 VT118 mH, 10 A, 10.8:1Cooper CTX08−14226Transformers T21560−990 µH, 1:1 gate drive Cooper CTX08−14225U41BiCMOS PFC/PWM combination controller TexasInstrumentsUCC38500N ICsU31Opto-isolator4N36X13Thermal pad TO−220(@ Q1, Q2, D8)X21Thermal pad TO−247(@ Q3)MiscellaneousX34Screw pan head #4−40 X 7/16 (@Q1, Q2, Q3, D8)X44Nut #4x40X53Nylon shoulder washer #4(@Q1, Q2, D8)X61Bevel washer #4 (@Q3)PCBPCB1Bare boardUCC38500 PCBNotes:1)The values of these components are to be determined by the user in accordance with the applica-tion requirements.2)Unless otherwise specified, all resistors have a tolerance of ±1%.3)Capacitor C38 is located at reference designator R38 on the PCB.。

TEXAS INSTRUMENTS-PRODUCTION DATAStellaris®LM3S2793MicrocontrollerDATA SHEETCopyright©2007-2012 DS-LM3S2793-11425CopyrightCopyright©2007-2012Texas Instruments Incorporated All rights reserved.Stellaris and StellarisWare®are registered trademarks of Texas Instruments Incorporated.ARM and Thumb are registered trademarks and Cortex is a trademark of ARM Limited.Other names and brands may be claimed as the property of others.PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instruments standard warranty.Production processing does not necessarily include testing of all parameters.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.Texas Instruments Incorporated108Wild Basin,Suite350Austin,TX78746/stellaris/sc/technical-support/product-information-centers.htmStellaris®LM3S2793MicrocontrollerTable of ContentsRevision History (32)About This Document (43)Audience (43)About This Manual (43)Related Documents (43)Documentation Conventions (44)1Architectural Overview (46)1.1Overview (46)1.2Target Applications (48)1.3Features (48)1.3.1ARM Cortex-M3Processor Core (48)1.3.2On-Chip Memory (50)1.3.3External Peripheral Interface (51)1.3.4Serial Communications Peripherals (53)1.3.5System Integration (57)1.3.6Advanced Motion Control (63)1.3.7Analog (65)1.3.8JTAG and ARM Serial Wire Debug (66)1.3.9Packaging and Temperature (67)1.4Hardware Details (67)2The Cortex-M3Processor (68)2.1Block Diagram (69)2.2Overview (70)2.2.1System-Level Interface (70)2.2.2Integrated Configurable Debug (70)2.2.3Trace Port Interface Unit(TPIU) (71)2.2.4Cortex-M3System Component Details (71)2.3Programming Model (72)2.3.1Processor Mode and Privilege Levels for Software Execution (72)2.3.2Stacks (72)2.3.3Register Map (73)2.3.4Register Descriptions (74)2.3.5Exceptions and Interrupts (87)2.3.6Data Types (87)2.4Memory Model (87)2.4.1Memory Regions,Types and Attributes (89)2.4.2Memory System Ordering of Memory Accesses (90)2.4.3Behavior of Memory Accesses (90)2.4.4Software Ordering of Memory Accesses (91)2.4.5Bit-Banding (92)2.4.6Data Storage (94)2.4.7Synchronization Primitives (95)2.5Exception Model (96)2.5.1Exception States (97)2.5.2Exception Types (97)Table of Contents2.5.3Exception Handlers (100)2.5.4Vector Table (100)2.5.5Exception Priorities (101)2.5.6Interrupt Priority Grouping (102)2.5.7Exception Entry and Return (102)2.6Fault Handling (104)2.6.1Fault Types (104)2.6.2Fault Escalation and Hard Faults (105)2.6.3Fault Status Registers and Fault Address Registers (106)2.6.4Lockup (106)2.7Power Management (106)2.7.1Entering Sleep Modes (106)2.7.2Wake Up from Sleep Mode (107)2.8Instruction Set Summary (108)3Cortex-M3Peripherals (111)3.1Functional Description (111)3.1.1System Timer(SysTick) (111)3.1.2Nested Vectored Interrupt Controller(NVIC) (112)3.1.3System Control Block(SCB) (114)3.1.4Memory Protection Unit(MPU) (114)3.2Register Map (119)3.3System Timer(SysTick)Register Descriptions (121)3.4NVIC Register Descriptions (125)3.5System Control Block(SCB)Register Descriptions (138)3.6Memory Protection Unit(MPU)Register Descriptions (167)4JTAG Interface (177)4.1Block Diagram (178)4.2Signal Description (178)4.3Functional Description (179)4.3.1JTAG Interface Pins (179)4.3.2JTAG TAP Controller (181)4.3.3Shift Registers (181)4.3.4Operational Considerations (182)4.4Initialization and Configuration (184)4.5Register Descriptions (185)4.5.1Instruction Register(IR) (185)4.5.2Data Registers (187)5System Control (189)5.1Signal Description (189)5.2Functional Description (189)5.2.1Device Identification (190)5.2.2Reset Control (190)5.2.3Non-Maskable Interrupt (195)5.2.4Power Control (195)5.2.5Clock Control (196)5.2.6System Control (203)5.3Initialization and Configuration (205)5.4Register Map (205)Stellaris®LM3S2793Microcontroller5.5Register Descriptions (207)6Hibernation Module (295)6.1Block Diagram (296)6.2Signal Description (296)6.3Functional Description (297)6.3.1Register Access Timing (297)6.3.2Hibernation Clock Source (298)6.3.3System Implementation (299)6.3.4Battery Management (300)6.3.5Real-Time Clock (300)6.3.6Battery-Backed Memory (301)6.3.7Power Control Using HIB (301)6.3.8Power Control Using VDD3ON Mode (301)6.3.9Initiating Hibernate (301)6.3.10Waking from Hibernate (301)6.3.11Interrupts and Status (302)6.4Initialization and Configuration (302)6.4.1Initialization (302)6.4.2RTC Match Functionality(No Hibernation) (303)6.4.3RTC Match/Wake-Up from Hibernation (303)6.4.4External Wake-Up from Hibernation (304)6.4.5RTC or External Wake-Up from Hibernation (304)6.5Register Map (304)6.6Register Descriptions (305)7Internal Memory (322)7.1Block Diagram (322)7.2Functional Description (322)7.2.1SRAM (323)7.2.2ROM (323)7.2.3Flash Memory (325)7.3Register Map (330)7.4Flash Memory Register Descriptions(Flash Control Offset) (331)7.5Memory Register Descriptions(System Control Offset) (343)8Micro Direct Memory Access(μDMA) (359)8.1Block Diagram (360)8.2Functional Description (360)8.2.1Channel Assignments (361)8.2.2Priority (362)8.2.3Arbitration Size (362)8.2.4Request Types (362)8.2.5Channel Configuration (363)8.2.6Transfer Modes (365)8.2.7Transfer Size and Increment (373)8.2.8Peripheral Interface (373)8.2.9Software Request (373)8.2.10Interrupts and Errors (374)8.3Initialization and Configuration (374)8.3.1Module Initialization (374)Table of Contents8.3.2Configuring a Memory-to-Memory Transfer (374)8.3.3Configuring a Peripheral for Simple Transmit (376)8.3.4Configuring a Peripheral for Ping-Pong Receive (377)8.3.5Configuring Channel Assignments (380)8.4Register Map (380)8.5μDMA Channel Control Structure (381)8.6μDMA Register Descriptions (388)9General-Purpose Input/Outputs(GPIOs) (417)9.1Signal Description (417)9.2Functional Description (422)9.2.1Data Control (423)9.2.2Interrupt Control (424)9.2.3Mode Control (425)9.2.4Commit Control (425)9.2.5Pad Control (426)9.2.6Identification (426)9.3Initialization and Configuration (426)9.4Register Map (427)9.5Register Descriptions (430)10External Peripheral Interface(EPI) (473)10.1EPI Block Diagram (474)10.2Signal Description (475)10.3Functional Description (477)10.3.1Non-Blocking Reads (478)10.3.2DMA Operation (479)10.4Initialization and Configuration (479)10.4.1SDRAM Mode (480)10.4.2Host Bus Mode (484)10.4.3General-Purpose Mode (495)10.5Register Map (503)10.6Register Descriptions (504)11General-Purpose Timers (546)11.1Block Diagram (547)11.2Signal Description (547)11.3Functional Description (550)11.3.1GPTM Reset Conditions (551)11.3.2Timer Modes (551)11.3.3DMA Operation (557)11.3.4Accessing Concatenated Register Values (558)11.4Initialization and Configuration (558)11.4.1One-Shot/Periodic Timer Mode (558)11.4.2Real-Time Clock(RTC)Mode (559)11.4.3Input Edge-Count Mode (559)11.4.4Input Edge Timing Mode (560)11.4.5PWM Mode (561)11.5Register Map (561)11.6Register Descriptions (562)Stellaris®LM3S2793Microcontroller 12Watchdog Timers (593)12.1Block Diagram (594)12.2Functional Description (594)12.2.1Register Access Timing (595)12.3Initialization and Configuration (595)12.4Register Map (595)12.5Register Descriptions (596)13Analog-to-Digital Converter(ADC) (618)13.1Block Diagram (619)13.2Signal Description (620)13.3Functional Description (622)13.3.1Sample Sequencers (622)13.3.2Module Control (623)13.3.3Hardware Sample Averaging Circuit (625)13.3.4Analog-to-Digital Converter (626)13.3.5Differential Sampling (629)13.3.6Internal Temperature Sensor (632)13.3.7Digital Comparator Unit (632)13.4Initialization and Configuration (637)13.4.1Module Initialization (637)13.4.2Sample Sequencer Configuration (638)13.5Register Map (638)13.6Register Descriptions (640)14Universal Asynchronous Receivers/Transmitters(UARTs) (698)14.1Block Diagram (699)14.2Signal Description (699)14.3Functional Description (701)14.3.1Transmit/Receive Logic (701)14.3.2Baud-Rate Generation (702)14.3.3Data Transmission (703)14.3.4Serial IR(SIR) (703)14.3.5ISO7816Support (704)14.3.6Modem Handshake Support (704)14.3.7LIN Support (706)14.3.8FIFO Operation (707)14.3.9Interrupts (708)14.3.10Loopback Operation (709)14.3.11DMA Operation (709)14.4Initialization and Configuration (709)14.5Register Map (710)14.6Register Descriptions (712)15Synchronous Serial Interface(SSI) (762)15.1Block Diagram (763)15.2Signal Description (763)15.3Functional Description (764)15.3.1Bit Rate Generation (765)15.3.2FIFO Operation (765)15.3.3Interrupts (765)Table of Contents15.3.4Frame Formats (766)15.3.5DMA Operation (773)15.4Initialization and Configuration (774)15.5Register Map (775)15.6Register Descriptions (776)16Inter-Integrated Circuit(I2C)Interface (804)16.1Block Diagram (805)16.2Signal Description (805)16.3Functional Description (806)16.3.1I2C Bus Functional Overview (806)16.3.2Available Speed Modes (808)16.3.3Interrupts (809)16.3.4Loopback Operation (810)16.3.5Command Sequence Flow Charts (811)16.4Initialization and Configuration (818)16.5Register Map (819)16.6Register Descriptions(I2C Master) (820)16.7Register Descriptions(I2C Slave) (833)17Inter-Integrated Circuit Sound(I2S)Interface (842)17.1Block Diagram (843)17.2Signal Description (843)17.3Functional Description (845)17.3.1Transmit (846)17.3.2Receive (850)17.4Initialization and Configuration (852)17.5Register Map (853)17.6Register Descriptions (854)18Controller Area Network(CAN)Module (879)18.1Block Diagram (880)18.2Signal Description (880)18.3Functional Description (881)18.3.1Initialization (882)18.3.2Operation (883)18.3.3Transmitting Message Objects (884)18.3.4Configuring a Transmit Message Object (884)18.3.5Updating a Transmit Message Object (885)18.3.6Accepting Received Message Objects (886)18.3.7Receiving a Data Frame (886)18.3.8Receiving a Remote Frame (886)18.3.9Receive/Transmit Priority (887)18.3.10Configuring a Receive Message Object (887)18.3.11Handling of Received Message Objects (888)18.3.12Handling of Interrupts (890)18.3.13Test Mode (891)18.3.14Bit Timing Configuration Error Considerations (893)18.3.15Bit Time and Bit Rate (893)18.3.16Calculating the Bit Timing Parameters (895)Stellaris®LM3S2793Microcontroller 18.4Register Map (898)18.5CAN Register Descriptions (899)19Analog Comparators (930)19.1Block Diagram (931)19.2Signal Description (931)19.3Functional Description (932)19.3.1Internal Reference Programming (933)19.4Initialization and Configuration (934)19.5Register Map (935)19.6Register Descriptions (936)20Pulse Width Modulator(PWM) (944)20.1Block Diagram (945)20.2Signal Description (946)20.3Functional Description (949)20.3.1PWM Timer (949)20.3.2PWM Comparators (950)20.3.3PWM Signal Generator (951)20.3.4Dead-Band Generator (952)20.3.5Interrupt/ADC-Trigger Selector (952)20.3.6Synchronization Methods (953)20.3.7Fault Conditions (954)20.3.8Output Control Block (954)20.4Initialization and Configuration (955)20.5Register Map (956)20.6Register Descriptions (959)21Quadrature Encoder Interface(QEI) (1022)21.1Block Diagram (1022)21.2Signal Description (1023)21.3Functional Description (1024)21.4Initialization and Configuration (1027)21.5Register Map (1027)21.6Register Descriptions (1028)22Pin Diagram (1045)23Signal Tables (1047)23.1100-Pin LQFP Package Pin Tables (1048)23.2108-Ball BGA Package Pin Tables (1084)23.3Connections for Unused Signals (1120)24Operating Characteristics (1122)25Electrical Characteristics (1123)25.1Maximum Ratings (1123)25.2Recommended Operating Conditions (1123)25.3Load Conditions (1124)25.4JTAG and Boundary Scan (1124)25.5Power and Brown-Out (1126)25.6Reset (1127)25.7On-Chip Low Drop-Out(LDO)Regulator (1128)25.8Clocks (1128)Table of Contents25.8.1PLL Specifications (1128)25.8.2PIOSC Specifications (1129)25.8.3Internal30-kHz Oscillator Specifications (1129)25.8.4Hibernation Clock Source Specifications (1130)25.8.5Main Oscillator Specifications (1130)25.8.6System Clock Specification with ADC Operation (1131)25.9Sleep Modes (1131)25.10Hibernation Module (1131)25.11Flash Memory (1133)25.12Input/Output Characteristics (1133)25.13External Peripheral Interface(EPI) (1134)25.14Analog-to-Digital Converter(ADC) (1139)25.15Synchronous Serial Interface(SSI) (1140)25.16Inter-Integrated Circuit(I2C)Interface (1142)25.17Inter-Integrated Circuit Sound(I2S)Interface (1143)25.18Analog Comparator (1144)25.19Current Consumption (1145)25.19.1Nominal Power Consumption (1145)25.19.2Maximum Current Consumption (1146)A Register Quick Reference (1148)B Ordering and Contact Information (1184)B.1Ordering Information (1184)B.2Part Markings (1184)B.3Kits (1185)B.4Support Information (1185)C Package Information (1186)C.1100-Pin LQFP Package (1186)C.1.1Package Dimensions (1186)C.1.2Tray Dimensions (1188)C.1.3Tape and Reel Dimensions (1188)C.2108-Ball BGA Package (1190)C.2.1Package Dimensions (1190)C.2.2Tray Dimensions (1192)C.2.3Tape and Reel Dimensions (1193)List of FiguresFigure1-1.Stellaris LM3S2793Microcontroller High-Level Block Diagram (47)Figure2-1.CPU Block Diagram (70)Figure2-2.TPIU Block Diagram (71)Figure2-3.Cortex-M3Register Set (73)Figure2-4.Bit-Band Mapping (94)Figure2-5.Data Storage (95)Figure2-6.Vector Table (101)Figure2-7.Exception Stack Frame (103)Figure3-1.SRD Use Example (117)Figure4-1.JTAG Module Block Diagram (178)Figure4-2.Test Access Port State Machine (181)Figure4-3.IDCODE Register Format (187)Figure4-4.BYPASS Register Format (187)Figure4-5.Boundary Scan Register Format (188)Figure5-1.Basic RST Configuration (192)Figure5-2.External Circuitry to Extend Power-On Reset (192)Figure5-3.Reset Circuit Controlled by Switch (193)Figure5-4.Power Architecture (196)Figure5-5.Main Clock Tree (199)Figure6-1.Hibernation Module Block Diagram (296)ing a Crystal as the Hibernation Clock Source (299)ing a Dedicated Oscillator as the Hibernation Clock Source with VDD3ONMode (299)Figure7-1.Internal Memory Block Diagram (322)Figure8-1.μDMA Block Diagram (360)Figure8-2.Example of Ping-PongμDMA Transaction (366)Figure8-3.Memory Scatter-Gather,Setup and Configuration (368)Figure8-4.Memory Scatter-Gather,μDMA Copy Sequence (369)Figure8-5.Peripheral Scatter-Gather,Setup and Configuration (371)Figure8-6.Peripheral Scatter-Gather,μDMA Copy Sequence (372)Figure9-1.Digital I/O Pads (422)Figure9-2.Analog/Digital I/O Pads (423)Figure9-3.GPIODATA Write Example (424)Figure9-4.GPIODATA Read Example (424)Figure10-1.EPI Block Diagram (475)Figure10-2.SDRAM Non-Blocking Read Cycle (483)Figure10-3.SDRAM Normal Read Cycle (483)Figure10-4.SDRAM Write Cycle (484)Figure10-5.Example Schematic for Muxed Host-Bus16Mode (490)Figure10-6.Host-Bus Read Cycle,MODE=0x1,WRHIGH=0,RDHIGH=0 (492)Figure10-7.Host-Bus Write Cycle,MODE=0x1,WRHIGH=0,RDHIGH=0 (493)Figure10-8.Host-Bus Write Cycle with Multiplexed Address and Data,MODE=0x0,WRHIGH=0,RDHIGH=0 (493)Figure10-9.Host-Bus Write Cycle with Multiplexed Address and Data and ALE with DualCSn (494)Figure10-10.Continuous Read Mode Accesses (494)Figure10-11.Write Followed by Read to External FIFO (495)Figure10-12.Two-Entry FIFO (495)Figure10-13.Single-Cycle Write Access,FRM50=0,FRMCNT=0,WRCYC=0 (499)Figure10-14.Two-Cycle Read,Write Accesses,FRM50=0,FRMCNT=0,RDCYC=1,WRCYC=1 (499)Figure10-15.Read Accesses,FRM50=0,FRMCNT=0,RDCYC=1 (500)Figure10-16.FRAME Signal Operation,FRM50=0and FRMCNT=0 (500)Figure10-17.FRAME Signal Operation,FRM50=0and FRMCNT=1 (500)Figure10-18.FRAME Signal Operation,FRM50=0and FRMCNT=2 (501)Figure10-19.FRAME Signal Operation,FRM50=1and FRMCNT=0 (501)Figure10-20.FRAME Signal Operation,FRM50=1and FRMCNT=1 (501)Figure10-21.FRAME Signal Operation,FRM50=1and FRMCNT=2 (501)Figure10-22.iRDY Signal Operation,FRM50=0,FRMCNT=0,and RD2CYC=1 (502)Figure10-23.EPI Clock Operation,CLKGATE=1,WR2CYC=0 (503)Figure10-24.EPI Clock Operation,CLKGATE=1,WR2CYC=1 (503)Figure11-1.GPTM Module Block Diagram (547)Figure11-2.Timer Daisy Chain (553)Figure11-3.Input Edge-Count Mode Example (555)Figure11-4.16-Bit Input Edge-Time Mode Example (556)Figure11-5.16-Bit PWM Mode Example (557)Figure12-1.WDT Module Block Diagram (594)Figure13-1.Implementation of Two ADC Blocks (619)Figure13-2.ADC Module Block Diagram (620)Figure13-3.ADC Sample Phases (624)Figure13-4.Doubling the ADC Sample Rate (625)Figure13-5.Skewed Sampling (625)Figure13-6.Sample Averaging Example (626)Figure13-7.ADC Input Equivalency Diagram (627)Figure13-8.Internal Voltage Conversion Result (628)Figure13-9.External Voltage Conversion Result (629)Figure13-10.Differential Sampling Range,V IN_ODD=1.5V (630)Figure13-11.Differential Sampling Range,V IN_ODD=0.75V (631)Figure13-12.Differential Sampling Range,V IN_ODD=2.25V (631)Figure13-13.Internal Temperature Sensor Characteristic (632)Figure13-14.Low-Band Operation(CIC=0x0and/or CTC=0x0) (635)Figure13-15.Mid-Band Operation(CIC=0x1and/or CTC=0x1) (636)Figure13-16.High-Band Operation(CIC=0x3and/or CTC=0x3) (637)Figure14-1.UART Module Block Diagram (699)Figure14-2.UART Character Frame (702)Figure14-3.IrDA Data Modulation (704)Figure14-4.LIN Message (706)Figure14-5.LIN Synchronization Field (707)Figure15-1.SSI Module Block Diagram (763)Figure15-2.TI Synchronous Serial Frame Format(Single Transfer) (767)Figure15-3.TI Synchronous Serial Frame Format(Continuous Transfer) (767)Figure15-4.Freescale SPI Format(Single Transfer)with SPO=0and SPH=0 (768)Figure15-5.Freescale SPI Format(Continuous Transfer)with SPO=0and SPH=0 (768)Figure15-6.Freescale SPI Frame Format with SPO=0and SPH=1 (769)Figure15-7.Freescale SPI Frame Format(Single Transfer)with SPO=1and SPH=0 (770)Figure15-8.Freescale SPI Frame Format(Continuous Transfer)with SPO=1and SPH=0 (770)Figure15-9.Freescale SPI Frame Format with SPO=1and SPH=1 (771)Figure15-10.MICROWIRE Frame Format(Single Frame) (772)Figure15-11.MICROWIRE Frame Format(Continuous Transfer) (773)Figure15-12.MICROWIRE Frame Format,SSIFss Input Setup and Hold Requirements (773)Figure16-1.I2C Block Diagram (805)Figure16-2.I2C Bus Configuration (806)Figure16-3.START and STOP Conditions (807)plete Data Transfer with a7-Bit Address (807)Figure16-5.R/S Bit in First Byte (808)Figure16-6.Data Validity During Bit Transfer on the I2C Bus (808)Figure16-7.Master Single TRANSMIT (812)Figure16-8.Master Single RECEIVE (813)Figure16-9.Master TRANSMIT with Repeated START (814)Figure16-10.Master RECEIVE with Repeated START (815)Figure16-11.Master RECEIVE with Repeated START after TRANSMIT with RepeatedSTART (816)Figure16-12.Master TRANSMIT with Repeated START after RECEIVE with RepeatedSTART (817)Figure16-13.Slave Command Sequence (818)Figure17-1.I2S Block Diagram (843)Figure17-2.I2S Data Transfer (846)Figure17-3.Left-Justified Data Transfer (846)Figure17-4.Right-Justified Data Transfer (846)Figure18-1.CAN Controller Block Diagram (880)Figure18-2.CAN Data/Remote Frame (882)Figure18-3.Message Objects in a FIFO Buffer (890)Figure18-4.CAN Bit Time (894)Figure19-1.Analog Comparator Module Block Diagram (931)Figure19-2.Structure of Comparator Unit (933)parator Internal Reference Structure (933)Figure20-1.PWM Module Diagram (946)Figure20-2.PWM Generator Block Diagram (946)Figure20-3.PWM Count-Down Mode (951)Figure20-4.PWM Count-Up/Down Mode (951)Figure20-5.PWM Generation Example In Count-Up/Down Mode (952)Figure20-6.PWM Dead-Band Generator (952)Figure21-1.QEI Block Diagram (1023)Figure21-2.Quadrature Encoder and Velocity Predivider Operation (1026)Figure22-1.100-Pin LQFP Package Pin Diagram (1045)Figure22-2.108-Ball BGA Package Pin Diagram(Top View) (1046)Figure25-1.Load Conditions (1124)Figure25-2.JTAG Test Clock Input Timing (1125)Figure25-3.JTAG Test Access Port(TAP)Timing (1125)Figure25-4.Power-On Reset Timing (1126)Figure25-5.Brown-Out Reset Timing (1126)Figure25-6.Power-On Reset and Voltage Parameters (1127)Figure25-7.External Reset Timing(RST) (1127)Figure25-8.Software Reset Timing (1127)Figure25-9.Watchdog Reset Timing (1128)Figure25-10.MOSC Failure Reset Timing (1128)Figure25-11.Hibernation Module Timing with Internal Oscillator Running in Hibernation (1132)Figure25-12.Hibernation Module Timing with Internal Oscillator Stopped in Hibernation (1133)Figure25-13.SDRAM Initialization and Load Mode Register Timing (1134)Figure25-14.SDRAM Read Timing (1135)Figure25-15.SDRAM Write Timing (1135)Figure25-16.Host-Bus8/16Mode Read Timing (1136)Figure25-17.Host-Bus8/16Mode Write Timing (1136)Figure25-18.Host-Bus8/16Mode Muxed Read Timing (1137)Figure25-19.Host-Bus8/16Mode Muxed Write Timing (1137)Figure25-20.General-Purpose Mode Read and Write Timing (1138)Figure25-21.General-Purpose Mode iRDY Timing (1138)Figure25-22.ADC Input Equivalency Diagram (1140)Figure25-23.SSI Timing for TI Frame Format(FRF=01),Single Transfer TimingMeasurement (1141)Figure25-24.SSI Timing for MICROWIRE Frame Format(FRF=10),Single Transfer (1141)Figure25-25.SSI Timing for SPI Frame Format(FRF=00),with SPH=1 (1142)Figure25-26.I2C Timing (1143)Figure25-27.I2S Master Mode Transmit Timing (1143)Figure25-28.I2S Master Mode Receive Timing (1144)Figure25-29.I2S Slave Mode Transmit Timing (1144)Figure25-30.I2S Slave Mode Receive Timing (1144)Figure C-1.Stellaris LM3S2793100-Pin LQFP Package Dimensions (1186)Figure C-2.100-Pin LQFP Tray Dimensions (1188)Figure C-3.100-Pin LQFP Tape and Reel Dimensions (1189)Figure C-4.Stellaris LM3S2793108-Ball BGA Package Dimensions (1190)Figure C-5.108-Ball BGA Tray Dimensions (1192)Figure C-6.108-Ball BGA Tape and Reel Dimensions (1193)List of TablesTable1.Revision History (32)Table2.Documentation Conventions (44)Table2-1.Summary of Processor Mode,Privilege Level,and Stack Use (73)Table2-2.Processor Register Map (74)Table2-3.PSR Register Combinations (79)Table2-4.Memory Map (87)Table2-5.Memory Access Behavior (90)Table2-6.SRAM Memory Bit-Banding Regions (92)Table2-7.Peripheral Memory Bit-Banding Regions (92)Table2-8.Exception Types (98)Table2-9.Interrupts (99)Table2-10.Exception Return Behavior (104)Table2-11.Faults (104)Table2-12.Fault Status and Fault Address Registers (106)Table2-13.Cortex-M3Instruction Summary (108)Table3-1.Core Peripheral Register Regions (111)Table3-2.Memory Attributes Summary (114)Table3-3.TEX,S,C,and B Bit Field Encoding (117)Table3-4.Cache Policy for Memory Attribute Encoding (118)Table3-5.AP Bit Field Encoding (118)Table3-6.Memory Region Attributes for Stellaris Microcontrollers (118)Table3-7.Peripherals Register Map (119)Table3-8.Interrupt Priority Levels (146)Table3-9.Example SIZE Field Values (174)Table4-1.JTAG_SWD_SWO Signals(100LQFP) (178)Table4-2.JTAG_SWD_SWO Signals(108BGA) (179)Table4-3.JTAG Port Pins State after Power-On Reset or RST assertion (180)Table4-4.JTAG Instruction Register Commands (185)Table5-1.System Control&Clocks Signals(100LQFP) (189)Table5-2.System Control&Clocks Signals(108BGA) (189)Table5-3.Reset Sources (190)Table5-4.Clock Source Options (197)Table5-5.Possible System Clock Frequencies Using the SYSDIV Field (200)Table5-6.Examples of Possible System Clock Frequencies Using the SYSDIV2Field (200)Table5-7.Examples of Possible System Clock Frequencies with DIV400=1 (201)Table5-8.System Control Register Map (205)Table5-9.RCC2Fields that Override RCC Fields (226)Table6-1.Hibernate Signals(100LQFP) (296)Table6-2.Hibernate Signals(108BGA) (297)Table6-3.Hibernation Module Clock Operation (303)Table6-4.Hibernation Module Register Map (305)Table7-1.Flash Memory Protection Policy Combinations (326)er-Programmable Flash Memory Resident Registers (330)Table7-3.Flash Register Map (330)Table8-1.μDMA Channel Assignments (361)Table8-2.Request Type Support (363)Table8-3.Control Structure Memory Map (364)Table8-4.Channel Control Structure (364)Table8-5.μDMA Read Example:8-Bit Peripheral (373)Table8-6.μDMA Interrupt Assignments (374)Table8-7.Channel Control Structure Offsets for Channel30 (375)Table8-8.Channel Control Word Configuration for Memory Transfer Example (375)Table8-9.Channel Control Structure Offsets for Channel7 (376)Table8-10.Channel Control Word Configuration for Peripheral Transmit Example (377)Table8-11.Primary and Alternate Channel Control Structure Offsets for Channel8 (378)Table8-12.Channel Control Word Configuration for Peripheral Ping-Pong ReceiveExample (379)Table8-13.μDMA Register Map (380)Table9-1.GPIO Pins With Non-Zero Reset Values (418)Table9-2.GPIO Pins and Alternate Functions(100LQFP) (418)Table9-3.GPIO Pins and Alternate Functions(108BGA) (420)Table9-4.GPIO Pad Configuration Examples (426)Table9-5.GPIO Interrupt Configuration Example (427)Table9-6.GPIO Pins With Non-Zero Reset Values (428)Table9-7.GPIO Register Map (428)Table9-8.GPIO Pins With Non-Zero Reset Values (441)Table9-9.GPIO Pins With Non-Zero Reset Values (447)Table9-10.GPIO Pins With Non-Zero Reset Values (449)Table9-11.GPIO Pins With Non-Zero Reset Values (452)Table9-12.GPIO Pins With Non-Zero Reset Values (459)Table10-1.External Peripheral Interface Signals(100LQFP) (475)Table10-2.External Peripheral Interface Signals(108BGA) (476)Table10-3.EPI SDRAM Signal Connections (481)Table10-4.Capabilities of Host Bus8and Host Bus16Modes (485)Table10-5.EPI Host-Bus8Signal Connections (486)Table10-6.EPI Host-Bus16Signal Connections (488)Table10-7.EPI General Purpose Signal Connections (497)Table10-8.External Peripheral Interface(EPI)Register Map (503)Table11-1.Available CCP Pins (547)Table11-2.General-Purpose Timers Signals(100LQFP) (548)Table11-3.General-Purpose Timers Signals(108BGA) (549)Table11-4.General-Purpose Timer Capabilities (550)Table11-5.Counter Values When the Timer is Enabled in Periodic or One-Shot Modes (551)Table11-6.16-Bit Timer With Prescaler Configurations (552)Table11-7.Counter Values When the Timer is Enabled in RTC Mode (553)Table11-8.Counter Values When the Timer is Enabled in Input Edge-Count Mode (554)Table11-9.Counter Values When the Timer is Enabled in Input Event-Count Mode (555)Table11-10.Counter Values When the Timer is Enabled in PWM Mode (556)Table11-11.Timers Register Map (561)Table12-1.Watchdog Timers Register Map (596)Table13-1.ADC Signals(100LQFP) (620)Table13-2.ADC Signals(108BGA) (621)Table13-3.Samples and FIFO Depth of Sequencers (622)Table13-4.Differential Sampling Pairs (629)。

General DescriptionThe MAX1636 CPU supply evaluation kit (EV kit) circuit is intended for converting high-voltage battery power into a low-voltage supply rail for next-generation note-book CPU cores. The output is digitally adjustable between 1.25V and 2V, in 50mV increments. The input range is +7V to +22V. It delivers up to 7A output current with greater than 87% efficiency. The MAX1636 features ±1% DC output accuracy over all conditions of line,load, and temperature. The fully assembled and tested EV kit has excellent dynamic response to correct for fast load transients.This EV kit is very specific to notebook CPU core power supplies, and includes a digital-to-analog converter (DAC), op-amp buffer, and other high-performance components tailored to this demanding application.However, the MAX1636 is a general-purpose, stand-alone device that can be used without the DAC; see the MAX1636 data sheet for standard application circuits.____________________________Featureso +7V to +22V Input Voltage Rangeo Digitally Adjustable 1.25V to 2V Output Voltage o 7A Output Current Capability o ±1% DC Output Accuracyo Efficiency = 87%, V IN = 7V, V OUT = 1.7V (at I OUT = 3A)o Fast MOSFETs for Low Switching Losses o Tight PC Board Layout for Low Switching Losses o Power-Good Outputo 300kHz Switching Frequencyo Overvoltage and Undervoltage Protection o Surface-Mount Construction o Fully Assembled and TestedEvaluates: MAX1636MAX1636 CPU Supply Evaluation Kit________________________________________________________________Maxim Integrated Products 1Component ListOrdering Information19-1268; Rev 2; 12/00For price, delivery, and to place orders,please contact Maxim Distribution at 1-888-629-4642,or visit Maxim’s website at .Quick StartThe MAX1636 EV kit is fully assembled and tested.Follow these steps to verify board operation.Do not turn on the power supply until all connections are completed.1)Connect a +7V to +22V supply voltage to the VINpad. Connect ground to the GND pad.2)Connect a voltmeter and load, if any, to the VOUTpad.3)Turn on the power supply to the board. Verify thatthe output voltage is 2V (SW1 set to all zeros).4)Set switch SW1 per Table 1 to get the desired out-put voltage. Input power may need to be cycled off and on for new voltage settings to take effect.E v a l u a t e s : M A X 1636MAX1636 CPU Supply Evaluation Kit 2_______________________________________________________________________________________Note:Please indicate that you are using the MAX1636 when contacting these component suppliers.Table 1. Output Voltage SettingsComponent Supplier_______________Detailed DescriptionThe MAX1636 EV kit provides a digitally adjustable out-put voltage between 1.25V and 2V from a +7V to +22V input supply. The output voltage is digitally adjusted by the MAX5480, a multiplying DAC, which sums a vari-able output current into the FB feedback node. This DAC operates in voltage-output mode and relies on the precise MAX1636 REF output to generate an accurate reference current. The DAC has buffer amplifiers on the input and output to prevent the R2R ladder in the MAX5480 from excessively loading the reference or interacting with the normal FB resistor-divider imped-ance. The buffered DAC output swings 0V to REF -1LSB. Refer to Table 1 for the digital-to-analog (D/A)codes.The MAX1636 IC is rated for 30V input; however, the EV kit is restricted to 22V operating range (25V absolute maximum) due to the ratings of external components and minimum duty-factor limitations.The 2-pin header JU3 selects the operating frequency.Table 3 lists the selectable jumper options. The EV kit’s components are selected for 300kHz ponent values might need to be changed if 200kHz operation is selected (refer to the Design Procedure section in the MAX1636 data sheet). Synchronize the oscillator to an external clock signal by driving the SYNC pad with a 5V amplitude pulse train in the 240kHz to 350kHz frequency range.The 2-pin header J U4 selects the overvoltage protec-tion. The 2-pin header JU5 selects the shutdown mode.Table 4 lists the selectable jumper options.The MAX1636 contains a latched fault-protection circuit that disables the IC when the output is overvoltage or undervoltage (or when thermal shutdown is triggered).Once disabled, the supply won’t attempt to restart until input power is cycled or until SHDN (JU5) is cycled. A fault condition can be triggered by overloading the out-put, overvoltaging the output (which can happen when changing the D/A code settings), or by touching sensi-tive compensation or feedback nodes.Optional +5V Chip-Supply InputAn optional +5V supply input (Figure 1) can power the IC and gate drivers to improve efficiency. The idea is to power the IC from an efficient source (the +5V system supply, typically 95% efficient) instead of relying on the inefficient internal VL linear regulator. To test this fea-ture, cut the trace at V+ and connect V+ to V L to dis-able the linear regulator, and connect an external +5V,50mA supply to the optional input.Alternate Op Amp for LowerSupply CurrentThe MAX4332 op amp provided with this kit is very accurate but draws up to 500µA supply current. For improved supply current draw with a slight (0.4%)degradation in output voltage accuracy, replace the MAX4332 with a MAX4163, which draws 25µA (typ).Evaluates: MAX1636MAX1636 CPU Supply Evaluation Kit_______________________________________________________________________________________3E v a l u a t e s : M A X 1636MAX1636 CPU Supply Evaluation Kit4_______________________________________________________________________________________Figure 1. MAX1636 EV Kit SchematicEvaluates: MAX1636MAX1636 CPU Supply Evaluation Kit_______________________________________________________________________________________5Figure 2. MAX1636 EV Kit Component Placement Guide—Component Side 1.0" 1.0"Figure 3. MAX1636 EV Kit Component Placement Guide—Solder SideE v a l u a t e s : M A X 1636MAX1636 CPU Supply Evaluation Kit 6_______________________________________________________________________________________Figure 4. MAX1636 EV Kit PC Board Layout—Component Side1.0" 1.0"Figure 5. MAX1636 EV Kit PC Board Layout—Two Internal GND PlanesEvaluates: MAX1636MAX1636 CPU Supply Evaluation KitFigure 6. MAX1636 EV Kit PC Board Layout—Three Internal GND Planes1.0" 1.0"Figure 7. MAX1636 EV Kit PC Board Layout—Solder SideMaxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600______________________7©1998 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products.。

PACKAGING INFORMATIONAddendum-Page 1(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.Addendum-Page 2(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF SN54AC86, SN74AC86 :•Catalog: SN74AC86•Military: SN54AC86NOTE: Qualified Version Definitions:•Catalog - TI's standard catalog product•Military - QML certified for Military and Defense ApplicationsAddendum-Page 3TAPE AND REEL INFORMATION*All dimensions are nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74AC86DBR SSOP DB 142000330.016.48.2 6.6 2.512.016.0Q1SN74AC86DR SOIC D 142500330.016.4 6.59.0 2.18.016.0Q1SN74AC86NSR SO NS 142000330.016.48.210.5 2.512.016.0Q1SN74AC86PWRTSSOPPW142000330.012.46.95.61.68.012.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) SN74AC86DBR SSOP DB142000367.0367.038.0 SN74AC86DR SOIC D142500367.0367.038.0 SN74AC86NSR SO NS142000367.0367.038.0SN74AC86PWR TSSOP PW142000367.0367.035.0PACKAGE OUTLINECDIP - 5.08 mm max heightJ0014A CERAMIC DUAL IN LINE PACKAGENOTES:1. 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电力线通信调制解调器德州仪器 (TI) 的电力线通信调制解调器解决方案● 设计注意事项 ● 选择和解决方案指南● 工具和软件 ● 产品公告和白皮书● 新闻发布和著作文章● 类似的终端设备解决方案● 应用手册和用户指南● 参考设计和❆✋ ♏♦♓♑⏹♦● 支持和社区方框图请点击彩色方框查看或申请推荐的解决方案。

FilterPrecision Amplifier或单击彩色块以查看/申请订购推荐解决方案的样片。

电力线通信 (PLC) 利用现有电力线基础设施，为在许多工业应用引进智能监控和控制提供了经济高效的方法。

它让 PLC 成为用于智能电网应用（如智能抄表、照明控制、太阳能、插入式电动车以及家庭和楼宇中的供暖、空调和安全系统）的首选技术之一。

对这些应用实施低频窄带 PLC (LF NB PLC) 技术将提供最适合的带宽、功耗和成本要求。

在窄带域（频率高达 500kHz）运行可确保数据完整性，同时可将系统成本降到最低。

数据速率从 1.2kbps 到数百 kbps 不等，具体取决于现有标准。

开发高效 PLC 实施也会遇到困难。

电力线本身就具有噪声，因此需要强大架构才能确保数据可靠性。

此外，每种应用和工作环境都不同，需要开发人员针对各种因素优化设计。

由于协议标准和调制方案多种多样，开发人员需要灵活的开发平台，以简化设计、实现对环境条件的优化、遵守当地法规的同时可轻松调整以满足不断发展的标准。

电力线通信调制解调器系统的调制信号首先进入接收器级或有源带通滤波器，其中为滤波器选择的运算放大器应该提供低噪声、低谐波失真和低输入偏置（如 TI 的 OPA365 或 OPA353 中所示）。

使用可编程增益放大器 (PGA)（如 PGA112）调节接收信号时，可实现宽动态范围和优化信号处理。

它需要足够快速准确地连接至模数转换器的输入，以便正确转换为数字形式供处理。

这可通过 F28235 Delfino? 或F2802x/03x Piccolo? 微处理器（可升级 C2000? 32 位微处理器 (MCU) 系列的成员）的片上 12 位 ADC 来实现。

Load (A)E f f i c i e n c y (%)0.00.51.0 1.52.06065707580859095100D008V INV OUTL1TLV62569AProduct Folder Order Now Technical Documents Tools &SoftwareSupport &CommunityTLV62568A ,TLV62569AZHCSI23B –APRIL 2018–REVISED MARCH 2020采用SOT563封装并具有强制PWM 的TLV6256xA 1A 、2A 降压转换器1特性•强制PWM 模式可减少输出电压纹波•效率高达95%•低R DS(ON)开关：100m Ω/60m Ω•输入电压范围为2.5V 至5.5V •可调输出电压范围为0.6V 至V IN •100%占空比，可实现超低压降• 1.5MHz 典型开关频率•电源正常输出•过流保护•内部软启动•热关断保护•采用SOT563封装•与TLV62568、TLV62569引脚对引脚兼容•借助WEBENCH ®电源设计器创建定制设计方案2应用•通用负载点(POL)电源•STB 和DVR •IP 网络摄像头•无线路由器•固态硬盘(SSD)–企业级3说明TLV62568A 、TLV62569A 器件是经过优化而具有高效率和紧凑型解决方案尺寸的同步降压型直流/直流转换器。

该器件集成了输出电流高达2A 的开关。

在整个负载范围内，该器件将以1.5MHz 开关频率在脉宽调制(PWM)模式下运行。

关断时，流耗减少至2μA 以下。

内部软启动电路可限制启动期间的浪涌电流。

此外，还内置了诸如输出过流保护、热关断保护和电源正常输出等其他特性。

该器件采用SOT563封装。

器件信息(1)器件型号封装封装尺寸（标称值）TLV62568ADRL SOT563(6)1.60mm x 1.60mmTLV62568APDRL TLV62569ADRL TLV62569APDRL(1)如需了解所有可用封装，请参阅产品说明书末尾的可订购产品附录。

General DescriptionThe MAX4372 low-cost, precision, high-side current-sense amplifier is available in a tiny, space-saving SOT23 5-pin package. Offered in three gain versions (T = 20V/V, F = 50V/V, and H = 100V/V), this device oper-ates from a single 2.7V to 28V supply and consumes only 30μA. It features a voltage output that eliminates the need for gain-setting resistors and is ideal for today’s notebook computers, cell phones, and other systems where battery/ DC current monitoring is critical.High-side current monitoring is especially useful in bat-tery-powered systems since it does not interfere with the ground path of the battery charger. The input common-mode range of 0 to 28V is independent of the supply volt-age and ensures that the current-sense feedback remains viable even when connected to a 2-cell battery pack in deep discharge.The user can set the full-scale current reading by choos-ing the device (T, F, or H) with the desired voltage gain and selecting the appropriate external sense resistor. This capability offers a high level of integration and flex-ibility, resulting in a simple and compact current-sense solution. For higher bandwidth applications, refer to the MAX4173T/F/H data sheet.Applications●Power-Management Systems●General-System/Board-Level Current Monitoring●Notebook Computers●Portable/Battery-Powered Systems●Smart-Battery Packs/Chargers●Cell Phones●Precision-Current Sources Features●Low-Cost, Compact Current-Sense Solution●30μA Supply Current● 2.7V to 28V Operating Supply●0.18% Full-Scale Accuracy●0.3mV Input Offset Voltage●Low 1.5Ω Output Impedance●Three Gain Versions Available• 20V/V (MAX4372T)• 50V/V (MAX4372F)• 100V/V (MAX4372H)●High Accuracy +2V to +28V Common-Mode Range,Functional Down to 0V, Independent of SupplyVoltage●Available in a Space-Saving 5-Pin SOT23 Packageand 3 x 2 UCSP™ (1mm x 1.5mm) Package Ordering Information appears at end of data sheet.UCSP is a trademark of Maxim Integrated Products, Inc.19-1548; Rev 5; 5/11+Denotes lead(Pb)-free/RoHS-compliant package.T = Tape and reel.*Note: Gain values are as follows: 20V/V for the T version,50V/V for the F version, and 100V/V for the H version. Current-Sense Amplifier with Voltage OutputPin ConfigurationsOrdering InformationPARTTEMPRANGEPIN-PACKAGETOPMARK MAX4372T EUK+T-40°C to +85°C 5 SOT23ADIU MAX4372TESA+-40°C to +85°C8 SO—MAX4372TEBT+T-40°C to +85°C 3 x 2 UCSP ACXV CC , RS+, RS- to GND .........................................-0.3V to +30V OUT to GND ..........................................................-0.3V to +15V Differential Input Voltage (V RS+ - V RS-) .............................±0.3V Current into Any Pin .........................................................±10mA Continuous Power Dissipation (T A = +70°C)5-Pin SOT23 (derate 3.9mW/°C above +70°C) .......312.6mW 8-Pin SO (derate 7.4mW/°C above +70°C) ..............588.2mW 3 x 2 UCSP (derate 3.4mW/°C above +70°C) .........273.2mWOperating Temperature Range ...........................-40°C to +85°C Storage Temperature Range ............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Soldering Temperature (reflow) .......................................+260°C(V RS+ = 0 to 28V, V CC = 2.7V to 28V, V SENSE = 0V, R LOAD = 1MΩ, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.) (Note 1)Current-Sense Amplifier with Voltage OutputAbsolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Electrical CharacteristicsPARAMETERSYMBOL CONDITIONSMIN TYPMAX UNITS Operating Voltage Range (Note 2)V CC 2.728V Common-Mode Input Range (Note 3)V CMR 028V Common-Mode Rejection CMR V RS+ > 2V85dB Supply Current I CC V RS+ > 2V, V SENSE = 5mV 3060μA Leakage CurrentI RS+, I RS-V CC = 0V, V RS+ = 28V 0.051.2μAInput Bias CurrentI RS+V RS+ > 2V 01μAV RS+ ≤ 2V -25+2I RS-V RS+ > 2V 02V RS+ ≤ 2V-50+2Full-Scale Sense Voltage (Note 4)V SENSEGain = 20V/V or 50V/V 150mV Gain = 100V/V 100Input Offset Voltage (Note 5)V OST A = +25°CV CC = V RS+ = 12V MAX4372_ESA 0.3±0.8mVMAX4372_EUK, _EBT 0.3±1.3T A = T MIN to T MAX V CC = V RS+ = 12VMAX4372_ESA ±1.1MAX4372_EUK, _EBT±1.9Full-Scale Accuracy (Note 5)V SENSE = 100mV, V CC = 12V,V RS+ = 12V, T A = +25°C (Note 7)±0.18±3%Total OUT Voltage Error (Note 6)V SENSE = 100mV, V CC = 12V,V RS+ = 12V (Note 7)±6V SENSE = 100mV, V CC = 28V,V RS+ = 28V (Note 7)±0.15±7V SENSE = 100mV, V CC = 12V,V RS+ = 0.1V (Note 7)±1±28V SENSE = 6.25mV, V CC = 12V,V RS+ = 12V (Note 8)±0.15(V RS+ = 0 to 28V, V CC = 2.7V to 28V, V SENSE = 0V, R LOAD = 1MΩ, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.) (Note 1)Note 1: All devices are 100% production tested at T A = +25°C. All temperature limits are guaranteed by design.Note 2: Guaranteed by PSR test.Note 3: Guaranteed by OUT voltage error test.Note 4: Output voltage is internally clamped not to exceed 12V.Note 5: V OS is extrapolated from the gain accuracy tests.Note 6: Total OUT voltage error is the sum of gain and offset voltage errors.Note 7: Measured at I OUT = -500μA (R LOAD = 4kΩ for gain = 20V/V, R LOAD = 10kΩ for gain = 50V/V, R LOAD = 20kΩ for gain = 100V/V).Note 8: 6.25mV = 1/16 of 100mV full-scale voltage (C/16).Note 9: The device does not reverse phase when overdriven.Current-Sense Amplifier with Voltage OutputElectrical Characteristics (continued)PARAMETERSYMBOL CONDITIONSMINTYP MAXUNITSOUT Low Voltage(MAX4372T, MAX4372F)V OLV CC = 2.7V,V SENSE = -10mV, V RS+ = 28V I OUT = 10μA 2.6mVI OUT = 100μA 965OUT Low Voltage (MAX4372H)V OLV CC = 2.7V,V SENSE = -10mV, V RS+ = 12VI OUT = 10μA 2.6mVI OUT = 100μA965OUT High VoltageV CC - V OHV CC = 2.7V, I OUT = -500μA, V SENSE = 250mV, V RS+ = 28V0.10.25V-3dB Bandwidth BWV RS+ = 12V,V CC = 12V,C LOAD = 10pFV SENSE = 20mV,gain = 20V/V275kHzV SENSE = 20mV,gain = 50V/V 200V SENSE = 20mV,gain = 100V/V 110V SENSE = 6.25mV50GainMAX4372T20V/VMAX4372F 50MAX4372H100Gain AccuracyV SENSE = 20mV to 100mV, V R S + = 12V T A = +25°C ±0.25±2.5%T A = -40°C to +85°C ±5.5OUT Settling Time to 1% of Final ValueGain = 20V/V, V CC = 12V, V RS+ = 12V, C LOAD = 10pFV SENSE = 6.25mV to 100mV20µsV SENSE = 100mV to 6.25mV20Capacitive-Load Stability No sustained oscillations1000pF OUT Output Resistance R OUT V SENSE = 100mV 1.5ΩPower-Supply Rejection PSRV OUT = 2V, V RS+ > 2V7585dB Power-Up Time to 1% of Final ValueV CC = 12V, V RS+ = 12V,V SENSE = 100mV, C LOAD = 10pF 0.5ms Saturation Recovery Time (Note 9)V CC = 12V, V RS+ = 12V, C LOAD = 10pF0.1ms(V CC = 12V, V RS+ = 12V, V SENSE = 100mV, T A = +25°C, unless otherwise noted.)Current-Sense Amplifier with Voltage OutputTypical Operating Characteristics25.027.530.032.535.0SUPPLY CURRENT vs. SUPPLY VOLTAGESUPPLY VOLTAGE (V)S U P P L Y C U R R E N T (µA )121648202428-1.2-0.8-1.0-0.2-0.4-0.60.40.200.6010515202530TOTAL OUTPUT ERROR vs. SUPPLY VOLTAGESUPPLY VOLTAGE (V)O U T P U T E R R O R (%)00.20.40.60.81.01.21.41.610515202530TOTAL OUTPUT ERROR vs. COMMON-MODE VOLTAGECOMMON-MODE VOLTAGE (V)O U T P U T E R R O R (%)510152025303540-401060-153585SUPPLY CURRENT vs. TEMPERATURETEMPERATURE (°C)S U P P L Y C U R R E N T (µA )-1.0-0.50.501.01.5010050150200250300TOTAL OUTPUT ERROR vs. V SENSEV SENSE (mV)O U T P U T E R R O R (%)-1.0-0.9-0.8-0.7-0.6-0.5-0.4-0.3-0.2-0.10GAIN ACCURACY vs. TEMPERATURETEMPERATURE (°C)G A I N A C C U R A C Y (%)-401060-15358528.029.028.530.029.531.531.030.532.0SUPPLY CURRENTvs. COMMON-MODE VOLTAGECOMMON-MODE VOLTAGE (V)S U P P L Y C U R R E N T (µA )-45-90100100k10k 1k POWER-SUPPLY REJECTIONvs. FREQUENCY-75-85-55-65-40-70-80-50-60M A X 4372T t o c 06FREQUENCY (Hz)P S R (d B )-1.0-0.8-0.6-0.4-0.200.20.40.60.81.0-401060-153585TOTAL OUTPUT ERROR vs. TEMPERATURETEMPERATURE (°C)T O T A L O U T P U T E R R O R (%)(V CC = 12V, V RS+ = 12V, V SENSE = 100mV, T A = +25°C, unless otherwise noted.)Current-Sense Amplifier with Voltage OutputTypical Operating Characteristics (continued)V OUTV SENSE600mV200mV30mV10mV MAX4372TSMALL-SIGNAL TRANSIENT RESPONSEMAX4372T toc1020µs/div V OUTV SENSE1V3V50mV 150mV MAX4372TLARGE-SIGNAL TRANSIENT RESPONSEMAX4372T toc1320µs/divV OUTV SENSE 010V0100mV MAX4372HLARGE-SIGNAL TRANSIENT RESPONSE20µs/divMAX4372T toc15V OUTV SENSE2.5V7.5V50mV 150mVMAX4372FLARGE-SIGNAL TRANSIENT RESPONSE20µs/divMAX4372T toc143-81k100k10k1MSMALL-SIGNAL GAIN vs. FREQUENCY-7FREQUENCY (Hz)G A I N (d B)-6-5-4-3-2-1012V OUTV SENSE 1.5V0.5V30mV 10mVMAX4372FSMALL-SIGNAL TRANSIENT RESPONSEMAX4372T toc1120µs/div V OUTV SENSE 3V1V30mV10mV MAX4372HSMALL-SIGNAL TRANSIENT RESPONSEMAX4372T toc1220µs/divDetailed DescriptionThe MAX4372 high-side current-sense amplifier features a 0 to 28V input common-mode range that is indepen-dent of supply voltage. This feature allows the monitoring of current flow out of a battery in deep discharge, and also enables high-side current sensing at voltages far in excess of the supply voltage (V CC).Current flows through the sense resistor, generating a sense voltage (Figure 1. Functional Diagram). Since A1’s inverting input is high impedance, the voltage on the negative terminal equals V IN - V SENSE. A1 forces its positive terminal to match its negative terminal; therefore, the voltage across R G1 (V IN - V1-) equals V SENSE. This creates a current to flow through R G1 equal to V SENSE/ R G1. The transistor and current mirror amplify the current by a factor of β. This makes the current flowing out of the current mirror equal to:I M = β V SENSE/R G1A2’s positive terminal presents high impedance, so this current flows through R GD, with the following result:V2+ = R GD β x V SENSE/R G1R1 and R2 set the closed-loop gain for A2, which ampli-fies V2+, yielding:V OUT = R GD x β x V SENSE/R G1 (1 + R2/R1)The gain of the device equals:OUT SEN G1SE RGD x (1 + R2/R1)V V/Rβ=Applications Information Recommended Component ValuesThe MAX4372 operates over a wide variety of current ranges with different sense resistors. Table 1 lists com-mon resistor values for typical operation of the MAX4372.Choosing R SENSEGiven the gain and maximum load current, select R SENSE such that V OUT does not exceed V CC - 0.25V or 10V. To measure lower currents more accurately, use a high value for R SENSE. A higher value develops a higher sense volt-age, which overcomes offset voltage errors of the internal current amplifier.In applications monitoring very high current, ensure R SENSE is able to dissipate its own I2R losses. If the resistor’s rated power dissipation is exceeded, its value may drift or it may fail altogether, causing a differential voltage across the terminals in excess of the absolute maximum ratings.Figure 1. Functional DiagramCurrent-Sense Amplifier with Voltage OutputPin/Bump DescriptionPIN BUMPNAME FUNCTIONSOT23SO UCSP13A2GND Ground24A3OUT Output Voltage. V OUT is proportional to the magnitude of V SENSE (V RS+ - V RS-).31A1V CC Supply Voltage. Use at least a 0.1μF capacitor to decouple V CC from fast transients.48B1RS+Power Connection to the External Sense Resistor56B3RS-Load-Side Connection to the External Sense Resistor —2, 5, 7—N.C.No Connection. Not internally connected.Using a PC Board Trace as R SENSEIf the cost of R SENSE is an issue and accuracy is not criti-cal, use the alternative solution shown in Figure 2. This solution uses copper PC board traces to create a sense resistor. The resistivity of a 0.1in wide trace of 2oz copper is about 30mΩ/ft. The resistance temperature coefficient of copper is fairly high (approximately 0.4%/°C), so sys-tems that experience a wide temperature variance must compensate for this effect. In addition, self-heating intro-duces a nonlinearity error. Do not exceed the maximum power dissipation of the copper trace.For example, the MAX4372T (with a maximum load cur-rent of 10A and an R SENSE of 5mΩ) creates a full-scale V SENSE of 50mV that yields a maximum V OUT of 1V. R SENSE, in this case, requires about 2in of 0.1in wide copper trace.UCSP Applications InformationFor the latest application details on UCSP construction, dimensions, tape carrier information, printed circuit board techniques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability testing results, go to the Maxim’s website at /ucsp to find the Application Note: UCSP—A Wafer-Level Chip-Scale Package.Figure 2. Connections Showing Use of PC BoardTable 1. Recommended Component ValuesCurrent-Sense Amplifier with Voltage OutputFULL-SCALE LOAD CURRENT,I LOAD (A)CURRENT-SENSERESISTOR,R SENSE (mΩ)GAIN(V/V)FULL-SCALE OUTPUTVOLTAGE (FULL-SCALEV SENSE = 100mV),V OUT (V)0.1100020 2.0 50 5.0 10010.0110020 2.0 50 5.0 10010.052020 2.0 50 5.0 10010.0101020 2.0 50 5.0 10010.0Current-Sense Amplifier with Voltage Output Ordering Information (continued)Pin Configurations (continued)PARTTEMPRANGEPIN-PACKAGETOPMARKMAX4372F EUK+T-40°C to +85°C 5 SOT23ADIV MAX4372FESA+-40°C to +85°C8 SO—MAX4372FEBT+T-40°C to +85°C 3 x 2 UCSP ACX MAX4372H EUK+T-40°C to +85°C 5 SOT23ADIW MAX4372HESA+-40°C to +85°C8 SO—MAX4372HEBT+T-40°C to +85°C 3 x 2 UCSP ACZChip InformationPROCESS: BiCMOS+Denotes lead(Pb)-free/RoHS-compliant package. T = Tape and reel.Current-Sense Amplifier with Voltage Output Package InformationFor the latest package outline information and land patterns (footprints), go to /packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.PACKAGE TYPE PACKAGE CODE OUTLINE ND PATTERN NO.5 SOT23U5+121-005790-01748 SO S8+221-004190-00965 UCSP B6+221-0097—Note: MAX4372_EBT uses package code B6-2.Current-Sense Amplifier with Voltage Output Package Information (continued)For the latest package outline information and land patterns (footprints), go to /packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.Current-Sense Amplifier with Voltage Output Package Information (continued)For the latest package outline information and land patterns (footprints), go to /packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Maxim Integrated │11Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.Current-Sense Amplifier with Voltage Output© 2011 Maxim Integrated Products, Inc. │ 12Revision HistoryREVISIONNUMBERREVISION DATE DESCRIPTION PAGES CHANGED 47/09Updated feature in accordance with actual performance of the product 155/11Updated V RST conditions to synchronize with tested material and addedlead-free designation 1–3, 8For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at .。

Evaluates: MAX16826MAX16826 Evaluation KitGeneral DescriptionThe MAX16826 evaluation kit (EV kit) provides a proven design to evaluate the MAX16826, a four-string, I 2C programmable high-brightness LED (HB LED) driver with PWM dimming control. The EV kit also includes Windows ® 2000/XP/Vista ®-compatible software that pro-vides a simple graphical user interface (GUI) for exercis-ing the features of the MAX16826. The MAX16826 EV kit PCB comes with a MAX16826ATJ+ installed. The EV kit is configured in a boost application.This EV kit can be modified by changing component val -ues on the board for other configurations (including RGB LED applications). Refer to the MAX16826 IC data sheet for more information.Features●Four Independently Controllable LED Strings ●7 LEDs Per String Configuration●Independently Programmable 50mA to 150mAString Current●7.5V to 22V Input Voltage●Can Withstand Automotive Load Dump Up to 40Vfor 400ms●0% to 100% DIM Duty Cycle Range ●Shorted LED Protection and Detection ●Open LED String Detection●Adaptive Boost-Stage Voltage Optimization●Convenient Breakaway LED Driver Board EasilyAdaptable to End Application ●Low Mechanical Profile●Windows 2000/XP/Vista (32-Bit)-Compatible Software ●USB-PC Interface●USB-to-I 2C On-Board Circuitry ●Fully Assembled and Tested ●Lead-Free and RoHS Compliant19-4271; Rev 1; 12/20Windows and Windows Vista are registered trademarks of Microsoft Corp.+Denotes lead-free and RoHS compliant.#Denotes RoHS compliant.PARAMETERDESCRIPTION Configuration 7 white LEDs/stringNumber of Strings4 strings LED Current Adjustment Range 50mA to 150mATotal Maximum LED Power 16.8W V IN (min)7.5V V IN (max)22V Load Dump40V for < 400ms Nominal Boost Voltage Adjustment Range22.4V to 32VNominal OVP Trip Threshold 35V Boost Stage Switching Frequency350kHzPARTTYPE MAX16826EVKIT+EV Kit MAX16826EVKIT#EV KitDESIGNATION QTY DESCRIPTIONC1, C2, C3, C5–C8, C12, C15,C17, C23, C2412100nF ±10%, 16V X7R ceramic capacitors (0603)TDK C1608X7R1C104K C9133nF ±10%, 50V X7R ceramic capacitor (0603)TDK C1608X7R1H333K C10, C11222pF ±5%, 50V C0G ceramic capacitors (0603)TDK C1608C0G1H220J C13, C14,C18–C2161μF ±10%, 16V X7R ceramic capacitors (0603)TDK C1608X7R1C105K C16, C25210μF ±10%, 10V X5R ceramic capacitors (1210)Murata GRM32FR61A106KDESIGNATION QTY DESCRIPTIONC26, C28210μF ±20%, 50V X5R ceramic capacitors (2220)Murata GRM55DR61H106K C27110μF ±20%, 50V X7S ceramic capacitor (1210)Taiyo Yuden UMK325BJ106MM-T C2912.2nF ±5%, 50V C0G ceramic capacitor (0603)Murata GRM1885C1H222K C3011μF ±10%, 50V X7R ceramic capacitor (1210)Murata GRM32RR71H105K C3214.7μF ±10%, 6.3V X5R ceramic capacitor (0603)Murata GRM188R60J475KLED Driver Board SpecificationOrdering InformationComponent ListClick here to ask about the production status of specific part numbers.DESIGNATION QTY DESCRIPTIONC3312200pF ±10%, 50V X7R ceramic capacitor (0402)Murata GRM155R71H222KC34, C35247μF ±20%, 50V electrolytic capacitorsPanasonic EEE-FK1H470XPC36, C370Not installed, capacitors (0603)C3811000pF ±5%, 50V C0G ceramic capacitor (0402)Murata GRM1555C1H102JA01DC391220pF ±5%, 50V C0G ceramic capacitor (0402)Murata GRM1555C1H221JC401100pF ±5%, 50V C0G ceramic capacitor (0402)Murata GRM1555C1H101JC41–C4440.01μF ±10%, 50V X7R ceramic capacitors (0402)Murata GRM155R71H103KC450Not installed, capacitor (0402)D1160V, 1A Schottky diode (SMB) Diodes, Inc. B160B-13-FJ11USB series-B right-angle PC-mount receptacleJ2, J30Not installed JU2–JU873-pin headersL11Ferrite bead (0603) TDK MMZ1608R301AL2122μH ±20%, 5A, 52mΩ inductor Coilcraft MSS1260-223MlLED11Red LED (0603) Panasonic LNJ208R8ARAP1, P22Connectors, FFC/FPC 18-pos, 1mm P31Connector, FFC/FPC 6-pos, 1mmQ1140V, 9A, 2.5W n-channel MOSFET (8 SO)International Rectifier IRF7469Q2–Q5455V, 1.9A, 160mΩ n-channel MOSFET s (SOT223) International Rectifier IRFL014NPbFR11220Ω ±5% resistor (0603)R21 2.2kΩ ±5% resistor (0603)R3, R9, R103 1.5kΩ ±5% resistors (0603) R4, R5227Ω ±5% resistors (0603)R61470Ω ±5% resistor (0603)R71100kΩ ±5% resistor (0603)R817.5kΩ ±1% resistor (0603)R11168Ω ±1%, 0.25W resistor (1206)DESIGNATION QTY DESCRIPTION R1210.04Ω ±1%, 0.5W sense resistor(2010)Vishay/Dale WSL2010R0400FEA R131215kΩ ±1% resistor (0402) R14, R16210kΩ ±1% resistors (0402) R151249kΩ ±1% resistor (0402)R171 1.27kΩ ±1% resistor (0603)R181182kΩ ±1% resistor (0603)R1912kΩ ±1% resistor (0402) R20, R22,R24, R264100kΩ ±1% resistors (0402) R21, R23,R25, R27416.5kΩ ±1% resistors (0402) R28–R3142.2Ω ±1%, 100mW sense resistors(0603)Panasonic ECG ERJ-3RQF2R2V R32, R3320Ω ±5% resistors (0603)R34–R3740Ω ±5% resistors (0402)R38112.1Ω ±1% resistor (0805)R391470Ω ±5% resistor (0402)R40110kΩ ±5% resistor (0603) R41–R444237kΩ ±1% resistors (0603) U11LED driver (32 TQFN)Maxim MAX16826ATJ+ U2, U82Microcontrollers (68 QFN-EP*)Maxim MAXQ2000-RAX+ U31UART-to-USB converter (32 TQFP)FTDI FT232BLU4193C46A 3-wire EEPROM (8 SO)Atmel AT93C46A-10SU-2.7 U51p-channel MOSFET power switch(8 SO)Maxim MAX890LESA+U61LDO regulator (5 SC70)Maxim MAX8511EXK25+T U71LDO regulator (5 SC70)Maxim MAX8511EXK33+T Y1120MHz crystal oscillatorY216MHz crystalHong Kong X’talsSSL6000000E18FAF—1Cable, flat flex 18-position, 1mm, 5in—7Shunts—1USB high-speed A-to-B cable,5ft (1.5m)—1PCB: MAX16828 Evaluation Kit+Component List (continued)*Exposed pad.Quick StartRecommended EquipmentBefore beginning, the following equipment is needed: ●MAX16826 EV kit (USB cable included)● A user-supplied Windows 2000/XP/Vista PC with a spare USB port●7V to 24V, 5A DC power supply●Four strings of white LEDs (7 LEDs/string)Note: In the following sections, software-related items are identified by bolding. Text in bold refers to items directly from the EV kit software. Text in bold and underlined refers to items from the Windows operating systemProcedureThe MAX16826 EV kit is fully assembled and tested. Follow the steps below to verify board operation:1) Visit /evkitsoftware to down-load the latest version of the EV kit software,16826Rxx.ZIP (xx in the filename denotes the soft -ware version number). Save the EV kit software to a temporary folder and uncompress the ZIP file.2) Install the EV kit software on your computer by run -ning the INSTALL.EXE program inside the temporary folder. The program files are copied and icons are created in the Windows Start | Programs menu.3) Verify that all jumpers (JU2–JU8) are in their defaultpositions, as shown in Table 1.4) Connect the USB cable from the PC to the EV kitboard. A New Hardware Found window pops up when installing the USB driver for the first time. If you do not see a window that is similar to the one described above after 30 seconds, remove the USB cable from the board and reconnect it. Administra-tor privileges are required to install the USB device driver on Windows.5) Follow the directions of the Add New HardwareWizard to install the USB device driver. Choose the Search for the best driver for your device option. Specify the location of the device driver to be C:\Program Files\MAX16826 (default installation direc-tory) using the Browse button. During device driver installation, Windows may show a warning message indicating that the device driver Maxim uses does not contain a digital signature. This is not an error condi-tion and it is safe to proceed with installation. Refer to the USB_Driver_Help.PDF document included with the software for additional information.6) Set the output of the power supply to 12V. Turn offthe power supply.7) Connect the positive terminal of the power supply tothe VIN pad of the LED driver board.Note: Indicate that you are using the MAX16826 when contacting these component suppliers.SUPPLIERPHONE WEBSITECoilcraft, Diodes, Inc.Hong Kong X’tals Ltd.852-******** International RectifierMurata Electronics North America, Panasonic Taiyo Yuden TDK Vishay/Dale402-563-6866FILE DESCRIPTIONINSTALL.EXE Installs the EV kit files on your computerMAX16826.EXE Application program FTDIBUS.INF USB device driver file FTDIPORT.INF VCP device driver file UNINST.INI Uninstalls the EV kit software USB_Driver_Help.PDFUSB driver installation help fileComponent SuppliersMAX16826 EV Kit Files8) Connect the negative terminal of the power supply tothe PGND pad of the LED driver board.9) Ensure that the supplied ribbon cable is firmly con -nected to the P1 and P2 connectors.10) Connect the anode ends of the LED strings to theP3-1 pin of the P3 connector.11) Connect the cathode ends of the LED strings to theP3-2 to P3-5 pins of the P3 connector.12) Turn on the power supply13) Start the MAX16826 EV kit software by opening itsicon in the Start | Programs menu. The EV kit soft-ware main window appears, as shown in Figure 1.14) Press the Start button to start the LED driver.15) Verify that all of the LEDs are lit.Table 1. MAX16826 EV Kit Jumper Descriptions (JU2–JU8)*Default position.JUMPER SHUNT POSITIONDESCRIPTIONJU21-2*On-board PWM signal for Ch12-3Connect user-supplied PWM signal for Ch1 to the on-board DIM1 pad JU31-2*On-board PWM signal for Ch22-3Connect user-supplied PWM signal for Ch2 to the on-board DIM2 pad JU41-2*MAX16826 SDA signal connected to on-board microcontroller 2-3Connect user-supplied SDA signal to the on-board SDA pad JU51-2*MAX16826 SCL signal connected to on-board microcontroller 2-3Connect user-supplied SCL signal to the on-board SCL pad JU61-2*MAX16826 SYNC/EN signal connected to on-board microcontroller 2-3Connect user-supplied SYNC/EN signal to the on-board SYNC/EN pad JU71-2*On-board PWM signal for Ch32-3Connect user-supplied PWM signal for Ch3 to the on-board DIM3 pad JU81-2*On-board PWM signal for Ch42-3Connect user-supplied PWM signal for Ch4 to the on-board DIM4 padDetailed Description of SoftwareThe MAX16826 evaluation kit software has all the functions to evaluate the MAX16826 IC. To start the MAX16826 EV kit software, click Start | Programs | Maxim MAX16826 Evaluation Kit | Maxim MAX16826 Evaluation Kit that is created during installation. The GUI main window appears as shown in Figure 1.Figure 1. MAX16826 EV Kit Software Main WindowString Current SetThe String Current Set group box is located at the upperleft corner of the main window. Use the scrollbars toadjust the current of the LED strings. The correspondingvalues of the current will be shown in the adjacent editboxes. Press the Read button to read the values from thelinear regulator output registers of the MAX16826. Theequivalent values of the output current will be shown inthe edit boxes.Boost Output ControlThe Boost Output Control Mode group box has thefunctions to control the boost output voltage.To control the boost output voltage manually, click on theradio button next to the Manual Control group box. Usethe scrollbar to adjust the output voltage, and the volt-age value will be displayed in the adjacent edit box. Theactual boost output voltage can be seen in the Read BackValues group box.To use the software automatic control, click on the radiobutton next to the Software Control group box. The editbox next to the Set button is used to change the Drain toGND regulated voltage of the current sink FETs on the LEDstring with the highest voltage drop. This voltage setting willdepend on how much overhead the user is willing to have.If the set value is too low, the LED currents will no longerbe well regulated and may indeed drop because the boostvoltage might fall too low. The scrollbar in this mode willmove automatically to compensate and regulate the outputvoltage. The update rate is approximately once per second.In any case, the channel with the lowest voltage across thesink FET will be regulated to the value in the edit box. DIM Pulse Width Modulation (DPWM)The DPWM group box is located at the center of the mainwindow. The four DIM PWM signals generated by theon-board MAXQ2000 microcontrollers are used to controlthe brightness of the LEDs. Adjust the scrollbars in theDPWM Duty Cycle group box to change the duty cycles of the PWM signals and the values of the duty cycle (%)are shown in the adjacent edit boxes. Check the Set AllChannels to 100% Duty Cycle checkbox to force all channel duty cycles to 100%.In the DPWM Frequency group box, change the DPWMfrequency by adjusting the scrollbar position and pressthe Set button. The frequency value will be shown in theedit box.To guarantee that the leading edge of all the DIM signalsare synchronized, press the Set button in the DPWMFrequency group box.Press the Start button to start to generate the PWM signals.Press the Stop button to stop all PWM signals.StatusThe Status group box is located at the right of the main window. The software reads the external FET drain voltage measurements, and the boost output voltage measurement from the ADC output registers of the MAX16826. The software multiplies the measured values by the appropriate scaling factor and then displays them in the Read Back Values group box.Enter the values into the edit boxes in the Fault Level Set group box to set the fault-detection values. When the value in the Read Back Values group box is less than the fault-detection value, then the color of the read-back value changes to dark green. When the read-back value is 0 to 10% higher than the fault-detection value, the read-back value turns a lime color. If the read-back value is more than 10% higher than the fault-detection value, then the read-back value turns purple. The read-back value turns red when it is more than 20% higher than the fault-detection value.The software also reads the fault register to detect the fault conditions. If a fault condition exists, it will be shown in the String Fault Status group box. See Table 2 for the fault-condition explanations.Press the Read button to update the Status group box. By checking the Automatic Read checkbox, the Status group box will be automatically updated every second. Enable/DisableThe Enable/Disable group box controls the signal on the SYNC/EN pin. Click on the Enable radio button to set the signal high and enable the MAX16826. Click on the Disable radio button to set the signal low and disable the MAX16826.StandbyCheck the Standby checkbox to set the MAX16826 to standby mode. Refer to the MAX16826 IC data sheet for more information regarding standby mode.Table 2. Fault Conditions*Open LED string detection may require multiple flag examination. FAULT NAME CONDITIONTOADC conversion timeout; alsocorresponds to open string condition* Open LED string openShort LED string shortedOVP OvervoltageScaling FactorsThe calculations for the LED string current, boost output voltage, and the read-back values are based on the scal-ing factors. You can change the scaling factor by select-ing the Scaling Factor menu item under the Scaling Factors menu bar. In the pop-up window shown in Figure 2, enter the appropriate scaling factor.See Table 3 for the formulas for the scaling factors. These values can be used for calibration against actual read values with external instruments.When the default values are changed, they are stored in the software. Re-enter the default values to bring the software back to the default setting.Table 3. Scaling FactorFigure 2. Scaling Factor WindowSCALING FACTOR FORMULADEFAULTVALUE DR1 (ADC read-back voltageacross Drain and GND for thesink FET on Ch1)1 + (R20/R21)7.046DR2 (ADC read-back voltageacross Drain and GND for thesink FET on Ch2)1 + (R22/R23)7.046DR3 (ADC read-back voltageacross Drain and GND for thesink FET on Ch3)1 + (R24/R25)7.046DR4 (ADC read-back voltageacross Drain and GND for thesink FET on Ch4)1 + (R26/R27)7.046Read Back VBoost (ADC read-back boost output voltage)1 + (R15/R16)25.900 String Current Set Ch1 (LEDstring current for Ch1)R31 2.200 String Current Set Ch2 (LEDstring current for Ch2)R30 2.200 String Current Set Ch3 (LEDstring current for Ch3)R29 2.200 String Current Set Ch4 (LEDstring current for Ch4)R28 2.200 VBoost (Boost output voltage) 1 + (R13/R14)22.500Detailed Description of HardwareThe MAX16826 EV kit board provides a proven layout for evaluating the MAX16826 IC. This EV kit consists of a controller board and an LED driver board. The break-away slots at the center of the EV kit make it easier for the user to break and separate the controller board from the LED driver board. This is done so that once the evaluation is complete with the included software, the driver board can easily be used in the target application environment with the target system microcontroller.To connect the power, ground, PWM, and the I2C inter-face signals of the boards, attach the ribbon cable to the P1 connector of the controller board and attach the other end of the ribbon cable to the P2 connector of the LED driver board.Controller BoardThe controller board acts as the bridge between the soft-ware in the PC and the actual LED driver board containing the MAX16826. In addition to the USB connectivity, it gen-erates the four adjustable PWM DIM signals that control the brightness of the LEDs. The controller board com-municates with the driver board through the I2C interface, and is able to read or change the values of the registers in the MAX16826.The user can use the MAX16826 evaluation kit software to control the controller board.See Table 1 to control the MAX16826 with a user-supplied PWM signal.LED Driver BoardThe LED driver board is able to drive up to four LED strings (7 LEDs/string). LED strings can be connected to the LED driver board through the P3 connector by using a ribbon cable. Connect all of the anode ends of the LED strings to the P3-1 pin (which connects to the boost out-put) of the P3 connector. Then connect the cathode ends of the LED strings to the P3-2 to P3-5 pins (that connects to the drains of the sink FETs) of the P3 connector. User-Supplied I2C InterfaceTo use the MAX16826 EV kit with a user-supplied I2C interface, install the shunts on pins 2-3 of JU4 and JU5. Connect SDA, SCL, and GND lines from the usersupplied I2C interface to the SDA, SCL, and PGND pads on the MAX16826 controller board.After the LED driver board has broken away from the controller board, the user may connect their supplied I2C, DIM, and power signals to the LED driver board through the P2 connector using a ribbon cable. See Table 4 for the pin description of the P2 connector.Table 4. Pin Description for P2 Connector PIN NUMBER DESCRIPTIONP2-1 to P2-5Connect to the VIN pin of the MAX16826 P2-6Not connectedP2-7 to P2-11Connect to the groundP2-12Connects to the SYNC/EN pin of theMAX16826P2-13Connects to the SDA pin of the MAX16826P2-14Connects to the SCL pin of the MAX16826P2-15Connects to the DIM4 pin of the MAX16826P2-16Connects to the DIM3 pin of the MAX16826P2-17Connects to the DIM2 pin of the MAX16826P2-18Connects to the DIM1 pin of the MAX16826Figure 3. MAX16826 EV Kit LED Driver Board SchematicFigure 4a. MAX16826 EV Kit Controller Board Schematic (Sheet 1 of 2)Figure 4b. MAX16826 EV Kit Controller Board Schematic (Sheet 2 of 2)Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time.REVISIONNUMBERREVISION DATE DESCRIPTION PAGES CHANGED 009/08Initial release —112/20Updated Ordering Information 1Revision HistoryFor pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https:///en/storefront/storefront.html.。

An exclusive-OR gate has many applications,some of which can be represented better by alternative logic symbols.=1EXCLUSIVE ORThese are five equivalent exclusive-OR symbols valid for an SN74AHC1G86gate in positive logic;negation may be shown at any twoports.=2k2k +1LOGIC-IDENTITY ELEMENTEVEN-PARITY ELEMENTODD-PARITY ELEMENTThe output is active (low)if all inputs stand at the same logic level (that is,A = B).The output is active (low)if an even number of inputs (that is,0 or 2) are active.The output is active (high)if an odd number of inputs (that is,only 1of the2)areactive.Product FolderSample &BuyTechnical Documents Tools &SoftwareSupport &CommunitySN74AHC1G86SCLS323N –MARCH 1996–REVISED DECEMBER 2014SN74AHC1G86Single 2-Input Exclusive-OR Gate1Features2Applications•Operating Range of 2V to 5.5V •Cameras•Max t pd of 8ns at 5V•Programmable Logic Controllers •Low Power Consumption,10-µA Max I CC •Telecom Infrastructure •±8-mA Output Drive at 5V•Wireless Headsets•Schmitt-Trigger Action at All Inputs Makes the •Motor Drives and Controls Circuit Tolerant for Slower Input Rise and Fall •TVsTime•Set-top-boxes •Latch-Up Performance Exceeds 250mA •AudioPer JESD 17•ESD Protection Exceeds JESD 223Description–2000-V Human-Body Model The SN74AHC1G86is a single 2-input exclusive-OR gate.The device performs the Boolean function Y =A –200-V Machine Model×B or Y =+in positive logic.–1000-V Charged-Device ModelDevice Information (1)PART NUMBER PACKAGE BODY SIZE (NOM)SOT-23(5) 2.90mm x 1.60mm SN74AHC1G86SC-70(5) 2.00mm x 1.30mm SOT-553(5)1.65mm x 1.20mm(1)For all available packages,see the orderable addendum atthe end of the data sheet.4Simplified SchematicAn IMPORTANT NOTICE at the end of this data sheet addresses availability,warranty,changes,use in safety-critical applications,intellectual property matters and other important disclaimers.PRODUCTION DATA.SN74AHC1G86SCLS323N–MARCH1996–REVISED Table of Contents1Features..................................................................19Detailed Description. (8)9.1Overview (8)2Applications (1)9.2Functional Block Diagram (8)3Description (1)9.3Feature Description (8)4Simplified Schematic (1)9.4Device Functional Modes (8)5Revision History (2)10Application and Implementation (9)6Pin Configuration and Functions (3)10.1Application Information (9)7Specifications (4)10.2Typical Application (9)7.1Absolute Maximum Ratings (4)11Power Supply Recommendations (10)7.2ESD Ratings (4)12Layout (11)7.3Recommended Operating Conditions (4)12.1Layout Guidelines (11)7.4Thermal Information (5)12.2Layout Example (11)7.5Electrical Characteristics (5)13Device and Documentation Support (11)7.6Switching Characteristics,V CC=3.3V±0.3V (5)13.1Trademarks (11)7.7Switching Characteristics,V CC=5V±0.5V (5)13.2Electrostatic Discharge Caution (11)7.8Operating Characteristics (6)13.3Glossary (11)7.9Typical Characteristics (6)14Mechanical,Packaging,and Orderable 8Parameter Measurement Information (7)Information (11)5Revision HistoryChanges from Revision M(June2005)to Revision N Page •Added Applications,Device Information table,Pin Functions table,ESD Ratings table,Thermal Information table, Typical Characteristics,Feature Description section,Device Functional Modes,Application and Implementationsection,Power Supply Recommendations section,Layout section,Device and Documentation Support section,and Mechanical,Packaging,and Orderable Information section (1)•Deleted Ordering Information table (1)•Changed MAX operating temperature to125°C in Recommended Operating Conditions table (4)2Submit Documentation Feedback Copyright©1996–2014,Texas Instruments IncorporatedProduct Folder Links:SN74AHC1G86A V CCYBGNDDBV PACKAGE (TOP VIEW)DCK PACKAGE (TOPVIEW)A V CCYB GNDA V CC YB GNDDRL PACKAGE (TOP VIEW)See mechanical drawings for dimensions.SN74AHC1G86SCLS323N –MARCH 1996–REVISED DECEMBER 20146Pin Configuration and FunctionsPin FunctionsPINTYPE DESCRIPTION 1A I Input A 2B I Input B 3GND —Ground Pin 4Y O Output Y 5V CC—Power PinCopyright ©1996–2014,Texas Instruments Incorporated Submit Documentation Feedback3Product Folder Links:SN74AHC1G86SN74AHC1G86SCLS323N–MARCH1996–REVISED 7Specifications7.1Absolute Maximum Ratings(1)over operating free-air temperature range(unless otherwise noted)MIN MAX UNITV CC Supply voltage range–0.57VV I Input voltage range(2)–0.57VV O Output voltage range(2)–0.5V CC+0.5VI IK Input clamp current V I<0–20mAI OK Output clamp current V O<0or V O>V CC±20mAI O Continuous output current V O=0to V CC±25mAContinuous channel current through V CC or GND±50mAT stg Storage temperature range–65150°C (1)Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input and output voltage ratings may be exceeded if the input and output current ratings are observed.7.2ESD RatingsVALUE UNITHuman body model(HBM),per ANSI/ESDA/JEDEC JS-001,all pins(1)2000V(ESD)Electrostatic discharge VCharged device model(CDM),per JEDEC specification JESD22-C101,1000all pins(2)(1)JEDEC document JEP155states that500-V HBM allows safe manufacturing with a standard ESD control process.(2)JEDEC document JEP157states that250-V CDM allows safe manufacturing with a standard ESD control process.7.3Recommended Operating Conditionsover operating free-air temperature range(unless otherwise noted)(1)MIN MAX UNIT V CC Supply voltage2 5.5VV CC=2V 1.5V IH High-level input voltage V CC=3V 2.1VV CC=5.5V 3.85V CC=2V0.5V IL Low-level input voltage V CC=3V0.9VV CC=5.5V 1.65V I Input voltage0 5.5VV O Output voltage0V CC VV CC=2V–50µAI OH High-level output current V CC=3.3V±0.3V–4mAV CC=5V±0.5V–8V CC=2V50µAI OL Low-level output current V CC=3.3V±0.3V4mAV CC=5V±0.5V8V CC=3.3V±0.3V100∆t/∆v Input transition rise or fall rate ns/VV CC=5V±0.5V20T A Operating free-air temperature–40125°C (1)All unused inputs of the device must be held at V CC or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs(SCBA004).4Submit Documentation Feedback Copyright©1996–2014,Texas Instruments IncorporatedProduct Folder Links:SN74AHC1G86SN74AHC1G86 SCLS323N–MARCH1996–REVISED DECEMBER20147.4Thermal InformationSN74AHC1G86THERMAL METRIC(1)DBV DCK DRL UNIT5PINSRθJA Junction-to-ambient thermal resistance231.3287.6328.7RθJC(top)Junction-to-case(top)thermal resistance119.997.7105.1RθJB Junction-to-board thermal resistance60.665.150.3°C/WψJT Junction-to-top characterization parameter17.8 2.0 6.9ψJB Junction-to-board characterization parameter60.164.2148.4(1)For more information about traditional and new thermal metrics,see the IC Package Thermal Metrics application report(SPRA953).7.5Electrical Characteristicsover recommended operating free-air temperature range(unless otherwise noted)T A=25°C–40°C to85°C–40°C to125°C PARAMETER TEST CONDITIONS V CC UNITMIN TYP MAX MIN MAX MIN MAX2V 1.92 1.9 1.9I OH=–50µA3V 2.93 2.9 2.9V OH 4.5V 4.4 4.5 4.4 4.4VI OH=–4mA3V 2.58 2.48 2.48I OH=–8mA 4.5V 3.94 3.8 3.82V0.10.10.1I OL=50µA3V0.10.10.1V OL 4.5V0.10.10.1VI OL=4mA3V0.360.440.44I OL=8mA 4.5V0.360.440.440V toI I V I=5.5V or GND±0.1±1±1µA5.5VI CC V I=V CC or GND,I O=0 5.5V11010µAC i V I=V CC or GND5V4101010pF7.6Switching Characteristics,V CC=3.3V±0.3Vover recommended operating free-air temperature range(unless otherwise noted)(see Figure3)FROM TO T A=25°C–40°C to85°C–40°C to125°CLOADPARAMETER UNIT (INPUT)(OUTPUT)CAPACITANCE MIN TYP MAX MIN MAX MIN MAXt PLH711113114A orB YC L=15pF nst PHL711113114t PLH9.514.5116.5117.5A orB YC L=50pF nst PHL9.514.5116.5117.57.7Switching Characteristics,V CC=5V±0.5Vover recommended operating free-air temperature range(unless otherwise noted)(see Figure3)FROM TO T A=25°C–40°C to85°C–40°C to125°CLOADPARAMETER UNIT (INPUT)(OUTPUT)CAPACITANCE MIN TYP MAX MIN MAX MIN MAXt PLH 4.8 6.81818.6A orB YC L=15pF nst PHL 4.8 6.81818.6t PLH 6.38.8110111A orB YC L=50pF nst PHL 6.38.8110111Copyright©1996–2014,Texas Instruments Incorporated Submit Documentation Feedback5Product Folder Links:SN74AHC1G86SN74AHC1G86SCLS323N–MARCH1996–REVISED 7.8Operating CharacteristicsV CC=5V,T A=25°CPARAMETER TEST CONDITIONS TYP UNITC pd Power dissipation capacitance No load,f=1MHz18pF7.9Typical Characteristics6Submit Documentation Feedback Copyright©1996–2014,Texas Instruments IncorporatedProduct Folder Links:SN74AHC1G86V CCV CC0V0VVOLTAGE WAVEFORMSSETUP AND HOLD TIMESData InputInputOut-of-PhaseOutputIn-PhaseOutputTiming InputVOLTAGE WAVEFORMSPROPAGATION DELAY TIMESINVERTINGAND NONINVERTING OUTPUTSOutputControlOutputWaveform1S1at V CC(see NoteB)OutputWaveform2S1at GND(see Note B)V OLV OH≈V CC0V≈0VV CCVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESLOW-AND HIGH-LEVEL ENABLINGt PLH/t PHLt PLZ/t PZLt PHZ/t PZHOpen DrainOpenV CCGNDV CCTEST S1V CC0VVOLTAGE WAVEFORMSPULSE DURATIONInputNOTES: A.C L includes probe and jig capacitance.B.Waveform1is for an output with internal conditions such that the output is low,except when disabled by the output control.Waveform2is for an output with internal conditions such that the output is high,except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics:PRR≤1MHz,Z O=50Ω, t r≤3ns,t f≤3ns.D.The outputs are measured one at a time,with one input transition per measurement.From OutputUnder Test(seeLOAD CIRCUIT FOR3-STATE AND OPEN-DRAIN OUTPUTSFrom OutputUnder Test(seeLOAD CIRCUIT FORTOTEM-POLE OUTPUTSOpenSN74AHC1G86 SCLS323N–MARCH1996–REVISED DECEMBER2014 8Parameter Measurement InformationFigure3.Load Circuit and Voltage WaveformsCopyright©1996–2014,Texas Instruments Incorporated Submit Documentation Feedback7Product Folder Links:SN74AHC1G86An exclusive-OR gate has many applications,some of which can be represented better by alternative logic symbols.=1EXCLUSIVE ORThese are five equivalent exclusive-OR symbols valid for an SN74AHC1G86gate in positive logic;negation may be shown at any twoports.=2k2k +1LOGIC-IDENTITY ELEMENTEVEN-PARITY ELEMENTODD-PARITY ELEMENTThe output is active (low)if all inputs stand at the same logic level (that is,A = B).The output is active (low)if an even number of inputs (that is,0 or 2) are active.The output is active (high)if an odd number of inputs (that is,only 1of the 2)are active.SN74AHC1G86SCLS323N –MARCH 1996–REVISED DECEMBER 20149Detailed Description9.1OverviewThe SN74AHC1G86is a single 2-input exclusive-OR gate.The device performs the Boolean function Y =A ×B or Y =AB +AB in positive logic.A common application is as a true or complementary element.If one of the inputs is low,the other input is reproduced in true form at the output.If one of the inputs is high,the signal on the other input is reproduced inverted at the output.9.2Functional Block DiagramFigure 4.Exclusive-OR Logic9.3Feature Description•Wide operating voltage range –Operates from 2V to 5.5V •Allows down-voltage translation –Inputs accept voltages to 5.5V•The low drive and slow edge rates will minimize overshoot and undershoot on the outputs9.4Device Functional ModesTable 1.Function TableINPUTS OUTPUTYA B L L L L H H H L H HHL8Submit Documentation FeedbackCopyright ©1996–2014,Texas Instruments IncorporatedProduct Folder Links:SN74AHC1G86SN74AHC1G86 SCLS323N–MARCH1996–REVISED DECEMBER201410Application and ImplementationNOTEInformation in the following applications sections is not part of the TI componentspecification,and TI does not warrant its accuracy or completeness.TI’s customers areresponsible for determining suitability of components for their purposes.Customers shouldvalidate and test their design implementation to confirm system functionality.10.1Application InformationSN74AHCT1G125is a low-drive CMOS device that can be used for a multitude of bus interface type applications where output ringing is a concern.The low drive and slow edge rates will minimize overshoot and undershoot on the outputs.The inputs can accept voltages to5.5V at any valid V CC making it Ideal for down translation.10.2Typical ApplicationFigure5.Typical Application Schematic10.2.1Design RequirementsThis device uses CMOS technology and has balanced output drive.Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits.The high drive will also create fast edges into light loads,so routing and load conditions should be considered to prevent ringing.10.2.2Detailed Design Procedure1.Recommended Input Conditions–For rise time and fall time specifications,seeΔt/ΔV in the Recommended Operating Conditions table.–For specified High and low levels,see V IH and V IL in the Recommended Operating Conditions table.–Inputs are overvoltage tolerant allowing them to go as high as5.5V at any valid V CC.2.Recommend Output Conditions–Load currents should not exceed25mA per output and50mA total for the part.–Outputs should not be pulled above V CC.Copyright©1996–2014,Texas Instruments Incorporated Submit Documentation Feedback9Product Folder Links:SN74AHC1G86SN74AHC1G86SCLS323N–MARCH1996–REVISED Typical Application(continued)10.2.3Application CurvesFigure6.Switching Characteristics Comparison11Power Supply RecommendationsThe power supply can be any voltage between the MIN and MAX supply voltage rating located in the Recommended Operating Conditions table.Each V CC pin should have a good bypass capacitor to prevent power disturbance.For devices with a single supply,0.1μF is recommended.If there are multiple V CC pins,0.01μF or0.022μF is recommended for each power pin.It is acceptable to parallel multiple bypass caps to reject different frequencies of noise.A0.1μF and 1μF are commonly used in parallel.The bypass capacitor should be installed as close to the power pin as possible for best results.10Submit Documentation Feedback Copyright©1996–2014,Texas Instruments IncorporatedProduct Folder Links:SN74AHC1G86V ccInputOutputInputOutputSN74AHC1G86 SCLS323N–MARCH1996–REVISED DECEMBER201412Layout12.1Layout GuidelinesWhen using multiple bit logic devices,inputs should not float.In many cases,functions or parts of functions of digital logic devices are unused.Some examples are when only two inputs of a triple-input AND gate are used, or when only3of the4-buffer gates are used.Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states.Specified in Figure7are rules that must be observed under all circumstances.All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating.The logic level that should be applied to any particular unused input depends on the function of the device.Generally they will be tied to GND or V CC,whichever makes more sense or is more convenient.It is acceptable to float outputs unless the part is a transceiver.If the transceiver has an output enable pin,it will disable the outputs section of the part when asserted.This will not disable the input section of the I/Os so they also cannot float when disabled.12.2Layout Exampleyout Diagram13Device and Documentation Support13.1TrademarksAll trademarks are the property of their respective owners.13.2Electrostatic Discharge CautionThese devices have limited built-in ESD protection.The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.13.3GlossarySLYZ022—TI Glossary.This glossary lists and explains terms,acronyms,and definitions.14Mechanical,Packaging,and Orderable InformationThe following pages include mechanical,packaging,and orderable information.This information is the most current data available for the designated devices.This data is subject to change without notice and revision of this document.For browser-based versions of this data sheet,refer to the left-hand navigation.PACKAGING INFORMATION(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free".RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement.(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.Addendum-Page 1(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF SN74AHC1G86 :•Automotive: SN74AHC1G86-Q1•Enhanced Product: SN74AHC1G86-EPNOTE: Qualified Version Definitions:•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects•Enhanced Product - Supports Defense, Aerospace and Medical ApplicationsAddendum-Page 2TAPE AND REEL INFORMATION*All dimensions are nominal Device Package Type Package DrawingPinsSPQ Reel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74AHC1G86DBVR SOT-23DBV 53000180.08.4 3.23 3.17 1.37 4.08.0Q3SN74AHC1G86DBVR SOT-23DBV 53000178.09.2 3.3 3.23 1.55 4.08.0Q3SN74AHC1G86DBVR SOT-23DBV 53000178.09.0 3.3 3.2 1.4 4.08.0Q3SN74AHC1G86DBVRG4SOT-23DBV 53000178.09.0 3.23 3.17 1.37 4.08.0Q3SN74AHC1G86DBVT SOT-23DBV 5250178.09.2 3.3 3.23 1.55 4.08.0Q3SN74AHC1G86DBVT SOT-23DBV 5250180.08.4 3.23 3.17 1.37 4.08.0Q3SN74AHC1G86DBVT SOT-23DBV 5250178.09.0 3.23 3.17 1.37 4.08.0Q3SN74AHC1G86DCKR SC70DCK 53000178.09.2 2.4 2.4 1.22 4.08.0Q3SN74AHC1G86DCKR SC70DCK 53000178.09.0 2.4 2.5 1.2 4.08.0Q3SN74AHC1G86DCKT SC70DCK 5250178.09.0 2.4 2.5 1.2 4.08.0Q3SN74AHC1G86DCKT SC70DCK 5250178.09.2 2.4 2.4 1.22 4.08.0Q3SN74AHC1G86DRLR SOT-5X3DRL 54000180.08.4 1.98 1.780.69 4.08.0Q3*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) SN74AHC1G86DBVR SOT-23DBV53000202.0201.028.0 SN74AHC1G86DBVR SOT-23DBV53000180.0180.018.0 SN74AHC1G86DBVR SOT-23DBV53000180.0180.018.0SN74AHC1G86DBVRG4SOT-23DBV53000180.0180.018.0 SN74AHC1G86DBVT SOT-23DBV5250180.0180.018.0 SN74AHC1G86DBVT SOT-23DBV5250202.0201.028.0 SN74AHC1G86DBVT SOT-23DBV5250180.0180.018.0 SN74AHC1G86DCKR SC70DCK53000180.0180.018.0 SN74AHC1G86DCKR SC70DCK53000180.0180.018.0 SN74AHC1G86DCKT SC70DCK5250180.0180.018.0 SN74AHC1G86DCKT SC70DCK5250180.0180.018.0SN74AHC1G86DRLR SOT-5X3DRL54000202.0201.028.0IMPORTANT NOTICETexas Instruments Incorporated(TI)reserves the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46,latest issue,and to discontinue any product or service per JESD48,latest issue.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.TI’s published terms of sale for semiconductor products(/sc/docs/stdterms.htm)apply to the sale of packaged integrated circuit products that TI has qualified and released to market.Additional terms may apply to the use or sale of other types of TI products and services.Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.TI is not responsible or liable for such reproduced rmation of third parties may be subject to additional restrictions.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice.TI is not responsible or liable for any such statements. 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