lec12-translationx4

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Virtual Address Format
0x0000 0x4000 0x8000 0xC000
Base 0x4000 0x4800 0xF000 0x0000
Limit 0x0800 0x1400 0x1000 0x3000
Might be shared
Typical Segment Register Current Priority is RPL Of Code Segment (CS)
CS162 ©UCB Spring 2010 Lec 12.2
– Prevent access to private memory of other processes
2/25/10
Review: General Address Translation Code Data Heap Stack
Prog 1 Virtual Address Sprlap:
• Translation:
– Separate state of threads should not collide in physical memory. Obviously, unexpected overlap causes chaos! – Conversely, would like the ability to overlap when desired (for communication) – Ability to translate accesses from one address space (virtual) to a different one (physical) – When translation exists, processor uses virtual addresses, physical memory uses physical addresses – Side effects:
Lec 12.10
Example of segment translation
0x240 0x244 … 0x360 0x364 0x368 … 0x4050 main: la $a0, varx jal strlen … strlen: li $v0, 0 ;count loop: lb $t0, ($a0) beq $r0,$t1, done … varx dw 0x314159 Seg ID # 0 (code) 1 (data) 2 (shared) 3 (stack) Base 0x4000 0x4800 0xF000 0x0000 Limit 0x0800 0x1400 0x1000 0x3000
2/25/10 CS162 ©UCB Spring 2010 Lec 12.6
Lec 12.5
More Flexible Segmentation
1" 1" 2" 3" 4" 3" user view of memory space " physical memory space 2" 2" 4"
Implementation of Multi-Segment Model
• Protection:
» Can be used to avoid overlap » Can be used to give uniform view of memory to programs » Different pages of memory can be given special behavior (Read Only, Invisible to user programs, etc). » Kernel data protected from User programs » Programs protected from themselves
• Other problems for process maintenance
• Discussion of Dual-Mode operation • Comparison among options
• Hard to do inter-process sharing
2/25/10
– Doesn’t allow heap and stack to grow independently – Want to put these as far apart in virtual memory space as possible so that they can grow as needed – Want to share code segments when possible – Want to share memory between processes
Data 2 Stack 1 Heap 1 Code 1 Stack 2 Data 1 Heap 2 Code 2 OS code
Code Data Heap Stack
Prog 2 Virtual Address Space 2
Review: Simple Segmentation: Base and Bounds (CRAY-1) Base Virtual Address CPU DRAM Limit
CS162 ©UCB Spring 2010
Note: Some slides and/or pictures in the following are adapted from slides ©2005 Silberschatz, Galvin, and Gagne. Gagne Many slides generated from lecture notes by Kubiatowicz.
Lec 12.7
– Typical: Code, Data, Stack – Others: memory sharing, etc
• As many chunks of physical memory as entries
» x86 Example: mov [es:bx],ax.
– Segment number mapped into base/limit pair – Base added to offset to generate physical address – Error check catches offset out of range – Segment addressed by portion of virtual address – However, could be included in instruction instead: – Can mark segments as invalid; requires check as well
process 6" process 5 " process 6" process 5 " process 6" process 5 " process 9 " process 2 " OS " OS " process 6" process 5 " process 9 " process 10 " OS " OS "
CS162 ©UCB Spring 2010
– Has a base and limit – Can reside anywhereCS162 ©UCB Spring 2010 in physical memory 2/25/10
• What is “V/N”?
2/25/10
Lec 12.8
Page 2
Review: Important Aspects of Memory Multiplexing
CS162 Operating Systems and Systems Programming Lecture 12 Protection (continued) Address Translation
February 25, 2010 Ion Stoica /~cs162
Intel x86 Special Registers
80386 Special Registers Seg
Example: Four Segments (16 bit addresses)
Offset
Seg ID # 0 (code) 1 (data) 2 (shared) 3 (stack)
0x0000 0x4000 0x4800 0x5C00
>?
+
Physical Address
Translation Map 1
OS data OS heap & Stacks
Translation Map 2
• This gives program the illusion that it is running on its own dedicated machine, with memory starting at 0
2/25/10
Physical Address Space
CS162 ©UCB Spring 2010
Lec 12.3
2/25/10
Lec 12.4
Page 1
Review: Cons for Simple Segmentation Method • Fragmentation problem (complex memory allocation)
Error
Physical Address
• Segment map resides in processor
• Logical View: multiple separate segments • Each segment is given region of contiguous memory