Buried Capacitance TM:As electronic devices get faster, printed circuit boards need to be designed with high speed operation in mind. Consideration must be given to such design issues as power distribution, impedance, crosstalk and EMI, load distribution and board structure (See also “Appnotes: Entering The High-Speed Domain”). Buried Capacitance TM can be utilized to improve power distribution and reduce EMI emissions in high frequency digital applications.Capacitance BasicsA capacitor is formed when two conductive layers are separated by an insulative (dielectric) material. By applying different voltages to the conductive layers, energy is stored in the dielectric material which can be released rapidly to system components. The amount of energy (capacitance) is proportional to the dielectric constant and surface area, as well as inversely proportional to the thickness of the dielectric material.T k = 255 (constant)A = area (in2)Er = dielectric constantT = thickness (mils)Figure 1: CapacitorPower DistributionThe power distribution planes in a multilayer printed circuit have a resistive and impedance electrical impact. At low frequencies the impedance contribution of the planes is often negligable. However, at higher frequencies the impacts of the power plane impedance can no longer be ignored. The current demands of switching components produce voltage gradients across the power and ground planes of the board. These gradients show up in the system by reducing the noise margin and increased EMI emissions.The power for the system is provided by the DC power supply. However, the resistance and impedance of the power planes reduces the voltage available for the components on the printed circuit board. In general, voltage gradients across the planes are overcome by capacitors placed next to the components requiring the high speed current.General applications of capacitors on a printed circuit board can be classified into thefollowing categories:1.Switching Transient Capacitance (0.01 uF) - Switching transient capacitance is usedto supply the short term energy demands of components during switching.2.Line Charging Capacitance (0.1 uF) - Line charging capacitance is used to charge thecapacitive or transmission lines as well as supplying the current necessary for load of the IC.3.Bulk Capacitance (1 - 47 uF) - Bulk capacitance is used to recharge the power planesas well as the smaller capacitors.Technology OptionsThe capacitance needed by the circuit can be supplied by discrete capacitors, placed during assembly, or plane capacitance as an integral part of the circuit board itself. Factors such as cost, performance, and space savings should be weighed to determine the best option for a given application.Discrete capacitors continue to be used as the primary solution in many applications. They are available in many different sizes to supply the various capacitance requirements of the circuit and can be placed on the circuit board during standard assembly operations. Even though capacitors are given a specific value, they perform best at their resonant frequency. At any other frequency, the effectiveness of the capacitor is reduced. Discrete capacitors work well at lower frequencies.Plane capacitance is rapidly becoming the solution of choice for high speed digital circuits. Plane capacitance uses the power and ground planes of the circuit board to provide a distributed capacitor. It does not have a resonant frequency and performs better with increasing frequency. Currently the best way to provide plane capacitance is with the Buried Capacitance TM technology.Manufacturing Buried Capacitance TMThe two most common forms of plane capacitance are Buried Capacitance TM that uses ZBC 2000TM laminate and plane capacitors that use standard laminates. ZBC 2000TM is a material that is manufactured specifically for the purpose of providing plane capacitance. It is very thin and produces enough capacitance to replace many bypass capacitors. Standard laminates are generally too thick to provide much capacitance and are thus of little capacitive benefit.Figure 2: Standard laminate with copper tooth facing dielectric.ZBC 2000TM is made from standard glass-reinforced FR4 epoxy materials which allows a consistent material throughout the board. The laminate has a nominal dielectric thickness of .002” and 1.0 ounce reverse double-treat copper foil on both sides. Standard laminates have a copper “tooth” on one side of the foil, generally facing toward the dielectric material (See Figure 2). ZBC 2000TM has the copper “tooth” facing away from the dielectric material of the laminate allowing a more consistent dielectric thickness and higher reliability (See Figure 3).Figure 3: ZBC 2000TM laminate with copper tooth facing away from dielectric.The ZBC 2000TM laminate is processed similar to any other laminate with double-treat foil. In general, the double treat allows for the elimination of an oxide treatment process during multilayer fabrication.The reliability of the thin laminate is ensured by a 500 Volt DC HiPot (high potential) test across the power and ground planes. (See also Tech Brief: “High-Potential Testing.”) Raw material defects are screened by the initial HiPot test conducted prior to multilayer lamination. A secondary HiPot test is conducted after completion of the PCB fabrication on each pair of power and ground planes to ensure the reliability of the laminate, prepreg, and dielectric between the plated-through hole and power and ground planes.Power Distribution PerformanceDiscrete capacitors perform differently with respect to the operating frequency and perform best at their resonant frequency (See Figure 4). The effective impedance of a discrete capacitor can be determined by replacing it with capacitance, inductance, and resistance, in series as described in the following equation:Z C = Sqrt (R C2 + [(2π * f * L C) - (1/(2π * f * C C))]2where: Z C = Impedance of the capacitorR C = Resistance of the capacitorL C = Inductance of the capacitorC C = Capacitance of the capacitorf = frequencyThe resonant frequenc y is produced because of the capacitor’s capacitance in series with its parasitic inductance. As the frequency increases, the capacitive term drops to zero and the inductive term continues to increase. The resonant frequency is the point at which the impedance is at its minimum value (See Figure 4).The resonant frequency is generally determined by measuring the impedance at the capacitor leads. However, the performance of the circuit is determined by the capacitance at the component itself, not at the capacitor (See Figure 5). There is parasitic inductance in the circuit pads, plated vias, and traces, of the printed circuit board that also affect the performance of the capacitor in addition to the inductance of the capacitor itself. Discrete capacitors provide the capacitance necessary for line charging and bulk capacitance needs. At higher frequencies, discrete capacitors cannot provide the high-speed current necessary during component switching.Plane capacitance performance also varies by frequency. But unlike the discrete capacitor, plane capacitors work better as the frequency increases (See Figure 4). This is because the planes have very low inductance. The performance of the plane capacitor is a drastic improvement over the discrete capacitor because several sources of parasitic inductance have been removed. Plane capacitors do not have the inductance due to the traces, pads, or the capacitor itself. The plated vias are the one source of parasitic inductance that impacts the performance of the plane capacitor (See Figure 5). However, the vias provide the plane capacitors with the shortest possible distance to the capacitor with the lowest possible inductance. This allows the plane capacitor to out-perform the discrete capacitor at higher frequencies. Plane capacitors currently do not have sufficient capacitance to replace bulk capacitors or some line charging capacitors.EMI PerformanceEMI radiation is associated with current transients caused by high frequency switching. These transients cause potential differences across the power and ground planes and show up as high frequency “noise” in the system. The inductance of the system is the major contributer to the current transients causing the noise. One way to reduce the noise is to provide more capacitance to overcome the parasitic inductance of the system. Adding more discrete capacitors may not solve the noise problem. As mentioned earlier, discrete capacitors add inductance as well as capacitance. In some cases, adding capacitors creates more noise, rather than less.Buried Capacitance TM can add the necessary capacitance without additional parasitic inductance. This will effectively reduce the noise in the system and therefore reduce the radiated emissions. If Buried Capacitance TM is used in an existing design to reduce EMI, care must be taken to remove discrete bypass capacitors from the circuit assembly. Thecapacitance of the circuit will be met, but the unneccessary discrete capacitors will keep the noise level high.The amount of capacitance and inductance in the system is only one source of EMI problems, and Buried Capacitance TM should not be considered a “cure all”. Other contributors which should also be evaluated include effective shielding, trace parallelism (crosstalk), ground impedance, external sources, and effective ground connections. The additional high speed capacitance and lower inductance should improve the noise in the system, but may not be enough to overcome the impacts of poor shielding. Additional Benefits Buried Capacitance TMThe primary performance benefits of Buried Capacitance TM for power distribution, capacitance, and EMI have been addressed previously. However, there are other benefits that are also attained by incorporating Buried Capacitance TM into a circuit board design.1.Cost: Assembly cost (and possibly some fabrication cost) can be reduced by usingBuried Capacitance TM. However, the savings gained by eliminating discretecapacitors, as well as the assembly costs associated with them, need to be weighed against the additional cost of the Buried Capacitance TM. Some designs will needadditional BC layers to provide sufficient capacitance for the circuit. The greatest benefits will be when double-sided surface mount assembly can be reduced to single-sided assembly or when the form factor of the circuit board is reduced allowing more efficient use of the raw materials.2.Quality and Reliability: The reliability of the circuit assembly will increase due to a reduction in the total number of components, plated holes, and solder joints. Buried Capacitance TM provides higher reliability compared to using standard laminates to provide plane capacitance. This is due to the HiPot testing required during manufacture.3.Increased Density: By eliminating the discrete capacitors from the surfaces of the board, more room is provided for other traces and components. The functionality of the system can be increased, or the form factor reduced. In addition to space savings on the surface, space is also gained on the internal layers due to the elimination of the vias associated with the discrete capacitor.4.Design efficiency. One of the most common reasons for design modification is insufficient capacitance and EMI/EMC emissions. Buried Capacitance TM reduces the risk of capacitance and EMI problems in a design, as explained previously. It also reduces the cycle time because fewer components need less time in schematic capture, board layout, and component placement.5.Easy to implement in existing designs. It is very simple to see the benefits of using Buried Capacitance in an existing board by simply copying the artwork to replace each power or ground plane with a ZBC 2000TM power/ground pair. The board should be built through assembly eliminating all bypass capacitors. The performance of the board shouldbe measured and, if needed, a minimum number of bypass capacitors should be placed on the board. The capacitors should be replaced starting with the largest values first. Application Guidelines of Buried Capacitance TMBuried Capacitance TM can be effectively used if the design meets the requirements of the following equation:R t * I tr / A 5 where: R t = Rise time of the primary digital clockpulses (ns)A = Area of the undivided plane (in2)I tr= Peak device current (ma)The equation shows that buried capacitiatnce is more effective with fast rise times, and low current demands in larger boards. Buried Capacitance TM is a fast acting capacitor and is recommended for frequencies above 30 Mhz. Random logic ICs will utilize the properties of Buried Capacitance TM effectively. Bus interface and memory ICs require a larger amount of high speed current than Buried Capacitance TM can provide. Additional decoupling capacitors would be required.The amount of capacitance provided by a plane capacitor is determined by the following equation:Cp = 225 * E r * A / t where: Cp = Capacitance of the plane (pF/in2)E r= Dielectric constant of the dielectric(ZBC 2000TM has a E r = 4.5)A = Area (in2)t = Dielectric thickness (mils)(ZBC 2000TM has t = 2.0)This equation shows that ZBC 2000TM laminate can produce 506 pF/in2 capacitance as a raw material. This amount of capacitance will be reduced by about 10 - 20% depending on the amount of copper removed from the plane to produce openings for plated holes. The net amount of capacitance available to the circuit can be determined by the following equation:C net = 506 * (A p - A c) where: C net= Net Capacitance (available) (pF)A p= Area of the undivided plane (in2)A c= Total area of the clearances (in2)Figure 6: 8 layer stackup using Buried Capacitance TM.Buried Capacitance TM is designed by placing ground and power planes next to each other in the layer stackup. Figure 6 shows a typical eight-layer board using Buried Capacitance TM. Multiple ground layers and power layers are usually duplicates of other power and ground layers in the stackup.ConclusionMerix is licensed to produce multilayer boards using the Buried Capacitance TM technology. As edge rates decrease and frequencies increase this technology is a great addition to your design toolbox. With the increased use of BGA and other chip packages, there is no space to put discrete bypass capacitors near the IC. Buried Capacitance provides the capacitance where you need it: in the board. Merix Corporation’s Application Engineers are available to assist you in determining if this technology will benefit your design.------------------------Zycon Buried Capacitance TM Design Guide。
13.1.3筑堤材料的规划料场储量，应考虑到料场调查的精度和土料损失等各种因13.1.3 planning yard reserves of embankment materials, consideration should be given to the accuracy of the field investigation and soil loss, etc素，不宜小于堤身填筑需要量的1.5倍。
And should not be less than 1.5 times of body filling requirements.13.1.4严禁在设计或堤防管理部门规定的堤身两侧保护范围内挖土。
根据设计要13.1.4 are strictly prohibited in the design or on both sides of dyke body prescribed by the administrative departments of protection within the scope of digging. According to the design to求在滩地或背水侧取土时，都应在垂直堤轴线方向，每隔一定距离留一个土埂或通道。
And on the earth, or back of the volume of water side should be in vertical dike axisdirection, leave a ridge at regular intervals or channel.13.1.5施工场地应按不同施工方法、挖掘方式、工段填筑量及填筑强度，周密规13.1.5 construction site should be according to the different construction methods, mining method, section TianZhuLiang and filling strength, thorough gauge划料场与填筑段之间的道路布置。
电测量及电能计量装置设计规程英文回答：Design regulations for electrical measurement and electricity metering devices require careful consideration of various factors to ensure accurate and reliable measurements. These regulations outline the specifications, standards, and guidelines that must be followed during the design process.One of the key requirements is the accuracy of the measurement. Electrical measurement devices must be designed to provide precise and consistent readings. This involves selecting appropriate components, such as sensors and transducers, and ensuring their calibration is maintained. For example, in the design of an electricity meter, the accuracy class must be determined based on the expected range of currents and voltages to be measured. This ensures that the meter provides accurate readings within acceptable tolerances.Another important aspect is the safety of the devices. Electrical measurement devices handle high voltages and currents, so safety measures must be incorporated intotheir design. This includes the use of insulation materials, proper grounding, and protection against electrical shocks. For instance, when designing a current transformer, appropriate insulation materials and shielding techniques should be employed to prevent any leakage or short-circuits that could pose a safety hazard.Furthermore, the design regulations also address the communication capabilities of the devices. With the advancement of technology, many electrical measurement devices now include features such as data logging andremote monitoring. These devices must be designed to comply with communication protocols and standards to ensure seamless integration with other systems. For example, a smart energy meter should be designed to communicate with a central monitoring system using protocols like Modbus or DNP3.In addition to these technical requirements, design regulations also consider the physical and environmental factors. Electrical measurement devices are often installed in various locations, including indoor and outdoor environments. They must be designed to withstand harsh conditions such as extreme temperatures, humidity, and vibrations. For instance, a power quality analyzer used in an industrial setting should be designed to withstand high temperatures and be resistant to dust and moisture.中文回答：电测量及电能计量装置的设计规程要求考虑各种因素，以确保测量准确可靠。
山东外语教学 Shandong Fore ign Language Teaching Journal 2006年第3期(总第112期)英文技术写作文体特点面面观从一则美国保险公司的保险条款谈起李惠林(昆明理工大学文学院外语系,云南昆明 650093)收稿时间:2004 12 10作者简介:李惠林,(1955-),男,汉族,云南禄丰县人,副教授。
研究方向:英文技术写作,应用翻译理论与实践。
摘要:本文从选词、造句、组段、语气、篇章结构、页面设计等方面讨论了技术文件的文体特点,列举实例证明技术写作具有非正式语体的特点。
其句子短小精干,语言删繁趋简,多用小段,语篇层次清楚,页面设计着眼于实用,目的是传递信息。
关键词:技术写作;文体;选词;句子;段落中图分类号:H030 文献标识码:A 文章编号:1002 2643(2006)03 0034 051.0引言美国有一家保险公司原来是要这样撰写其保险条款的:CancellationThis policy may be cancelled by the Named Insurance by sur render thereof to the Company or any of its authorized agen ts,or by mailing to the Company written notice stating when thereafter such cancellation shall be effective.This policy may be cancelled by the Company by mailing to the Named Insured at the address shown in this Policy wri tten notice stating when,not less than thirty (30)days thereafter,such cancellation shall be effective.The mailing of notice as aforesaid shall be sufficient notice and the effective date of cancellation s tated in the notice shall become the end of the policy period.Delivery of such written notice ei ther by the Named Insur ance or by the Company shall be equivalent to mailing.If the Named Insurance cancels,earned premi um shall be computed in ac cordance with the customary short rate table and procedure.If the Company cancels,earned premium shall be computed pro rata.Pre mium adjus tment may be made at the time cancellation is effected or as soon as practicable thereafter.The check of the Company or its representative,mailed or delivered,shall be sufficient tender of any refund due the Named Insured.If this con tract insures more than one Named Insureds,cancellation may be effected by the first of such Named Insureds for the account of all the Named Insureds;no tice of cancellation by the Company to such first Named Insured shall be deemed notice to all Insureds and payment of any unearned pre mium to such first Named Insured shall be for the account of all interested therein.(Houp,1992)这是一份技术文件(technical document)。
