hub-4 sphinx-3 system

/sphinx4/#sou rce#sourceGeneral Information about Sphinx-4∙IntroductionSphinx-4 is a state-of-the-art speech recognition system written entirely in the Java TM programming language. It was created via a joint collaboration between the Sphinx group at Carnegie MellonUniversity, Sun Microsystems Laboratories, Mitsubishi ElectricResearch Labs (MERL), and Hewlett Packard (HP), with contributions from the University of California at Santa Cruz (UCSC) and theMassachusetts Institute of Technology (MIT).Sphinx-4 started out as a port of Sphinx-3 to the Java programming language, but evolved into a recognizer designed to be much more flexible than Sphinx-3, thus becoming an excellent platform forspeech research.∙CapabilitiesLive mode（实时模式） and batch mode（批处理模式） speech recognizers, capable of recognizing discrete（离散） and continuous（连续）speech.Generalized pluggable front end architecture. Includes pluggable implementations of preemphasis（预加重）, Hamming window, FFT, Mel frequency filter bank（mel频率过滤）, discrete cosine transform（离散cos变换）, cepstral（同态谱/倒频谱） mean normalization（标准化）, and feature extraction（特征提取） of cepstra, delta cepstra, double delta cepstra features.Generalized pluggable （语言学模型）language model architecture.Includes pluggable language model support for ASCII and binaryversions of unigram（一元模型）, bigram（二元模型）, trigram（三元模型）, Java Speech API Grammar Format (JSGF), and ARPA-format FST grammars.Generalized （声学模型）acoustic model architecture. Includespluggable support for Sphinx-3 acoustic models.Generalized search management. Includes pluggable support for breadth first（宽度优先） and word pruning（单词修剪）searches.Utilities for post-processing（后处理） recognition results, including obtaining confidence scores（获取信心分）, generating lattices（点阵） and embedding ECMAScript into JSGF tags.Standalone tools. Includes tools for displaying waveforms and spectrograms（声谱图） and generating features from audio.(NOTE: The links in this section point to local files created by javadoc. If they are broken, please follow the instructions on Create Javadocs to create these links.)PerformanceSphinx-4 is a very flexible system capable of performing many different types of recognition tasks. As such, it is difficult to characterize the performance and accuracy of Sphinx-4 with just a few simple numbers such as speed and accuracy. Instead, we regularly run regression （回归退化）tests on Sphinx-4 to determine how it performs under a variety of tasks. These tasks and their latest results are as follows (each task is progressively more difficult than the previous task):o Isolated Digits (TI46): Runs Sphinx-4 with pre-recorded test data to gather performance metrics for recognizing just oneword at a time. The vocabulary is merely the spoken digitsfrom 0 through 9, with a single utterance（表达，说话方式）containing just one digit.(TI46 refers to the "NIST（美国国家标准技术研究所） CD-ROM Versionof the Texas（德克萨斯州（美国州名）） Instruments-developed46-Word Speaker-Dependent（特定人的孤立词） Isolated WordSpeech Database".)o Connected Digits (TIDIGITS): Extends the Isolated Digits test to recognize more than one word at a time (i.e.,continuous speech). The vocabulary is merely the spokendigits from 0 through 9, with a single utterance containinga sequence of digits.(TIDIGITS refers to the "NIST CD-ROM Version of the TexasInstruments-developed Studio Quality Speaker-Independent（连续非特定人） Connected-Digit Corpus（语料库）".) o Small Vocabulary (AN4): Extends the vocabulary toapproximately（大约，近似地；） 100 words, with input data rangingfrom speaking words as well as spelling words out letter by letter.o Medium Vocabulary (RM1): Extends the vocabulary to approximately 1,000 words.o Medium Vocabulary (WSJ5K): Extends the vocabulary toapproximately 5,000 words.o Medium Vocabulary (WSJ20K): Extends the vocabulary toapproximately 20,000 words.o Large Vocabulary (HUB4): Extends the vocabulary toapproximately 64,000 words.∙ The following table compares the performance of Sphinx 3.3 with Sphinx-4. Test S3.3 WER S4 WER S3.3 RT S4 RT(1) S4 RT (2) Vocabulary SizeLanguage Model TI46 1.217 0.168 0.14 .03 .02 11 isolated digitsrecognitionTIDIGITS 0.661 0.549 0.16 0.07 0.05 11 continuous digitsAN4 1.300 1.192 0.38 0.25 0.20 79 trigramRM1 2.746 2.88 0.50 0.50 0.41 1,000 trigramWSJ5K 7.323 6.97 1.36 1.22 0.96 5,000 trigramHUB4 18.845 18.756 3.06 ~4.4 3.9560,000 trigram ∙ Note that performance work on the HUB4 test is not complete ∙ Key:o WER - Word error rate (%) (lower is better)错误率o RT - Real Time - Ratio of processing time to audio time -(lower is better)o S3.3 RT - Results for a single or dual （双核） CPUconfigurationo S4 RT(1) - Results on a single-CPU configurationo S4 RT(2) - Results for a dual-CPU configurationThis data was collected on a dual CPU UltraSPARC(R)-III running at 1015 MHz with 2G of memory.。

GL852USB 2.0 MTTHUB ControllerDatasheet Revision 1.14 Jul. 19, 2007Copyright:Copyright © 2007 Genesys Logic Incorporated. All rights reserved. No part of the materials may be reproduced in any form or by any means without prior written consent of Genesys Logic, Inc. Disclaimer:ALL MATERIALS ARE PROVIDED “AS IS” WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NO LICENSE OR RIGHT IS GRANTED UNDER ANY PATENT OR TRADEMARK OF GENESYS LOGIC INC.. GENESYS LOGIC HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS IN REGARD TO MATERIALS, INCLUDING ALL WARRANTIES, IMPLIED OR EXPRESS, OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF INTELLECTUAL PROPERTY. IN NO EVENT SHALL GENESYS LOGIC BE LIABLE FOR ANY DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES RESULTING FROM LOSS OF INFORMATION OR PROFITS. PLEASE BE ADVISED THAT THE MATERIALS MAY CONTAIN ERRORS OR OMMISIONS. GENESYS LOGIC MAY MAKE CHANGES TO THE MATERIALS OR TO THE PRODUCTS DESCRIBED THEREIN AT ANY TIME WITHOUT NOTICE. Trademarks:is a registered trademark of Genesys Logic, Inc.All trademarks are the properties of their respective owners.Office:Genesys Logic, Inc.12F, No. 205, Sec. 3, Beishin Rd., Shindian City,Taipei, TaiwanTel: (886-2) 8913-1888Fax: (886-2) 6629-6168Revision HistoryRevision Date Description1.00 07/07/2005 First Formal release1.01 09/07/2005 Modify Pin Description, table3.3, p.121.02 09/15/2005 Modify HUB Interface ,table3.3 Pin Description, p.121.03 12/28/2005 Modify Pin List and Pin Descriptions of EE_CS, EE_DI, EE_SK, p.11~12 1.04 01/19/2006 Add AC Characteristics, Ch6.5, p.261.05 03/29/2006 Add Input V oltage for digital I/O(Ovcur1-4,Pself,Reset) pins, p.231.06 06/15/2006 Changed GL852-N to GL8521.GL852 48 Pin Pinout, Pin List, Pin Description, p.10~13 Add GL852 QFN 48PIN1.07 07/18/2006 Modify GL852 48 Pin QFN Package, p.301.08 09/05/2006 Modify Clock and Reset Interface of GL852 48 pin to 64 pin, p.14 1.09 11/03/2006 Modify 93C46 Configuration, Table 5.1, p.221.10 12/08/2006 Modify General Description, Ch1, p.71.11 03/12/2007 Modify RESET# Setting, Ch5.2.1, p.181.12 05/03/2007 Add “T J”, Table 6.2, p.241.13 05/16/2007 Add “θJA”, Table 6.2, p.241.14 07/19/2007 Modify PGANG/SUSPND Setting, Ch5.2.2, p.19TABLE OF CONTENTSCHAPTER 1 GENERAL DESCRIPTION (7)CHAPTER 2 FEATURES (8)CHAPTER 3 PIN ASSIGNMENT (9)3.1P INOUTS (9)3.2P IN L IST (12)3.3P IN D ESCRIPTIONS (13)CHAPTER 4 BLOCK DIAGRAM (15)CHAPTER 5 FUNCTION DESCRIPTION (16)5.1G ENERAL (16)5.2C ONFIGURATION AND I/O S ETTINGS (18)CHAPTER 6 ELECTRICAL CHARACTERISTICS (24)6.1M AXIMUM R ATINGS (24)6.2O PERATING R ANGES (24)6.3DC C HARACTERISTICS (24)6.4P OWER C ONSUMPTION (26)6.5AC C HARACTERISTICS (27)CHAPTER 7 PACKAGE DIMENSION (28)CHAPTER 8 ORDERING INFORMATION (31)LIST OF FIGURESF IGURE 3.1－GL85264P IN LQFP P INOUT D IAGRAM (9)F IGURE 3.2－GL85248P IN LQFP P INOUT D IAGRAM (10)F IGURE 3.2－GL85248P IN QFN P INOUT D IAGRAM (11)F IGURE 4.1-GL852B LOCK D IAGRAM (MULTIPLE TT) (15)F IGURE 5.1-O PERATING IN USB1.1 SCHEME (17)F IGURE 5.2-O PERATING IN USB2.0 SCHEME (18)F IGURE 5.3-RESET#(E XTERNAL R ESET) SETTING AND APPLICATION (19)F IGURE 5.4-P OWER ON SEQUENCE OF GL852 (19)F IGURE 5.5-T IMING OF PGANG/SUSPND STRAPPING (20)F IGURE 5.6-GANG M ODE S ETTING (20)F IGURE 5.7-SELF/BUS P OWER S ETTING (21)F IGURE 5.8-LED C ONNECTION (21)F IGURE 5.9-S CHEMATICS B ETWEEN GL852 AND 93C46 (23)F IGURE 7.1-GL85264P IN LQFP P ACKAGE (28)F IGURE 7.2–GL85248P IN LQFP P ACKAGE (29)F IGURE 7.2–GL85248P IN QFN P ACKAGE (30)LIST OF TABLEST ABLE 3.1－GL85264P IN L IST (12)T ABLE 3.2－GL85248P IN L IST (12)T ABLE 3.3-P IN D ESCRIPTIONS (13)T ABLE 5.1-93C46C ONFIGURATION (22)T ABLE 6.1-M AXIMUM R ATINGS (24)T ABLE 6.2-O PERATING R ANGES (24)T ABLE 6.3-DC C HARACTERISTICS E XCEPT USB S IGNALS (24)T ABLE 6.4-DC C HARACTERISTICS OF USB S IGNALS U NDER FS/LS M ODE (25)T ABLE 6.5-DC C HARACTERISTICS OF USB S IGNALS U NDER HS M ODE (25)T ABLE 6.6-DC S UPPLY C URRENT (26)T ABLE 6.7-AC C HARACTERISTICS OF EEPROM I NTERFACE (27)T ABLE 8.1-O RDERING I NFORMATION (31)CHAPTER 1 GENERAL DESCRIPTIONGL852 is Genesys Logic’s brand new Hub solutions which fully comply with Universal Serial Bus Specification Revision 2.0. This series includes GL852.GL852 embeds an 8-bit RISC processor to manipulate the control/status registers and respond to the requests from USB host. Firmware of GL852 will control its general purpose I/O (GPIO) to access the external EEPROM and then respond to the host the customized PID and VID configured in the external EEPROM. Default settings in the internal mask ROM is responded to the host without having external EEROM. GL852 is designed for customers with much flexibility. The more complicated settings such as PID, VID, and number of downstream ports settings are easily achieved by programming the external EEPROM (Ref. to Chapter 5). Each downstream port of GL852 supports two-color (green/amber) status LEDs to indicate normal/abnormal status.To fully meet the performance requirement, GL852 series is a multiple TT hub solution to provide every down stream port with a TT. With the dedicated TT in each down stream port, GL852 can provide the best performance even connect with several Full/Low-Speed devices and running heavy bandwidth-consuming operations concurrently.*TT (transaction translator) is the main traffic control engine in an USB 2.0 hub to handle the unbalanced traffic speed between the upstream port and the downstream ports.Product Name Package type Power mode LED supportGL852 64LQFP Individual/Gang Green/AmberGL852 48LQFP Individual/Gang Green/AmberGL852 48QFN Individual/Gang Green/AmberCHAPTER 2 FEATURES•Compliant to USB specification Revision 2.0− 4 downstream ports−Upstream port supports both high-speed (HS) and full-speed (FS) traffic−Downstream ports support HS, FS, and low-speed (LS) traffic− 1 control pipe (endpoint 0, 64-byte data payload) and 1 interrupt pipe (endpoint 1, 1-byte data payload) −Backward compatible to USB specification Revision 1.1•On-chip 8-bit micro-processor−RISC-like architecture−USB optimized instruction set−Dual cycle instruction execution−Performance: 6 MIPS @ 12MHz−With 64-byte RAM and 2K internal ROM−Support customized PID, VID by reading external EEPROM−Support downstream port configuration by reading external EEPROM•Multiple Transaction translator (MTT)−MTT provides respective TT control logics for each downstream port. This is a performance better choice for USB 2.0 hub.•Each downstream port supports two-color status indicator, with automatic and manual modes compliant to USB specification Revision 2.0•Support both individual and gang modes of power management and over-current detection for downstream ports•Support gang mode of power management and over-current detection for downstream ports •Conform to bus power requirements•Automatic switching between self-powered and bus-powered modes•Integrate USB 2.0 transceiver•PLL embedded with external 12 MHz crystal•Operate on 3.3 V olts•Embed serial resister for USB signals and integrate pull-up resister for upstream USB signal •Improve output drivers with slew-rate control for EMI reduction•Internal power-fail detection for ESD recovery•64-pin LQFP package , 48-pin LQFP package , 48-pin QFN package•Applications:−Stand-alone USB hub−Monitor hub−PC motherboard USB hub, Docking of notebook−Any compound device to support USB HUB functionCHAPTER 3 PIN ASSIGNMENT3.1 PinoutsFigure 3.1－GL852 64 Pin LQFP Pinout DiagramFigure 3.2－GL852 48 Pin LQFP Pinout DiagramAMBER4GREEN4DP4DM4AGNDAVDDDP3DM3AVDDX2X1AGND Figure 3.2－GL852 48 Pin QFN Pinout Diagram3.2 Pin ListTable 3.1－GL852 64 Pin ListPin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type 1 AGND P 17 RREF B 33 NC - 49AMBER2/ EE_DIO 2 NC - 18 A VDD P 34 GREEN4 O 50 PSELF I 3 DM0 B 19 AGND P 35 AMBER4 O 51 DGND P 4 DP0 B 20 X1 I 36 DGND P 52 DVDDP 5 NC - 21 X2 O 37 DVDD P 53PGANG/ SUSPND B 6 NC - 22 A VDD P 38 RESET# I 54 OVCUR2# I 7 NC - 23 AGND P 39 TEST I 55 PWREN2# O 8 DM1 B 24 NC - 40 OVCUR4# I 56 OVCUR1# I 9 DP1 B 25 DM3 B 41 PWREN4# O 57 PWREN1# O 10 NC - 26 DP3 B 42 OVCUR3# I 58 DGND P 11 A VDD P 27 NC - 43 PWREN3# O 59 DVDD P 12 AGND P 28 A VDD P 44 GREEN3 O 60 GREEN1/ EE_SK O 13 NC - 29 AGND P 45 AMBER3 O 61AMBER1/ EE_CSO 14 DM2 B 30 NC - 46 DGND P 62 DGND P 15 DP2 B 31 DM4 B 47 DVDD P 63 A VDD P 16 NC-32 DP4B48GREEN2/ EE_DOB64 A VDDPTable 3.2－GL852 48 Pin ListPin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type 1 AVDD P 13 AGND P 25 DVDD P 37 PSELF I 2 AGND P 14 X1 I 26 RESET# I 38 DVDD P 3 DM0 B 15 X2 O 27 TEST I 39 PGANG B 4 DP0 B 16 A VDD P 28 OVCUR4# I 40 OVCUR2# I 5 DM1 B 17 DM3 B 29 PWREN4# O 41 PWREN2# O 6 DP1 B 18 DP3 B 30 OVCUR3# I 42 OVCUR1# I 7 A VDD P 19 A VDD P 31 PWREN3# O 43 PWREN1# O 8 AGND P 20 AGND P 32 GREEN3 O 44 DVDD P 9 DM2 B 21 DM4 B 33 AMBER3 O 45 GREEN1/ EE_SK O 10 DP2B22 DP4B34 DVDDP 46 AMBER1/ EE_CSO11 RREF B 23 GREEN4 O 35 GREEN2/EE_DOO 47 DGND P12 A VDD P 24 AMBER4 O 36 AMBER2/EE_DIO 48 DVDD P3.3 Pin DescriptionsTable 3.3 - Pin DescriptionsUSB InterfaceGL852 GL852Pin Name64 Pin# 48Pin#I/O Type Description DM0,DP0 3,4 3,4 B USB signals for USPORTDM1,DP1 8,9 5,6 B USB signals for DSPORT1DM2,DP2 14,15 9,10 B USB signals for DSPORT2DM3,DP3 25,26 17,18 B USB signals for DSPORT3DM4,DP4 31,32 21,22 B USB signals for DSPORT4RREF 17 11 B A 680Ω resister must be connected between RREF and analog ground (AGND).Note: USB signals must be carefully handled in PCB routing. For detailed information, please refer to GL852 Design Guideline.HUB InterfaceGL852 GL852Pin Name64 Pin# 48Pin#I/O Type DescriptionOVCUR1#~4 56,54,42,4042,40,30,28I(pu)Active low. Over current indicator for DSPORT1~4OVCUR1# is the only over current flag for GANGmode.PWREN1#~4 57,55,43,4143,41,31,29 OActive low. Power enable output for DSPORT1~4PWREN1# is the only power-enable output for GANGmode.GREEN1~4 60,48,44,3445,35,32,231,3,4: O2: B(pd)Green LED indicator for DSPORT1~4*GREEN[1~2] are also used to access the external EEPROMFor detailed information, please refer to Chapter 5.AMBER1~4 61,49,45,3546,36,33,24O(pd)Amber LED indicator for DSPORT1~4*Amber [1~2] are also used to access the external EEPROMPSELF 50 37 I 0: GL852 is bus-powered. 1: GL852 is self-powered.PGANG/ SUSPND 53 39 BThis pin is default put in input mode after power-onreset. Individual/gang mode is strapped during thisperiod. After the strapping period, this pin will be set tooutput mode, and then output high for normal mode.When GL852 is suspended, this pin will output low.*For detailed explanation, please see Chapter 5Gang input:1, output: 0@normal, 1@suspendIndividual input:0, output: 1@normal, 0@suspendClock and Reset InterfaceGL852 GL852 Pin Name 64Pin# 48Pin# I/O TypeDescriptionX1 20 14 I 12MHz crystal clock input.X2 21 15 O 12MHz crystal clock output.RESET#3826IActive low. External reset input, default pull high 10K Ω. When RESET# = low, whole chip is reset to the initial state.System InterfaceGL852 GL852 Pin Name 64 Pin# 48Pin# I/O Type DescriptionTEST 3927I (pd)0: Normal operation.1: Chip will be put in test mode.Power / GroundGL852 GL852 Pin Name 64 Pin#48Pin#I/O TypeDescriptionA VDD 11,18,22,28,641,7,12,16,19 P 3.3V analog power input for analog circuits. AGND 1,12,19,23,292,8,13,20,P Analog ground input for analog circuits.DVDD 37,47, 52,59 25,34,38,44,48 P 3.3V digital power input for digital circuitsDGND 36,46, 51,58,62 47 P Digital ground input for digital circuits. NC2,5~7,10, 13,16,24, 27,30,33--No connectionNote: Analog circuits are quite sensitive to power and ground noise. PCB layout must take care the powerrouting and the ground plane. For detailed information, please refer to GL852 Design Guideline .Notation: Type OOutput I InputB Bi-directionalB/I Bi-directional, default input B/O Bi-directional, default output P Power / Ground A AnalogSO Automatic output low when suspend pu Internal pull up pd Internal pull downodpu Open drain with internal pull upCHAPTER 4 BLOCK DIAGRAM12MHzD+D-LED/OVCUR/PWRENB D+D-LED/OVCUR/PWRENBD+D-LED/OVCUR/PWRENBD+D-LED/OVCUR/PWRENBFigure 4.1 - GL852 Block Diagram (multiple TT)CHAPTER 5 FUNCTION DESCRIPTION5.1 General5.1.1 USPORT TransceiverUSPORT (upstream port) transceiver is the analog circuit that supports both full-speed and high-speed electrical characteristics defined in chapter 7 of USB specification Revision 2.0. USPORT transceiver will operate in full-speed electrical signaling when GL852 is plugged into a 1.1 host/hub. USPORT transceiver will operate in high-speed electrical signaling when GL852 is plugged into a 2.0 host/hub.5.1.2 PLL (Phase Lock Loop)GL852 contains a 40x PLL. PLL generates the clock sources for the whole chip. The generated clocks are proven quite accurate that help in generating high speed signal without jitter.5.1.3 FRTIMERThis module implements hub (micro)frame timer. The (micro)frame timer is derived from the hub’s local clock and is synchronized to the host (micro)frame period by the host generated Start of (micro)frame (SOF). FRTIMER keeps tracking the host’s SOF such that GL852 is always safely synchronized to the host.The functionality of FRTIMER is described in section 11.2 of USB Specification Revision 2.0.5.1.4 µCµC is the micro-processor unit of GL852. It is an 8-bit RISC processor with 2K ROM and 64 bytes RAM. It operates at 6MIPS of 12Mhz clock to decode the USB command issued from host and then prepares the data to respond to the host. In addition, µC can handle GPIO (general purpose I/O) settings and reading content of EEPROM to support high flexibility for customers of different configurations of hub. These configurations include self/bus power mode setting, individual/gang mode setting, downstream port number setting, device removable/non-removable setting, and PID/VID setting.5.1.5 UTMI (USB 2.0 Transceiver Macrocell Interface)UTMI handles the low level USB protocol and signaling. It’s designed based on the Intel’s UTMI specification 1.01. The major functions of UTMI logic are to handle the data and clock recovery, NRZI encoding/decoding, Bit stuffing /de-stuffing, supporting USB 2.0 test modes, and serial/parallel conversion.5.1.6 USPORT logicUSPORT implements the upstream port logic defined in section 11.6 of USB specification Revision 2.0. It mainly manipulates traffics in the upstream direction. The main functions include the state machines of Receiver and Transmitter, interfaces between UTMI and SIE, and traffic control to/from the REPEATER and TT.5.1.7 SIE (Serial Interface Engine)SIE handles the USB protocol defined in chapter 8 of USB specification Revision 2.0. It co-works with μC to play the role of the hub kernel. The main functions of SIE include the state machine of USB protocolflow, CRC check, PID error check, and timeout check. Unlike USB 1.1, bit stuffing/de-stuffing is implemented in UTMI, not in SIE.5.1.8 Control/Status registerControl/Status register is the interface register between hardware and firmware. This register contains the information necessary to control endpoint0 and endpoint1 pipelines. Through the firmware based architecture, GL852 possesses higher flexibility to control the USB protocol easily and correctly.5.1.9 REPEATERRepeater logic implements the control logic defined in section 11.4 and section 11.7 of USB specification Revision 2.0. REPEATER controls the traffic flow when upstream port and downstream port are signaling in the same speed. In addition, REPEATER will generate internal resume signal whenever a wakeup event is issued under the situation that hub is globally suspended.5.1.10. TT (Transaction Translator)TT implements the control logic defined in section 11.14 ~ 11.22 of USB specification Revision 2.0. TT basically handles the unbalanced traffic speed between the USPORT (operating in HS) and DSPORTS (operating in FS/LS) of hub. GL852 adopts multiple TT architecture to provide the most performance effective solution. Multiple TT provides control logics for each downstream port respectively.5.1.11 REPEATER/TT routing logicREPEATER and TT are the major traffic control machines in the USB 2.0 hub. Under situation that USPORT and DSPORT are signaling in the same speed, REPEATER/TT routing logic switches the traffic channel to the REPEATER. Under situation that USPORT is in the high speed signaling and DSPORT is in the full/low speed signaling, REPEATER/TT routing logic switches the traffic channel to the TT.5.1.11.1 Connected to 1.1 Host/HubIf an USB 2.0 hub is connected to the downstream port of an USB 1.1 host/hub, it will operate in USB 1.1 mode. For an USB 1.1 hub, both upstream direction traffic and downstream direction traffic are passing through REPEATER. That is, the REPEATER/TT routing logic will route the traffic channel to the REPEATER.Figure 5.1 - Operating in USB 1.1 scheme5.1.11.2 Connected to USB 2.0 Host/HubIf an USB 2.0 hub is connected to an USB 2.0 host/hub, it will operate in USB 2.0 mode. The upstream port signaling is in high speed with bandwidth of 480 Mbps under this environment. The traffic channel will then be routed to the REPEATER when the device connected to the downstream port is signaling also in high speed. On the other hand, the traffic channel will then be routed to TT when the device connected to the downstream port is signaling in full/low speed.Figure 5.2 - Operating in USB 2.0 scheme5.12 DSPORT logicDSPORT (downstream port) logic implements the control logic defined in section 11.5 of USB specification Revision 2.0. It mainly manipulates the state machine, the connection/disconnection detection, over current detection and power enable control, and the status LED control of the downstream port.Besides, it also output the control signals to the DSPORT transceiver.5.13 DSPORT TransceiverDSPORT transceiver is the analog circuit that supports high-speed, full-speed, and low-speed electrical characteristics defined in chapter 7 of USB specification Revision 2.0. In addition, each DSPORT transceiver accurately controls its own squelch level to detect the detachment and attachment of devices. 5.2 Configuration and I/O Settings5.2.1 RESET# SettingGL852 integrates in the pull-up 1.5KΩ resister of the upstream port. When RESET# is enabled, the internal1.5KΩ pull-up resister will be disconnected to the 3.3V power. To meet the requirement (p.141) of the USB2.0 specification, pull-up resister should be disconnected while lacking of USB cable power (Vbus).Therefore, we suggest designing the RESET# circuit as following figure to meet the requirement mentioned above.Figure 5.5 - Timing of PGANG/SUSPND strappingIndividualModeFigure 5.6 - GANG Mode Setting5.2.3 SELF/BUS Power SettingGL852 can operate under bus power and conform to the power consumption limitation completely (suspend current < 2.5 mA, normal operation current < 100 mA). By setting PSELF, GL852 can be configured as a bus-power or a self-power hub.1: Power Self0: Power BusPSELFOn PCBFigure 5.7 - SELF/BUS Power Setting5.2.4 LED ConnectionsGL852 controls the LED lighting according to the flow defined in section 11.5.3 of Universal Serial Bus Specification Revision2.0. Both manual mode and Automatic mode are supported in GL852. When GL852DGNDFigure 5.8 - LED Connection5.2.5 EEPROM SettingGL852 replies to host commands by the default settings in the internal ROM. GL852 also offers the ability to reply to the host according to the settings in the external EEPROM(93C46). The following table shows the configuration of 93C46.Table 5.1 - 93C46 ConfigurationUnit: Byte 0001 02 03 04 05 060708 09 0A 0B 0C 0D 0E 0F00hVID_L VID_H PID_L PID_H CHKSUM FF DEVICEREMOVABLE PORTNUMBER MaxPower FF FF FF FF FF FF FF10h VENDORLENGTH start 20h Vendor string (ASC II code)30h end40h PRODUCTLENGTH start50h Product String(ASC II code)60h end70h SERIAL NUMBER LENGTHstart Serial Number String(ASC II code)endNote: 1. VID_H/VID_L: high/low byte of VID value 2. PID_H/PID_L: high/low byte of PID value 3. CHKSUM: CHKSUM must equal to VID_H + VID_L + PID_H + PID_L + 1,otherwisefirmware will ignore the EEPROM settings.4. PORT_NO: port number, value must be 1~4.5. MaxPower : Describe the maximum power consumption, range=0Ma~500Ma .Value -> 00H~FAH (unit = 2Ma)6. DEVICE REMOVALBE:- - -PORT4 REMOVABLE PORT3 REMOVABLE PORT2 REMOVABLE PORT1REMOVABLE-0: Device attached to this port is removable.1: Device attached to this port is non-removable.7. VENDOR LENGTH: offset 10h contains the length of the vendor string. Values of vendor string is contained from 11h~3Fh.8. PRODUCT LENGTH: offset 40h contains the length of product string. Values of product string is contained from 41h~6Fh.9. SERIAL NUMBER LENGTH: offset 70h contains the value of serial number string. Values of serial number string is contained after offset 71h.The schematics between GL852 and 93C46 is depicted in the following figures:EE_CS EE_SK EE_DI EE_DODVDDFigure 5.9 - Schematics Between GL852 and 93C46GL852 firstly verifies the check sum after power on reset. If the check sum is correct, GL852 will take the configuration of 93C46 as part of the descriptor contents. To prevent the content of 93C46 from being over-written, amber LED will be disabled when 93C46 exists.CHAPTER 6 ELECTRICAL CHARACTERISTICS6.1 Maximum RatingsTable 6.1 - Maximum RatingsSymbol Parameter Min. Max. UnitV CC Power Supply -0.5 +3.6 VV IN Input V oltage for digital I/O(EE_DO) pins -0.5 +3.6 VV IN Input V oltage for digital I/O(Ovcur1-4,Pself,Reset) pins -0.5 +5.25 VV INUSB Input V oltage for USB signal (DP, DM) pins -0.5 +3.6 VT S Storage Temperature under bias -60 +100 o CF OSC Frequency 12 MHz ± 0.05%6.2 Operating RangesTable 6.2 - Operating RangesSymbol Parameter Min. Typ. Max. Unit V CC Power Supply 3.0 3.3 3.6 VV IND Input V oltage for digital I/O pins -0.5 3.3 3.6 V V INUSB Input V oltage for USB signal (DP, DM) pins 0.5 3.3 3.6 VT A Ambient Temperature 0 - 70 o CT J Absolute maximum junction temperature 0 - 125 o CθJA Thermal Characteristics 48 LQFP - 52.2 - o C/W6.3 DC CharacteristicsTable 6.3 - DC Characteristics Except USB SignalsSymbol Parameter Min. Typ. Max. Unit P D Power Dissipation 70 - 190 mA V DD Power Supply V oltage 3 3.3 3.6 VV IL LOW level input voltage - - 0.9 VV IH HIGH level input voltage 2.0 - - VV TLH LOW to HIGH threshold voltage 1.36 1.48 1.62 VV THL HIGH to LOW threshold voltage 1.36 1.48 1.62 VV OL LOW level output voltage when I OL=8mA - - 0.4 VV OH HIGH level output voltage when I OH=8mA 2.4 - - VI OLK Leakage current for pads with internal pull up or pulldown resistor- - 30 µAR DN Pad internal pull down resister 81K 103K 181K ΩR UP Pad internal pull up resister 81K 103K 181K ΩTable 6.4 - DC Characteristics of USB Signals Under FS/LS ModeSymbol Parameter Min. Typ. Max. Unit V OL DPF/DMF static output LOW(R L of 1.5K to 3.6V ) 0 - 0.3 V V OH DPF/DMF static output HIGH (R L of 15K to GND ) 2.8 - 3.6 V V DI Differential input sensitivity 0.2 - - V V CM Differential common mode range 0.8 - 2.5 V V SE Single-ended receiver threshold 0.2 - - V C IN Transceiver capacitance - - 20 pF I LO Hi-Z state data line leakage -10 - +10 µA Z DRV Driver output resistance 28 - 43 ΩTable 6.5 - DC Characteristics of USB Signals Under HS ModeSymbol Parameter Min. Typ. Max. Unit V OL DPH/DMH static output LOW(R L of 1.5K to 3.6V ) - - 0.1 V C IN Transceiver capacitance 4 4.5 5 pF I LO Hi-Z state data line leakage -5 0 +5 µAZ DRV Driver output resistance for USB 2.0 HS 48 45 42 Ω6.4 Power ConsumptionTable 6.6 - DC Supply CurrentCondition SymbolActive portsHost DeviceTyp.Unit I SUSPSuspend 510/800*1 µA F *2 F 83 mA H H 187 mA 4H F 107 mA FF 82 mA H H 170 mA 3HF 106 mA FF 81 mA H H 147 mA 2H F 105 mA FF 79 mA H H 124 mA 1HF 104 mA F 78 mA I CCNo ActiveH102mA*1: 48/64-pin package types *2: F: Full-Speed, H: High-Speed6.5 AC CharacteristicsSymbol Parameter Min Typ Max Unitst CSS CS Setup Time 3.0 t CSH CS Hold Time 3.0 t SKH SK High Time 1.0 t SKL SK Low Time 2.2 t DIS DI Setup Time 1.8 t DIH DI Hold Time 2.4 t PD1 Output Delay to “1” 1.8 t PD0 Output Delay to “0”1.8usTable 6.7 - AC Characteristics of EEPROM InterfaceCHAPTER 7 PACKAGE DIMENSIONCONTROL DIMENSIONS ARE IN MILLIMETERS.SYMBOLMILLIMETER INCHMIN.NOM.MAX.MAX.MIN.NOM.AA1A2DD1EE1R2R1cLL1Sbeaaabbbcccddd D2E2TOLERANCES OF FORM AND POSITION12.00 BASIC 12.00 BASIC 10.00 BASIC 10.00 BASIC 0.472 BASIC 0.472 BASIC 0.393 BASIC 0.393 BASIC 0.051.35 1.40 1.600.151.45001111 3.51212713130.080.080.200.0030.0030.008001111 3.51212713130.0630.0060.0570.0550.0020.0530.200.200.080.080.0080.0080.0030.0030.50 BASIC 7.50 BASIC 7.50 BASIC 0.020 BASIC 0.295 BASIC 0.295 BASIC 1.00 REF 0.039 REF 0.090.450.200.170.600.200.200.750.270.0040.0180.0080.0070.0240.0080.0080.0300.0110-02-03-01-NOTES :1.2.DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLDPROTRUSION. ALLOWABLE PROTRUSION IS 0.25 mm PER SIDE. D1 AND E1 ARE MAXIMUM PLASTIC BODY SIZE DIMENSIONS INCLUDING MOLD MISMATCH.DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED THE MAXIMUM b DIMENSION BY MORE THAN 0.08mm.DAMBAR CAN NOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSION AND AN ADJACENT LEAD IS 0.07mm.SEATINGPLANEFigure 7.1 - GL852 64 Pin LQFP PackageCONTROL DIMENSIONS ARE IN MILLIMETERS.SYMBOLMILLIMETER INCHMIN.NOM.MAX.MAX.MIN.NOM.A A1A2D E D1E1R2R1cLL1Sbe aaabbb cccddd D2E2TOLERANCES OF FORM AND POSITION9.00 BASIC 9.00 BASIC 7.00 BASIC 7.00 BASIC 0.354 BASIC 0.354 BASIC 0.276 BASIC 0.276 BASIC 0.051.35 1.40 1.600.151.450°0°11°11° 3.5°12°12°7°13°13°0.080.080.200.0030.0030.0080°0°11°11° 3.5°12°12°7°13°13°0.0630.0060.0570.0550.0020.0530.200.200.080.080.0080.0080.0030.0030.50 BASIC 5.50 BASIC 5.50 BASIC 0.020 BASIC0.217 BASIC0.217 BASIC 1.00 REF 0.039 REF 0.090.450.200.170.600.200.200.750.270.0040.0180.0080.0070.0240.0080.0080.0300.0110-02-03-01-NOTES :1.2.DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLDPROTRUSION. ALLOWABLE PROTRUSION IS 0.25 mm PER SIDE. D1 AND E1 ARE MAXIMUM PLASTIC BODY SIZE DIMENSIONS INCLUDING MOLD MISMATCH.DIMENSION b DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED THE MAXIMUM b DIMENSION BY MORE THAN 0.08mm.DAMBAR CAN NOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSION AND AN ADJACENT LEAD IS 0.07mm.SEATINGPLANEFigure 7.2 – GL852 48 Pin LQFP Package。

Genesys全中文操作手册×××客服中心系统March 22, 20101 前言 ..................................................................... ........................... 5 2 系统运行...................................................................... ..................... 6 2.1 系统启动方式 ..................................................................... ..... 6 2.2 启动顺序 ..................................................................... ............ 6 2.3 系统工具部分 ..................................................................... ..... 6 3 Genesys系统描述 ..................................................................... ...... 7 3.1 Genesys系统服务器组成 ....................................................... 7 3.2 Genesys 数据库访问内容 . (7)3.3 Genesys应用说明及Port配置 ............................................... 8 4 Genesys License管理 ....................................................................8 4.1 License更新 ............................................................................ 9 4.2 License运行情况检查 ............................................................. 9 5 资源管理（CME） ................................................................ ......... 10 5.1 登录CME .................................................................... ......... 10 5.2 新建DN ..................................................................... ........... 10 5.3 删除DN ..................................................................... ........... 11 5.4 新增分机 ..................................................................... .......... 12 5.5 新增路由点 ..................................................................... ...... 13 5.6 新增队列 ..................................................................... .......... 14 5.7 新增话务员登录账号 ............................................................. 15 5.8 删除话务员登录账号 ............................................................. 16 5.9 新增位置 ..................................................................... .......... 17 5.10 删除位置 ............................................................................. 18 5.11 新增位置组 ..................................................................... ..... 18 5.12 新增人员 ..................................................................... ........ 20 5.13 删除人员 ..................................................................... ........ 22 5.14 新增话务员组 ......................................................................23 5.15 删除话务员组 ......................................................................242 北京白矾科技有限公司.6 系统运维管理（SCI）................................................................. ... 24 6.1 登录SCI .................................................................... ........... 24 6.2 应用程序管理 ..................................................................... ... 25 6.3 观察应用程序的信息 ............................................................. 25 6.4 启动单个应用程序 (26)6.5 停止单个应用程序 (26)6.6 管理日志 ..................................................................... .......... 27 6.7 主机管理 ..................................................................... .......... 29 6.8 观察主机的信息 ....................................................................297 实时资源监控（CCP） ................................................................ .. 30 7.1 登录CCP .................................................................... .......... 30 7.2 新建实时监控视图 (30)7.3 保存实时监控视图 (32)7.4 打开已保存的实时监控视图.................................................. 33 7.5 使用实时资源状态监视 (33)7.6 使用整体试图 ..................................................................... ... 35 7.7 使用试图模板设计 (38)8 历史报表管理—设计（CCA—DMA） ........................................... 42 8.1 登录DMA .................................................................... ......... 42 8.2 新增过滤器 ..................................................................... ...... 43 8.3 新增时间区间 ..................................................................... ... 45 8.4 新增时间设定 ..................................................................... ... 46 8.5 格式模板管理 ..................................................................... ... 48 8.6 新增格式模板 ..................................................................... ... 49 8.7 修改数据项目 ..................................................................... ... 54 8.8 删除格式模板 ..................................................................... ... 57 8.9 新增报表格式 ..................................................................... ... 58 8.10 删除报表格式 ......................................................................61 8.11 激活报表格式 ......................................................................623 北京白矾科技有限公司.8.12 关闭报表格式 ......................................................................63 8.13 浏览数据 ..................................................................... ........ 64 9 历史报表管理（CCA—ETLAssistant） ........................................ 65 9.1 登录ETL Assistant ...............................................................65 9.2 浏览数据 ..................................................................... .......... 67 10 路由策略设计器(IRD) .................................................................68 10.1 登录IRD .................................................................... ......... 68 10.2 新建路由策略 ......................................................................68 10.3 修改已有路由策略 (69)10.4 加载路由策略 ......................................................................69 10.5 查看路由运行情况 (70)4 北京白矾科技有限公司.CTI(Computer Telephony Interface)服务器是一台与排队机CTI链路相连的设备，它使用户能够通过计算机来操作全部的电话功能，实现呼叫中心系统的计算机化管理。

COMMISSION NO.DRAWING NO.CLIENT SITE::::Kirin Brewery Co. Ltd.ZHUHAI 35346552925CONTENTPLANT LOC.PAGE PAGE DESIGNATION COMMENTB1G B1G B1G B1G B1G B1G B1G B1G B1G B1G B1G B1G B1G B1G B1G B1G B1G B1G001002005010010.1011012013014015020021030031101102103104COVERCONTENTREVISION OVERVIEWPAGE NUMBERS GENERALPAGE NUMBERS POWER SECTIONDESIGNATION SYSTEMWIRING INSTRUCTIONSWIRE A. LINE CROSS SECTION DIRECT STARTINGWIRE A. LINE CROSS SECTION STAR-DELTA STARTINGTERMINAL STRIP DESIGNATIONCONNECTOR PIN ASSIGNMENT PROFIBUS DPPOTENTIAL EQUALIZATION FLOW METERPOTENTIAL EQUALIZATIONPOTENTIAL EQUALIZATIONCABLE LISTCABLE LISTCABLE LISTCABLE LISTREVISION OVERVIEWREVISION NUMBER Index DATE EDITOR DESCRIPTION REASON FOR CHANGEPLANT DESIGNATION :(HIGHER-LEVEL ASSIGNMENT)=PLANT DESIGNATION :TECHNOLOGICAL CLASSIFICATION A =B =C =D =E =F =G =H =J =K = = = =P =Q =R =S =T =KIND OF PLANT -FUNCTIONAL DOCUMENTS-A =C =G =O =P =S =U =Y =B 1MALT AND CEREAL BREWHOUSE FERMENTATIONYEAST / REJECT BEER FILTER - PLANT BRIGHT BEER TANKS REFRIGERATION PLANT CO2 - RECOVERY WATER PLANT CIP - PLANT BOTTLING KEG - FILLING SPIN-OFF PRODUCTS STEAM / CONDENSATE AIRELECTRICITY WATER DISPOSAL SUPPLY WAYSAUTOMATIC SECTION COMPACT CONTROLGENERAL ( e.g. CABLE LISTS, PARTS LISTS)OPERATOR PANEL POWER SECTIONELECTRIC SUBDISTRIBUTORELECTRIC / PNEUMATIC - SUBDISTRIBUTOR PNEUMATIC SECTIONPPLANT DESIGNATION KIND OF PLANTPLANT - COUNT NUMBERTECHNOLOGICAL CLASSIFICATION QUALIFYING SYMBOL+LOCATION DESIGNATION :CC =CCC =CS =CPS =MCC = =P = =PS = =LOCATION :C CONTROL CABINETCOMPACT CONTROL CABINET ELECTRIC SUBDISTRIBUTORELECTRIC / PNEUMATIC - SUBDISTRIBUTOR MOTOR CONTROL CABINET OPERATOR PANEL PNEUMATIC DISTRIBUTOR TERMINAL BOXPLANTPNEUMATIC SUBDISTRIBUTOR C 01PLANT DESIGNATIONLOCATION - COUNT NUMBER (1-99)LOCATIONQUALIFYING SYMBOLPAGE NUMBER :115PAGE NUMBER3 OR 4-DIGIT PAGE NUMBERCOMPLETE DEVICE DESIGNATION :KIND OF ITEMA =B =C =D =E =F =G =H =J =K = = = =P =Q =R =S =T =U =V =W =X =Y =Z ==B1P +MCC01 -115K15UNIT, MODULETRANSMITTER, PROBE CAPACITOR RESERVEDHEATERS / LAMPS / BOILERS PROTECTIVE EQUIPMEMT (FUSE)GENERATOR RESERVED RESERVEDRELAIS, CONTACTOR (CONTROL ONLY)INDUCTOR (COIL)MOTOR , ACTUATION COIL RESERVEDMEASURING DEVICE / SIGNAL DEVICE ( e.g. HORN)POWER-SWITCHGEAR / POWER CONTACTORS RESISTOR SWITCHTRANSFORMER / FREQUENCY CONVERTER ISOLATORS FILTER CABLETERMINAL, PLUG, SOCKET RESERVED RESERVEDNUMBER OF ITEM (CURRENT PATCH)KIND OF ITEM PAGE NUMBERQUALIFYING SYMBOL LOCATION DESIGNATION PLANT DDESIGNATIONWIRING INSTRUCTIONS !1. All devices to be designated with the identification blocks for plant [=..] , location [+..] and for item [-page no.,kind of item, item number (current path)].2. All lines connected in front of the main switch are to be laid separately; in addition a warning label is required with the following text:"Attention! Energized also with main switch disconnected"3. The connection of protective devices to the busbar on tapering cross-sections must be made with short-circuit proof lines.The cross-section must correspond with the subsequent protective device.See table 1 VDE 0100 section 430.4. The line cross-sections for drives with direct-on-line starting and star-delta starting are indicated on the tables of the following pages.5. Outgoing circuits from transformers are to be designed according to the rated secondary current.See opposite table 1 VDE 0100 section 430.6. All control leads are to be wired corresponding to the fuse protection of the control circuit with 0.75qmm for 6A, 1qmm for 10A and 2.5qmm for 16A. See VDE 0113 table 5 and table 6.Exception: or with appropriate bus cables.7. To prevent mechanical damage and electrical influence, signal cables are to be laid by preference in cable ducts, separated from load cables.8. Parallel single-conductor cables of same phase must not be laid in parallel without clearance. Three-phase bundles must be formed or line-up parallel in phase sequence (L1-L2-L3-L1-L2-L3...).9. Feeder terminals on main switches are to be protected against accidental contact.10. Protective covers are to be provided which are safe from finger-touch and safe from touch by the back of the hand.These must be secured against uninteded removal.e.g.11. Corresponding to data, terminals are to be arranged and designated block by block.12. For wiring colours see table 2.S5-modules with single cores are to be wired with AWG2213. The guidlines for switch cabinet design and wiring instruction according to EMC can be found in the HUPPMANN EMC concept.There is also a guideline for mounting details and a check list. All guidelines and instructions are obligatory and the construction must be documented in the check list.. 1Load capacity of cables with insulating material PVC (permissible operating temperature 70øC ) for fixed instalation and assignment of line protection fuses gl for permanenet operation at 30øC ambient temperature.. 2No.of cores conductor (L1/L2/L3)Neutral (N)Protective earth (PE)Control voltage 220V~Control voltage 110V~Control voltage 24V~Control voltage 24VdcPotential-free contacts Measurementof layingN o m i n a l c r o s s s e c t i o n (C U ) s q .m mManner1.52.51016253546I 17.5Z101125I 2432415776Z= permissible operating current (A)Wiring colours in switch cabinets2100125162025355063I core lines N on-wall or in-wall or concealed installationand control desksblack light-blue yellow/green red red brown dark-blueorange whiteB 1in electrical wiring conduits or ducts15.5111I 212836506889Z 3100Excerpt from DIN VDE 0100 T.430/11.9116202535506380I N red / white red / white brown / white dark-blue / white15.5110I 212837506890Z 2I N= nominal current (A)10016202535506380I multi-coreN B 2I 1419263346617795Z 31016252535506380I N123PKZ..-..=B 2+P-216Q0+NHI..-216Q1-216M5FUNCTION1212U13~U 13434V1V 15656W1W 1PEP E<1> = SHORT CIRCUIT PROOF<2><2>see point 1 additionMOTOR DIRECT START - 400V,50cpsSelection table for current carrying capacity of insulated conductors at an ambient temperature of 40³Cto DIN VDE 0298 Part 4 and VDE 0660 Part 500ATTENTION !1. Chosing lines for the drive , the reduction factor should be taken into account at anRATINGMOTOR ambient temperature of 40³C .The reduction factor corresponds to 0.8 for small numbers and 0.6 for great numbers.11.0015.0018.5022.0030.0037.0045.0055.0075.0090.000.060.090.120.180.250.370.550.751.101.502.203.004.005.507.50kW 1CURRENT132.00160.00RATED 11.4015.1021.4028.5035.0041.0055.0066.0080.0097.000.220.330.420.640.881.221.502.002.653.604.906.408.30A 2i n m u l t i -c o r e120.010.016.025.035.050.050.095.0b u n d l e w i t h2.52.52.52.52.52.52.52.52.52.52.52.52.52.52.54.06.0LINE CROSS SECTION36 s i m u l t a n e o u s l yw i t h 100%l o a d e d c o r e si n m u l t i -c o r eqmm<1>10.010.016.025.025.035.070.095.0b u n d l e w i t h2.52.52.52.52.52.52.52.52.52.52.52.52.52.52.54.06.043 s i m u l t a n e o u s l yw i t h 100%l o a d e d c o r e sl a i d i n s i n g l e -l a y e r s10.010.016.016.025.035.050.070.0w i t h c l e a r a n c e2.52.52.52.52.52.52.52.52.52.52.52.52.52.52.54.06.05e q u a lt o c a b l e d i a m e t e ri n m u l t i -c o r e120.010.016.025.035.050.050.095.0b u n d l e w i t h1.51.51.51.51.51.51.51.51.51.51.51.51.52.52.54.06.066 s i m u l t a n e o u s l yLINE CROSS SECTIONw i t h 100%l o a d e d c o r e si n m u l t i -c o r e10.010.016.025.025.035.070.095.0b u n d l e w i t hqmm <2>1.51.51.51.51.51.51.51.51.51.51.51.51.51.52.54.06.073 s i m u l t a n e o u s l yw i t h 100%l o a d e d c o r e sl a i d i n s i n g l e -l a y e r s10.010.016.016.025.035.050.070.0w i t h c l e a r a n c e1.51.51.51.51.51.51.51.51.51.51.51.51.51.52.54.06.08e q u a lt o c a b l e d i a m e t e r123PKZ..-..=B 2+P-217Q0+NHI..-217Q1-217M4FUNCTION1212U1U23~U 13434V1V2V 15656W1W2W 1PEPEP E<1> = SHORT CIRCUIT PROOF<1>-217Q212W 234U 256V 2P E-217Q3<2><2>see point 2 addition123456<2>ATTENTION !1. Wiring between protective device and star-delta combination may be designed according2. Chosing lines for the drive , the reduction factor should be taken into account at anMOTOR STAR-DELTA STARTING - 400V,50cpsSelection table for current carrying capacity of insulated conductors at an ambient temperature of 40³Cto DIN VDE 0298 Part 4 and VDE 0660 Part 500110.00132.00160.00200.00250.00MOTOR-RATINGto column 6, 7 and 8 of the table shown above only with mains contactor and delta contactor individually connected from the motor protecting switchambient temperature of 40³C .The reduction factor corresponds to 0.8 for small numbers and 0.6 for great numbers.11.0015.0018.5022.0030.0037.0045.0055.0075.0090.005.507.50kW 1CURRENT132.00160.00194.00230.00275.00345.00425.00RATED-11.4015.1021.4028.5035.0041.0055.0066.0080.0097.00A 2i n m u l t i -c o r e120.0240.0300.010.016.025.035.050.050.095.0b u n d l e w i t h2.52.54.06.0LINE CROSS SECTION---36 s i m u l t a n e o u s l yw i t h 100%l o a d e d c o r e si n m u l t i -c o r eqmm<1>150.0240.010.010.016.025.025.035.070.095.0b u n d l e w i t h2.52.54.06.0---43 s i m u l t a n e o u s l yw i t h 100%l o a d e d c o r e sl a i d i n s i n g l e -l a y e r s120.0150.0240.0300.010.010.016.016.025.035.050.070.095.0w i t h c l e a r a n c e2.52.54.06.05e q u a lt o c a b l e d i a m e t e ri n m u l t i -c o r e120.0185.0240.010.016.016.025.035.050.070.095.0b u n d l e w i t h1.51.52.54.04.06.066 s i m u l t a n e o u s l yLINE CROSS SECTIONw i t h 100%l o a d e d c o r e si n m u l t i -c o r e120.0185.010.016.025.025.035.050.070.095.0b u n d l e w i t hqmm <2>1.51.52.52.54.04.06.073 s i m u l t a n e o u s l yw i t h 100%l o a d e d c o r e sl a i d i n s i n g l e -l a y e r s120.010.010.016.025.035.035.050.070.095.0w i t h c l e a r a n c e1.51.52.52.54.04.06.08e q u a lt o c a b l e d i a m e t e r=B 1+PPEPAS T R I P E A R T H C O N D U C T O RPE70mmýgnyeL I G H T N I N G A R R E S T O RPE70mmýgnyeL O W V O L T A G E D I S T R I B U T I O NPE35mmýgnyeS T E E L C O N S T R U C T I O N SPE35mmýgnyeV E S S E L SPE35mmýgnyeP I P E SPE35mmýgnyeC A B L E T R A Y SPE6mmýgnyeT E L E P H O N E S Y S T E M=B1A+CC01-030W1NYY-J 1x16PEPEPE =B1P+MCC01POTENTIAL EQUALIZATION BARSUPPLIED BY COSTUMER-030W2NYY-J 1x70PEPE-PEPE-3EATTENTIONTHE REQUIREMENTS AND METHODS FOR ELECTRICAL SYSTEM EARTHING HAVE TO BE IN ACCORDANCE WITH THE IEC - REGULATIONS FOR ELECTRICAL INSTALLATIONSPE-4E-030W5NYY-J 1x16PEPE=B 1U +C P S 01/053.2/-5E=B 1+PPE-6EPE-7EPE-8EPE-9EPOTENTIAL EQUALIZATION BARSUPPLIED BY COSTUMERPE-10E=B1+HG1-FQIS2=B1U+CPS01/301.1-031W6NYY-J1x6PEPEÏ=B1+HG1-FQIC1=B1U+CPS01/301.5-031W7NYY-J1x6PEPEÏ=B1A+CC01-033W1=B1A+CC01-042W1=B1A+CC01-042W2=B1A+CC01-042W3=B1A+CC01-042W4=B1A+CC01-042W5=B1A+CC01-054W1=B1A+CC01-054W2=B1A+CC01-054W3=B1A+CC01-054W4=B1A+CC01-054W5=B1U+CPS03-301W1.1 =B1U+CPS03-301W3.1 =B1U+CPS01-065W1=B1U+CPS01-098W1=B1U+CPS01-301W1=B1U+CPS01-301W3=B1U+CPS01-301W4=B1U+CPS01-302W1=B1U+CPS01-302W2=B1U+CPS01-302W3=B1U+CPS01-302W4=B1U+CPS01-303W3=B1U+CPS01-303W4=B1U+CPS01-304W1=B1U+CPS01-304W2=B1U+CPS01-304W3=B1U+CPS01-304W4=B1U+CPS01-305W1=B1U+CPS01-305W2=B1U+CPS01-306W1.1 =B1U+CPS01-306W1.2 =B1U+CPS01-307W1.1 =B1U+CPS01-307W1.2 =B1U+CPS01-308W1=B1A+CC01-X3=B1A+CC01-X4=B1A+CC01-X4=B1A+CC01-X4=B1A+CC01-X4=B1A+CC01-X4=B1A+CC01-X11=B1A+CC01-X11=B1A+CC01-X11=B1A+CC01-X11=B1A+CC01-X11=B1+HG1-FQIS2=B1+HG1-FQIC1=B1U+CPS01-X35=B1A+CC01-X36=B1U+CPS01-135A2=B1U+CPS01-135A2=B1U+CPS01-140A1=B1U+CPS01-XB1G1GI1=B1U+CPS01-135A2=B1U+CPS01-145A2=B1U+CPS01-145A3=B1U+CPS01-303T1=B1U+CPS01-303T1=B1U+CPS01-145A4=B1U+CPS01-145A4=B1U+CPS01-XB1HG1C2=B1U+CPS01-140A2=B1U+CPS01-305T1=B1U+CPS01-135A3=B1U+CPS01-XB1HG1QI1=B1U+CPS01-145A5=B1U+CPS01-XB1HG1QI3=B1U+CPS01-145A5=B1U+CPS01-XB1HG1QI2CABINET LIGHTING=B1+OP_ROOM-TB1-X1=B1+OP_ROOM-TB2-X1=B1+OP_ROOM-TB3-X1=B1+OP_ROOM-X1=B1A+CC01-A100.1-X-1L+-2L+=B1U+CPS01-X11-4L+-5L+=B1+HG1-FQIS2B1=B1+HG1-FQIC1B1=B1+HG1-JB-X=B1U+CPS01-135A5=B1+HG1-FQIS2B1=B1+HG1-FQIC1B1=B1+HG1-C1=B1+HG1-GI1TB1-X1=B1+HG1-LIS2=B1+HG1-PDI1.1=B1+HG1-PDI1.2=B1+HG1-B1HG1M4Y3=B1+HG1-B1HG1M4Y3B1=B1+HG1-TI1=B1+HG1-TIC2=B1+HG1-C2=B1+HG1-C2=B1+HH1-LIS2=B1+HH1-PA1=B1+HG1-QI1B1=B1+HG1-QI1B1=B1+HG1-QI3=B1+HG1-QI3=B1+HG1-QI2B1YSLY-JZYSLY-JZYSLY-JZYSLY-JZYSLY-JZYSLY-JZYSLY-JZYSLY-JZYSLY-JZYSLY-JZYSLY-JZABB-SPEZABB-SPEZSiHFYSLY-OZYSLYCY-OZYSLYCY-OZYSLYCY-OZYSLYCY-JZYSLY-OZYSLYCY-OZYSLYCY-OZYSLY-JZYSLYCY-JZYSLYCY-OZYSLYCY-OZYSLY-JZYSLYCY-OZYSLY-OZYSLY-OZYSLY-JZYSLYCY-OZYSLY-JZYSLYCY-OZYSLYCY-OZ3/PE3/PE3/PE3/PE3/PE3/PE3/PE3/PE3/PE3/PE3/PE3+Sc3+Sc7/PE35+Sc5+Sc2+Sc5/PE+Sc32+Sc2+Sc3/PE3/PE+Sc2+Sc2+Sc3/PE2+Sc333/PE2+Sc3/PE2+Sc5+Sc3/PE3/PE3/PE3/PE3/PE3/PE3/PE3/PE3/PE3/PE3/PE337/PE26635/PE33323/PE223/PE2223/PE33/PE351.51.51.51.51.51.544444--0.750.750.750.750.750.750.750.750.751.51.50.750.751.50.750.750.751.50.751.50.750.75=B1A+CC01/042.1=B1A+CC01/042.2=B1A+CC01/042.4=B1A+CC01/042.6=B1A+CC01/042.8=B1A+CC01/054.3=B1U+CPS01/301.1=B1U+CPS01/301.5=B1U+CPS01/302.3=B1U+CPS01/303.4=B1U+CPS01/303.5=B1U+CPS01/304.1=B1U+CPS01/304.2=B1U+CPS01/304.4=B1U+CPS01/304.5=B1U+CPS01/305.1=B1U+CPS01/305.5=B1U+CPS01/306.1=B1U+CPS01/307.1=B1U+CPS01-401W1=B1U+CPS01-401W2=B1U+CPS01-402W1=B1U+CPS01-402W1.1 =B1U+CPS01-402W1.2 =B1U+CPS01-402W2=B1U+CPS01-402W2.1 =B1U+CPS01-402W2.2 =B1U+CPS01-403W1=B1U+CPS01-403W1.1 =B1U+CPS01-403W1.2 =B1U+CPS01-403W2=B1U+CPS01-403W2.1 =B1U+CPS01-403W2.2 =B1U+CPS01-404W1=B1U+CPS01-404W1.1 =B1U+CPS01-404W1.2 =B1U+CPS01-404W2=B1U+CPS01-404W2.1 =B1U+CPS01-404W2.2 =B1U+CPS01-405W1=B1U+CPS01-405W1.1 =B1U+CPS01-405W1.2 =B1U+CPS01-405W2=B1U+CPS01-405W2.1 =B1U+CPS01-405W2.2 =B1U+CPS01-406W1=B1U+CPS01-406W1.1 =B1U+CPS01-406W1.2 =B1U+CPS01-406W2=B1U+CPS01-406W2.1 =B1U+CPS01-406W2.2 =B1U+CPS01-407W1=B1U+CPS01-407W1.1 =B1U+CPS01-407W1.2=B1U+CPS01-X1=B1U+CPS01-B1HG1C2B4=B1U+CPS01-125A1=B1U+CPS01-B1HG1A1Y1=B1U+CPS01-B1HG1A1Y1=B1U+CPS01-125A1=B1U+CPS01-B1HG1A2Y1=B1U+CPS01-B1HG1A2Y1=B1U+CPS01-125A1=B1U+CPS01-B1HG1A3Y1=B1U+CPS01-B1HG1A3Y1=B1U+CPS01-125A1=B1U+CPS01-B1HG1A7Y1=B1U+CPS01-B1HG1A7Y1=B1U+CPS01-125A2=B1U+CPS01-B1HG1A8Y1=B1U+CPS01-B1HG1A8Y1=B1U+CPS01-125A2=B1U+CPS01-B1HG1A9Y1=B1U+CPS01-B1HG1A9Y1=B1U+CPS01-125A2=B1U+CPS01-B1HG1A18Y1=B1U+CPS01-B1HG1A18Y1=B1U+CPS01-125A2=B1U+CPS01-B1HG1A19Y1=B1U+CPS01-B1HG1A19Y1=B1U+CPS01-125A3=B1U+CPS01-B1HG1A14Y1=B1U+CPS01-B1HG1A14Y1=B1U+CPS01-125A3=B1U+CPS01-B1HX1A5Y1=B1U+CPS01-B1HX1A5Y1=B1U+CPS01-125A3=B1U+CPS01-B1HG1A17Y1=B1U+CPS01-B1HG1A17Y1=B1+HG1-C1=B1+HG1-C2=B1+HG1-A1-B1=B1+HG1-A1=B1+HG1-A1=B1+HG1-A2-B1=B1+HG1-A2=B1+HG1-A2=B1+HG1-A3-B1=B1+HG1-A3=B1+HG1-A3=B1+HG1-A7-B1=B1+HG1-A7=B1+HG1-A7=B1+HG1-A8-B1=B1+HG1-A8=B1+HG1-A8=B1+HG1-A9-B1=B1+HG1-A9=B1+HG1-A9=B1+HG1-A18-B1=B1+HG1-A18=B1+HG1-A18=B1+HG1-A19-B1=B1+HG1-A19=B1+HG1-A19=B1+HG1-A14-B1=B1+HG1-A14=B1+HG1-A14=B1+HX1-A5-B1=B1+HX1-A5=B1+HX1-A5=B1+HG1-A17-B1=B1+HG1-A17=B1+HG1-A17PNEUMATICPNEUMATICYSLY-OZPNEUMATICPNEUMATICYSLY-OZPNEUMATICPNEUMATICYSLY-OZPNEUMATICPNEUMATICYSLY-OZPNEUMATICPNEUMATICYSLY-OZPNEUMATICPNEUMATICYSLY-OZPNEUMATICPNEUMATICYSLY-OZPNEUMATICPNEUMATICYSLY-OZPNEUMATICPNEUMATICYSLY-OZPNEUMATICPNEUMATICYSLY-OZPNEUMATICPNEUMATICYSLY-OZPNEUMATICPNEUMATIC1131131131131131131131131131131131111311311311311311311311311311311311660.75660.75660.75660.75660.75660.75660.75660.75660.75660.75660.7566=B1U+CPS01/401.3=B1U+CPS01/401.3=B1U+CPS01/402.2=B1U+CPS01/402.2=B1U+CPS01/402.2=B1U+CPS01/402.7=B1U+CPS01/402.6=B1U+CPS01/402.6=B1U+CPS01/403.2=B1U+CPS01/403.2=B1U+CPS01/403.2=B1U+CPS01/403.7=B1U+CPS01/403.6=B1U+CPS01/403.6=B1U+CPS01/404.2=B1U+CPS01/404.2=B1U+CPS01/404.2=B1U+CPS01/404.7=B1U+CPS01/404.6=B1U+CPS01/404.6=B1U+CPS01/405.2=B1U+CPS01/405.2=B1U+CPS01/405.2=B1U+CPS01/405.7=B1U+CPS01/405.6=B1U+CPS01/405.6=B1U+CPS01/406.2=B1U+CPS01/406.2=B1U+CPS01/406.2=B1U+CPS01/406.7=B1U+CPS01/406.6=B1U+CPS01/406.6=B1U+CPS01/407.2=B1U+CPS01/407.2=B1U+CPS01/407.2=B1U+CPS01-407W2=B1U+CPS01-407W2.1 =B1U+CPS01-408W1=B1U+CPS01-408W1.1 =B1U+CPS01-408W1.2 =B1U+CPS01-408W2=B1U+CPS01-408W2.1 =B1U+CPS01-408W2.2 =B1U+CPS01-409W1=B1U+CPS01-409W1.1 =B1U+CPS01-409W1.2 =B1U+CPS01-409W2=B1U+CPS01-409W2.1 =B1U+CPS01-409W2.2 =B1U+CPS01-410W1=B1U+CPS01-410W1.1 =B1U+CPS01-410W1.2 =B1U+CPS01-410W2=B1U+CPS01-410W2.1 =B1U+CPS01-410W2.2 =B1U+CPS01-411W1=B1U+CPS01-411W1.1 =B1U+CPS01-411W1.2 =B1U+CPS01-411W2=B1U+CPS01-411W2.1 =B1U+CPS01-411W2.2 =B1U+CPS01-412W1=B1U+CPS01-412W1.1 =B1U+CPS01-412W1.2 =B1U+CPS01-412W2=B1U+CPS01-412W2.1 =B1U+CPS01-412W2.2 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=B1U+CPS01-461W2 =B1U+CPS01-461W3 =B1U+CPS01-461W4=B1U+CPS01-135A3=B1U+CPS01-135A3=B1U+CPS01-135A3=B1U+CPS01-135A4=B1+HG1-B1=B1+HG1-B2=B1+HG1-B3=B1+HG1-B4YSLY-OZYSLY-OZYSLY-OZYSLY-OZ333333330.750.750.750.75=B1U+CPS01/461.1=B1U+CPS01/461.3=B1U+CPS01/461.4=B1U+CPS01/461.6COMMISSION NO.DRAWING NO.CLIENT SITE::::Kirin Brewery Co. Ltd.ZHUHAI 35346552925CONTENTPLANT LOC.PAGE PAGE DESIGNATION COMMENTB1A B1A B1A B1A B1A B1A B1A B1A B1A B1A B1A B1A B1A B1A B1A B1A B1A CC01CC01CC01CC01CC01CC01CC01CC01CC01CC01CC01CC01CC01CC01CC01CC01CC01001002020021033035042053054055097100101102103104105COVERCONTENTSWITCH CABINET LAYOUTMOUNTING PANEL LEGENDCABINET LIGHTING 230VAC FAN 230VACENERGY SUPPLY 400VACDISTRIBUTION 230VACCONTROL VOLTAGE 24VDCDISTRIBUTION CONTROL VOLTAGE 24VDCDISTRIBUTION CONTROL VOLTAGE 24VDCFAULTDESIGN S7- 400POWER SUPPLY 230VAC S7 - 400=B1A+CC01-X3=B1A+CC01-X4=B1A+CC01-X11=B1A+CC01-X362200200018001600140012001000800600400200+CC0112100x75125x75350x 75121350x7550x7550x7550x751461597164200171081851140050x 75600+CC013001920MOUNTING PANEL LEGENDITEMNO.PART DESIGNATION TYPE DESIGNATION ITEM NUMBER MANUFACTURER REMARK1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20033E535X1053Q1042F4042F8042F1042F3042F6A100.1A100.3A100.4053T1054F1054F2054F3054F4054F5055F1097P8033M5RIT. PS4138.180RIT.SV3443.000MOE.PKZM0-6,3+NHI21MOE.PXL C10AMOE.PXL C10AMOE.PXL C10AMOE.PXL C10AMOE.PXL C10ASIE.6ES7 407-0KA01-0AA0SIE.6ES7 414-3XJ04-0AB0SIE.6ES7 443-1EX11-OEX0PHOE. QUINT 40AMOE.PXL C16AMOE.PXL C16AMOE.PXL C16AMOE.PXL C16AMOE.PXL C16AMOE.PXL C6AMOE.M22-L-RRIT. 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【sphinx】中⽂声学模型训练⼀ .使⽤CMUSphinx训练声学模型CMUSphinx⼯具包中⾃带好⼏个⾼质量的声学模型。

美语模型，法语，中⽂模型。

这些模型是经过优化的，为了得到最佳的性能，⼤多数指令交互系统能直接⽤这些模型，甚⾄⼀些⼤词汇量的应⽤也能直接⽤他们。

除此之外，CMUSphinx提供了功能，能适应现存的模型，为了满⾜有些需要更⾼精度的需求。

当你需要使⽤不同的录⾳环境，（⽐如近距离，远离麦克分或者通过通话过程中），这些情况下做适应结果都是不错的，或者当需要转换⼀种⼝⾳，⽐如美语和英语的转换，印度英语的使⽤等。

⾃适应能满⾜这样的要求：那就是你需要在很短的时间内，⽀持⼀门新的语⾔，那么你只需要基于词典做出⼀个声学模型⾳素集到⽬标⾳素集的转换就可。

然⽽，在某些时候，当下的模型并没法⽤。

⽐如⼿写识别中，或者其他语⾔的监测中。

这些情况下，你需要重新训练你⾃⼰的声学模型。

如下教程会指导你如何开始训练。

⼆开始训练训练之前，假设你有充⾜的数据：⽤于单个⼈的指令应⽤，⾄少需要⼀⼩时录⾳，⽤于很多⼈指令应⽤，需要200个录⾳⼈，每⼈5⼩时⽤于单个⼈的听写，需要10⼩时他的录⾳⽤于多个⼈的听写，需要200个说话⼈，每⼈50⼩时的录⾳同时你要有这门语⾔的语⾳学知识，以及你有⾜够的⽐如⼀个⽉的时间，来训练模型⽽如果你没有⾜够的数据，⾜够的时间，⾜够的经验，那么建议你还是做已有模型的⾃适应来满⾜你的要求。

数据准备训练者需要知道，使⽤哪⼀个声⾳单元来学习参数，⾄少每个序列都要在你的训练集中出现。

这个信息储存在transcript file中。

然后通过词典dictionary，其中对于每个单词都有相应的声⾳序列做了映射。

所以，除了语⾳数据，你还需要⼀个transcripts，和两个词典。

⼀个中是每个单词到发⾳的对应表，以及⼀个中是不发⾳的单元的表，记为filler dictionay.训练开始训练之前需要准备如下两个⽬录etcyour_db.dic - Phonetic dictionaryyour_db.phone - Phoneset fileyour_db.lm.DMP - Language model -语⾔模型your_db.filler - List of fillersyour_db_train.fileids - List of files for trainingyour_db_train.transcription - Transcription for trainingyour_db_test.fileids - List of files for testingyour_db_test.transcription - Transcription for testingwavspeaker_1file_1.wav - Recording of speech utterancespeaker_2file_2.wavFileids (your_db_train.fileids and your_db_test.fileids中列出了语⾳数据的⽂件名。

Search for more types of chromosomal aberrations on a single arrayThe power of the Agilent SurePrint G3 Human Comparative Genomic Hybridization (CGH) Platform has been extended to allow simultaneous detection of copy number and copy-neutral changes on the same array, increasing effi ciency without sacrifi cing quality. Identifi cation of copy-neutral changes, such as loss of heterozygosity (LOH) and uniparental disomy (UPD), is enabled by the addition of a set of SNP probes to Agilent’s widely used CGH array, followed by data analysis using a novel algorithm implemented within Agilent’s Genomic Workbench software. Available in a variety of formats using catalog-content or customized probe sets, Agilent’s SurePrint G3 CGH+SNP Microarray Platform moves your research quickly to answers you can trust.More effective, high-resolution detection of chromosomal variationAccurate detection of chromosomal variation is the key to understanding the cytogenetic basis underlying a number of developmental disorders. Comparative genomic hybridization (CGH) analysis has revolutionized the fi eld of cytogenetics by providing accurate identifi cation of copy number variations at greater than 1000-fold resolution compared to traditional karyotyping. Until recently, however, detection of copy-neutral chromosomal changes—such as LOH or UPD—required additional experimentation. The Agilent SurePrint G3 Human CGH+SNP Platform adds SNP detection to Agilent’s robust and highly regarded CGH platform, allowing you to rapidly and reliably identify both copy number variations and copy-neutral aberrations in a single microarray assay.Using the identical high-throughput workfl ow as the SurePrint G3 CGH-only microarrays, the CGH+SNP arrays can be quickly incorporated into your cytogenetics research. Available in catalog or custom formats (Figure 1), the array offers maximum fl exibility, while the Agilent 60-mer probes enable high-confi dence characterization of copy number and copy-neutral chromosomal aberrations.Agilent’s SurePrint G3 CGH+SNP Microarray PlatformSuperior copy number change detectionAdded LOH/UPD detection increases effi ciency and reduces cost Complete workfl ow from a single supplierEasily customizable to design your own arrayProduct NoteA customizable platform for simultaneous detection of copy number and copy-neutral variationExpanding the current SurePrint G3 selection, Agilent’s SurePrint G3 CGH+SNP arrays are available in both catalog (Table 1) and custom design formats. The catalog 2x400K SurePrint G3 CGH+SNP array contains approximately 300,000 CGH probes and 120,000 SNP probes. Genotypes are measured using two SNP probes per SNP, providing the highest call rate and accuracy per SNP, and resulting in ~5–10 Mb resolution for LOH/UPD detection across the entire genome. The CGH probes are gene- and exon-biased, focusing coverage to the most important regions of the genome.The catalog 4x180K SurePrint G3 CGH+SNP array contains approximately 120,000 CGH probes and 60,000 SNP probes. Genotypes on this array are measured using one SNP probe per SNP, providing ~5–10 Mb resolution for LOH/UPD detection across the entire genome. The CGH probes consist of the entire ISCA (International Standards for Cytogenomic Arrays) Consortium () 8x60K version probe set and an additional 60,000 backbone probes. The ISCA 8x60K probe set has an even backbone probe coverage of 60 Kb and high-density coverage of ~500 targeted regions with the spacing of 5 Kb per probe or at least 20 probes per gene region. These targeted regions include telomere and unique centromere FISH clone regions, microdeletion/duplication regions, genes of known haploinsuffi ciency, and regions associated with X-linked mental disorders.Custom SurePrint G3 CGH+SNP microarrays can also be readily designed in eArray, a free web-based application, or eArray XD, the desktop version of eArray. The eArray database houses more than 28 million CGH probes and approximately 65,000 probes for SNPs. Multiple microarray formats allow for maximum flexibility while 60-mer probes enable high-confi dence characterization of chromosomal variation.Figure 1. Agilent’s SurePrint G3 CGH+SNP catalog and custom microarrays are available in multiple formats and feature amounts.1 Million400K180K60K 60K60K60K60K60K60K 60K180K180K180K400KAgilentAgilentAgilentAgilentCatalog 2x400K CGH+SNPCatalog 4x180K CGH+SNPNumber of CGH probes ~300,000~120,000Median CGH probe spacing ~7 Kb ~25 Kb ISCA content none ISCA 8x60K versionExon biasedyes no Number of SNP probes ~120,000~60,000Number of SNP probes per SNP 21Copy-neutral LOH resolution~5–10 Mb~5–10 MbEasy workfl ow designed for high-quality CGH+SNP detectionA simple, effi cient sample preparation process starts from as little as 500 ng DNA and uses enzymatic restriction digestion followed by Klenow-based enzymatic labeling (Figure 2).1 The new CGH+SNP microarrays are still printed on 1 in. x 3 in. glass slides and are compatible with Agilent’s standard hybridization gaskets and chambers. Microarrays are scanned at 3 microns using the Agilent SureScan Microarray Scanner (G4900DA).Novel and powerful algorithmic analysis detects regions of copy-neutral LOH or UPD (Figure 3). With high-quality DNA samples, the SNP call rate is greater than 95% with a greater than 99% accuracy.2 The number and quality of copy number aberrations detected on the SurePrint G3 CGH+SNP microarrays is comparable to detection using G3 CGH-only microarrays,2 with the added benefi t of simultaneous identifi cation of copy-neutral aberrations as small as 5 Mb. The new SurePrint G3 CGH+SNP array enables effi cient, high-quality discovery of chromosomal aberrations that cannot be detected in a single assay using any other method.Figure 2. The SurePrint G3 CGH+SNP microarrays use the same Agilent CGH workfl ow as the SurePrint CGH-only arrays. Restriction digestion of genomicDNA allows genotyping of SNPs located in the enzymes’ recognition sites.q 12q 13.2q 14q 15.2q 21.1q 21.3q 22.2q 23.32q 24.2q 25.1q 25.3q 26.20.0 1.0 2.0 3.0 4.0-43 -2 -1 0 1 2 342Figure 3. Agilent Genomic Workbench view of SNP data (number of uncut alleles, bottom panel), and CGH data (log 2 ratios, top panel) from a CGH+SNP array shows UPD of the entire chromosome 15. Settings for CGH aberration calling: ADM-2, threshold 5, minimum of 3 probes ≥ 0.25 log 2 ratio.Powerful data analysis capabilities for both CGH and SNP detectionAgilent’s Genomic Workbench software for CGH+SNP array analysis employs a novel algorithm to measure the total copy number of CGH probes and allele-specifi c copy numbers of SNP probes. Copy number aberration calls are determined entirely by non-SNP oligonucleotides maximizing signal-to-noise ratio. A SNP call is made from the (log) ratio of the signal of the sample to the signal of a genotyped internal reference. Regions of copy-neutral LOH or UPD are then located by identifying genomic regions with a statistically signifi cant scarcity of heterozygous SNP calls. The Agilent Genomic Workbench software enables concurrent analysis of CGH and SNP data alongside QC metrics, allowing you to evaluate your data with confi dence.References1. Manual: Agilent Oligonucleotide Array-Based CGH for Genomic DNA Analysis, Enzymatic Labeling for Blood, Cells, or Tissues (with a High-Throughput Option) manual, version 6.3. (G4410-90010)2. Application Note: Simultaneous detection of copy number and copy-neutral LOH using a single microarray. (5990-6274EN)For a more comprehensive list of peer-reviewed publications and research reviews, please visit /genomicsThis item is not approved for use in diagnostic procedures. User is responsible for obtaining regulatory approval or clearance from the appropriate authorities prior to diagnostic use.Agilent Technologies shall not be liable for errors contained herein or for incidental or consequential damages in connection with the furnishing, performance, or use of this material.© Agilent Technologies, Inc. 2011Published in USA, December 16, 20115990-6422ENNote: Microarrays are shipped with foil seal. After breaking the foil, store microarrays at room temperature, in the dark, under a vacuum desiccator or in a nitrogen purge box. Do not expose microarrays to open air during storage.DescriptionNumber of Arrays/SlidesNumber of Slides/KitsPart NumberSurePrint G3 Human CGH+SNP Microarray 2x400K 25G4842A SurePrint G3 Human CGH+SNP Microarray 4x180K 43G4890A SurePrint G3 Custom CGH+SNP Microarray 1x1M 11G4882A SurePrint G3 Custom CGH+SNP Microarray 2x400K 21G4883A SurePrint G3 Custom CGH+SNP Microarray 4x180K 41G4884A SurePrint G3 Custom CGH+SNP Microarray 8x60K81G4885ADescriptionPart NumberSureTag Complete DNA Labeling Kit 5190-4240Human Cot-1 DNA5190-3393Agilent Oligo aCGH Hybridization Kit (25) or (100)5188-5220 or 5188-5380Agilent Oligo aCGH Wash Buffer 1 and 2 Set 5188-5226Hybridization Chamber, Stainless G2534AHybridization Chamber Gasket Slides Varies by array format and quantity Hybridization OvenG2545A Hybridization Oven Rotator Rack G2530-60029SureScan Microarray Scanner G4900DAAgilent CytogenomicsG1662AA–G1667AA。

门禁软件操作说明（简易）感谢阁下选择本公司之产品,敬请您在使用前仔细阅读产品使用说明书.Sphinx 4.2 Integration system门禁软件南京理达软件有限公司一、 软件快速操作流程（步骤）软件快速操作流程以上为软件的快速操作流程图；下面选择重要操作作详细说明。

以下为软件快速操作流程的操作步骤说明（如需更详细的说明请参考标准操作说明书）：一、软件登录、界面介绍、退出1.1运行软件（软件登录）双击桌面上的快捷方式，或单击 开始/程序/ Sphinx INT4.2/Sphinx 4.2 IntegrationControl （门禁系统管理）,第一次运行软件时会出现图1.1所示，选择语言对话框（以后打开直接进入登录界面）。

进入图1.2所示的登陆对话框。

图1.1 图1.2系统默认操作员Administrator,密码system 。

点击进了系统主界面。

无加密狗时进入为演示版（支持2个门点和5张测试卡）。

1.2系统操作界面主要有菜单栏和工具栏快捷图标组成。

菜单栏中的各个功能项目包括所有的系统各种操作，常用操作在工具栏上点击的快捷功能图标即可。

图1.31.2.1 工具栏卡注册表 特殊时间组 实时事件门的属性 人员门禁权限 流程控制 定制条件查询控制器 人员信息 事件提示设置 默认窗口组织机构 人员楼层权限 多地图监控 退出程序快捷工具实时事件监控窗口电子地图标题栏状态栏抓拍图片工具栏中的为主要使用的工具。

注：将光标停于工具栏相应的图标上几秒之后，系统自动弹出相应的文字提示框。

1.2.2树形界面1.2.3系统退出单击Sphinx4.2标题栏关闭图标按钮或单击工具栏关闭图标（或按快捷键ALT+F4）进入关闭程序对话框。

二、软件连接门禁控制2.1 搜索TCP/IP网络型门禁控制器进入“搜索和上载控制器参数”，选择“TCP/IP”点击“”进入“转换器设置程序”（如图2.1.3），双击右侧出现IP地址的控制器，进入“TCP/IP设置”界面，在此设置门禁控制器的新IP地址、掩码、网关、端口、主机IP（服务器电脑IP），工作方式：TCP客户端。