STC89C52处理芯片-毕业论文外文翻译

毕业论文(设计)文献翻译本翻译源自于：维基百科wikiMicrocontroller毕业设计名称:基于STC89C52单片机的太阳能智能充电系统外文翻译名称：微控制器学生姓名：张钱勇院 (系)：电子信息学院专业班级：电气10803 指导教师：唐桃波辅导教师：唐桃波时间： 2012年4月15日至 2012年4月24日微控制器英特尔8742的核心, 片上集成12 MHz的CPU, 128字节的RAM, 2048字节EPROM, 以及IO设备。

微控制器，也称单片机（有时缩写为μC，UC或MCU）是一种在单个集成电路上包含一个控制器核心，内存和可编程输入输出外设的小型计算机。

类型为NOR Flash或OTP ROM的存储器也往往包括在芯片上，以及通常少量的RAM。

微控制器(MCU)是专为嵌入式应用，而相比之下，个人电脑或其他一般用途的应用中使用微控制器(CPU)。

微控制器用于自动控制产品和设备，如汽车发动机控制系统，植入式医疗设备，遥控器，办公设备，家用电器，电动工具，玩具。

比起使用一个单独的微控制器，内存和输入输出设备，微控制器通过降低尺寸和成本来更经济地数控更多的设备和流程。

混合信号微控制器是很常见的，整合了需要控制非数字电子系统的模拟组件。

有些微控制器可使用四位字长，操作频率的时钟速率低至4 kHz来实现低功耗（毫瓦或微瓦）。

他们通常在等待一个事件，如按一个按钮或其它中断时进入节能状态，处于节能状态（CPU时钟和大部分的外设关闭）时功耗可能只有纳瓦级别，使得他们很适合用电池供电长期工作。

其他微控制器，像数字信号控制器（DSP），可能需要注重性能，他们有更大的计算量，更高的时钟速度和更大的功耗。

历史在1971年第一款单片机4位英特尔4004被发布, 在随后的数年时间里英特尔8008和其它功能更为强大微控制器也开始出现。

然而,控制器需要外部芯片来实现某工作方式,这就提高了整个系统的成本,使它不能成为经济的电子器件。

电子与信息工程学院本科毕业论文(设计)外文文献翻译译文题目： 8-bit Microcontroller With 8K Bytes Flash AT89C52 学生姓名：专业：电气工程及其自动化指导教师：2012年11月外文资料8-bit Microcontroller With 8K Bytes Flash AT89C52FeaturesCompatible with MCS-51™ Products8K Bytes of In-System Reprogrammable Flash MemoryEndurance: 1,000 Write/Erase CyclesFully Static Operation: 0 Hz to 24 MHzThree-level Program Memory Lock256 x 8-bit Internal RAM32 Programmable I/O LinesThree 16-bit Timer/CountersEight Interrupt SourcesProgrammable Serial ChannelLow-power Idle and Power-down ModesDescriptionThe AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 and 80C52 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.Pin ConfigurationsBlock DiagramPin DescriptionVCCSupply voltage.GNDGround.Port 0Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pull-ups are required during program verification.Port 1Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (I IL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the following table. Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 outputbuffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (I IL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memories that use 16-bit addresses (MOVX @DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memories that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (I IL) because of the pull-ups. Port 3 also serves the functions of various special features of the AT89C51, as shown in the following table. Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROGAddress Latch Enable is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory. When the AT89C52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to V CC for internal program executions. This pin also receives the 12-volt programming enable voltage (V PP) during Flash programming when 12-volt programming is selected.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Special Function RegistersA map of the on-chip memory area called the Special Function Register (SFR) space is shown in the Table 1.Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect. User software should not write 1s to these unlisted locations, since they may be used in future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 0.Timer 2 RegistersControl and status bits are contained in registers T2CON and T2MOD for Timer 2. The register pair (RCAP2H, RCAP2L) are the Capture/Reload registers for Timer 2in 16-bit capture mode or 16-bit auto-reload mode.Interrupt RegistersThe individual interrupt enable bits are in the IE register. Two priorities can be set for each of the six interrupt sources in the IP register.Data MemoryThe AT89C52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. That means the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space.When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions that use direct addressing access SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H .MOV 0A0H, #dataInstructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).MOV @R0, #dataNote that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.Timer 0 and 1Timer 0 and Timer 1 in the AT89C52 operate the same way as Timer 0 and Timer 1 in the AT89C51.Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON.Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON, as shown in Table 3.Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.In the Counter function, the register is incremented in response to a 1-to-0 transition at its corresponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle.Capture ModeIn the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON.This bit can then be used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1-to-0 transition at external input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit, like TF2 can generate an interrupt. The capture mode is illustrated inAuto-reload (Up or Down Counter)Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR T2MOD. Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin.Figure 2 shows Timer 2 automatically counting up when DCEN = 0. In this mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and RCAP2L are preset by software. If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can generate an interrupt if enabled.Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure 3. In this mode, the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively.A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of resolution. In this operating mode, EXF2 does not flag an interrupt.外文资料译文：8位8字节闪存单片机AT89C52主要性能●与MCS-51单片机产品兼容●8K字节在系统可编程Flash存储器●1000次擦写周期●全静态操作：0Hz～24Hz●三级加密程序存储器●256×8位内部存储器●32个可编程I/O口线●三个16位定时器/计数器●八个中断源●可编程串行通道●低功耗空闲和掉电模式功能特性描述AT89S52是一种低功耗、高性能CMOS8位微控制器，具有8K内置可编程闪存。

电子密码锁中英文对照外文翻译文献This article discusses the design of a matrix keyboard and LCD display based on a microcontroller unit (MCU) for use in electronic password locks。

The keyboard and display are crucial components of the lock。

allowing users to input their password and receive feedback on the lock's status。

The design includes a 4x4 matrix keyboard and a 16x2 LCD display。

both of which are controlled by the MCU。

The article provides a detailed n of the design process。

including the hardware and are components。

and XXX.nXXX and electronic components to provide users with access control。

One key component of these locks is the keyboard and display。

which allow users to input their password and receive feedback on the lock's status。

In this article。

we will discuss the design of a matrix keyboard and LCD display based on an MCU for use in electronic password locks.DesignThe design of the matrix keyboard and LCD display is based on an MCU。

STC89C52处理芯片——单片机类毕业设计外文翻译、中英文翻译外文资料翻译STC89C52 processing chip Prime features: With MCS - 51 SCM product compatibility, 8K bytes in the system programmable Flash memory, 1000 times CaXie cycle, the static operation: 0Hz ~ 33Hz, triple encryption program memory, 32 programmed I/O port, three 16 timer/counter, the eight uninterrupted dual-career UART serial passage, low power consumption, leisure and fall after fall electric power mode can be awakened and continuous watchdog timer and double-number pointer, power identifier. Efficacy: characteristics STC89C52 is one kind of low power consumption, high CMOS8 bit micro-controller, 8K in system programmable Flash memory. Use high-density nonvolatile storage technology, and industrial 80C51 product instruction and pin fully compatible. The Flash memory chips allows programs in the system, also suitable for programmable conventional programming. In a single chip, have clever 8 bits CPU and online system programmable Flash, increase STC89C52 for many embedded control system to provide high vigorous application and useful solutions. STC89C52 has following standard efficacy: 8k byte Flash RAM, 256 bytes, 32 I/O port, the watchdog timer, two, three pointer numerical 16timer/counter, a 6 vector level 2 continuous structure, the serial port, working within crystals and horological circuit. In addition, 0Hz AT89S52 can drop to the static logic operation, support two software can choose power saving mode. Idle mode, the CPU to stop working, and allows the RAM, timer/counters, serial, continuous to work. Protection asana pattern, RAM content is survival, vibrators frozen, SCM, until all the work under a continuous or hardware reset. 8-bit microcontrollers 8K bytes in the system programmable Flash AT89S52 devices. Mouth: P0 P0 mouth is a two-way open drain I/O. As export, each can drive eight TTL logic level. For P0 port to write "1", foot as the high impedance input. When access to external programs and numerical memory, also known as low P0 mouth eight address/numerical reuse. In this mode, with the internal P0 resistor. In the flash when programming, also used for P0 mouth; absorb instruction bytes In the process, the output command byte calibration. When the program requires external, calibration on pull-up resistors. Mouth: P1 mouth P1 is an internal resistance of the eight two-way I/O buffers can drive, P1 output four TTL logic level. To write "1" P1 port, the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). In addition, P1.0 and P1.2 respectively timer/counter 2 external counting input (P1.0 / T2) and when the trigger editor/counter P1.1 input (2), specific T2EX/are shown below. In programming and calibration, flash P1mouth absorb eight address low byte. Efficacy: the foot. P1.0 T2 (timer/counter T2 external counting input), clock output P1.1 T2EX (timer/counter T2 capture/overloaded triggered signals and direction control), P1.5 MOSI (with) online system programming, P1.6 MISO (with) online system programming, P1.7 SCK (with) online system programming, Mouth: P2 P2 mouth is an internal resistance of the eight two-way I/O buffers and P2 output can drive four TTL logic level. To write "1" P2 port, the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). In the external program memory access or use 16bit external numerical memory address read (for example MOVX execution DPTR @), P2 mouth send out high 8 address. In this application, P2 mouth on the internal use strong pull send 1. In using 8-bit address (such as MOVX @ RI) access to external numerical memory, P2 mouth output P2 latches content. In programming and calibration, flash P2 mouth also absorb high eight address byte and some control signal. P3: a P3 mouth on the inside of the eight two-way pull-up resistors I/O buffers can drive, p2 output four TTL logic level. For P3 port to write "1", the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). P3 mouth AT89S52 special functions (also as the second efficacy), are shown below. In programming and calibration, flash also absorb some P3 mouth controlsignals. Port pin second efficacy: P3.0 RXD (serial input) P3.1 TXD (serial export), P3.2 INTO the discontinuous (0) P3.3 INT1 (1) the discontinuous P3.4 (time/counter TO 0) P3.5 T1 (1) time/counter, P3.6 WR (external numerical memory write for) P3.7 RD (external numerical memory read for) In addition, also absorb some used in mp3 mouth FLASH memory programming and calibration of program control signals. RST, reset input: when the vibrator, RST pin appeared two machine cycle above high level will be reset the chip. ALE/PROG - when access to external program memory or numerical memory, ALE (address latch allow) output pulses are used to latch address of low eight bytes. Normally, ALE with clock frequencies are 1/6 output pulse si。

附录B：外文文献及译文STC89C52 Date SheetDescriptionThe STC89C52 is a low-power，high-performance CMOS 8-bit microcontroller with 8Kbytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip，the Atmel STC89C52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.The STC89C52 provides the following standard features: 8K bytes of Flash，256 bytes of RAM，32 I/O lines，Watchdog timer，two data pointers，three 16-bit timer/counters，a six-vector two-level interrupt architecture，a full duplex serial port，on-chip oscillator，and clock circuitry. In addition，the STC89C52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM，timer/counters，serial port，and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator，disabling all other chip functions until the next interrupt or hardware reset.VCCSupply voltage.GNDGround.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As an output port，each pin can sink eight TTL inputs. When 1sare written to port 0 pins，the pins can be used as highimpe dance inputs. Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode，P0 has internal pullups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program verification.Port 1Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins，they are pulled high by the internal pullups and can be used as inputs. As inputs，Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.In addition，P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX)，respectively，Port 1 also receives the low-order address bytes during Flash programming and verificationPort 2Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins，they are pulled high by the internal pullups and can be used as inputs. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this application，Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI)，Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins，they are pulled high by the internal pullups and can be used as inputs. As inputs，Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the STC89C52，as shown in the following table. Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 96 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO，the RESET HIGH out feature is enabled. ALE/PROGAddress Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation，ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes.If desired，ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set，ALE is active only during a MOVX or MOVC instruction. Otherwise，the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable (PSEN) is the read strobe to external program memory. When the STC89C52 is executing code from external program memory，PSEN is activated twice each machine cycle，except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.Note，however，that if lock bit 1 is programmed，EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming. XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.译文：STC89C52 数据手册功能特性描述STC89C52是一种低功耗、高性能CMOS8位微控制器，具有8K在系统可编程Flash 存储器。

附件1：外文资料翻译译文AT89C52中文资料AT89C52是美国Atmel公司生产的低电压、高性能CMOS 8位单片机，片内含8KB的可反复檫写的程序存储器和12B的随机存取数据存储器（RAM），器件采用Atmel公司的高密度、非易失性存储技术生产，兼容标准MCS-51指令系统，片内配置通用8位中央处理器（CPU）和Flash存储单元，功能强大的AT89C52单片机可灵活应用于各种控制领域。

AT89C52单片机属于AT89C51单片机的增强型，与Intel公司的80C52在引脚排列、硬件组成、工作特点和指令系统等方面兼容。

其主要工作特性是：•与MCS-51产品指令和引脚完全兼容•8k字节可重擦写Flash闪速存储器•1000次擦写周期•具有3个可编程定时器•全静态操作：0Hz-24MHz•256×8字节内部RAM•32个可编程I/O口线•3个16位定时/计数器•8个中断源•可编程串行uart通道•低功耗空闲和掉电模式单片机正常工作时，都需要有一个时钟电路和一个复位电路。

本设计中选择了内部时钟方式和按键电平复位电路，来构成单片机的最小电路。

功能特性描述：AT89C52是一种低功耗、高性能CMOS8位微控制器，具有8K 在系统可编程Flash 存储器。

使用Atmel 公司高密度非易失性存储器技术制造，与工业80C51产品指令和引脚完全兼容。

片上Flash允许程序存储器在系统可编程，亦适于常规编程器。

AT89C52方框图P0 口：P0 口是一组8 位漏极开路型双向I/O 口，也即地址/数据总线复用口。

作为输出口用时，每位能吸收电流的方式驱动8 个TTL逻辑门电路，对端口P0 写“1”时，可作为高阻抗输入端用。

在访问外部数据存储器或程序存储器时，这组口线分时转换地址（低8 位）和数据总线复用，在访问期间激活内部上拉电阻。

在Flash 编程时，P0 口接收指令字节，而在程序校验时，输出指令字节，校验时，要求外接上拉电阻。

中文4800字附录3：外文翻译AT89C52 monolithic integrated circuit introduction AT89C52 is the low voltage which American ATMEL Corporation produces, the high performance CMOS 8 monolithic integrated circuits, internal may repeatedly scratch read-only program memory (PEROM) and 256bytes random access data-carrier storage (RAM) including 8k bytes which writes, the component uses ATMEL Corporation the high density, the non-volatility memory technology production, is compatible with the standard MCS-51 command system and 8052 product pins, internal sets at general 8 central processor (CPU) and the Flash memory cell, the function formidable AT89C52 monolithic integrated circuit suits in many comparatively plurality of controls application situation.Main performance parameter:Are completely compatible with the MCS-51 product instruction and the pinThe 8k byte may again scratch writes Flash to dodge the fast memory1000 times scratches the write cycleEntire static operation: 0Hz—24MHzThree level of encryption program memory256×8 In byte RAM32 programmable I/O mouth line3 16 fixed time/counters8 interrupt sourcesProgrammable serial UART channelThe low power loss idle and falls the electricity patternFunction characteristic outline:Below AT89C52 provides the standard function: 8k byte Flash dodges the fast memory, 256 byte internal RAM,32 I/O mouth line, 3 16 fixed time/counters, 6 vector two level of interrupt structures, A full-duplex serial passes unguardedly, internal oscillator and clock electric circuit.At the same time, AT89C52 may fall to the 0HZ static state logical operation, and supports the electricity saving working pattern which two kind of softwares may elect.The idle way stops CPU the work, but permits RAM, fixed time/the counter, serial passes unguardedly and the interruption system continues to work.Falls the electricity way to preserve in RAM the content, but the oscillator knock off and forbids other all part work to reposition until the next hardware.The pin function showsVcc: Supply voltageGND: GroundingP0 mouth: The P0 mouth is one group of 8 leaks leads the way extremely the bidirectional I/O mouth, also is the address/data bus multiplying mouth.As outlet with when, each potential energy absorption current way actuates 8 TTL logic gate, when writes “1” to port P0, may take the high impedance input end uses.When visits exterior data-carrier storage or the program memory, when this group of mouth line segment transforms the address (low 8) and the data bus multiplying, pulls the resistance in the visit activation interior.When Flash programming, P0 mouth receive instruction byte, but when program check, when output order byte, verification, outside the request joins pulls the resistanceP1 mouth: P1 is in a belt interior pulls the resistance 8 bidirectional I/O mouth, the P1 output buffer may actuate (absorption or output current) 4 TTL logic gate.Writes “1” to the port, pulls the resistance through internal on to pull the port tothe high level, this time may make the input port.When makes the input port use, because in internal existence pulls the resistance, some pin is pulled lowly by exterior signal when can output electric current (IIL).With at89C51 similarity is, P1.0 and P1.1 also may take separately fixed time/the counter 2 exterior countings inputs (P1.0/T2) and inputs (P1.1/T2EX), see also table 1.Flash programming and program check period, P1 receives the low 8 bit address.P2 mouth: P2 is one has in the interior to pull the resistance 8 bidirectional I/O mouth, the P2 output buffer may actuate (absorption or output current) 4 TTL logic gate.Writes “1” to port P2, pulls the resistance through internal on to pull the port to the high level, this time may make the input port, when makes the input port use, because in internal existence pulls the resistance, some pin is pulled lowly by exterior signal when can output electric current (IIL).When visits exterior program memory or 16 bit address exterior data-carrier storage (e.g. carries out the MOVX@DPTR instruction), the P2 mouth sends out the high 8 bit address data.When visits 8 bit addresses exterior data-carrier storage (for example carries out the MOVX@RI instruction), the P2 mouth outputs the P2 latch the contentWhen Flash programming or verification, P2 also receives the top digit address and some control signal.P3 mouth: The P3 mouth is a group has in the interior to pull the resistance 8 bidirectional I/O mouth.The P3 mouth output buffer may actuate (absorption or output current) 4 TTL logic gate.Reads in “1” when to the P3 mouth, they the position resistance are pulled by the interior in Gao Bingke the achievement to input the port.This time, will be pulled by the outside the low P3 mouth to use to pull resistance output current (IIL).The P3 mouth besides took the general I/O mouth line, a more important use isIn addition, the P3 mouth also receives some to use in Flash dodging the fast memory programming and the program check control signal.RST: Replacement input.When the oscillator works, the RST pin will appear above two machine cycles the high level to cause the monolithic replacement.ALE/PROG: When visits exterior program memory or the data-carrier storage, ALE (address lock saves permission) to output the pulse to use in the lock saving the address the low 8 bytes.In ordinary circumstances, ALE still by clock oscilation frequency 1/6 output fixed pulse signal, therefore it may the foreign output clock or uses in fixed time the goal.Must pay attention: When visits exterior data-carrier storage will jump over a ALE pulse.To Flash memory programming period, this pin also uses in inputting programming pulse (PROG).If has the necessity, may through to in special function register (SFR) area 8EH the unit D0 position position, be possible to forbid the ALE operation.After this position position, only then MOVX and the MOVC instruction can activate ALE.In addition, this pin can pull weakly high, when the monolithic integrated circuit carries out exterior procedure, should establish the ALE prohibition position to be invalid PSEN: The procedure storage permits the (PSEN) output is exterior program memory reads the gating signal, when AT89C52 takes the instruction by exterior program memory (or data), each machine cycle two PSEN is effective, namely outputs two pulses.When visits exterior data-carrier storage, will jump over two RSEN signals.EA/VPP: Exterior visit permission.Wants to cause CPU only to visit exterior program memory (address is 0000H-FFFFH), the EA end must maintain the low level (earth).Must pay attention: If adds mil LB1 to program, when replacement the interiorcan lock saves the EA end condition.If the EA end (meets the Vcc end) for the high level, CPU carries out in the internal procedure memory instruction.When the Flash memory programs, this pin adds on 12V programming permission power source VPP, certainly this must be this component is uses 12V to program voltage VPP.XTAL1: Oscillator inverting amplifier and internal clock generator input end.XTAL2: Oscillator inverting amplifier out-port. Special function register:In at89C52 internal memory, the 80H-FFH altogether 128 units for special function register (SFE), SFR address basement reflection as shown in Table 2.All addresses all are defined by no means, only then a part is defined from the 80H-FFH altogether 128 bytes, but also has quite a part not to define.To the definition unit read-write will not have been Yuan Xiao, the read-out value will be indefinite, but will read in the data will also lose.Should not “1” not read in the data the definition unit, then will possibly entrust with the new function in these units in the future product, in this case, after replacement these unit value always “0”.AT89C52 besides with AT89C51 all fixed time/counters 0 and fixed time/counter 1, but also increased a fixed time/counter 2.Fixed time/the counter 2 control statusbyte is located T2CON、T2MOD (to see Table 4), the register to (RCA02H, RCAP2L) is the timer 2/automatic loads the register again under 16 capture ways or 16 automatic heavy loading way capture.Interrupt register:AT89C52 has 6 interrupt sources, 2 interrupt priorities, the IE register controls each interrupt position, in the IP register 6 interrupt source each may decide as 2 superiordata-carrier storages:AT89C52 has 256 byte internal RAM,80H-FFH high 128 bytes and the special function register (SFR) address is overlap, also is high 128 byte RAM and the special function register address is same, but in physics they are separated.When an instruction visits the 7FH above dummy home address unit, in the instruction uses the addressing way is different, also is the addressing way decision is visits high 128 byte RAM to visit the special function register.If the instruction is the direct addressing way for the visit special function register.For example, following direct addressing instruction visit special function register 0A0H (i.e. P2 mouth) address unit.MOV 0A0H,#dataThe indirect addressing instruction visits high 128 byte RAM, for example, in following indirect addressing instruction, the R0 content is 0A0H, then the visit data byte address is 0A0H, but is not the P2 mouth (0A0H).MOV the @R0,#datastorehouse operation also is the indirect addressing way, therefore, high 128 bit data RAM also may take the storehouse area use.Timer 0 and timer 1:The AT89C52 timer 0 and the timer 1 working and AT89C51 are same.Timer 2:The timer 2 is 16 fixed time/counters.It already may when timer use, also may take the external event counter use, its working chooses by the special function register T2CON C/T2 position.The timer 2 has three workings: The capture way, the automatic heavy loading (upward or downward counting) the way and the baudrate generator way, the working chooses by the T2CON control position, see also table 4.The timer 2 is composed by two 8 register TH2 and TL2, in the timer working, each machine cycle TL2 register value adds 1, because a machine cycle vibrates the clock constitution by 12, therefore, counting speed for oscilation frequency 1/12.When counting working, when on the T2 pin exterior input signal produces by 1 to 0 drops along, the register value adds 1, under this working, each machine cycle 5SP2 period, carries on the sampling to exterior input. If picks in the first machine cycle the value is 1, but the value which picks in the next machine cycle is 0, then is following close on the next cyclical S3P1 period register adds 1.Because distinguishes 1 to need 2 machine cycles to 0 jumps (24 durations of oscillation), therefore, highest counting speed for oscilation frequency 1/24. In order to guarantee the sampling the accuracy, the request input level maintains at least before the change for a complete cyclical the time, guarantees the input signal at least by sampling one time.Capture way:Under the capture way, chooses two ways through T2CON control position EXEN2.If EXEN2=0, the timer 2 is 16 timers or the counter, when counting overflow, to the T2CON overflow symbolized TF2 sets at the position, simultaneously activates the interrupt.If looks up EXEN2=1, the timer 2 completes the same operation, But when the T2EX pin exterior input signal has 1 to 0 negative jumps, also appears in TH2 and the TL2 value is caught separately to in RCAP2H and RCAP2L.Moreover, the T2EX pin signal jump causes in T2CON EXF2 to set at the position, is similar with TF2, EXF2 also can interrupt exactly.Capture way as shown in Figure 4.Automatic heavy loading (upward or downward counter) way:When timer 2 work in 16 automatic heavy loading ways, can to its programming for upward or the downward counting way, this function may (see Table 5) through special function register T2CON the DCEN position (permission downward counting) choose.When replacement, the DCEN position “0”, the timer 2 defaults establishes as the upward counting. When DCEN sets at the position, the timer 2 already may count upwardly also may the downward counting, this is decided by the T2EX pin value,see also Figure 5, when DCEN=0, the timer 2 automatic setups for the upward counting, under this way, in the T2CON EXEN2 control position have two kind of choices, if EXEN2=0, the timer 2 for the upward counting to the 0FFFFH overflow, sets at the position TF2 activation interrupt, simultaneously 16 counter register RCAP2H and the RCAP2L heavy loading, RCAP2H and the RCAP2L value may by the software initialization.When DCEN sets at the position, the timer 2 already may count upwardly also may the downward counting, this is decided by the T2EX pin value, see also Figure 5, when DCEN=0, the timer 2 automatic setups for the upward counting, under this way, in the T2CON EXEN2 control position have two kind of choices, if EXEN2=0, the timer 2 for the upward counting to the 0FFFFH overflow, sets at the position TF2 activation interrupt, simultaneously 16 counter register RCAP2H and the RCAP2L heavy loading, RCAP2H and the RCAP2L value may by the software initialization.Baudrate generator:When T2CON (Table 3) TCLK and RCLK set at the position, fixed time/the counter 2 takes the baudrate generator use.If fixed time/the counter 2 took thetransmitter or the receiver, its transmission and the receive baudrate may be different, the timer 1 uses in other functions, as shown in Figure 7.If RCLK and TCLK set at the position, then timer 2 work in baudrate generator way.The baudrate generator way and the automatic heavy loading way are similar, under this way, the TH2 turn over causes the timer 2 registers is important the new loading with in RCAP2H and the RCAP2L 16 figures, this value establishes by the software.In the way 1 and the way in 3, the baudrate determined by the timer 2 overflow speeds according to the equation below that,Way 1 and 3 baudrate = timer overflow rate /16The timer already can work in fixed time the way also can work in the counting way, in the majority applications, is the work in fixed time the way (C/T2=0).The timer 2 took when baudrate generator, with as the timer operation is different, when usual achievement timer, (1/12 oscilation frequency) checks the value in each machine cycle to add 1, but took when baudrate generator use, (1/2 oscilation frequency) the register value adds 1 in each condition time. The baudrate formula is as follows:The way 1 and 3 baudrate = oscilation frequency/{32×[65536-(RCAP2H, RCAP2L)]}in the formula (RCAP2H, RCAP2L) is in RCAP2H and RCAP2L 16 does not have the sign digit.The timer 2 took the baudrate generator use electric circuit as shown in Figure 7.In when T2CON RCLK or TCLK=1, the baudrate working only then is effective. In the baudrate generator working, the TH2 turn over cannot cause TF2 to set at theposition, therefore does not have the interrupt.But if EXEN2 sets at the position, also the T2EX end produces by 1 to 0 negative jumps, then can cause EXF2 to set at the position, this time cannot load (RCAP2H, RCAP2L) content in TH2 and TL2.Therefore, when the timer 2 takes the baudrate generator use, T2EX may use as the additional exterior interrupt source.Needs to pay attention, when timer 2 work in baudrate, when moves (TR2=1) as the timer, cannot visit TH2 and TL2.Because this time each condition time timer can add 1, to its read-write will obtain a indefinite value.But however, may read to RCAP2 cannot write, because the write operation will be the reload, the write operation possibly command writes with/or the heavy loading makes a mistake.In visits timer 2 or in front of the RCAP2 register, should (eliminate the timer closure TR2).The programmable clock outputs:The timer 2 may output a dutyfactor through the programming from P1.0 is 50% clock signal, as shown in Figure 8.The P1.0 pin besides is a standard I/O mouth, but also may cause it through the programming to take fixed time/the counter 2 exterior clock inputs and the output dutyfactor 50% clock pulse.When the clock oscilation frequency is 16MHz, outputs the clock frequency range is 61Hz-4MHz.When establishes fixed time/the counter 2 as the clock generator, C/T2(T2CON.1)=0, T2OE(T2MOD.1)=1, must or stops the timer by TR2(T2CON.2) start.The clock output frequency is decided in the oscilation frequency and the timer 2 catches the register (RCAP2H, RCAP2L) reload value, the formula is as follows:The output clock frequency = oscillator frequency/{4×[65536-(RCAP2H, RCAP2L)]}under the clock output way, the timer 2 turn over cannot have the interrupt, this characteristic with took when baudrate generator use is similar.When the timer 2 takes the baudrate generator use, Also may take the clock generator use, but needs to pay attention is the baudrate and the clock output frequency cannot separate the determination, this is because they with use RCAP2H and RCAP2L.AT89C52单片机的介绍AT89C52是美国ATMEL公司生产的低电压，高性能CMOS 8位单片机，片内含8k bytes的可反复擦写的只读程序存储器（PEROM）和256bytes的随机存取数据存储器（RAM），器件采用ATMEL公司的高密度、非易失性存储技术生产，与标准MCS－51指令系统及8052产品引脚兼容，片内置通用8位中央处理器（CPU）和Flash存储单元，功能强大AT89C52单片机适合于许多较为复杂控制应用场合。

外文资料翻译1、STC89C52 processing chipPrime features:With MCS - 51 SCM product compatibility, 8K bytes in the system programmable Flash memory, 1000 times CaXie cycle, the static operation: 0Hz ~ 33Hz, triple encryption program memory, 32 programmed I/O port, three 16 timer/counter, the eight uninterrupted dual-career UART serial passage, low power consumption, leisure and fall after fall electric power mode can be awakened and continuous watchdog timer and double-number pointer, power identifier.Efficacy: characteristicsSTC89C52 is one kind of low power consumption, high CMOS8 bit micro-controller, 8K in system programmable Flash memory. Use high-density nonvolatile storage technology, and industrial 80C51 product instruction and pin fully compatible. The Flash memory chips allows programs in the system, also suitable for programmable conventional programming. In a single chip, have clever 8 bits CPU and online system programmable Flash, increase STC89C52 for many embedded control system to provide high vigorous application and useful solutions. STC89C52 has following standard efficacy: 8k byte Flash RAM, 256 bytes, 32 I/O port, the watchdog timer, two, three pointer numerical 16 timer/counter, a 6 vector level 2 continuous structure, the serial port, working within crystals and horological circuit. In addition, 0Hz AT89S52 can drop to the static logic operation, support two software can choose power saving mode. Idle mode, the CPU to stop working, and allows the RAM, timer/counters, serial, continuous to work. Protection asana pattern, RAM content is survival, vibrators frozen, SCM, until all the work under a continuous or hardware reset. 8-bit microcontrollers 8K bytes in the system programmable Flash AT89S52 devices.Mouth: P0 P0 mouth is a two-way open drain I/O. As export, each can driveeight TTL logic level. For P0 port to write "1", foot as the high impedance input.When access to external programs and numerical memory, also known as low P0 mouth eight address/numerical reuse. In this mode, with the internal P0 resistor.In the flash when programming, also used for P0 mouth; absorb instruction bytes In the process, the output command byte calibration. When the program requires external, calibration on pull-up resistors.Mouth: P1 mouth P1 is an internal resistance of the eight two-way I/O buffers can drive, P1 output four TTL logic level. To write "1" P1 port, the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). In addition, P1.0 and P1.2 respectively timer/counter 2 external counting input (P1.0 / T2) and when the trigger editor/counter P1.1 input (2), specific T2EX/are shown below. In programming and calibration, flash P1 mouth absorb eight address low byte.Efficacy: the foot.P1.0 T2 (timer/counter T2 external counting input), clock outputP1.1 T2EX (timer/counter T2 capture/overloaded triggered signals and direction control),P1.5 MOSI (with) online system programming,P1.6 MISO (with) online system programming,P1.7 SCK (with) online system programming,Mouth: P2 P2 mouth is an internal resistance of the eight two-way I/O buffers and P2 output can drive four TTL logic level. To write "1" P2 port, the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). In the external program memory access or use 16bit external numerical memory address read (for example MOVX execution DPTR @), P2 mouth send out high 8 address. In this application, P2 mouth on the internal usestrong pull send 1. In using 8-bit address (such as MOVX @ RI) access to external numerical memory, P2 mouth output P2 latches content. In programming and calibration, flash P2 mouth also absorb high eight address byte and some control signal.P3: a P3 mouth on the inside of the eight two-way pull-up resistors I/O buffers can drive, p2 output four TTL logic level. For P3 port to write "1", the internal resistance to port, can push as input mouth. When used as input, external and internal foot because of low resistance, will output current (IIL). P3 mouth AT89S52 special functions (also as the second efficacy), are shown below. In programming and calibration, flash also absorb some P3 mouth control signals.Port pin second efficacy:P3.0 RXD (serial input)P3.1 TXD (serial export),P3.2 INTO the discontinuous (0)P3.3 INT1 (1) the discontinuousP3.4 (time/counter TO 0)P3.5 T1 (1) time/counter,P3.6 WR (external numerical memory write for)P3.7 RD (external numerical memory read for)In addition, also absorb some used in mp3 mouth FLASH memory programming and calibration of program control signals.RST, reset input: when the vibrator, RST pin appeared two machine cycle above high level will be reset the chip.ALE/PROG - when access to external program memory or numerical memory, ALE (address latch allow) output pulses are used to latch address of low eight bytes. Normally, ALE with clock frequencies are 1/6 output pulse signal with fixed, so it can be used for the purpose or output clocks. Timing Those who want an attention is: whenever access to external numerical memory will skip a ALE pulse.For FLASH memory programming, this pin is used for input programming pulse (.) PROGIf necessary, but through special effect to the zone registers (SFR) 8EH D0 position, the unit can be banned ALE operations. This position is a bit, MOVX and MOVC instructions will be activated. ALE -- In addition, the foot will be weak, execute external program MCU hign should be banned, a void. Set ALE PSEN - program storage PSEN allowed (output is outside of the program memory read, choose communication by external program memory when taking AT89C52 instructions (or), each machine cycle PSEN twice, two pulse output is useful, during this period, when access to external numerical memory, will skip PSEN twice.EA/VPP - external access permission, to make the CPU only access to external program memory (address for 0000H - FFFFH), EA end must remain low level (ground). Should notice is: if a LB1 is encrypted, reset when programming will latch EA end.As for the high level of the EA (VCCS), the CPU is the implementation of the program memory internal instructions.FLASH memory when programming, this pin plus + 12 v programming allow power Vpp, of course, that is the part is used to Vpp voltage 12V programming.2、China's washing machine market is entering the replacement period, the market potential is huge, people washing requirements are also increasing, the current strength of the main washing machine washing function, into the drainage system, automatic fault diagnosis function, pause and other major functions in many respects still can not meet people's needs. This requires that designers have a higher professional and technical level, able to make more good suggestions and new topics, people will need to become a reality, to design more energy-efficient, more comprehensive and more humane automatic washing machine. The current washing machines are not compatible implement all aspects of the play more plaid laundry manufacturers arefocusing on specialty brands of washing machines, highlight one or two different washing machine and other personalized features, to realize the function of the washing machine is controlled by microcomputer the microcontroller small and flexible control, therefore, is designed to give single-chip control system is very practical. The design of the washing machine and the controller also to meet the different needs of some users. SCM control technology will also be used in real life, the most important thing is to learn the use of technology.In today's world of technology, the era of knowledge explosion hit, as long as people need, it is possible to produce a product to meet the needs of the people. It is this development of the washing machine, it was found that in life some of its inconvenience, it will continue to improve and perfect it in practice, the new washing machine is in this case was born.Ultrasonic washing machine cavitation ultrasonic vibration generated by the production of gas bubbles in the wash side edges disappear movement, resulting in strong water pressure, then add a small amount of laundry detergent, fiber vibration, phacoemulsification decontamination, water bubbles rise, resulting in a washing tub central flip outward flow, then friction between the clothes, and a very effective role in full contact with washing detergent production. This washing machine washing tub is small, barrel no moving parts, no mechanical electrical failure, convenient repair. Dictionary uniformity, no wound, not to hurt the fabric, washing effect, water, power.This electromagnetic washing machine washing machine washing tub has four heads, each of the top clamps to grip the stretch clothes, washing each head has a solenoid, the power to micro-vibration hit 2500 times / second, so laundry in the washing liquid. Because no motor, no noise, 50% water, power 75%.Foam washing machine temperature Osaka, Japan developed a large washing machine to wash clothes without hot foam. Filling the lower part of the detergent in the washing machine, put the clothes after the toggle switchand start blowing the air into the tank foam by heating to 70Foam wash clothes degrees Celsius, and then into the tub next defoaming apparatus, generally 5 to 10 minutes to wash / 5, 21L / 1kg dryer.One kind without detergent or detergent washing machine washing machine vacuum developed by the former Soviet Union, a vacuum pump into a vacuum suction laundry bins, buckets of water movement bubble burst and decontamination. Clean and high, does not harm clothes, no noise, and high cost. Actually cold washing boiling principle, within a few seconds, then withdrawn from the upper air washing tub. Thin like air and water, such as boiling, stir in laundry foam whirlpool, 1.5 to 2 minutes to wash clothes, clothes generally 7 to 10 minutes to complete the whole process.Italian Zanussi jet washing machine detergent company will continue to develop a spray to the laundry washing machine, it seems dry, it can save 20% water, 30% of the province detergent, can save 35%, save time by 10%. This washing machine is completely different from the front-loading washing machine, installed in the sprinkler system of the injection device continuously spray water and detergent on the clothes washed, clothes and stir in stainless steel tanks. Laundry in the liquid, stirring constantly, just as there is no barrel water. However, it permeates through the water flow into a water storage tank is located in the laundry drum bottom. In the tank, the water is re-injected into the recirculated heating up the laundry, the washing tub made periodically dehydration, to drain the water and contaminants, and then rinsed three times, and finally washing dehydration. Some of the problems to be solved washing machineSince China started late washing machine factory, plus some technical issues, the end of the reproduction inevitable and some models show some ills. The main shortcomings are:Noise, hemp and leaking electricity, water or water more than poor or poor drainage, the work cycle is not smooth, vibration, damage to the laundry, washing effect is poor, dehydration automatic insertion of the poor, poordehydration, weight capacity unreasonable. Specifically, there is a problem in the washing machine structure, quality, and management of raw materials and molds.中文翻译1、STC89C52处理芯片首要性能：与MCS-51单片机产物兼容、8K字节在系统可编程Flash存储器、1000次擦写周期、全静态操作：0Hz～33Hz 、三级加密程序存储器、32个可编程I/O口线、三个16位定时器/计数器八个间断源、全双职工UART 串行通道、低功耗空闲和掉电模式、掉电后间断可唤醒、看门狗定时器、双数值指针、掉电标识符。

中英文对照外文翻译文献(文档含英文原文和中文翻译)翻译：STC89C52处理芯片首要性能：与MCS-51单片机产物兼容、8K字节在系统可编程视频存储器、1000次擦拭周期，全静态操作：0Hz~33Hz、三级加密程序存储器，32个可编程I/O接口线、三个16位定时器（计数器），八个中断源、低功能耗空闲和掉电模式、掉电后间断可唤醒，看门狗定时器、双数值指针，掉电标示符。

关键词：单片机，UART串行通道，掉电标示符等前言可以说，二十世纪跨越了三个“点”的时代，即电气时代，电子时代和现已进入的电脑时代。

不过，这种电脑，通常指的是个人计算机，简称PC机。

还有就是把智能赋予各种机械的单片机（亦称微控制器）。

顾名思义，这种计算机的最小系统只用了一片集成电路，即可进行简单的运算可控制。

因为它体积小，通常都是藏在被控机械的内部里面。

它在整个装置中，起着有如人类头脑的作用，他出了毛病，整个装置就会瘫痪。

现在，单片机的种类和适用领域已经十分广泛，如智能仪表、实施工控、通讯设备、导航系统、家用电器等。

各种产品一旦用上了单片机，就你能起到产品升级换代的功效，常在产品名称前冠以形容词——“智能型”，如智能洗衣机等。

接下来就是关于国产STC89C52单片机的一些基本参数。

功能特性描述:STC89C52单片机是一种低功耗、高性能CMOS8位微控制器，具有8K在系统可编程视频播放存贮器使用高密度非易失性存储器技术制造，与工业80C51 产物指令和引脚完全兼容。

片上反射速度允许程序存储器在系统可编程，也适用于常规的程序编写器。

在其单芯片上，拥有灵敏小巧的八位中央处理器和在线系统可编程反射，这些使用上STC89C52微控制器为众多嵌入式的控制应用系统提供高度矫捷的、更加有用的解决方案。

STC89C52微控制器具有以下的标准功效：8K字节的反射速度，256字节的随机存取储存器，32位I/O串口线，看门狗定时器，2个数值指针，三个16为定时器、计数器，一个6向量2级间断结构，片内晶振及钟表电路。

at89c52单片机简介中英文对照外文翻译文献中英文资料对照外文翻译A T89C52 Single-chip microprocessor introductionSelection of Single-chip microprocessor1. Development of Single-chip microprocessorThe main component part of Single-chip microprocessor as a result of by such centralize to be living to obtain on the chip，In immediate future middle processor CPU。

Storage RAM immediately﹑memoy read ROM﹑Interrupt system、Timer /'s counter along with I/O's rim electric circuit awaits the main microcomputer section，The lumping is living on the chip。

Although the Single-chip microprocessor r is only a chip，Yet through makes up and the meritorous service be able to on sees，It had haveed the calculating machine system property，calling it for this reason act as Single-chip microprocessor r minisize calculating machine SCMS and abbreviate the Single-chip microprocessor。

Design of LED Display Control System Based onAT89C52 Single Chip MicrocomputerInstitute of Machinery, on 5 February 2004Maurice WilkesABSTRACT ：THIS paper introduces display design process about hardware and softwarebased on AT89C52 single chip microcomputer. We use a simple external circuit to control the display screen,which size is 32 ×192. The display screen also can display the size of the six 32 × 32 dot matrix Chinese characters by a dynamic scan mode, and can be divided into two small display screens, which can display twenty-four Chinese characters whose size is 16×16. We can modify the code to change the content of the display, subtitles can achieve scrolling function and the scroll speed can be adjusted according to requirements, subtitles can also achieve pause function. The Chinese character code stored in external data memory, the capacity of data memory is expanded according to the requirements of Chinese characters we want to show. This display screen has advantages of small volume, few hardware and simple circuit structure.KEY WORDS: LED, Chinese Character Display, AT89C52I. INTRODUCTIONLED display has become an important symbol of the city lighting, modernization and informationsociety with continuous improvement and beautificatio n of people’s living environment. LED lights can be seen in the large shopping malls, railway station, docks, underground station, and a variety of management window and so on. LED business has become a fast-growing new industry, a huge market space and bright prospects. The text, pictures, animation and video are displayed by LED’s light, and content can be changed. Some components are the display devices of the modular structure, and which usually consists of a display module, control system and power system. The display module is constituted by the lattice structure which consists of LED, and is responsible for light-emitting display; the screen can display text, pictures, video and so on by control system which can control light or dark of LED in the corresponding region; Power system is responsible for transforming input voltage an d current into voltage and current which the screen needs. LED dot matrix display extracted display character font through PC, and sent to the microcontroller, then displayed in the dot matrix screen, which mainly used for display of indoor and outdoor characters. LED dot matrix display can be divided into graphic display, image display and video display by displayed content. Compared with the image display，the characteristics of graphic display is no difference in gray color whether it is monochrome or color display. Therefore, graphic display also fails to reflect the richness of color, and video display can not only show exercise, clear and full-color images but also show television and computer signals. Although there are some differences between the three, but the most basic principles are similar.II. System Overall Structure DesignSingle Chip Microcomputer (SCM) models were selected according to the target, function,reliability, cost, accuracy and speed of the control system. According to the actual situation of the subject, the choice of SCM models mainly considered from the following two aspects: First, SCM has strong anti-interference ability; Second, SCM has a higher cost-effective. Due to MCS-51 is widely used in China, has more information and can compatible with the more peripheral chips too, in particular, ATMEL Corporation, introduced a new generation microcontroller in 2003, that is 89S series, and its typical products with high performance and low cost microcontroller is AT89C52. AT89C52 is a low voltage, high-performance CMOS 8-bit microcontroller, the chip includes 8 KB read-only program memory (PEROM) which erase can be repeated, 256byte random access data memory (RAM), devices adopt high-density nonvolatile memory technology to produce, compatible with the standard MCS-51 instruction set and the 8052 products, while the chip built-in general-purpose 8-bit central processing (CPU). Flash storage unit, can be applied to the more complex control applications.The system was realized by the circuitry which is made up of AT89C52 chip, Clock circuit, reset circuit, column scan driver circuit, line drive circuit and the six 32×32 LED dot matrix, the overall structure of LED characters display is shown in Fig.1. A display unit is composed of dot matrix and two 74HC154. Line data signal is divided into two parts, which is given by the two 8255A respectively, but the 8255A data are from the P0 port the master controller AT89C52. The column scanning signal of each character was given by the two 74HC154, the 74HC154 12 pieces and was divided into six groups. The input signal of 74HC154 was given by the P1.0 ~P1.3 of AT89C52. External data memory 6264 connected with the AT89C52 the P0 port.III. SYSTEM HARDW ARE CIRCUIT DESIGNA .Circuit Design of MCU Control SystemThe size of Chinese characters is 32 ×32, but microcontroller has 32 I/O port, and can’t meet design requirements, so the I/O port must expand, the data port expansion was implemented by two 8255A. The data port expansion is shown in Fig.2, 74HC373 is the address latch, and latch low eight address, the low eight address signals of 6264 provided by it, but the high eight address signals of 6264 provided by P2.0 ~P2.4, Internal port of 8255A was chosen by A0 and A1. 74HC139 is 2-4 decoder, whose input signals are provided by P2.6 and P2.7 of SCM, and provided strobe for the external I / O devices, because the system has more than one external device, make sure that they can not be gated, so that their addresses is the only and do not repeat. The clock circuit of AT89C52 composed of 18, 19feet from the clock side (XTALI and XTAL2), and 12MHz crystal, capacitor C1 and C2.B .The Circuit Design of Display Memory UnitThe size of Chinese characters is 32×32 in the design, each character composed of four parts which each part composed of four LED matrix which the size is 8 × 8, circuit decomposition map of display unit. In addition because the Chinese character for each display needs 128 bytes storage space, but AT89C52 microcontroller chip is only 256 bytes data memory, it is far less than the design requirements, so we the expanded storage space by 8K × 8 external data memory 6264. C. The communicate Design of PcInte1 8255A is a universal programmable parallel input/output interface chip. Its function can be set through the software program, and has a strong versatility. It can be directly through the CPU data bus connected to external devices, easy to use and flexible. Inte18255A interface chip has three 8-bit parallel input and output ports, programming methods can be used to set three ports asinput ports or output ports. Chips work have the basic input and output, strobe input/output and bi-directional input / output. When the data were transmitted by data bus of CPU, its can choose to unconditionally transfer, query transmission or interrupt transmission. During Inte18255A chip three-port, the port C can be used as not only the data port, but also the control port. When the port C is taken as a data port, it can be used as not only 8-bit data port, but also separately as two 4-bit data port, and each bit of the port C can be operated, can set a particular bit to input or output, so provide convenient conditions for bits control.D. Serial Communication Interface CircuitPC and SCM are linked via a serial communication interface. In order to implement serial communication function between MCU and PC, and serial interface level of SCM will be changed into standard RS-232C level. MCU and PC, taking into account the short distance communication, and microcontroller is mainly responsible for receiving commands and data, so the PC is directly connected with the microcontroller, this is the simplest connection method. the signals which is from Pac’s TXD-side were changed into a current signal through the communication circuit, the infrared light emitting diodes of optocouper have current when a signal occurs, the light signals which is emitted by diode projected onto the and photo transistor, converted to electric signal, then input to the microcontroller RXD side so photoelectric conversion is implemented, and electrical is completely isolated to avoid the feedback and interference which is produced by output side.IV. SOFTW ARE DESIGNThe entire software design mainly composes of display program and communication program. The Chinese characters to be displayed on the screen, character and other data for transmission control and display functions were achieved by dynamic scan. Real time communication parts which communicate with PC receive data information by SCM serial disruption, so real-time data information transmission with PC was implemented. The host computer software was implemented by Visual Basic. In the standard serial communication, MSCOMM which is the power communication control is provided by VB, it can set the serial communication of data sent and received, and the serial communication port.Status, message formats and protocols are set, directly send data by Pac’s RS-232/RS-485 serial ports. In order to realized to PC reliable communication with SCM, and ensure that both sides have the same data format and baud rate, this design uses RS-232 communications, a 10 bits data format, 9600bit / s baud rate. Software program composed of the beginning, initialization, display program, front, which the main.Character code stored in the static memory 6264, and the SCM will wait for signal is given, that is, the input signal of SCM pin P3.0. When P3.0 is from low to high, display program begin to be run. First, control words written to 8255A control port, 8255A work in the form of mode 0 in the design. After control word was finished, the data will be displayed which is transferred to the 8255A from the 6264, the display data is output for four times because the line width of the characters screen is 32, a row of data is input and transported from top to bottom each, signal of the first rows which is controlled by SCM is gated after data transmission is over, so the first column data is displayed, then call delay procedures to display the contents of the stable. The next column of data is read after delay procedures is over, and the next row is gated, so that the second column of data is also displayed, and so on, because the serene size is 32 ×192, 192 row are shown, and 192 rows constitute an image. Then, scanning begin from the first column, and thestarting address of display date backward shift on the basis of the original, which has an address overflow issues, it will assign start address to the address pointer when the data address is overflow, the display data content will be constantly repeated. Flow chart of communication with PC and 4 SCM is shown in Figure 10. Real-time communication parts which communicate with PC receive data information by SCM serial disruption, so real-time data information transmission with PC was implemented.CONCLUSIONLED display system that was designed adopted the host computer and slave structure, the host computer is PC, and communicated with slave computer display system through the serial communication interface, which can implement string modification, display mode settings, time setting and other functions; The slave mainly implement display of LED dot matrix display screen. This was controlled by SCM. Chinese character display is 32×32 dot matrix model, and to achieve real-time screen display changes, and have to display the current time and date functions. The design of LED dot matrix display control system has a simple circuit, stability, low power consumption, long life, easy to display characteristics, and include the LED display basic principles and procedures. As long as the microcontroller I/O interface is expanded, and increase the number of LED dot matrix and related chips, you can design a larger are and more tricks of the LED display. This article has some reference value of theory and practice. As the core control unit of the system, that it AT89C52, has lower frequency, in the future, in order to achieve LED video display in real time, and the display image can be compressed, which will increase the burden on the system. We can take advantage of high-speed DSP as the core control unit, and solve the above mentioned problems.基于AT89C52单片机的LED显示屏控制系统的设计机械研究所，2004年2月毛里斯威尔克斯摘要：本文介绍了显示器的硬件与软件设计过程基于AT89C52单片机。

2010 International Conference on Intelligent Computation Technology and Automation Design and Implement of Responder Based on Freescale HCS12 Single ChipMicrocomputerCheng Qiming, Cheng Yinman, Wang Mingmei, Chang LinCollege of Electric Power and AutomationShanghai University of Electric PowerChangyang 2588 road, Yandpu district, Shanghai 200090, ChinaE-mail :Abstract—An 8-channel responder based on Freescale HCS12single chip microcomputer is designed. The responder candisplay the number of the first player correctly. It also can countthe scores and show the player with the highest score. Thesystem includes four modules: CPU12, the SCI serialcommunication, digital display tube and timer. Whencompetition signal input, it is been caught and then causeinterruption, the timer is used to time accurately, the serial portis used to send and receive the start answer signal, judgmentsignal and other signals, the digital display tube is used to showthe scores of the current player . LCD display tube showssubjects and answers. So the basic functions of the responder areachieved.Keywords--responder; single chip microcomputer; timer; inputcapture; interruptionI.I NTRODUCTIONResponder is also known as the first signal discriminator,which is widely used in various competitions. It can judge thenumber of the first player accurately, fairly and intuitively.Currently, a variety of quiz responder has emerged on themarket, in which a small responder is commonly designed withsmall-scale digital integrated circuit. Although the technologyhas been quite mature, but it is simple function, lowintelligence, high fault, simple display, less flexibility, notconvenience for upgrade, it has been unable to meet all kindsof requirements for intellectual competitions and varietyshows. Therefore, it is necessary to develop some kinds ofresponder which are more suitable for applications.In recent years, with the rapid development of science andtechnology, the applications of single-chip microcomputer arebecoming widely, which promotes the development oftraditional measurement and control technology. In this paper,Freescale HCS12 [1-3] is designed as a core component toachieve an intelligent digital responder with 8-channel [4-8], ithas some breakthroughs on technology, function and otheraspects, comparing with the past responder. It is characterizedby simple structure, powerful, good reliability, practicability,so that the competition can really carried out on just, fair andopen rules.II.F UNCTION OF RESPONDERThe basic functions of responder designed in this paper are:(1)The system can limit the competition time and answertime of the alarm;1 This work is supported by Leading Academic Discipline Project ofShanghai Municipal Education Commission (Project Number: J510301，J510303)978-0-7695-4077-1/10 $26.00 © 2010 IEEE DOI 10.1109/ICICTA.2010.128 1127(2)The system can identify the answer signal and identifythe player’s number;(3)The system can calculate score for each player anddisplay the scores.Responder can accommodate 8 players numbered 1 to 8. In addition, LED digital tubes are designed to display the latched data. After race host clears the system, if participants press switch, and after answer is certificated whether it is correct or not, the number of first player to answer in action is immediately shown by digital tubes. Responder should have a strong ability to distinguish players to answer in the action, its resolution reaches at least a few ms.III.I DEAS OF RESPONDER DESIGNAfter the requirements and functions of responder are analyzed, the following circuits are required in general:A Responder circuitThe circuit has two functions: one is to identify the number of the player who press button, and to save the number; the other is to prohibit the other players from buttoning or to make other buttons not available.B Timing circuitsHost can set competition time and answer time by the time pre-set-circuit. If nobody can answer question within the set time, all players will not get score, then the host will announce the answer. Besides, if someone gets the chance to answer the question, but does not give the right result before the allowable time, he or she won’t get the score, the overtime signal will be also send, the host will declare the right answer. Freescale HCS12 contains timer module, the timer module can be directly used.C Overtime circuitHCS12 will send overtime signal when time goes beyond the set time, this signal will be transferred to the PC computer by the serial port. The next question will be proceeded to answer.D Scores count and display circuit.When host presses the answer key, it is time to start to answer, if one player presses the answer key, his or her number will be recorded, his or her score will be counted and displayed on the LED digital tubes.Bedside the circuits designed above, some necessary logic designs are also necessary. The logic designs are as following:First, the host will read the question which will show in the LCD; next, the PC computer will send letter “k”, which means that play is beginning to competition. At the same time, timing circuit starts to work, if nobody gets the chance to answer the question within permitted time, microcontroller will send the word “chao shi”to PC computer; If someone presses the competition key within the specified time, microcontroller will send his or her number. If the time goes beyond the permitted time, PC computer will send “next”which means turning to the next question, the next question will be automatically showed to answer. If some player gets the chance to answer the question, his or her number and scores will decrease 1 automatically and show in the digital tubes, then microcontroller sends “next” to go on the next question. If the score is few than 0 after decreasing, player is eliminated. The right answer will show on the LCD. Finally, if all the questions are done, microcontroller will send “e”to end the game, then the scores of all players will be computed, the highest one will be shown on the digital tubes.IV.D ESIGN OF RESPONDER HARDWARE Responder hardware is firstly designed; Responder hardware is taken directly from the hardware resources of Freescale HCS12 development board developed by Suzhou University. The development board takes MC9S12DG128 as the core, using modular design approach, it extracts part of I/O resources, and it also provides each module with a corresponding interface circuit. It also provides A/D input channels, PWM low-pass filter circuits, 16-key keyboard input channels, 8-bit digital I/O circuits, SPI I/O circuits, SCI communication circuits, I2C bus I/O expansion circuits and so on.In this paper, the hardware modules, the pin connections and the corresponding interfaces of the development board are listed and unified to redesign by actual needs of the system. Figure 1 shows the hardware structure diagram of the selected part of development board.Figure 1. Diagram of hardware structureA Selection of hardware modulesThe responder designed in this paper is relatively simple, the I/O ports and the modules involved are not many.(1)The system uses push-button switch as the competition key, which is generally used as a switch input, there are 0 and 1. Here, the system need know whether the button is switched by somebody, the system need not care about the switch on or off.(2)Timer module is indispensable in timing circuit. Here, the timer module's functions are to limit time, and to capture input signals. This will be followed some of the circuit design described in detail.(3)LED digital tubes are used to show the participant’s number and scores in the display circuit. The system records the player's number and the corresponding score, and then transmits to the LED digital tubes through I/O ports. LCD is achieved by external connection module; it is used to display questions and answers.(4)LED small light is used to show whether somebody presses the competition button. If player answer, the small light will be bright, otherwise, it will not light.(5)SCI module is necessary in serial communication port. Since the signal that starts to answer needs to be send by PC computer, if there is no serial communication port, the whole system will be paralyzed. The function of SCI module is that receives the signal to HCS12, and then sends the player’s number to PC.B Design of hardware circuits1) Competition circuit designCompetition circuit captures competition signals by means of input capturing; there will be a interruption once the push- button switch jumps. 8 push-button switches are connected with 8 channels, so the system can know which player competes to answer the question by reading corresponding channel. In this paper, the 8 channels connect with input capture channels PT0~ PT7 of HCS12.2)Timing circuitAs the HCS12 has its own timing module, timing circuit don’t need to be designed, and internal timing module of HCS12 can be directly used.3)Overtime reminding circuitSmall light or buzzer could connect with any I/O port, but the system should ensure the selected I/O ports have not conflict with the I/O ports occupied by the module. Once the specified time is over, I / O port send a high level, and the LED small light is on. In this paper, the first pin of PA port is chosen as the alarm signal port; this pin is connected to the testing of small light.4)Electronic counter and display circuitThe scoring scores can be resolved by programming, but the displaying scores needs hardware connection, LED digital tubes and LCD are connected with corresponding I/O ports of HCS12, external LCD module should have the function of displaying Chinese characters.5)Communication connectThe development board has a 9-pin cable of RS232 serial port; it can be connected with PC computer by the cable.V.D ESIGN OF RESPONDER SOFTWAREA Design of software subprogram1)SCI subprogram(1)SCI initialization functionSCI initialization is to set corresponding register, mainly to set serial port baud rate, here baud rate is set to 9600 bps, the baud rate is:B t = f BUS / (16 * B R) (1) where, B R is set by SCI baud rate register, and it is a 16-bit register, is assigned twice, first set the low 8 bits, and then setthe higher 5 bits, the first three of high 8 bits are meaningless;f BUS is the bus frequency.The next is to set control registers (SCICR1 and SCICR2), here SCI serial port be allowed to run, and the normal code, 8- bit, no parity data is output. The D6 bit of the SCICR1 (SCISWAI) is a SCI allowing bit, SCI module is prohibited at SCISWAI=1, SCI module is allowed when SCISWAI=0; D4 bit (M bit) is a choice bit of pattern/character length, it is used to define the sending/receiving data format, 9-bit data transfer is allowed at M=1, 8-bit data transfer is allowed at M= 0; D1 bit (PE) is the parity enabling bit, PE=1 allows parity, PE = 0 does not allow parity. SCICR2 needs also to be set in order to receive and send data, the D3 bit of SCICR2 (TE) is a transmitter allowing bit, TE=1 allows to send, TE=0 prohibits to send; D2 bit is receiver allowing bit, RE=1 allows to receive, RE=0 prohibits to receive.(2)SCI sending functionFirstly, 1 bit sending function of serial port should be programmed. At the beginning, SCI status register 1 (SCISR1) needs to be judged, its D7 bit (TDRE) sends the empty flag of data register at TDRE=1, which means that the data to send has already moved into the sending shift register, if the data register is empty, the new data that is written into the data register can be sent. More bits data sending function calls repeatedly 1 bit sending functions until the sending is over.(3)SCI receiving functionSimilarly, 1 bit receiving function of serial port is programmed. Here, SCI status register 1 (SCISR1) is judged, its D5 bit (RDRF) represents the full flag of the receiving data register. RDRF=1 means that the receiver is full, the received data can be read from the SCI data register, then, the data needs to be read out from data register (SCIDR). The receiving data is one more step than the sending data, which it is to determine whether any data has been received. If the receiving process is failed, FFH data will be returned. More bits data receiving function call repeatedly 1 bit receiving function, and the system will report the receiving error as long as there is 1 bit receiving failure.2)Timer subprogram(1)Timer initializationWhen timer is initialized, timer is prohibited to work until timer is used. The D7 bit (TEN) of timer control register 1(TSCR1) is an enabling bit of timer, timer is enabled at TEN=1, and timer is disabled at TEN=0. The following step is to allow the timer interrupt and to prohibit the timer reset. The D7 bit (TOI) and the D3 bit (TCRE) of timer control register 2 (TSCR2) are respectively the enabling bit of timer overflow interrupt and the reset enabling bit of timer counter, timer interrupt is allowed at TOI=1, otherwise, timer interrupt is not allowed at TOI=0. When OC7 is successfully compared, the counter can be reset at TCRE=1, it can’t be reset at TCRE=0; D2 ~ D0 bits (PR2 ~ PR0) of TSCR2 are the selection bits of frequency factor, they are used to set the division factor of bus clock frequency, frequency division factor p can be 1,2,4,8,16, 32, 64 or 128. The overflow time of timer can be described as following:t=np/f BUS (2) where, n is the count value of counter; f BUS is the bus clock frequency; p is the frequency division factor. In this paper, n = 216 = 65536, p is chosen to be 2, t≈0.03s, t is much closed to 1/38s, 38 interruptions is about 1s.(2)Input capturing initializationFirst, the option is to capture input or to compare output. The select register of input capturing/output comparing (TIOS) is used to do this work, the Dx bit (IOSx) of the register is the select bit of x channel, the x channel is set as the output comparing channel at IOSx = 1, and it is set as the input capturing channel at IOSx = 0. In our design, because 8 players take pert in the competition, 8 channels should all be set as input capturing channels, namely TIOS = 0x00.After input capturing is set, the interruption also needs to be open, which it should be done after the competition is allowed.3)Subprogram of LED digital tubes(1)Initialization of LED digital tubesLED digital tubes are used to dynamic display, its initialization is the I/O port initialization, the direction registers of corresponding I/O ports (the pins of 8-bit data port are connected with 7-segment digits and decimal point of digital tubes; the pins of 4-bit bit choice are connected with 4 digital tubes) are set to be output, that is, data port is 0xFF, bit choice port is 0xF0.(2)Display of LED digital tubesThe basic idea of LED digital tubes display is that the display codes of all the numbers and the chip select code of the displaying bits are stored into the corresponding registers, when display functions are called, the parameter numbers of functions can match with the numbers and the bits in the tables of number display code and chip select code4)LCD display(1)LCD initializationThe module is enabled and the lattice size is defined as 8*8 or 8*10, the display format is defined as 1 row or 2 rows, the display of Chinese characters is used.(2)Subprogram of LCD displayThe emphasis of the program is the display of Chinese characters. Chinese characters are identified by two ASCII codes. The ASCII codes of Chinese characters to be displayed are recorded into data registers.B Design of interrupt service subprogram1)Subprogram of overflow interruptionThe frequency division factor has been set in the program of timer initialization, 38 interruptions is about 1s, so the counter variable needs to be set, it adds 1 automatically after each interruption, it calls the second accumulating function after 38 interruptions. It needs to be noted that the interruption flag register 2 (TFLG2) is set to 0 after each overflow interruption. Otherwise, the system is always identified as overflow interrupt. D7 bit of the register is TOF bit, when the 16-bit running counter changes from $FFFF to $0000, the overflow interrupt occurs, this bit is set to 1, this bit can be cleared by writing 0 to it, other 7 bits are invalid. The flow of overflow interrupt is shown in Figure 2.2)Subprogram of input capturing interruptionThe main task of input capturing interruption program is to judge whether player competes to answer and to record the player’s number. The interrupt flag bit needs to be set, it is set to 1 when an interrupt happens, which means that someonecompetes to answer, and then the person number will be read.Interrupt flag register 1 (TFLG1) of main timer is used to readthe interrupt channel. Its Dx bit (CxF) is the interrupt flag ofinput capturing / output comparing channel x, when an inputcapturing / output comparing event happen, the correspondingbit is set to 1, the channel number of correspondinginterrupting can read from TFLG1 register and it is also thenumber of competition player. To note that, the flag registerneeds to be cleared after the flag register is read. The flagregister can be cleared when the appropriate channel is set to 1.The flow of input capturing interrupt is shown in Figure 3.VI.C ONCLUSIONSResponder is one of the essential devices in variousknowledge and intellectual contests, the development of betterand more intelligent digital responder is very significant.Responder designed in this paper can achieve a responder'sbasic functions through experimental prototype testing.It reaches the design target with reasonable design, simplestructure, good commonality, strong function, reliable answerand quick reaction. However, as hardware limitations ofdevelopment board, some functions have not been able toachieve, such as the development board does not have enoughLED digital tubes to display all player’s scores simultaneously,the host can not adjust answer time according the difficulty ofthe question and so on. These issues will remain to beaddressed in future development.Figure 2. Flow of overflow Figure 3. Flow of input capturinginterrupt interruptC The main program designBefore the start of the main program, the total interruptionsare turned off and each module is initialized. The initializationof each module has been done in the correspondinginitialization subprogram of each module. Here we only needcall the corresponding initialization subprogram. After theinitialization of each module is completed, the totalinterruptions should be turned on. The main body of the mainprogram is a loop structure; there are also several sub-cycles inthe main loop, which are used for the cycle waiting of eachloop. The flow of the main program is shown in Figure 4.After the completion of the initialization, the system has beenwaited for the signal of competition start with the circularmode until the signal comes. When this signal is received, thesystem checks whether the cycle time is overtime, if it isovertime, the system changes to the next question, otherwise,the system checks the competition signal, if some playercompetes to answer, then the system checks whether theanswer time is out, if the time is not out, the system judgeswhether the result is true, if the result is right, the player isadded 1 point, otherwise, the player is subtracted 1 point, andthe system enters the next question. To the player whose scorewill be subtracted, the system needs to check whether the scoreis low than 0, if it does, this player’s input channel is turnedoff. To be noted that, if the competition flag is 1, it should becleared.Figure 4. Flow of the main programR EFERENCES[1] Steven F B, Daniel J P. Embedded systems–using the HCS12microcontroller design and application [M]. NewYork: PublishingHouse of Electronics Industry, America, 2006.[2] Wang Yihuai, Liu Xiao. Embedded systems–the design and applicationof HCS12 micro controller [M]. Beijing: Beijing University ofAeronautics and Astronautics Press, 2008.[3] Wang Wei. Principle and applications of HCS12 microcontrollers [M].Beijing: Beijing University of Aeronautics and Astronautics Press,2007.[4] Zhang Ruixi. Design of quiz responder [J]. Mechanical and ElectricalEngineering and Technology, 2007, vol.36, no.8, pp.51-52.[5] Li Ming, Tan Andrew, Zhu Shunli. 8-way intelligent responder basedon the LPC932 single chip microcontroller [J]. Ordnance Automation,2007, vol.26, no.7, pp.70-71.[6] Chou Kungming, Zhou Chenchen. Design of 9-way multi-functionalquiz responder based on the single chip microcontroller AT89C2051 [J].Modern electronic technology, 2006, vol.25, no.20, pp.4-6.[7] Wang Gongtang, Yang Shanying. 16-way responder based on thePIC16F873 [J]. Computer Development & Applications, 2006, vol.19 ,no.9, pp.9-13.[8] Gong Changlay. Design of intelligent responder controlled by singlechip microcomputer [J]. Guangdong Automation and InformationEngineering, 2003, no.3, pp.28-30.基于飞思卡尔HCS12单片机设计和实施的抢答器程启明，程尹曼，汪明媚，常林上海电力学院电力与自动化工程学院,上海,200090摘要——基于飞思卡尔HCS12单片机的八通道抢答器设计。

AT89C2051AT89C2051 Reference Manual AT89C2051 is made in the ATMEL Corporation, which is the low-voltage, high-performance CMOS8-bit microcontroller.Tablets containing repeated 2k bytes of program memory erasable read-only (PEROM) and random 128bytes data memory (RAM), device using ATMEL's high density, non-volatile memory technology, Compatible with the standard of MCS-51 instruction set, built-chip 8-bit general-purpose central processing unit and repeatedly write the Flash memory, which can effectively reduce the development costs. AT89C2051 features a powerful single-chip can provide cost-effective in many Applications.AT89C2051 MCU MCU is a series of 51 members, is the 8051 version of SCM. Internal comes with a programmable EPROM 2 k bytes of high-performance microcontrollers. With the industry standard MCS-51 orders and pin-compatible, so it is a powerful micro-controllers, many embedded control applications, it provides a highly flexible and effective solutions. AT89C2051 has the following characteristics: 2 k bytes EPROM, 128 bytes RAM, 15 I / O lines, two 16 regular / counter, two five vector interrupt structure, a full two-way serial port, and includes Precision analog comparator and on-chip oscillator, a 4.25 V to 5.5 V voltage scope of work and 12 MHz/24MHz frequency, and also offers the encryption array of two program memory locking, power-down and the clock circuit. In addition, AT89C2051 also supports two kinds of software-selectable power-saving mode power supply. During my free time, CPU stop and let RAM, timing / counter, serial port and interrupt system to continue to work. Power-down can preserve the contents of RAM, but will stop oscillator chip-to prohibit all the other functions until the next hardware reset.AT89C2051 have two 16 time / counter register Timer0t Timer1. As a timer, each machine cycle register an increase, such registers to counting machine cycle. Because a machine cycle is 12 oscillator cycles, the count rate is the frequency oscillator 1 / 12. As a counter, the register in the corresponding external input pin P3.4/T0 and P3.5/T1 emerged from the 1-0 when the changes by 1. Two machine cycle because of the need to identify a 1-0 change, the largest count rate is the frequency oscillator 1 / 24, the external input P3.2/INT0 and P3.3/INT1 programming, for Measuring the pulse width of the door.Therefore, AT89C2051 constitute the SCM system is a simple structure, the costof the cheapest, most efficient micro-control system, eliminating the external RAM, ROM and interface devices, reducing hardware costs, cost savings, improved The cost-effective system.Clock circuitMCU clock signal used to provide various micro-chip microcontroller operation of the benchmark time, the clock signal is usually used by the form of two circuits: the internal and external shocks oscillation. MCS-51 has a microcontroller internal oscillator for a reverse of the high-gain amplifier, pin XTALl and XTAL2 are here to enlarge the electrical inputs and outputs, as in-house approach, a simple circuit, from the clock Signal relatively stable, and actually used often in this way, as shown in Figure 3-1 in its external crystal oscillator (crystal) or ceramic resonator constituted an internal oscillation, on-chip high-gain amplifier and a reverse Feedback components of the chip quartz crystal or ceramic resonator together to form a self oscillator and generate oscillation clock pulse. Figure 3-1 in the external crystal and capacitors C1 and C2 constitute a parallel resonant circuits, their stability from the oscillation frequency, rapid start-up role, and its value are about 33 PF, crystal frequency of elections 12 MHz.Reset CircuitIn order to initialize the internal MCU some special function register to be reset by the way, will reset after the CPU and system components identified in the initial state, and from the initial state began work properly. MCU is reset on the circuit to achieve, in the normal operation of circumstances, as long as the RST-pin on a two machine cycle time over the high, can cause system reset, but if sustained for the RST-pin HIGH, in a circle on the MCU reset state. After the system will reset input / output (I / 0) home port register for the FFH, stack pointer SP home for 07 H, SBUF built-in value for the indefinite, all the rest of the register-0, the status of internal RAM from the impact of reduction, On the system, when the contents of RAM is volatile. Reset operation There are two situations in which a power-on reset and manual (switch) reduction. The system uses a power-on reset mode. Figure 3-1 in the R0 and C0 formed a power-on reset circuit, and its value for R for 8.2 K, C for the 10 uF.Main features:Compatible the MCS51 command system;Contains the 2KB memory re-programming FLASH (1000);2.7 ~ 6V voltage range;the whole Static work: 0Hz ~ 24KHz;Secrets 2 Program Memory Lock128 × 8-bit internal RAM15 programmable I / O linesTwo 16-bit timer / counter6 interrupt sources, two external interrupt sourcesProgrammable Serial ChannelHigh Precision V oltage Comparator （P1.0，P1.1，P3.6）；Have the output port of the LED direct driveLow-power idle and power-down modeThe pin Picture of AT89C2051Picture one the pin of AT89C2051AT89C2051’s functional description:VCC: Power Supply V oltageGND: landP1 port: P1 mouth is a group of 8-bit bi-directional I / O interface, P1.2 ~ P1.7 provide internal pull-up resistor,P1.0 and P1.1 internal supreme pull-up resistor. P1 mouth output buffer can absorb the current 20mA and direct-drive LED.When Programming and calibration, P1 mouth as the eighth address receive.P3 mouth: P3 port P3.0 ~ P3.5, P3.7 is the internal pull-up resistor with the seven bi-directional I / O interface. Did not bring out the P3.6，It as a generic I / O port, but can not visit. Can be used as a fixed-chip input comparator output signal. when P3 write 1, they were highed the internal pull-up resistor can be raised as an input port.P3 port special function as shown in table 1:Table 1 P3 mouth’s special featuresPIN functional characteristics20191817161514131211GND P3.5P3.4P3.3P3.2XTAL1XTAL2P3.1P3.0RST P3.7P1.0P1.1P1.2P1.3P1.4P1.5P1.6P1.7VCC 12345678910RST：Reset output. When the oscillator device reset, RST pin to maintain the high level of two machine cycle time.XTAL1: the RP-oscillator amplifier and internal clock generator input.XTAL2: RP-oscillator output amplifier.TimerOverview of the Timer89C2051 single-chip-chip has two 16-bit timer / counter, That is the timer 0 (T0) and Timer 1 (T1). They all have from time to time and event count function, Can be used for timing control, delay of external events, such as counting and testing occasions. Timer’s T0 and T1—— two 16-bit timers in fact is 16-bit counter plus 1. Among them, T0 compositioned by the two 8-bit special function registers TH0 and TL0; T1 posed by the TH1 and TL1. These functions were controled by the special function registers TMOD and TCONWhen set to the work in the timing, Through the pin count of the external pulse signal. When the input pulse signal generated by the falling edge of 1-0, The value of timer plus 1. At of every machine cycle during the S5P2 sampling pin T0 and T1 the input level, if a machine cycle before sample value of 1, The next machine cycle sampling value is 0, The counter plus 1. Since then during S3P1 of the machine cycle, New value will into the counter.so Detection of a 1-0 transition of the two machine cycles,So The maximum count frequency of oscillation frequency of 1 / 24. In addition to the option of work from time to time or count,Each timer / counter have four kinds of work mode, That is, each of timer circuit kinds of four constitute a structural modelTwo low-power modeIdle modeIn idle mode, CPU to maintain sleep and all-chip peripherals remain active, this way generated in Software, At this point, Chip RAM and all the contents of special function registers remain unchanged. Idle mode was terminated by any interrupt request permission to or hardware reset.P1.0 and P1.1 ,in the non-use of external pull-up resistor on the case should be set to "0", Or in the use of pull-up resistor is set to "1."It should be noted that: when uses of hardware reset Termination idle mode, AT89C2051 is usually stopped from the program until the internal reset control of the two machine cycles before the restore procedure Service. In this case the hardware within the prohibition of the reading and writing of internal RAM, However, to allow access to ports, To eliminate the Hardware reset in the idle mode of port accidents may write, In principle, to enter the idle mode of instruction should not be under the command of a pin or an external memory port for a visit.Power-down modeIn power-down mode, the oscillator to stop working, enter the power-down mode ,Instructions, who was the last one, the implementation of the Directive, Chip RAM and all the contents of special function registers the termination of the previous power-down mode be frozen. To withdraw from power-down mode is the only way to reset the hardware, Reset will redefine all the Special Function Registers but Does not change the contents of RAM before the the Vcc work returned to normal levels Shall be null and void and must be reset to maintain a certain period of time in order to restart and oscillator stabilityP1.0 and P1.1 in the non-use of external pull-up resistor on the case should be set to "0", Or in the use of pull-up resistor is set to "1."OscillatorOscillator connected clientXTAL1: RP-oscillator amplifier and internal clock generator inputXTAL2: RP-oscillator amplifier outputCharacteristics of OscillatorXTAL1, XTAL2 ware the RP-chip oscillator amplifier inputs and outputs, Quartzcrystal can be composed of the clock oscillator or ceramic oscillator, For more information from the external input clock driver AT89C2051, XTAL1 input clock signal from, XTAL2 should be left vacant.As the input to the internal circuit is a 2-flip-flop, Therefore, the external clock signal input without special requirements, However, it must comply with the maximum level and minimum norms and timing中文翻译：AT89C2051AT89C2051数据参考手册AT89C2051是美国ATMEL公司生产的低电压、高性能CMOS8位单片机，片内含2k bytes的可反复擦写的只读程序存储器（PEROM）和128bytes的随机数据存储器（RAM），器件采用ATMEL公司的高密度、非易失性存储技术生产，兼容标准MCS-51指令系统，片内置通用8位中央处理器和可反复擦写的Flash存储器，可有效地降低开发成本。

外文原文Introduction to STC89C52General DescriptionThe STC 89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory (PEROM). The device is manufactured using Atmel’s high density nonvo latile memory technology and is compatible with the industry standard MCS-51™ instruction-set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel STC89C52 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.STC89C52 has the following features: 40-pin, 4k Bytes Flash chip program memory, 128 bytes of random access data memory (RAM), 32 external bi-directional input / output (I / O) ports, interrupt priority level 2 5 Interrupt nesting level interrupts, two 16-bit programmable timer counters, two full duplex serial port, watchdog (WDT) circuit, the on-chip clock oscillator. In addition, STC89C52 design and configuration of the oscillation frequency can be set to 0Hz and through the software power-saving mode. Idle mode, CPU to suspend work, and RAM timing counters, serial port, and interrupt system to continue, but freezes the oscillator power-down mode save RAM, disabling all other chip functions until the next interrupt or hardware reset. Meanwhile, the chip also has PDIP, TQFP and PLCC packages such as three, to accommodate different productsFeatures OverviewThe STC89C52 provides the following standard features: 4K bytes of Flash,128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the STC89C52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interruptsystem to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Features• Compatible with MCS-51™ Products• 4K Bytes of In-System Reprogrammable Flash Memory– Endurance: 1,000 Write/Erase Cycles• Fully Static Operation: 0 Hz to 24 MHz• Three-Level Program Memory Lock• 128 x 8-Bit Internal RAM• 32 Programmable I/O Lines• Two 16-Bit Timer/Counters• Six Interrupt Sources• Programmab le Serial Channel• Low Power Idle and Power Down ModesPin Function Description:VCC：Supply voltage.·GND：Ground.·Port 0Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.Port 0 may also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification.Port 1Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internalpullups.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the STC89C52 as listed below:Port 3 also receives some control signals for Flash programming and verification. RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external DataMemory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low timespecifications must be observed.From：STC89C52的介绍综合描述STC89C52是美国ATMEL公司生产的低功耗，高性能CMOS 8位单片机，片内含4k bytes的可系统编程的Flash只读程序存储器，器件采用ATMEL公司的高密度、非易失性存储技术生产，兼容标准8051指令系统及引脚。

附件1：外文资料翻译译文基于AT89C52单片机的LED显示屏控制系统的设计摘要这篇文章介绍了基于AT89C52单片机的LED点阵显示屏的软件和硬件开发过程。

使用一个简单的外部电路来控制像素是32×192的显示屏。

用动态扫描，显示屏可以显示6个32×32的点阵汉字。

显示屏也可以分为两个小的显示屏，它可以显示24个像素是16×16的汉字。

可以通过修改代码来改变显示的内容和字符的滚动功能，而且可以根据需要调整字符的滚速或者暂停滚动。

中文字符代码存储在外部存储寄存器中，内存的大小由需要显示的汉字个数决定。

这种显示屏具有体积小，硬件和电路结构简单的优点。

关键词发光二极管汉字显示AT89C52单片机1.导言随着LED显示屏不断改善和美化人们的生活环境，LED显示屏已经成为城市明亮化，现代化、信息化的一项重要标志。

在大的购物商场，火车站，码头，地铁，大量的管理窗口等，我们经常可以看到LED灯光。

LED商业已成为一个快速增长的新产业，拥有巨大的市场空间和光明前景。

文章，图片，动画和视频通过LED发光显示，并且内容可以变换。

一些显示设备的模块化结构，通常有显示模块，控制系统和电源系统。

显示模块是由LED管组成的点阵结构，进行发光显示，可以显示文章，图片，视频等。

控制系统可以控制区域里LED的亮灭，电源系统为显示屏提供电压和电流。

用电脑，取出字符字节，传送到微控制器，然后送到LED点阵显示屏上进行显示，很多室内和室外显示屏都是通过这个方法进行显示的。

按显示的内容区分，LED点阵屏的显示可分为图形显示、图片显示和视频显示三个部分。

与图片显示屏比较，不管是单色或者彩色的图形显示屏，都没有灰色色差，所以，图形显示不能反映丰富的色彩。

视频显示屏不但可以显示运动、清楚和全彩的图像，也可以显示电视和计算机信号。

虽然三者之间有一些不同，但显示的原理基本一样。

单片机具有优良的性价比，体型小，可靠性高，控制能力强，它广泛用于智能仪器、机电一体化的实时过程控制、机器人、家用电器、模糊控制和通讯系统等。

电子密码锁中英文对照外文翻译文献(文档含英文原文和中文翻译)2THE DESIGN OF MATRIX KEYBOARD AND LCD DISPLAY BASED ON MCUAbstractThe development of microelectronics technology and industrial measure requirement bring a good opportunity for development and research system，which makes it a broad prospects. The equipment has the advantages of small size, single power supply and a variety of output voltage leads it has a special module. Through the analysis of the hardware structure, we can summarizes each module needs.For example,we often go through the keys to realize the control of the electronic device. Small to watch mobile phone, to the TV computer, to a variety of complex instruments, all need to realize various operations through the buttons. This design is an important part of step for the further research，using buttons to control the display，include some modules like LCD 1602 liquid crystal display，4*4 matrix keyboard，STC89C52single-chip microcomputer and other bine with the Proteus software，the simulation results are displayed on the LCD in 1602 type of data.KEY WORDS: Single-chip; LCD 1602 liquid crystal display; 4*4 Matrix keyboard31 IntroductionWith the development of economy and the progress of science and technology, Microprocessors and peripheral chips have developed rapidly. The newest development of the integrated technology is the CPU chip and external. Like the program memory, data memory, parallel, serial, I/O timing / counter, interrupt controller and other control components are integrated in a chip—single chip. SCM has a manufacturing process CMOS, The smaller lithography process improves integration which make the chip space smaller, lower cost, lower working voltage, lower power consumption. Adopts double CPU structure, increasing the width of data bus, improve the speed and the ability of data processing, a pipeline structure, improve the processing and computing speed, in order to meet the needs of real-time control and processing. To increase the storage capacity, the internal EPROM EPPROM, secure program, to improve the driving capability of parallel port, in order to reduce the peripheral driving chip, increase the logic function and control the external I/O port flexibility. Peripheral in serial mode based expansion; peripheral circuit internal installation is an obvious trend to connect the internet. Reliability and application level is getting higher and higher. Some high-end microcontroller and launched in recent years also contains many special function unit, Such as A/D4converter, modem, communication controller, PLL, DMA, floating point unit etc.So,as we add some external expansion of the circuit and channel interface it can constitute a variety of computer applications, such as industrial control systems, data acquisition system, automatic test system, intelligent instrument, intelligent interface, function module etc. With MCU development and complete structure,SCM has become a powerful tool and will have a higher level and broader development.2 Design of the whole structure of systemThis design is based on single-chip, include matrix keyboard and LCD display module. Single-chip is the first model to select the appropriate target, function, reliability, cost, accuracy and speed control system. According to the actual situation of the topic selection, configuration management model different mainly from the following two aspects: First, supply chain management has strong anti-interference ability; second, SCM has a higher price. For information input module, keyboard selection can use economic benefits and meet the requirements of the 4*4 key matrix keyboard can realize multi function key requirements. As for the output module, using LCD 1602 liquid crystal display module, liquid crystal to achieve key information processing functions after the show. The circuit of the system is required by AT89C51 chip, clock circuit, reset circuit, driving circuit, scanning line5driving circuit and LCD1602 LCD screen. 4*4 matrix keyboard accessof P1.0 —P1.7,LCD 1602 screen to access P0.0—P0.7.3 System hardware circuit design3.1 Liquid crystal moduleThe principle of liquid crystal display is the use of physical properties of liquid crystal, The display control area voltage, power is displayed, it can display graphics. Liquid crystal display with thin thickness, suitable for large scale integrated circuit directly driven, easy to realize full color display characteristics, has been widely used in many fields of portable computer, digital camera, PDA mobile communication tools etc.1602 liquid crystal is also called the 1602 character LCD, which is a special used to display letters, numbers, symbols of the LCD module. It is composed of a plurality of 5X7 or 5X11 dot matrix character components, each dot matrix character who can display a character, there is a distance between the interval of each, there are intervals between each line, played the character spacing and row spacing, and because of this it is not well display graphics (with custom CGRAM, show the effect is not good). 1602 LCD refers to the display of the content for the 16X2, which can display two lines, 16 characters per line (LCD moduledisplay characters and numbers).63.2 Matrix keyboard module1. Key characteristicsThe keyboard is composed of a number of separate keys, press and release key is through the closed mechanical contact and off to achieve, because of the elastic action of mechanical contact, in the closing and the opening of the moment has a dither. Jitter must be eliminated, include software and hardware elimination.2．Scanning principleFirst determine whether a key is closed, and then one by one scan to further determine which button closure;(1) D0 ~ D3 output 0, level detection line D4 to D7. If the D4 - level D7 all high, said no key was pressed. If the D4 - level D7 is not all high, said the key was pressed.(2) If no key closure, return the scanning. If there is a button closure, in column by column scanning, closed key key number to find out. The D0=0, D1 ~ D3=1, D4 ~ D7 level, if D4=0, said the K1 key is pressed; similarly, if the D5 ~ D7=0, K5 respectively, K9, K13 key is down; if the D4 ~ D7=1, said that without a key is pressed. Then the D1=0, D0, D2, D3 was 1, the scanning of the second columns, which were carried on, until the closure of the key found.4 Software design7The software design mainly consists of keyboard scanning procedures, write instruction code program of LCD module, LCD module display data initialization code written subroutine, liquid crystal display module, liquid crystal display a character subroutine, time delay subroutine and so on. Programming for each module, software programming ended, Keil software was used for debugging, when the various parts of the program debugging is correct, according to the source sequence of calls, the parts together, compile, compile successfully downloaded to the mcu. The result is when the user presses a key, LCD display of the button is pressed after the realization of functional parameters corresponding to the. When the system power supply, P1 port scan cycle and the key button debounce, after completion of input through the SCM processing, output in the P0 port, through the liquid crystal display program content, complete system function.5 ConclusionWith the continuous development of high and new technology, the miniaturization and the miniaturization of electronic products has been achieved. And all kinds of new technology, as a single field of the new method, the development trend of new products and symbol -- intelligent significantly is one of the trends in development. The module design display microcontroller matrix keyboard and LCD, make us understand8to this technology innovation, through in-depth study on this technology, we can master the use in other areas, such as the design of electronic password lock, adjustment and control of indoor temperature and humidity, field access control system design etc.. Technological progress and economic development are the main themes of the present era, the improvement of people's living standard is bound to the requirements of electronic products increase, the design of any a small system is for a foundation, design of system innovation, the hardware, software integration, method and technology of virtual display and soft measurement artificial intelligence, I firmly believe that our life will be more colourful.9基于单片机的矩阵键盘与液晶显示的设计摘要微电子技术的发展和工业测量的需求，给系统的开发及深入研究带来了良好的契机，发展前景广阔。