8 8 8 8
C
8 8
8 8 8 8 8 8 8 8
PCIE_TX_CP4 PCIE_TX_CN4 PCIE_TX_CP5 PCIE_TX_CN5 PCIE_TX_CP6 PCIE_TX_CN6 PCIE_TX_CP7 PCIE_TX_CN7
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
REV
C1 C1.1 C1.2
DATE
09/27/2011 12/22/2011 03/15/2012
PAGES
All 26 07
DESCRIPTION
INITIAL REVISION C RELEASE BOM UPDATE FOR CAPACITOR C111 AND C127. ADD A NOTE ON SHEET 7 FOR DDR3 SPEED REQUIRMENTS.
HSMC Port B x2 (of 4 XCVRS) DisplayPort (x4)
XCVR BANK QR3
QSFP SDI
C
C
XCVR BANKS QR0, QR1
HSMC Port A x8 HSMC Port B x2 (of 4 XCVRS)
XCVR BANKS QR0, QR2
PCI Express x8
3.3V_PCIE
A
C74 0.1uF PCI BRACKET
C75 0.1uF
C76 0.1uF
C584 0.1uF
C585 0.1uF
C582 0.1uF
C583 0.1uF
C77 0.1uF
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121