简明集成稳压器应用手册

教案（首页）编号：YJSD/JWC-17-10课堂教学安排7818——18V（正电压）——公共端（COM）2——输入端 3——输出端2——输出端 3——输入端系列）max ：稳压器正常工作时所允许输入的最大电压。

用来抑制电路产生自激振荡并减小纹波电压；用于消除输出电压中的高频噪声，C1和C2通常取小于实际应用中，常在C2两端并联10μF左右的电解电容，可减小低频干扰。

若容量较大，可在稳压器输入端和输出端之间跨接一个二极管，如图中虚线所示。

C1:C2:VD1:C2CW79╳╳系列三端固定式集成稳压器的基本电路如图所示CW317系列三端固定式集成稳压器的基本电路如图所示系列三端固定式集成稳压器的基本电路如图所示四、典型例题分析：要获得+9V的直流稳压电源，应选用什么型号的固定式集成稳压器？【解题点拨】本题考察的知识点是集成稳压器的应用电路。

分析本题时，一要检查集成稳压器的引脚是否接正确，二要观察电源电压极性是否正确，三要检查集成稳压器外部电路是否接正确。

【解题示范】图（a）电路的采用的集成稳压器是W7905，为负电源稳压器，要求输1 2四、计算题：、稳压电路如图a，b所示，XW7805的，V1=16V，晶体管的β=100，V7.0，试估算各电路的输出电压。

（a）R1=130Ω，R2=750Ω (b) R1=1.3KΩ，R2=750Ω这节课我们主要学习了集成稳压器的基础知识，通过学习希望同学们能够掌握集成稳压器的功能和典型线路分析。

书本P40:16、17目前，电源集成电路正向集成化、标准化和小型的方向发展。

三端集成稳压器[5篇]以下是网友分享的关于三端集成稳压器的资料5篇，希望对您有所帮助，就爱阅读感谢您的支持。

三端集成稳压器第一篇单片集成稳压电源，具有体积小，可靠性高，使用灵活，价格低廉等优点。

最简单的集成稳压电源只有输入，输出和公共引出端，故称之为三端集成稳压器。

常用的是W78xx、w79xx系列三端集成稳压器，该组件如下图，稳压器的硅片封装在普通功率管的外壳内，电路内部附有短路和过热保护环节。

线性三端集成稳压器的分类1.三端固定正输出，国标型号为CW78--/CW78M--/CW78L--2.三端固定负输出，国标型号为CW79--/CW79M--/CW79L--3.三端可调正输出，国标型号为CW117--/CW117M--/CW117L-CW217--/CW217M--/CW217L--CW317--/CW317M--/CW 317L--4.三端可调负输出，国标型号为CW137--/CW137M--/CW137L-CW237--/CW237M--CW237L--CW337--/CW337M--/CW337L--5.三端低压差 1.5A 0.5A 0.1A6.大电流三端以上1---为军品级；2---为工业品级；3---为民品级。

军品级为金属外壳或陶瓷封装，工作温度范围-55℃～150℃；工业品级为金属外壳或陶瓷封装，工作温度范围-25℃～150℃；民品级多为塑料封装，工作温度范围0℃～125℃。

线性集成稳压应用电路三端集成稳压电路的输入、输出和接地端绝不能接错，不然容易烧坏。

一般最小输入、输出电压差约为2V，否则不能输出稳定的电压，一般应使电压差保持在4-5V 。

安装足够大的散热器，散热片总是和最低电位的第③脚相连C1，C4改善纹波特性，C2消除芯片自激震荡和改善瞬态响应，C3减小高频干扰。

由于稳压管反相电压较低，当输入无电压时，反并联二极管D用于泄放C4电容能量。

UREF=1.25V，IREF=50uA，UREF很稳定采用LM117和LM137实现的输出电压连续可调的正、负输出稳压电路大电流稳压器：NS公司的LM196/396大电流可调稳压器1.25V——15V范围内可以提供10A电流低失稳稳压器失稳电压：当输入电压逐渐降低直至输出电压波动超出规定电压时，输入和输出电压之差为失稳电压。

GN010 应用手册GaN Systems EZDrive®驱动方案2022年03月GaN Systems Inc.内容•背景介绍•两种GaN驱动方案的比较：“分立“还是”集成”•GaN Systems的方案: EZDrive电路•EZDrive实验验证•总结Vgs Level Shift + -Controller +DriverGND GaN12Vcc12V signal+6V-6VVgs•带驱动的控制芯片输出12V驱动电压•GaN器件需要+6V门极电压开通•需要额外的Vgs电平转换使用标准电路控制/驱动芯片驱动GaN器件Vgs Level Shift+-Controller+DriverGNDGaN12Vcc12V signal+6V -6VVgs单片集成驱动的GaN 方案GaN Systems GaN + EZDrive 驱动电路•内部稳压器将12V/0V 转换为+6V/0VPGNDQR Flyback ControllerFBV DS V V PWMREGCTD SGNDPGNDR带集成驱动的MOSFET 控制芯片带集成驱动的MOSFET 控制芯片两种GaN 驱动的解决方案: 集成或分立•电平转换电路[1]将12V/0V 转换为+6V/-6V•带驱动的控制芯片输出12V 驱动电压•GaN 器件需要+6V 门极电压开通•需要额外的Vgs 电平转换参考文献内容•背景简介•两种GaN驱动方案的比较：“分立“还是”集成”•GaN Systems的方案: EZDrive电路•EZDrive实验验证•总结GaN “分立驱动”对比“集成驱动”外围电路元件高压半桥自举控制芯片/驱动芯片GaN Systems 器件集成驱动GaN集成驱动的控制芯片多余的驱动电路和线性稳压电路集成驱动的控制芯片上管单片集成GaN下管单片集成GaN最少的电路模块+标准元器件(低成本:相同数量的无源元件,无需额外驱动)集成芯片= 2个额外的驱动+ 2个额外的线性稳压电路(更高的成本和复杂度)GaN 器件开通关断速度可控，负压关断(可优化EMI 和效率)仅能控制GaN 器件开通速度(不利于性能优化)GaN Systems EZDrive 方案单片集成方案上管GaN下管GaNT offT onV PWMV DSV BUSIncrese R OFF to decrease dv/dt R C ZD ZD R OFFR GD OFF GSSSDttIncrese R G to decrease dv/dtONOFFON12VDrain turn-on Drain turn-off GaN 分立设计对比集成设计——T ON /T OFF 控制1DSPWM V CCV DDD ZR DD T offT onV PWMV DSV BUSDrain turn-on falling edgettONOFFON单片集成GaN12V•漏极关断电压上升和开通电压下降速度可调•有利于EMI 和效率优化•漏极关断电压上升速度不可调整•设计灵活性受限分立的GaN 和EZDrive 电路内容•背景简介•两种GaN驱动方案的比较：“分立“还是”集成”•GaN Systems的方案: EZDrive电路•EZDrive实验验证•总结V GSV PWM-5.2V5.5V0V12V-6.4V-1VEZDrive CircuitGaN Systems 的EZDrive 电路可经济简便地实现GaN 器件驱动.•使12V 驱动芯片能够驱动+6V 开通的GaN 器件•由4个元器件构成电平转换电路•开通关断速率可由外部门电阻Rg 控制，以减少EMI•可应用于任何功率等级,任何频率,以及任何标准控制/驱动芯片•可应用于任何具有单，双或上管/下管驱动的控制芯片+V PWM -+V GS-EZDrive的工作模式V GS_下管=+6V; V GS_上管=-6V VGS_下管=-6V; V GS_上管=-6V模式1: C BOOT充电(上管GaN关断; 下管GaN开通)模式2: C BOOT充电(上管GaN关断; 下管GaN关断)模式3: C BOOT放电(上管GaN开通; 下管GaN关断)功率流向门极驱动电流C BOOT电流•EZDrive的操作模式在半桥应用中类似于传统非隔离自举上管/下管驱动•允许较大的控制芯片工作电压范围：9~18VEZDrive电路应用实例EZDrive的典型应用：•反激电路•半桥电路•升压PFC电路方案= 分立GaN器件+ EZDrive电路+ 控制芯片EZDrive 电路GaN Systems 器件EZDrive circuit GaN SystemsTransistorsEZDrive电路GaN Systems 器件EZDrive反激电路应用ControllerController•反激控制芯片的应用实例包括NCP1342和NCP1250•以下电路是EZDrive在反激电路里的典型应用，表格里提供了元器件的推荐值▪标有“可选电路”的部分与基于硅MOSFET的驱动电路设计类似，用于进一步优化效率和EMI。

SVC(TND/TNS)系列接触器式交流稳压器符合标准：J B/T8749.7-2014产品安装使用前，请仔细阅读使用说明书，注意1 稳压器所标输出容量系最大容量。

家用电器的标称功率是指有功功率，而冰箱、空调等感性负载在启动瞬间电流很大，因此对电冰箱、空调等负载按功率3～5倍选择稳压器的容量。

如输入电压过低，就降低负载。

具体可参照输出容量曲线（图1）选用。

2 按用户设备总功率、开机浪涌电流等情况选择稳压器容量，要有足够的余量；不宜用于冲击性负载。

3 勿用塑料罩等防尘罩罩住稳压器，否则妨碍其散热，引起产品过热损坏。

4 三相稳压器必须接入零线即三相四线才能工作，严禁用地线代替零线，或不接零线。

通电后应按电压转换按钮，观察三相电压均正常方可投入运行。

5 为了确保设备和人身安全，稳压器外壳均设有接地螺钉或接地端子，安装时务必接好地线。

6 带电安装、接线、调整等工作，必须由电工来操作，避免在接线、调整时触电或损坏稳压器。

1 简述SVC系列及TND系列稳压器，由接触式自耦调压器、伺服电动机、自动控制电路等组成。

当电网电压不稳定或负载变化时，自动控制电路按输出电压的变化驱动伺服电动机，调整接触式自耦调压器上的碳刷的位置，使电压调整到额定值后再输出，稳压器输出电压稳定、可靠、效率高，可长期连续工作。

尤其在电网电压波动大或电网电压季节性变化大的地区使用本机可获取满意的效果。

满足仪器、仪表、家用电器等各类负载正常工作时的电压要求。

2 特点及适用范围稳压器具有外形美观、自身功耗低、各种保护功能齐全等特点，可广泛应用于生产、科学研究、医疗卫生和空调、电冰箱等家用电器，是一款性价比较高的稳压器。

3 正常使用条件环境温度:(-5~+40)℃；相对湿度:不大于90%（温度25℃时）；海拔高度:≤2000m；工作环境:无化学性沉积、污垢、有害侵蚀介质及易燃易爆气体的室内；可连续工作。

4 系列型号含义（SVC ）额定容量单相自动调压器三相 额定容量自动调压器TN D - □kVATN S - □kVA5 主要技术特点5.1 主要技术指标见表1相数项目单相三相输入电压范围输出电压过电压保护值调压速度额定频率电气强度负载功率因数160～250V 220V ±3%246±4V <1秒（输入电压变化7.5V时）50Hz冷态下承受50Hz正弦交流1500V,历时1min 0.8280～430V 380±4%426±7V5.2 输出容量曲线；见图1注：1、各机技术指标参照机壳上所示，单相0.5～3kVA 带有110V ±3%输出电压； 2、输入电压超出以上范围，及特别技术指标可专门订货订制。

【分享】亲，来吻个压！By Lapeno不，不，不！亲，是想让你稳个压！在电子产品设计中，往往需要在输入电压，负载，环境温度，电路参数等发生变化时，仍要求输出电压可以保持在一个稳定的状态，这就需要稳压电路。

我们的亲（女主角）是TL431，TL431是一款电压基准芯片，TI的官方命名为可调节精密并联稳压器，我们请她来吻压！TL431的详细资料可以到TI的官方去下载，我在附件里放了一份数据手册，以方便你快速的参考。

我们可以先简单的了解一下她，TL431输出的可调电压范围为Vref(即2.5V左右)到36V，灌电流的范围为1mA到100mA，远远观去，她的外貌是酱紫的：ANODE是她的阳极（正极），REF是参考，CATHODE是她的阴部，错！是阴极（负极），您别多想哈。

走近一点，仔细看：可以看到，TL431可看作是由误差放大器、基准Vref、三极管以及一个二极管组成的。

我们一般人呢，也就只能这么近的看她了。

如果想再近一点，想看的再多一点，您恐怕得掏钱了……好吧，还是让你看一眼吧：看到了吧，满意吗?TL431可以提供的服务就是稳压，我们问问她是怎么吻的。

请参看Figure 2,也就是我们一般人可以看到的她的样子：误差放大器反相输入端接VRef，VRef的值由于生产工艺的限制，各个器件略有差异，范围为2.440V到2.550V，典型值为2.495V。

同相输入端接REF，这样当REF的值大于VRef 值时，放大器的输出端就输出高电平；当REF的值小于VRef时，放大器的输出端就输出低电压。

高电平（或者说高一些的电平）使其后的三极管导通（或者说导通的多一些），三极管的等效电阻就小一些，三极管集电极的压降就会小一些；低电平（或者说低一些的电平）使其后的三极管截止（或者说导通的少一些），三极管的等效电阻就大一些，三极管集电极的压降就大一些。

到此，我们缕一下：REF高时，会使TL431两端压降变小；REF低时，会使TL431两端的压降变大。

三端可调节输出正电压稳压器LM317是可调节3端正电压稳压器，在输出电压范围为1.2伏到37伏时能够提供超过1.5安的电流。

此稳压器非常易于使用，只需要两个外部电阻来设置输出电压。

此外还使用内部限流、热关断和安全工作区补偿之基本能防止烧断保险丝。

LM317服务于多种应用场合，包括局部稳压、卡上稳压。

该器件还可以用来制伏一种可编程的输出稳压器，或者，通过在调整点和输出之间接一个固定电阻，LM317可用作一种精密稳流器。

*输出电流超过1.5A*输出在1.2~37V之间可调节*内部热过载保护*不随温度变化的内部短路电流限制*输出晶体管安全工作区补偿*对高压应用孚空工作*避免置备多种固定电压使Ｗ317 稳压器从零伏起调电路、LM317T应用电路一例（转载）lm317LM317作为输出电压可变的集成三端稳压块，是一种使用方便、应用广泛的集成稳压块。

317系列稳压块的型号很多：例如LM317HVH、W317L等。

电子爱好者经常用317稳压块制作输出电压可变的稳压电源。

稳压电源的输出电压可用下式计算，Vo＝1.25（1＋R2/R1）。

仅仅从公式本身看，R1、R2的电阻值可以随意设定。

然而作为稳压电源的输出电压计算公式，R1和R2的阻值是不能随意设定的。

首先317稳压块的输出电压变化范围是Vo＝1.25V—37V（高输出电压的317稳压块如LM317HVA、LM317HVK等，其输出电压变化范围是Vo＝1.25V—45V），所以R2/R1的比值范围只能是0—28.6。

其次是317稳压块都有一个最小稳定工作电流，有的资料称为最小输出电流，也有的资料称为最小泄放电流。

最小稳定工作电流的值一般为1.5mA。

由于317稳压块的生产厂家不同、型号不同，其最小稳定工作电流也不相同，但一般不大于5mA。

当317稳压块的输出电流小于其最小稳定工作电流时，317稳压块就不能正常工作。

当317稳压块的输出电流大于其最小稳定工作电流时，317稳压块就可以输出稳定的直流电压。

CS81515.0 V, 100 mA Low Dropout Linear Regulator with Watchdog, RESET,and Wake UpThe CS8151 is a precision 5.0 V, 100 mA micro−power voltage regulator with very low quiescent current (400 m A typical at 200 m A load). The 5.0 V output is accurate within ±2% and supplies 100 mA of load current with a typical dropout voltage of 400 mV. Microprocessor control logic includes Watchdog, Wake Up and RESET. This unique combination of low quiescent current and fullmicroprocessor control makes the CS8151 ideal for use in battery operated, microprocessor controlled equipment.The CS8151 Wake Up function brings the microprocessor out of Sleep mode. The microprocessor in turn, signals its Wake Up status back to the CS8151 by issuing a Watchdog signal.The Watchdog logic function monitors an input signal (WDI) from the microprocessor. The CS8151 responds to the falling edge of the Watchdog signal which it expects at least once during each wake−up period. When the correct Watchdog signal is received, a falling edge is issued on the wake−up signal line.RESET is independent of V IN and operates correctly to an output voltage as low as 1.0 V. A RESET signal is issued in any of three situations. During power up the RESET is held low until the output voltage is in regulation. During operation if the output voltage shifts below the regulation limits, the RESET toggles low and remains low until proper output voltage regulation is restored. And finally, a RESET signal is issued if the regulator does not receive a Watchdog signal within the Wake Up period.The RESET pulse width, Wake Up signal frequency, and Wake Up delay time are all set by one external capacitor C Delay.The regulator is protected against short circuit, over voltage, and thermal runaway conditions. The device can withstand 74 V peak transients, making it suitable for use in automotive environments. Features•5.0 V ± 2%/100 mA Output V oltage•Micropower Compatible Control Functions♦Wake Up♦Watchdog♦RESET•Low Dropout V oltage: 400 mV @ 100 mA•Low Sleep Mode Quiescent Current (400 m A Typ)•Protection Features♦Thermal Shutdown♦Short Circuit♦74 V Peak Transient Capability♦Reverse Transient (−50 V)•Internally Fused Leads in SO−14L and SO−16L Packages •These are Pb−Free DevicesSO−16LDWF SUFFIXCASE 751GD2PAK−7DPS SUFFIXCASE 936ABSee detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet.ORDERING INFORMATIONSOIC−14D SUFFIXCASE 751ASee general marking information in the device marking section on page 2 of this data sheet.DEVICE MARKING INFORMATIONPIN CONNECTIONS AND MARKING DIAGRAMSV INV OUTNC Sense WDI GND GND GND GND GND Wake Up NC RESET NC DelayNC SO −16LCASE 751GNC GND GND GND Sense V OUTDelay RESET Wake Up GND GND GND WDI VINSO −14L CASE 751A A = Assembly Location WL = Wafer Lot Y , YY = YearWW = Work WeekG = Pb −Free PackageD 2PAK −7CASE 936ABCS 8151AWLYWWG 1Tab = GND Pin 1. V OUT2. V IN3. WDI4. GND5. Wake Up6. RESET7. DelayFigure 1. Block DiagramV INDelayWDIRESETV OUTWake UpSenseGND2PAKMAXIMUM RATINGS*Rating Value Unit Power Dissipation Internally Limited−Output Current (V OUT, RESET, Wake Up)Internally Limited−Reverse Battery−15V Peak Transient Voltage (60 V Load Dump @ V IN = 14 V)+74V Maximum Negative Transient (t < 2.0 ms)−50V ESD Susceptibility (Human Body Model) 2.0kV ESD Susceptibility (Machine Model)200V Logic Inputs/Outputs−0.3 to +6.0V Storage Temperature Range−55 to +150°CLead Temperature Soldering Wave Solder (through hole styles only) (Note 1)Reflow (SMD styles only) (Notes 2 & 3)260 peak240 peak°C°CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1.10 seconds max2.60 seconds max above 183°C3.−5°C / +0°C allowable conditions*The maximum package power dissipation must be observedELECTRICAL CHARACTERISTICS (−40°C ≤ T A≤ 125°C, −40°C ≤ T J≤ 150°C, 6.0 V ≤ V IN≤ 26 V, 100 m A ≤ I OUT≤ 100 mA,C2 = 47 m F (ESR < 8.0 W), C Delay = 0.1 m F; unless otherwise specified.)Characteristic Test Conditions Min Typ Max Unit Output SectionOutput Voltage, V OUT9.0 V < V IN < 16 V6.0 V < V IN < 26 V, 0 < I OUT < 100 mA 4.904.855.05.05.105.15VVDropout Voltage (V IN− V OUT)I OUT = 100 mAI OUT = 100 m A −−400100600150mVmVLoad Regulation V IN = 14 V, 100 m A < I OUT < 100 mA−1050mV Line Regulation I OUT = 1.0 mA, 6.0 V < V IN < 26 V−1050mV Ripple Rejection7.0 V < V IN < 17 V @ f = 120 Hz, I OUT = 100 mA6075−dB Current Limit V OUT = 4.5 V100250−mA Thermal Shutdown−150180210°C Overvoltage Shutdown V OUT < 1.0 V505662VQuiescent Current I OUT = 200 m A (Sleep)I OUT = 50 mAI OUT = 100 mA (Wake Up)−−−0.44.0120.75−20mAmAmAReverse Current V OUT = 5.0 V, V IN = 0 V− 1.0 1.5mA RESETThreshold High (RTH)RTH V OUT Increasing V OUT− 0.3−V OUT− 0.04V Threshold Low (RTL)RTL V OUT Decreasing 4.5 4.7 4.91V Hysteresis RTH − RTL150200250mV Output Low 1.0 V < V OUT RTL, I OUT = 25 m A−0.20.8V Output High I OUT = 25 m A, V OUT > RTH 3.8 4.2 5.1VELECTRICAL CHARACTERISTICS (−40°C ≤ T A≤ 125°C, −40°C ≤ T J≤ 150°C, 6.0 V ≤ V IN≤ 26 V, 100 m A ≤ I OUT≤ 100 mA,C2 = 47 m F (ESR < 8.0 W), C Delay = 0.1 m F; unless otherwise specified.)Characteristic UnitMaxTypMinTest ConditionsRESETCurrent Limit RESET = 0 V, V OUT > V RTH (Sourcing)RESET = 5.0 V, V OUT > 1.0 V (Sinking)0.0250.10.5121.3080mAmADelay Time POR Mode 3.0 5.07.0ms Watchdog InputThreshold High−− 1.4 2.0V Threshold Low−0.8 1.3−V Hysteresis−25100−mV Input Current0 < WDI < 6.0 V−100+10m A Pulse Width50% WDI Falling Edge to50% WDI Rising Edge and50% WDI Rising Edge to50% WDI Falling Edge(see Figures 2, 3, and 4)5.0−−m sWake Up OutputWake Up Period See Figure 2304050ms Wake Up Duty Cycle Nominal See Figure 4405060%RESET High toWake Up Rising Delay Time 50% RESET Rising Edge to50% Wake Up Edge(see Figures 2, 3, and 4)152025msWake Up Response to Watchdog Input 50% WDI Falling Edge to50% Wake Up Falling Edge− 2.010m sWake Up Response to RESET 50% RESET Falling Edge to50% Wake Up Falling Edge,V OUT = 5.0 V → 4.5 V− 2.010m sOutput Low I OUT = 25 m A (Sinking)−0.20.8V Output High I OUT = 25 m A (Sourcing) 3.8 4.2 5.1VCurrent Limit Wake Up = 5.0 VWake Up = 0 V 0.0250.051.0−7.03.5mAmAPACKAGE PIN DESCRIPTIONPackage Pin #PinSO−14L D2PAK SO−16LSymbol Function718V OUT Regulated output voltage 5.0 V ± 2%.829V IN Supply voltage to the IC.9311WDI CMOS/TTL compatible input lead. The Watchdog function monitors the fallingedge of the incoming signal.44, 5, 6, 12, 13*GND Ground connection.3−5,10−1213514Wake Up CMOS/TTL compatible output consisting of a continuously generated signal usedto Wake Up the microprocessor from sleep mode.14615RESET CMOS/TTL compatible output lead RESET goes low whenever V OUT drops bymore than 6.0% from nominal, or during the absence of a correct watchdogsignal.1716Delay Input lead from timing capacitor for RESET and Wake Up signal.6−7Sense Kelvin connection which allows remote sensing of the output voltage for im-proved regulation. If remote sensing is not required, connect to V OUT.*Pin 6 GND is not directly shorted to the fused paddle GND. The fused paddle GND (pins 4, 5, 12, 13) is connected through the substrate. Pin 6 must be electrically connected to at least one of the fused paddle GND’s on the PC board.TIMING DIAGRAMSFigure 2. Power Up, Sleep Mode and Normal OperationFigure 3. Error Condition: Watchdog Remains Low and a RESET Is IssuedRESET High to Wake Up Delay TimeRESET High to Wake Up Delay TimePeriodFigure 4. Power Down and Restart SequenceDropout Voltage: The input −output voltage differential at which the circuit ceases to regulate against further reduction in input voltage. Measured when the output voltage has dropped 100mV from the nominal value obtained at 14V input, dropout voltage is dependent upon load current and junction temperature.Input Voltage: The DC voltage applied to the input terminals with respect to ground.Line Regulation: The change in output voltage for a change in the input voltage. The measurement is made under conditions of low dissipation or by using pulsetechniques such that the average chip temperature is not significantly affected.Load Regulation: The change in output voltage for a change in load current at constant chip temperature.Quiescent Current: The part of the positive input current that does not contribute to the positive load current. The regulator ground lead current.Ripple Rejection: The ratio of the peak −to −peak input ripple voltage to the peak −to −peak output ripple voltage.Current Limit: Peak current that can be delivered to the output.CIRCUIT DESCRIPTIONFunctional DescriptionTo reduce the drain on the battery a system can go into a low current consumption mode when ever its not performing a main routine. The Wake Up signal is generated continuously and is used to interrupt a microcontroller that is in sleep mode. The nominal output is a 5.0 V square wave with a duty cycle of 50% at a frequency that is determined by a timing capacitor, C Delay .When the microprocessor receives a rising edge from the Wake Up output, it must issue a watchdog pulse and check its inputs to decide if it should resume normal operations or remain in the sleep mode.Figure 5. Wake Up Response to WDIResponse to WDIFigure 6. Wake Up Response to RESET (Low Voltage)Response to RESETThe first falling edge of the watchdog signal causes the Wake Up to go low within 2.0 m s (Typ) and remain low until the next Wake Up cycle (see Figure 5). Other watchdog pulses received within the same cycle are ignored (Figures 2, 3, and 4).During power up, RESET is held low until the output voltage is in regulation. During operation, if the output voltage shifts below the regulation limits, the RESET toggles low and remains low until proper output voltage regulation is restored. After the RESET delay, RESET returns high.The Watchdog circuitry continuously monitors the input watchdog signal (WDI) from the microprocessor. The absence of a falling edge on the Watchdog input during one Wake Up cycle will cause a RESET pulse to occur at the end of the Wake Up cycle (see Figure 3).The Wake Up output is pulled low during a RESET regardless of the cause of the RESET. After the RESET returns high, the Wake Up cycle begins again (see Figure 3).The RESET pulse width, Wake Up signal frequency and RESET high to Wake Up delay time are all set by one external capacitor C Delay .Wake Up Period = (4 × 105)C Delay RESET Delay Time = (5 × 104)C DelayRESET High to Wake Up Delay Time = (2 × 105)C Delay Capacitor temperature coefficient and tolerance as well as the tolerance of the CS8151 must be taken into account in order to get the correct system tolerance for each parameter.Operation Without WatchdogThe CS8151 can be operated without the watchdog functionality by connecting the WDI and Wake Up Pins.This will eliminate false resets from occurring. Without theconnection, a reset would occur because a watchdog signal on WDI would not occur in the required time frame. The Wake Up Pin provides the watchdog signal into the WDI Pin.Figure 7. Device Operation Without Watchdog FunctionOutput Stage ProtectionThe output stage is protected against overvoltage, short circuit and thermal runaway conditions (see Figure 8).If the input voltage rises above the overvoltage shutdown threshold (e.g. load dump), the output shuts down. This response protects the internal circuitry and enables the IC to survive unexpected voltage transients.Should the junction temperature of the power device exceed 180°C (Typ) the power transistor is turned off.Thermal shutdown is an effective means to prevent die overheating since the power transistor is the principle heat source in the IC.Figure 8. Typical Circuit Waveforms for OutputStage ProtectionV IN V OUTI OUT> 50 VLoad Dump Short Circuit Thermal ShutdownStability ConsiderationsThe output or compensation capacitor C2 (see Figure 9)helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability.Figure 9. Test and Application Circuit ShowingOutput Compensation*C1 required if regulator is located far from the power supply filter.**C2 required for stability.The capacitor value and type should be based on cost,availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (−25°C to −40°C), both the value and ESR ofthe capacitor will vary considerably. The capacitor manufacturers data sheet usually provide this information. The value for the output capacitor C2 shown in the test and applications circuit should work for most applications, however it is not necessarily the optimized solution.To determine an acceptable value for C2 for a particular application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part.Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and monitor the outputs with an oscilloscope. A decade box connected in series with the capacitor will simulate the higher ESR of an aluminum capacitor. Leave the decade box outside the chamber, the small resistance added by the longer leads is negligible.Step 2: With the input voltage at its maximum value, increase the load current slowly from zero to full load while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to ensure a stable design under steady state conditions.Step 3: Increase the ESR of the capacitor from zero using the decade box and vary the load current until oscillations appear. Record the values of load current and ESR that cause the greatest oscillation. This represents the worst case load conditions for the regulator at low temperature.Step 4: Maintain the worst case load conditions set in step 3 and vary the input voltage until the oscillations increase. This point represents the worst case input voltage conditions.Step 5: If the capacitor is adequate, repeat steps 3 and 4 with the next smaller valued capacitor. A smaller capacitor will usually cost less and occupy less board space. If the output oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger standard capacitor value.Step 6: Test the load transient response by switching in various loads at several frequencies to simulate its real working environment. Vary the ESR to reduce ringing. Step 7: Raise the temperature to the highest specified operating temperature. V ary the load current as instructed in step 5 to test for any oscillations.Once the minimum capacitor value with the maximum ESR is found, a safety factor should be added to allow for the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic capacitors have a tolerance of ±20% so the minimum value found should be increased by at least 50% to allow for this tolerance plus the variation which will occur at low temperatures. The ESR of the capacitor should be less than 50% of the maximum allowable ESR found in step 3 above. Calculating Power DissipationIn a Single Output Linear RegulatorThe maximum power dissipation for a single output regulator (Figure 10) is:P D(max)+(V IN(max)*V OUT(min))I OUT(max))V IN(max)I Q(1)where:V IN(max) is the maximum input voltage,V OUT(min) is the minimum output voltage,I OUT(max) is the maximum output current for theapplication, andI Q is the quiescent current the regulator consumes atI OUT(max).Once the value of P D(max) is known, the maximum permissible value of R q JA can be calculated:R q JA+(2) The value of R q JA can then be compared with those in the package section of the data sheet. Those packages with R q JA’s less than the calculated value in equation 2 will keep the die temperature below 150°C.Performance Parameters LabeledV OUTIn some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required.A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air.Heat SinksEach material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of R q JA:R q JA+R q JC)R q CS)R q SA(3) where:R q JC = the junction−to−case thermal resistance,R q CS = the case−to−heatsink thermal resistance, andR q SA = the heatsink−to−ambient thermal resistance.R q JC appears in the package section of the data sheet. Like R q JA, it too is a function of package type. R q CS and R q SA are functions of the package type, heatsink and the interface between them. These values appear in heatsink data sheets of heatsink manufacturers.PACKAGE THERMAL DATAParameterD 2PAK −7SOIC −14SOIC −16Unit R q JC Typical 1.823**18°C/W R q JATypical10−50*11675°C/W*Depending on thermal properties of substrate. R q JA = R q JC + R q CA .**Junction −Lead (#5)Figure 11. Application DiagramTYPICAL PERFORMANCE CHARACTERISTICSFigure 12. CS8151 Output Stability with Output Capacitor ChangeE S R (W )I OUT OUTPUT CURRENT (mA)CS8151ORDERING INFORMATIONDevice Package Shipping†50 Units / RailCS8151YDPS7G D2PAK−7(Pb−Free)CS8151YDPSR7G D2PAK−7750 / Tape & Reel(Pb−Free)47 Units / RailCS8151YDWF16G SO−16L(Pb−Free)CS8151YDWFR16G SO−16L1000 / Tape & Reel(Pb−Free)55 Units / RailCS8151D2G SO−14L(Pb−Free)CS8151D2R2G SO−14L2500 / Tape & Reel(Pb−Free)†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.SOIC −14 NB CASE 751A −03ISSUE LDATE 03 FEB 2016SCALE 1:1GENERICMARKING DIAGRAM*XXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot Y = YearWW = Work WeekG= Pb −Free PackageSTYLES ON PAGE 2NOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION.4.DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS.5.MAXIMUM MOLD PROTRUSION 0.15 PERSIDE.DETAIL ADIM MIN MAX MIN MAX INCHESMILLIMETERS D 8.558.750.3370.344E 3.80 4.000.1500.157A 1.35 1.750.0540.068b 0.350.490.0140.019L 0.40 1.250.0160.049e 1.27 BSC 0.050 BSC A30.190.250.0080.010A10.100.250.0040.010M0 7 0 7 H 5.80 6.200.2280.244h 0.250.500.0100.019____14X0.581.27PITCH*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.*This information is generic. Please refer to device data sheet for actual part marking.Pb −Free indicator, “G” or microdot “G ”, may or may not be present. Some products may not follow the Generic Marking.MECHANICAL CASE OUTLINEPACKAGE DIMENSIONSSOIC −14CASE 751A −03ISSUE LDATE 03 FEB 2016STYLE 7:PIN 1.ANODE/CATHODEMON ANODEMON CATHODE4.ANODE/CATHODE5.ANODE/CATHODE6.ANODE/CATHODE7.ANODE/CATHODE8.ANODE/CATHODE9.ANODE/CATHODE 10.ANODE/CATHODE MON CATHODE MON ANODE 13.ANODE/CATHODE 14.ANODE/CATHODESTYLE 5:PIN MON CATHODE2.ANODE/CATHODE3.ANODE/CATHODE4.ANODE/CATHODE5.ANODE/CATHODE6.NO CONNECTIONMON ANODEMON CATHODE9.ANODE/CATHODE 10.ANODE/CATHODE 11.ANODE/CATHODE 12.ANODE/CATHODE 13.NO CONNECTION MON ANODESTYLE 6:PIN 1.CATHODE2.CATHODE3.CATHODE4.CATHODE5.CATHODE6.CATHODE7.CATHODE8.ANODE9.ANODE 10.ANODE 11.ANODE 12.ANODE 13.ANODE 14.ANODESTYLE 1:PIN MON CATHODE2.ANODE/CATHODE3.ANODE/CATHODE4.NO CONNECTION5.ANODE/CATHODE6.NO CONNECTION7.ANODE/CATHODE8.ANODE/CATHODE9.ANODE/CATHODE 10.NO CONNECTION 11.ANODE/CATHODE 12.ANODE/CATHODE 13.NO CONNECTION MON ANODE STYLE 3:PIN 1.NO CONNECTION2.ANODE3.ANODE4.NO CONNECTION5.ANODE6.NO CONNECTION7.ANODE8.ANODE9.ANODE10.NO CONNECTION 11.ANODE 12.ANODE13.NO CONNECTION MON CATHODE STYLE 4:PIN 1.NO CONNECTION2.CATHODE3.CATHODE4.NO CONNECTION5.CATHODE6.NO CONNECTION7.CATHODE8.CATHODE9.CATHODE10.NO CONNECTION 11.CATHODE 12.CATHODE13.NO CONNECTION MON ANODE STYLE 8:PIN MON CATHODE2.ANODE/CATHODE3.ANODE/CATHODE4.NO CONNECTION5.ANODE/CATHODE6.ANODE/CATHODEMON ANODEMON ANODE9.ANODE/CATHODE 10.ANODE/CATHODE 11.NO CONNECTION 12.ANODE/CATHODE 13.ANODE/CATHODE MON CATHODESTYLE 2:CANCELLEDSOIC −16 WB CASE 751G ISSUE EDATE 08 OCT 2021SCALE 1:1XXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot YY = YearWW = Work WeekG= Pb −Free PackageGENERICMARKING DIAGRAM**This information is generic. Please refer to device data sheet for actual part marking.Pb −Free indicator, “G” or microdot “G ”, may or may not be present. Some products maynot follow the Generic Marking.0.539DATE 08 SEP 2009DIM MIN MAX MIN MAX MILLIMETERSINCHES E 0.3800.4209.6510.67D 0.3250.3688.259.53A 0.1700.180 4.32 4.57b 0.0260.0360.660.91c20.0450.055 1.14 1.40e 0.050 BSC 1.27 BSC H 0.57913.6914.71L1A10.0000.0100.000.25c 0.0170.0260.430.66XXXXXXXXXXX AWLYWWG−−−0.066−−− 1.68L 0.0580.078 1.47 1.98ML30.010 BSC 0.25 BSC 0 8 °°0 8 °°XXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot Y = YearWW = Work WeekG= Pb −Free PackageGENERICMARKING DIAGRAM**This information is generic. Please refer to device data sheet for actual part marking.Pb −Free indicator, “G” or microdot “ G ”,may or may not be present.1*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.NOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: INCHES.3.DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH AND GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.005 MAXIMUM PER SIDE. THESE DIMENSIONS TO BE MEASURED AT DATUM H.4.THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS E, L1, D1, AND E1. DIMENSIONS D1 AND E1 ESTABLISH A MINIMUM MOUNTING SURFACE FOR THE THERMAL PAD.D10.270−−− 6.86−−−E10.245−−−6.22−−−DIMENSIONS: MILLIMETERSPUBLICATION ORDERING INFORMATIONTECHNICAL SUPPORTLITERATURE FULFILLMENT:。