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©2004 Altera Corporation ALM vs. Slice
Discussion and Design Examples
v.1.3 June 15, 2004
Agenda
n ALM Introduction
n ALM vs. Slice Comparison
n Conclusion
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©2004 Altera Corporation -Confidential What is Adaptive Logic Module (ALM)
Reg
Reg Reg
Reg Adder
Adder Adder
Adder 12345678
Comb.
Logic
Adaptive Logic Usage
Flexible Input Sharing
A L M I n p u t s
ALM
Xilinx Slice Claim
n Xilinx Claims ALM = Slice. Why?
−Both Have 8 Inputs to LUT
−Both Have 2 Flip Flops, 2 Bits of Arithmetic
n All Cars Have Four Wheels: SUV =Sedan?n Xilinx Also Claims Slices Can Implement 6-Input LUTs
What is the Real Story?
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©2004 Altera Corporation -Confidential ALM is More than A Simple Slice
n Eight Simple Examples Showing Differences
−One 6-Input Function
−Two 5-Input Functions (Input Sharing)−3 and 5-Input Functions
−7-Input Functions (2 Examples)−16-Bit Barrel Shifter −16-Bit Crossbar Switch −
Ternary Adder
n Truth About Xilinx’s “Variable LUT Architecture”White Paper
n Slice Discussion is Applicable to Virtex-II, Virtex-II Pro, Spartan-2E and Spartan-3 Families
6-Input Function Example
n A Function of 6 Inputs –a , b , c , d , e,f
n Stratix II ALM Can Implement Any 6-Input Function
module function_6_reg(a, b, c, d, e, f, out, reset, clk);
input a, b, c, d, e, f, reset, clk;output out;
reg out, reg_a, reg_b, reg_c, reg_d, reg_e, reg_f;
always@ (posedge clk) begin if (reset) begin
out <= 0;
end
else begin
{reg_a, reg_b, reg_c, reg_d, reg_e, reg_f} <= {a, b, c, d, e, f};out <= (reg_a + reg_b + reg_c + reg_d + reg_e + reg_f == 4) ||
(reg_a ^ reg_b ^ reg_c ^ reg_d ^ reg_e ^ reg_f);
end end
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©2004 Altera Corporation -Confidential 6-Input Function: ALM vs. Slice
Used
Used
Used
Used
Slice 1
Slice 2
a b e d a b e d c X
c a b e
d a b
e d F5
F6
F5
f
123
Logic Levels One ALM
Two Slices (4 LUTs)
1
Logic Level
ALM
out
a
c b
d
e f
Used
6-Input Function
6-Input Function
Note: Output Registers are Not Shown 6-Input Function Speed Comparison
Stratix II ALM
Xilinx Slices
1
Logic Level
ALM Used
55-383 ps
Used
Slice 1
Slice 2
F6
F5
1
23
Logic Levels
809 ps
809 ps 55-383 ps Propagation Delay 31Logic Level Virtex -II Pro Slice
Stratix II ALM
