TBN6301S中文资料

CS 基准电压
CS 峰值保护电压
控制时间参数
最大导通时间
前沿消隐时间
最大关断时间
最小关断时间
最小周期
ROVP 引脚电压
内置高压 MOSFET
SD6701AS
SD6701S
导通电阻 SD6702S
SD6703S
SD6704S
SD6701AS
SD6701S
漏端耐压 SD6702S
SD6703S
SD6704S
单位 °C °C °C
1 ROVP 2 NC
GND 7
3 CS
DRAIN 6
4 VCC
DRAIN 5
管脚描述
管脚编号
1 2 3 4 5，6 7
管脚名称
ROVP NC CS VCC
DRAIN GND
I/O I/O
I POWER O GND
功能描述 过压保护设置引脚，外接电阻到地 采样电流 电源 内置高压 MOSFET 漏端 地
CS 开短路保护 一旦 CS 电阻被短路，电感电流不再有限流限制，CS 管脚电压为零，此时通过检测内部 OUT 信号在开通时的电压
高低来判断是否进入 CS 电阻短路状态。
源极驱动 芯片采用源极驱动技术，合封高压功率管 M2 的栅极通过一定阻值连接 VCC，源极连接内部开关 M1 的漏极。芯片
驱动内部开关 M1 的栅极，由于 M1 的栅极电容小，源极驱动技术有效的减小芯片工作电流，从而无需辅助绕组供电。
μs
2.5
3.5
4.5
μs
3.7
5
6.3
μs
2
2.4
2.8
V
--
13
14.5
--

HA1630D04/05/06 SeriesUltra-Small Low Voltage Operation CMOS Dual OperationalAmplifierREJ03D0801-0200Rev.2.00Feb 07, 2007 DescriptionThe HA1630D04/05/06 are high slew rate dual CMOS Operational Amplifiers realizing low voltage operation, lowinput offset voltage and low supply current. In addition to a low operating voltage from 1.8V, these device output canachieve full swing output voltage capability extending to either supply. Available in an ultra-small TSSOP-8 andMMPAK-8 package that occupy more small area against the SOP-8.Features•Low power and single supply operation V DD = 1.8 to 5.5 V•Low input offset voltage V IO = 4.0 mV Max•Low supply current (per channel) I DD = 200 μA Typ (HA1630D04)I DD = 400 μA Typ (HA1630D05)I DD = 800 μA Typ (HA1630D06)•High slew rate SR = 2 V/μs Typ (HA1630D04)SR = 4 V/μs Typ (HA1630D05)SR = 8 V/μs Typ (HA1630D06)•Maximum output voltage V OH = 2.9 V Min (at V DD = 3.0 V)•Low input bias current I IB = 1 pA TypOrdering InformationType No. Package Name Package CodeHA1630D04TTTP-8DA PTSP0008JC-B HA1630D05THA1630D06THA1630D04MMMMPAK-8 PLSP0008JC-A HA1630D05MMHA1630D06MMPin ArrangementEquivalent Circuit (per one channel)Absolute Maximum Ratings(Ta = 25°C)Items Symbol Ratings Unit NoteSupply voltage V DD 7 V Differential input voltage V IN(diff) –V DD to +V DD V Input voltage V IN –0.3 to +V DD V *1 Power dissipation P T 240/145 mW TTP-8DA/MMPAK-8 *2 Operating temp. Range Topr –40 to +85 °C Storage temp. Range Tstg –55 to +125 °C Notes: 1. Do not apply Input Voltage exceeding V DD or 7 V. 2. The value of PTSP0008JC-B (TTP-8DAV) / PLSP0008JC-A (MMPAK-8). It computes from heat resistanceθja = 520°C/W, and 690°C/W each other.Electrical Characteristics(V DD = 3.0 V, Ta = 25°C)Items Symbol Min Typ Max Unit Test ConditionInput offset voltage V IO — — 4.0 mV Vin = 1.5 V Input offset current I IO — (1.0) — pA Vin = 1.5 V Input bias current I IB — (1.0) — pA Vin = 1.5 V Output high voltage V OH 2.9 — — V R L = 100 k Ω 100 200 — V OH = 2.5 V (HA1630D04)200 400 — V OH = 2.5 V (HA1630D05) Output source currentI O SOURCE 400 800 — μA V OH = 2.5 V (HA1630D06)Output low voltage V OL — — 0.1 V R L = 100 k Ω — (5.0) — V OL = 0.5 V (HA1630D04)— (6.0) — V OL = 0.5 V (HA1630D05) Output sink current I O SINK — (6.5) — mA V OL = 0.5 V (HA1630D06) –0.05 to 2.1— — (HA1630D04, HA1630D05)Common mode input voltagerange V CM 0 to 1.9 — — V (HA1630D06) — (2.0) — C L = 20 pF (HA1630D04)— (4.0) — C L = 20 pF (HA1630D05) Slew rate SR — (8.0) — V/μs C L = 20 pF (HA1630D06)Voltage gain A V 60 90 — dB — (2100) — C L = 20 pF (HA1630D04)— (3300) — C L = 20 pF (HA1630D05) Gain bandwidth product BW — (3600) — kHz C L = 20 pF (HA1630D06)Power supply rejection ratio PSRR 50 70 — dB Common mode rejection ratio CMRR 50 70 — dB — 400 800 R L = ∞ (HA1630D04)— 800 1600 R L = ∞ (HA1630D05) Supply current I DD — 1600 3400 μA R L = ∞ (HA1630D06)Notes: 1. In the case of continuous current flow, use a sink current of under 4 mA. 2. ( ) : Design specificationTable of GraphsElectrical Characteristics HA1630D04FigureHA1630D05FigureHA1630D06FigureTestCircuitvs Supply voltage 1-1 2-1 3-1Supply current I DDvs Ambient temperature 1-2 2-2 3-22vs Output source current 1-3 2-3 3-3Output high voltage V OHvs Supply voltage 1-4 2-4 3-44Output source current I O SOURCE vs Ambient temperature 1-5 2-5 3-5 6Output low voltage V OL vs Output sink current 1-6 2-6 3-6 5Output sink current I O SINK vs Ambient temperature 1-7 2-7 3-7 6Distribution 1-82-83-8vs Supply voltage 1-9 2-9 3-9Input offset voltage V IOvs Ambient temperature 1-10 2-10 3-101Common mode inputvoltage rangeV CM vs Ambient temperature 1-11 2-11 3-11 7Power supply rejection ratio PSRR vsFrequency 1-12 2-12 3-12 1Common mode rejection ratio CMRR vsFrequency 1-13 2-13 3-13 7Voltage gain & phase angle A V vsFrequency 1-14 2-14 3-14 10 vs Ambient temperature 1-15 2-15 3-15Input bias current I IBvs Input voltage 1-16 2-16 3-163 Slew Rate (rising) SRr vs Ambient temperature 1-17 2-17 3-17Slew Rate (falling) SRf vs Ambient temperature 1-18 2-18 3-18Large signal transient response 1-19 2-19 3-19Slew rateSmall signal transient response 1-20 2-20 3-209(0 dB) vs. Output voltage p-p 1-21 2-21 3-21 Total harmonic distortion +noise (40 dB) vs. Output voltage p-p 1-22 2-22 3-22Maximum p-p output voltage vsFrequency 1-232-233-238Voltage noise density vs Frequency 1-24 2-24 3-24 Channel separation vs Frequency 1-25 2-25 3-25Main Characteristics (HA1630D04)1.4 V1.6 V1.6 V1.4 V0 V2.0 V2.0 V 0 V Ta = 25°C V DD =3.0 V R L = 100 k ΩC L = 20 pFTa = 25°C V DD = 3.0 V R L = 100 k ΩC L = 20 pFVin = 2.1 V p-p , 250 kHzVin = 0.2 V p-p , 250 kHzMain Characteristics (HA1630D05)1.4 V1.6 V1.6 V1.4 V0V2.0 V2.0 V 0 V Ta = 25°C V DD =3.0 V R L = 100 k ΩC L = 20 pFTa = 25°C V DD = 3.0 V R L = 100 k ΩC L = 20 pFV IN = 2.1 V p-p , 500 kHzV IN = 0.2 V p-p , 500 kHzMain Characteristics (HA1630D06)1.4 V1.6 V1.6 V1.4 V0 V2.0 V2.0 V 0 V Ta = 25°C V DD =3.0 V R L = 100 k ΩC L = 20 pFTa = 25°C V DD = 3.0 V R L = 100 k ΩC L = 20 pFV IN = 1.9 V p-p , 500 kHzV IN = 0.2 V p-p , 500 kHzTest CircuitsPackage DimensionsTaping & Reel SpecificationMark Indication RENESAS SALES OFFICESRefer to "/en/network" for the latest and detailed information.Renesas Technology America, Inc.450 Holger Way, San Jose, CA 95134-1368, U.S.ATel: <1> (408) 382-7500, Fax: <1> (408) 382-7501Renesas Technology Europe LimitedDukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K.Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900Renesas Technology (Shanghai) Co., Ltd.Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7898Renesas Technology Hong Kong Ltd.7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong KongTel: <852> 2265-6688, Fax: <852> 2730-6071Renesas Technology Taiwan Co., Ltd.10th Floor, No.99, Fushing North Road, Taipei, TaiwanTel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999Renesas Technology Singapore Pte. Ltd.1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632Tel: <65> 6213-0200, Fax: <65> 6278-8001Renesas Technology Korea Co., Ltd.Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, KoreaTel: <82> (2) 796-3115, Fax: <82> (2) 796-2145Renesas Technology Malaysia Sdn. BhdUnit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, MalaysiaTel: <603> 7955-9390, Fax: <603> 7955-9510。

(S ) 1Data Sheet No. PD60162 Rev. Vers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.IR2106(4) (S)Absolute Maximum RatingsAbsolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measuredIR2106(4) (S)Note 1: Logic operational for V S of -5 to +600V. Logic state held for V S of -5V to -V BS . (Please refer to the Design Tip DT97-3 for more details).Recommended Operating ConditionsThe Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The V and V offset rating are tested with all supplies biased at 15V differential.IR2106(4) (S)IR2106(4) (S)Functional Block DiagramsIR2106(4) (S)14 Lead PDIP 14 Lead SOICIR21064IR21064SLead Assignments8 Lead PDIP 8 Lead SOICLead DefinitionsSymbol DescriptionHIN Logic input for high side gate driver output (HO), in phase LIN Logic input for low side gate driver output (LO), in phase VSS Logic Ground (IR21064 only)V B High side floating supply HO High side gate drive output V S High side floating supply return V CC Low side and logic fixed supply LO Low side gate drive output COMLow side returnIR2106IR2106S12348765V CC HIN LIN COMV B HO V S LO12348765V CC HIN LIN COMV B HO V S LO1234567141312111098V CC HIN LINVSS COM LOV B HO V S1234567141312111098V CC HIN LINVSS COM LOV B HO V SIR2106(4) (S)Figure 1. Input/Output Timing DiagramHIN LINHO LOFigure 2. Switching Time Waveform DefinitionsIR2106(4) (S)IR2106(4) (S)IR2106(4) (S)IR2106(4) (S)IR2106(4) (S)(A (A (A 300(AIR2106(4) (S)(A (A (A (AIR2106(4) (S)(A (AIR2106(4) (S)(A (AIR2106(4) (S)( A( AIR2106(4) (S)IR2106(4) (S)IR2106(4) (S)IR2106(4) (S)。

Electrical
Pulse Rate 10 kHz, up to 200 kHz Outputs NPN w/pullup; NPN open collector; PNP sourcing Output Ratings Open Collector Transistor 40 Vdc maximum Supply Voltage 8 to 28 Vdc 5 Vdc with 5V TTL output Supply Current 15 mA maximum Current Sinking 250 mA maximum Output Duty Cycle 50/50 w/ +20% typical tolerance Tighter to +5% by spec Rise/Fall Times 1 µsec typical, other options available
21
Order the Secondary Channel like a Primary Channel
3
Series Shaft Diameter 1=1/4"(0.2497") 3=3/8" (0.3747) Shaft Extension 1=Single 2=Double
3
1
1
_
Encoder Type _=Standard Encoder S=Sealed (Elastomer) T=Sealed (PTFE)
Wire Drawings
Series 3000 Standard
call for smation
1
Series Shaft Diameter 1=1/4"(0.2497") 3=3/8" (0.3747) Shaft Extension 1=Single 2=Double Encoder Type _=Standard Encoder S=Sealed (Elastomer) T=Sealed (PTFE) Mounting Type 0=6-32 BHC on Ends 1=10-32 BHC on Shaft Ends & Base 2=Flanged Base (10-32 BHC on Shaft Ends) 3=No Holes on Base (10-32 BHC on Ends)