BC32716中文资料

SIPMOS Small-Signal-TransistorProduct SummaryV DS100V R DS(on)6ΩI D0.17AFeature • N-Channel• Enhancement mode • Logic Level• d v /d tratedPG-SOT23123VPS05161Marking sSHType Package Pb-free Tape and Reel Information BSS119PG-SOT23YesL6327: 3000 pcs/reelMaximum Ratings , at T j = 25 °C, unless otherwise specified ParameterSymbol Value Unit Continuous drain currentT A =25°C T A =70°CI D0.170.13APulsed drain currentT A =25°CI D puls0.68Reverse diode d v /d tI S =0.17A, V DS =80V, d i /d t =200A/µs, T jmax =150°Cd v /d t 6kV/µs Gate source voltage V GS ±20V Power dissipationT A =25°CP tot0.36W Operating and storage temperature T j , T stg-55... +150°CIEC climatic category; DIN IEC 68-155/150/56Thermal CharacteristicsParameter Symbol Values Unitmin.typ.max. CharacteristicsThermal resistance, junction - ambientat minimal footprintR thJS--350K/WElectrical Characteristics, at T j = 25 °C, unless otherwise specifiedParameter Symbol Values Unitmin.typ.max. Static CharacteristicsDrain-source breakdown voltageV GS=0, I D=250µAV(BR)DSS100--V Gate threshold voltage, V GS = V DSI D=50µAV GS(th) 1.3 1.8 2.3Zero gate voltage drain current V DS=100V, V GS=0, T j=25°CV DS=100V, V GS=0, T j=150°C I DSS--0.050.50.15µAGate-source leakage currentV GS=20V, V DS=0I GSS-10100nA Drain-source on-state resistanceV GS=4.5V, I D=0.13 AR DS(on)- 4.910ΩDrain-source on-state resistanceV GS=10V, I D=0.17AR DS(on)- 3.46Electrical Characteristics, at T j = 25 °C, unless otherwise specifiedParameter Symbol Conditions Values Unitmin.typ.max. Dynamic CharacteristicsTransconductance g fs V DS≥2*I D*R DS(on)max,I D=0.13A0.080.17-SInput capacitance C iss V GS=0, V DS=25V,f=1MHz -6078pFOutput capacitance C oss-8.611.2 Reverse transfer capacitance C rss- 3.1 4.1Turn-on delay time t d(on)V DD=50V, V GS=10V,I D=0.17A, R G=6Ω- 2.74nsRise time t r- 3.1 4.6Turn-off delay time t d(off)-9.314Fall time t f-2740Gate Charge CharacteristicsGate to source charge Q gs V DD=80V, I D=0.17A-0.080.12nC Gate to drain charge Q gd-0.76 1.1Gate charge total Q g V DD=80V, I D=0.17A,V GS=0 to 10V- 1.67 2.5Gate plateau voltage V(plateau)V DD=80V, I D = 0.17 A - 3.4-V Reverse DiodeInverse diode continuousforward currentI S T A=25°C--0.17AInv. diode direct current, pulsed I SM--0.68 Inverse diode forward voltage V SD V GS=0, I F = I S-0.8 1.2VReverse recovery time t rr V R=50V, I F=l S,d i F/d t=100A/µs -21.732.5nsReverse recovery charge Q rr-1015nC1 Power dissipation P tot = f (T A)BSS119Ptot2 Drain currentI D = f (T A)parameter: V GS≥ 10 VBSS119ID3 Safe operating areaI D = f ( V DS )parameter : D = 0 , T= 25 °C3ID4 Transient thermal impedanceZ thJA = f (t p)parameter : D = t p/T101010101010310K/WBSS119ZthJA5 Typ. output characteristicI D = f (V DS)parameter: T j = 25 °C, V GSID6 Typ. drain-source on resistanceR DS(on) = f (I D)parameter: T j = 25 °C,V GSRDS(on)7 Typ. transfer characteristicsI D= f ( V GS ); V DS≥ 2 x I D x R DS(on)maxparameter: T j = 25 °CID8 Typ. forward transconductanceg fs = f(I D)parameter: T j = 25 °Cgfs9 Drain-source on-state resistance R DS(on) = f (T j )parameter : I D = 0.17 A, VGS = 10 VBSS119R D S (o n )10 Typ. gate threshold voltage VGS(th) = f (T j )parameter: V GS = V DS ; I D=50µAV G S (th )11 Typ. capacitances C = f (V DS )parameter: V GS =0, f =1 MHz, T j = 25 °CC12 Forward character. of reverse diode I F = f (V SD )parameter: TI F13 Typ. gate chargeV GS = f (Q G ); parameter: V DS ,I D = 0.17 A pulsed, T j= 25 °CBSS119V G S14 Drain-source breakdown voltageV (BR)DSS = f (T j)BSS119V (B R )D S SPublished byInfineon Technologies AG,Bereichs KommunikationSt.-Martin-Strasse 53,D-81541 München© Infineon Technologies AG 1999All Rights Reserved.Attention please!The information herein is given to describe certain components and shall not be considered as warranted characteristics.Terms of delivery and rights to technical change reserved.We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein.Infineon Technologies is an approved CECC manufacturer.InformationFor further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Reprensatives worldwide (see address list). WarningsDue to technical requirements components may contain dangerous substances.For information on the types in question please contact your nearest Infineon Technologies Office.Infineon Technologies Components may only be used in life-support devices or systems with the expresswritten approval of Infineon Technologies, if a failure of such components can reasonably be expected tocause the failure of that life-support device or system, or to affect the safety or effectiveness of that deviceor system Life support devices or systems are intended to be implanted in the human body, or to supportand/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the healthof the user or other persons may be endangered.。

计算机内部是以二进制形式表示数据和进行运算的；计算机内的地址等信号常用十六进制来表示，而人们日常又习惯用十进制来表示数据。

这样要表示一个数据就要选择一个适当的数字符号来规定其组合规律，也就是要确定所选用的进位计数制。

各种进位制都有一个基本特征数，称为进位制的“基数”。

基数表示了进位制所具有的数字符号的个数及进位的规律。

下面就以常用的十进制、二进制、八进制和十六进制为例，分别进行叙述。

一．常用的三种计数制1.十进制(Decimal)十进制的基数是10，它有10个不同的数字符号，即0、1、2、3、…、9。

它的计数规律是“逢十进一”或“借一当十”。

处在不同位置的数字符号具有不同的意义，或者说有着不同的“权”。

所谓的“权”就是每一位对其基数具有不同的倍数。

例如，一个十进制数为123．45＝1×102十2×101十3×100十4×10-1十5×10-2等号左边为并列表示法．等号右边为多项式表示法，显然这两种表示法表示的数是等价的。

在右边多项式表示法中，1、2、3、4、5被称为系数项，而102、101、100、10-1、10-2等被称为该位的“权”。

一般来说，任何一个十进制数”都可以采用并列表不法表不如下：N10＝dn-1d n-2…d1d 0. d-1d-2…d-m其中，下标n表示整数部分的位数，下标m表示小数部分的位数，d是0~9中的某一个数，即di∈(0，1，…，9)。

同样，任意一个十进制数N都可以用多项式表示法表示如下：N10＝dn-1×10n-1十…十d1×101十d 0×100十d-1×10-1十…十d-m×10-m 其中，m、n为正整数，di表示第i位的系数，10i称为该位的权。

所以某一位数的大小是由各系数项和其权值的乘积所决定的。

2.二进制(Binary)二进制的基数是2，它只有两个数字符号，即0和1。

TL D 1032927C16 16 384-Bit (2048 x 8) UV Erasable CMOS PROM Military QualifiedJanuary1989 27C1616 384-Bit(2048x8)UV Erasable CMOS PROMMilitary QualifiedGeneral DescriptionThe27C16is a high speed16K UV erasable and electricallyreprogrammable CMOS EPROM ideally suited for applica-tions where fast turnaround pattern experimentation andlow power consumption are important requirementsThe27C16is packaged in a24-pin dual-in-line package withtransparent lid The transparent lid allows the user to ex-pose the chip to ultraviolet light to erase the bit pattern Anew pattern can then be written into the device by followingthe programming procedureThis EPROM is fabricated with the reliable high volumetime proven P2CMOS TM silicon gate technologyThe27C16specified on this data sheet is fully compliantwith MIL-STD-883 Revision CFeaturesY Access time down to450nsY Low CMOS power consumptionActive Power 26 25mW maxStandby Power 0 53mW max(98%savings)Y Performance compatible to NSC800TM CMOS micro-processorY Single5V power supplyY Pin compatible to MM2716and higher density EPROMsY Static no clocks requiredY TTL compatible inputs outputsY TRI-STATE outputY Windowed DIP PackageY Specifications guaranteed over full military temperaturerange(b55 C to a125 C)Block DiagramTL D 10329–1Pin NamesA0–A10AddressesCE Chip EnableOE Output EnableO0–O7OutputsPGM ProgramNC No ConnectTRI-STATE is a registered trademark of National Semiconductor CorporationNS800TM are P2CMOS TM trademarks of National Semiconductor CorporationC1995National Semiconductor Corporation RRD-B30M105 Printed in U S AConnection Diagram27C25627C12827C6427C32 272562712827642732V PP V PP V PPA12A12A12A7A7A7A7 A6A6A6A6 A5A5A5A5 A4A4A4A4 A3A3A3A3 A2A2A2A2 A1A1A1A1 A0A0A0A0 O0O0O0O0 O1O1O1O1 O2O2O2O2 GND GND GND GND Dual-In-Line Package27C16QTL D 10329–2Top View27C3227C6427C12827256273227642712827256V CC V CC V CCPGM PGM A14V CC NC A13A13A8A8A8A8A9A9A9A9A11A11A11A11OE V PP OE OE OEA10A10A10A10CE CE CE CEO7O7O7O7O6O6O6O6O5O5O5O5O4O4O4O4O3O3O3O3Note Socket compatible EPROM pin configurations are shown in the blocks adjacent to the27C16pinsMilitary Temp Range(b55 C to a125 C)V CC e5V g10%Parameter Order Number Access Time(ns)27C16Q450 88345027C16Q550 8835502Absolute Maximum Ratings(Note1) Temperature Under Bias b55 C to a125 C Storage Temperature b65 C to a125 C All Input Voltages withRespect to Ground a6 5V to b0 3V All Output Voltages withRespect to Ground(Note11)V CC a0 3V to GND b0 3V V PP Supply Voltagewith Respect to Groundduring Programming a26 5V to b0 3V Power Dissipation1 0W Lead Temperature(Soldering 10Seconds)300 C Operating Conditions(Note9) Temperature Range(T case)b55 C to a125 C V CC Power Supply(Notes2and3)5V a10% V PP Power Supply(Note3)V CCREAD OPERATIONDC Electrical CharacteristicsSymbol Parameter Conditions MinTypMax Units (Note4)I LI Input Load Current V IN e V CC or V IL10m A I LO Output Leakage Current V OUT e V CC or V IL CE e V IH10m A I CC1V CC Current(Active)OE e CE e V IL f e1MHz230mA (Note3)TTL Inputs Inputs e V IH or V IL I O e0mAI CC2V CC Current(Active)OE e CE e V IL f e1MHz125mA(Note3)CMOS Inputs Inputs e V CC or GND I O e0mAI CCSB1V CC Current(Standby)CE e V IH0 11mATTL InputsI CCSB2V CC Current(Standby)CE e V CC0 010 1mACMOS InputsV IL Input Low Voltage b0 10 8V V IH Input High Voltage2 2V CC a1V V OL1Output Low Voltage I OL e2 1mA0 45V V OH1Output High Voltage I OH e b400m A2 4V V OL2Output Low Voltage I OL e0m A0 1V V OH2Output High Voltage I OH e0m A4 4V AC Electrical Characteristics27C16Symbol Parameter Conditions450550UnitsMin Max Min Maxt ACC Address to Output Delay CE e OE e V IL450550ns t CE CE to Output Delay OE e V IL450550ns t OE OE to Output Delay CE e V IL120120ns t DF OE High to Output Float CE e V IL01000100ns t OH Output Hold from Addresses CE e OE e V IL(Note5)CE or OE Whichever00ns Occurred First3Capacitance T A e a25 C f e1MHz(Note5)Symbol Parameter Conditions Typ Max Units C IN Input Capacitance V IN e0V410pF C OUT Output Capacitance V OUT e0V812pF AC Test ConditionsOutput Load1TTL Gate and C L e100pF Input Rise and Fall Times s20ns Input Pulse Levels0 8V to2 2V Timing Measurement Reference LevelInputs1V and2V Outputs0 8V and2VAC Waveforms(Notes2 8 9 10)TL D 10329–3Note1 Stresses above those listed under‘‘Absolute Maximum Ratings’’may cause permanent damage to the device This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliabilityNote2 V CC must be applied simultaneously or before V PP and removed simultaneously or after V PPNote3 V PP may be connected to V CC except during programming I CC1s the sum of the I CC active and I PP read currentsNote4 Typical values are for T A e a25 C and nominal supply voltagesNote5 This parameter is only sampled and is not100%testedNote6 OE may be delayed up to t ACC b t OE after the falling edge of CE without impact on t ACCNote7 The t DF compare level is determined as followsHigh to TRI-STATE the measured V OH1(DC)b0 10VLow to TRI-STATE the measured V OL1(DC)a0 10VNote8 TRI-STATE may be attained using OE or CENote9 The power switching characteristics of EPROMs require careful device decoupling It is recommended that a0 1m F ceramic capacitor be used on every device between V CC and GNDNote10 The27C16requires one address transition after initial power-up to reset the outputsNote11 The outputs must be restricted to V CC a0 3V to avoid latch-up and device damage4PROGRAMMING CHARACTERISTICS(Note1)DC Programming Characteristics(Notes2 3)(T A e a25 C g5 C V CC e5V g10% V PP e25V g1V)Symbol Parameter Conditions Min Typ Max UnitsI LI Input Current(for Any Input)V IN e V CC or GND10m AI PP V PP Supply Current during CE PGM e V IH30mAProgramming PulseI CC V CC Supply Current10mA V IL Input Low Level b0 10 8V V IH Input High Level2 0V CC a1VAC Programming Characteristics(Notes2 3)(T A e a25 C g5 C V CC e5V g10% V PP e25V g1V)Symbol Parameter Conditions Min Typ Max Units t AS Address Setup Time2m s t OES OE Setup Time2m S t DS Data Setup Time2m s t AH Address Hold Time2m s t OEH OE Hold Time2m s t DH Data Hold Time2m s t DF Output Enable to Output Float Delay CE PGM e V IL0120ns t OE Output Enable to Output Delay CE PGM e V IL100ns t PW Program Pulse Width455055ms t PRT Program Pulse Rise Time5ns t PFT Program Pulse Fall Time5nsAC Test ConditionsV CC5V g10% V PP25V g1V Input Rise and Fall Times s20ns Input Pulse Levels0 8V to2 2VTiming Measurement Reference LevelInputs1V and2VOutputs0 8V and2V 5Programming Waveforms V PP e25V g11V V CC e5V g5%(Note3)TL D 10329–4 Note All times shown in parentheses are minimum and in m s unless otherwise specifiedNote1 National’s standard product warranty applies only to devices programmed to specifications described hereinNote2 V CC must be applied simultaneously or before V PP and removed simultaneously or after V PP The27C16must not be inserted into or removed from a board with V PP at25V g1V to prevent damage to the deviceNote3 The maximum allowable voltage which may be applied to the V PP pin during programming is26V Care must be taken when switching the V PP supply to prevent overshoot exceeding this26V maximum specification A0 1m F capacitor is required across V PP V CC to GND to suppress spurious voltage transients which may damage the deviceFunctional DescriptionDEVICE OPERATIONThe six modes of operation of the27C16are listed in Table I It should be noted that all inputs for the six modes are at TTL levels The power supplies required are a5V V CC and a V PP The V PP power supply must be at25V during the three programming modes and must be at5V in the other three modesRead ModeThe27C16has two control functions both of which must be logically active in order to obtain data at the outputs Chip Enable(CE)is the power control and should be used for device selection Output Enable(OE)is the output control and should be used to gate data to the output pins indepen-dent of device selection Assuming that addresses are sta-ble address access time(t ACC)is equal to the delay from CE to output(t CE) Data is available at the outputs t OE after the falling edge of OE assuming that CE has been low and addresses have been stable for at least t ACC–t OE The 27C16requires one address transition after initial power-up to reset the outputsStandby ModeThe27C16has a standby mode which reduces the active power dissipation by98% from26 25mW to0 53mW The 27C16is placed in the standby mode by applying a TTL high signal to the CE input When in standby mode the outputs are in a high impedance state independent of the OE input Output OR-TyingBecause27C16s are usually used in larger memory arrays National has provided a2-line control function that accom-modates this use of multiple memory connections The 2-line control function allows fora)the lowest possible memory power dissipation andb)complete assurance that output bus contention will notoccurTo most efficiently use these two control lines it is recom-mended that CE(pin18)be decoded and used as the pri-mary device selecting function while OE(pin20)be made a common connection to all devices in the array and connect-ed to the READ line from the system control bus This as-sures that all deselected memory devices are in their low power standby modes and that the output pins are active only when data is desired from a particular memory device ProgrammingCAUTION Exceeding26 5V on pin21(V PP)will damage the 27C16Initially and after each erasure all bits of the27C16are in the‘‘1’’state Data is introduced by selectively program-ming‘‘0s’’into the desired bit locations Although only‘‘0s’’will be programmed both‘‘1s’’and‘‘0s’’can be presented in the data word The only way to change a‘‘0’’to a‘‘1’’is by ultraviolet light erasureThe27C16is in the programming mode when the V PP pow-er supply is at25V and OE is at V IH It is required that a0 1m F capacitor be placed across V PP V CC to ground tosuppress spurious voltage transients which may damage the device The data to be programmed is applied8bits in parallel to the data output pins The levels required for the address and data inputs are TTLWhen the address and data are stable a50ms active high TTL program pulse is applied to the CE PGM input A pro-gram pulse must be applied at each address location to be programmed You can program any location at any time either individually sequentially or at random The program pulse has a maximum width of55ms The27C16must not be programmed with a DC signal applied to the CE PGM input6Functional Description(Continued)Programming multiple27C16s in parallel with the same data can be easily accomplished due to the simplicity of the pro-gramming requirements Like inputs of the paralleled 27C16s may be connected together when they are pro-grammed with the same data A high level TTL pulse ap-plied to the CE PGM input programs the paralleled27C16s Program InhibitProgramming multiple27C16s in parallel with different data is also easily accomplished Except for CE PGM all like inputs(including OE)of the parallel27C16s may be com-mon A TTL level program pulse applied to an27C16’s CE PGM input with V PP at25V will program that27C16 A low level CE PGM input inhibits the other27C16from being programmedProgram VerifyA verify should be performed on the programmed bits to determine whether they were correctly programmed The verify may be performed with V PP at25V V PP must be at V CC except during programming and program verify ERASURE CHARACTERISTICSThe erasure characteristics of the27C16are such that era-sure begins to occur when exposed to light with wave-lengths shorter than approximately4000Angstroms( ) It should be noted that sunlight and certain types of fluores-cent lamps have wavelengths in the3000 –4000 range Opaque labels should be placed over the27C16window to prevent unintentional erasure Covering the window will also prevent temporary functional failure due to the generation of photo currentsThe recommended erasure procedure for the27C16is ex-posure to short wave ultraviolet light which has a wave-length of2537Angstroms( ) The integrated dose(i e UV intensity c exposure time)for erasure should be a minimum of15W-sec cm2 The erasure time with this dosage is ap-proximately21minutes using an ultraviolet lamp with a 12 000m W cm2power rating The27C16should be placed within1inch of the lamp tubes during erasure Some lamps have a filter on their tubes which should be removed before erasureNote The27C16-550may take up to60minutes for complete erasure to occurAn erasure system should be calibrated periodically The distance from lamp to unit should be maintained at one inch The erasure time increases as the square of the distance (If distance is doubled the erasure time increases by a factor of 4 )Lamps lose intensity as they age When a lamp is changed the distance has changed or the lamp has aged the system should be checked to make certain full erasure is occurring Incomplete erasure will cause symptoms that can be misleading Programmers components and even system designs have been erroneously suspected when in-complete erasure was the problemSYSTEM CONSIDERATIONThe power switching characteristics of EPROMs require careful decoupling of the devices The supply current I CC has three segments that are of interest to the system de-signer the standby current level the active current level and the transient current peaks that are produced on the falling and rising edges of chip enable The magnitude of these transient current peaks is dependent on the output capacitance loading of the device The associated transient voltage peaks can be suppressed by properly selected de-coupling capacitors It is recommended that a0 1m F ce-ramic capacitor be used on every device between V CC and GND This should be a high frequency capacitor of low in-herent inductance In addition a4 7m F bulk electrolytic ca-pacitor should be used between V CC and GND for each eight devices The bulk capacitor should be located near where the power supply is connected to the array The pur-pose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of the PC board tracesTABLE I Mode SelectionPins CE PGM OE V P V CC Outputs Mode(18)(20)(21)(24)(9–11 13–17)Read V IL V IL V CC5D OUTStandby V IH Don’t Care V CC5Hi-ZProgram Pulsed V IL to V IH V IH255D INProgram Verify V IL V IL255D OUTProgram Inhibit V IL V IH255Hi-ZOutput Disable X V IH V CC5Hi-Z727C 1616 384-B i t (2048x 8)U V E r a s a b l e C M O S P R O M M i l i t a r y Q u a l i f i e dPhysical Dimensions inches (millimeters)Lit 11470024Lead Ceramic Dual-In-Line Package (J)Order Number 27C16Q450 883or 27C16Q550 883NS Package Number J24AQLIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which (a)are intended for surgical implant support device or system whose failure to perform can into the body or (b)support or sustain life and whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with instructions for use provided in the labeling can effectivenessbe reasonably expected to result in a significant injury to the userNational Semiconductor National Semiconductor National Semiconductor National Semiconductor CorporationEuropeHong Kong LtdJapan Ltd1111West Bardin RoadFax (a 49)0-180-530858613th Floor Straight Block Tel 81-043-299-2309。

Anderson Power Products®HEADQUARTERS: 13 Pratts Junction Road, Sterling, MA 01564-2305 USA T:978-422-3600 F:978-422-3700EUROPE: Rathealy Road, Fermoy Co. Cork, Ireland T:353-(0)25-32277 F:353-(0)25-32296ASIA/PACIFIC: IDEAL Anderson Asia Pacific Ltd., Unit 922-928 Topsail Plaza, 11 On Sum Street, Shatin N.T., Hong Kong T:852-2636-0836 F:852-2635-9036CHINA: IDEAL Anderson T echnologies (Shenzhen) Ltd., Block A8 T antou W. Ind. Par, Songgang Baoan District, Shenzhen, PR. China 51810 T: 86-755-2768-2118 F: 86-755-2768-2218TAIWAN: IDEAL Anderson Asia Pacific Ltd., Taiwan Branch, 4F.-2, No.116, Dadun 20th St., Situn District, Taichung City 407, Taiwan (R.O.C.) T: 886-4-2310-6451 F:886-4-2310-6460BlindmateConnectorPRODUCT SPECIFICATIONSORDERING INFORMATIONFEATURES• Corrects for .45" misalignmentAllows units to self-align during Blindmate (Rack & Panel applications)• Dovetail contact housingsCan be configured in almost any combination to provide signal power and make first / break last circuits as well as unique keying• Wide range of contact sizesProvides engineers flexibility during system designAnderson Power Products ® (APP) nowoffers the Blindmate Powerpole ® Pak for wire to printed circuit board applications. The Blindmate Powerpole® Pak corrects for up to .45" of misalignment.The Blindmate Powerpole ® Pak, was a custom assembly for unique powerrequirements in the Communications and Uninterruptible Power Supply (UPS)markets. It can now be ordered as individual components enabling customers tocustomize the Blindmate Powerpole ® Pak for unique applications.Housings OnlyPartNumber DescriptionBMPP10-45P 2 x 4 Blindmate plug , hardware & pin BMPP10-45R 2 x 4 Blindmate receptacle, hardware & pin BMHSG-P 2 x 4 Plug housing onlyBMHSG-R 2 x 4 Receptacle housing only 1327 PP15/45 red housing 1327G5 PP15/45 green 1327G6 PP15/45 black 1327G7 PP15/45 white 1327G8 PP15/45 blue 1327G16 PP15/45 yellow 1327G17 PP15/45 orange 1327G18 PP15/45 gray 1327G21 PP15/45 brown 1327G22 PP 15/45 pink 1327G23 PP15/45 purple PP30GND-P Powerpole pin, green PP30GND-S Powerpole socket, greenContacts Only*Part Wire Number Description A WG sq. mm 1332 PP15 amp, loose piece - LD 16/20 1.31/.52261G2-LPBK PP45 amp, loose piece - LD 10/14 5.26/2.081230G1 PP30 amp pin 10 5.261232G1 PP30 amp socket 10 5.26261G1 PP30 amp, reel - LD 12/16 3.31/1.31261G2 PP45 amp, reel - LD 10/14 5.26/2.08262G1 PP15 amp, reel - LD 16/20 1.31/.521377G1 Right Angle - LD 0.70 17.81377G2 Right Angle - LD 0.40 10.21377G11 Right Angle - LD 0.70 17.81377G12 Right Angle - LD 0.40 10.21377G14 Right Angle - LD 0.18 4.61377G15 Right Angle - LD 1.02 25.91377G16 Right Angle - LD 0.72 18.31377G17 Right Angle - LD 0.88 22.41377G18 Right Angle - LD 0.58 14.71317G1 Right Angle - HD 0.70 17.81317G2 Right Angle - HD 0.40 10.21317G11 Right Angle - HD 0.70 17.8Material Properties Blindmate Housing Polycarbonate, UL94 V-0Powerpole Housing Polycarbonate, UL94 V-0Powerpole Contacts Base metal copperPlating Wire contacts - tin or silverPCB contacts - tin Powerpole SpringsStainless steelMechanical Properties Mating Cycle 500 min (loaded blindmate housing)Mating Force 25 lbs average (fully loaded housing)Misalignment Allowance Radial - .45 max inches (1.14mm) Vertical - .45 max inches (11.43mm) Horizontal - .47 max inches (11.93mm)Engagement Distance .900 (±/.010) inches22.86 (±/.25) mmcontacts only continuedPartWireNumber Description AWG sq. mm 1317G14 Right Angle - LD 0.18 4.61317G15 Right Angle - LD 1.02 25.91317G16 Right Angle - LD 0.72 18.31317G17 Right Angle - LD 0.88 22.41317G18 Right Angle - LD0.58 14.71377G3 Straight T erminal - LD 2.16 54.91377G4 Straight T erminal - LD 1.7 43.21377G13 Straight T erminal - LD 1.11 28.21317G3 Straight T erminal - HD 2.16 54.91317G4 Straight T erminal - HD 2.16 43.21317G13 Straight T erminal - HD1.11 28.2HardwarePartNumber Description 110G50 Used with BMHSG-P 110G51Used with BMHSG-RConnector Model PP10 PP15 PCB25 PP30 PP45UL Current Rating (Amperes)* 10 15 25 30 45UL Voltage Ratings (Volts)** 600*Contact Barrel Wire Size (AWG) #14 / #16 #16 / #20 N/A #12 / #16 #10 / #14(mm²) 2.1 to 1.3 1.3 to .5 N/A 3.3 to 1.3 5.3 to 2.1Maximum Wire Insulation Diameter (inches)0.137 0.175 N/A 0.175 0.175 (mm) 3.48 4.45 N/A 4.45 4.45AVG Contact Resistance*2200875600600525(micro-ohms)Insulation Withstanding 2200Test Voltage (Volts AC/DC)Contact Retention Force (lbf) 25 25 25 25 35Avg. Connection/Disconnect (lbf) 5 - LD 3 - LD 3 - LD 3 - LD 3 - LD N/A 5 - HD 5 - HD 5 - HD 5 - HDOperating Temperature Range °C*** -20° to 105° °F -4° to 221° Flammability Rating of Housing MaterialUL94 V-0* UL Rated for 65°C largest wire or cable size ** Both AC & DC Voltage *** Contact factory for higher temperature rated connectors* LD - low detent or HD - high detentNote: For additional colors please contact customer service.For finger proof housings see page 18.Anderson Power Products®HEADQUARTERS: 13 Pratts Junction Road, Sterling, MA 01564-2305 USA T:978-422-3600 F:978-422-3700EUROPE: Rathealy Road, Fermoy Co. Cork, Ireland T:353-(0)25-32277 F:353-(0)25-32296ASIA/PACIFIC: IDEAL Anderson Asia Pacific Ltd., Unit 922-928 Topsail Plaza, 11 On Sum Street, Shatin N.T., Hong Kong T:852-2636-0836 F:852-2635-9036CHINA: IDEAL Anderson Technologies (Shenzhen) Ltd., Block A8 T antou W. Ind. Par, Songgang Baoan District, Shenzhen, PR. China 51810 T : 86-755-2768-2118 F: 86-755-2768-2218TAIWAN: IDEAL Anderson Asia Pacific Ltd., Taiwan Branch, 4F.-2, No.116, Dadun 20th St., Situn District, Taichung City 407, Taiwan (R.O.C.) T: 886-4-2310-6451 F:886-4-2310-6460Blindmate ConnectorDIMENSIONSORDERING INFORMATIONToolingPartNumber Description 1387G1 Pneumatic Tool 1388G8 - Die #01389G8 - Locator #0260G1 Applicator only (110V & 220V)260G14* Applicator only (110V & 220V)260G15* Applicator only (110V & 220V)260G18** Applicator only (110V & 220V)280G1 Applicator and press (110V, 60Hz)250G1 Press only (110V, 60Hz)280G4 Applicator and press (220V, 50Hz)250G2 Press only (220V, 50Hz)* Denotes mini-style applicator for use with existing “K” or “T” press** Denotes mini-style applicator for use with existing “K” or “T” and “G” pressToolingPartNumber Description 111038G2 Contact insertion/extraction tool 1309G3 Hand tool for p/n 261G2-LPBK 1309G2 Hand tool #12 to #201309G5 Hand tool for p/n 200G2L & 201G2H 1396G 1Hand ToolReceptacle OutlinePlug OutlinePlug Panel CutoutReceptacle PCB Layout[37.8][88.6][5.0][76.45][3.18]Ø .731.626DS-BM REV06。