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74LCX38SJX中文资料

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© 2005 Fairchild Semiconductor CorporationDS012574www.fairchildsemi.comOctober 1995Revised February 2005

74LCX38 Low Voltage Quad 2-Input NAND Gate (Open Drain) with 5V Tolerant Inputs

74LCX38Low Voltage Quad 2-Input NAND Gate (Open Drain)with 5V Tolerant Inputs

General DescriptionThe LCX38 contains four 2-input open drain NAND gates.The inputs tolerate voltages up to 7V allowing the interfaceof 5V systems to 3V systems.The 74LCX38 is fabricated with advanced CMOS technol-ogy to achieve high speed operation while maintainingCMOS low power dissipation.Featuress5V tolerant inputss2.3V to 3.6V VCC specifications provided

s5.0 ns tPD max (VCC 3.3V), 10 PA ICC max

sPower down high impedance inputs and outputss24 mA output drive (VCC 3.0V)

sImplements patented noise/EMI reduction circuitrysLatch-up performance exceeds 500 mAsESD performance:Human body model ! 2000VMachine model ! 150V

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.Pb-Free package per JEDEC J-STD-020B.

Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Logic SymbolIEEE/IECConnection Diagram

Pin Descriptions

Order NumberPackagePackage DescriptionNumber

74LCX38MM14A14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow74LCX38MX_NL(Note 1)M14APb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LCX38SJM14DPb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide74LCX38MTCMTC1414-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide74LCX38MTCX_NL(Note 1)MTC14Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin NamesDescriptionAn, BnInputsOnOutputs

元器件交易网www.cecb2b.comwww.fairchildsemi.com2

74LCX38Absolute Maximum Ratings(Note 2)

Recommended Operating Conditions (Note 4)

Note 2: The Absolute Maximum Ratings are those beyond which the safety of the device cannot be guaranteed. The device should not be operating at theselimits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “RecommendedOperating Conditions” table will define the conditions for actual device operation.

Note 3: IO Absolute Maximum Rating must be observed.

Note 4: Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics

SymbolParameterValueConditionsUnitsVCCSupply Voltage󰀐0.5 to 󰀎7.0VVIDC Input Voltage󰀐0.5 to 󰀎7.0 V

VODC Output Voltage󰀐0.5 to 󰀎7.0 Output in HIGH or LOW State (Note 3)VIIKDC Input Diode Current󰀐50VI 󰀟 GNDmAIOKDC Output Diode Current󰀐50VO 󰀟

GNDmA

IODC Output Sink Current (IOL)󰀎50mAICCDC Supply Current per Supply Pinr100mAIGNDDC Ground Current per Ground Pinr100mA

TSTGStorage Temperature󰀐65 to 󰀎150qC

SymbolParameterMinMaxUnitsVCCSupply VoltageOperating2.03.6

VData Retention1.53.6

VIInput Voltage05.5V

VOOutput Voltage05.5VIOLOutput CurrentVCC 3.0V 󰀐 3.6V24

mAVCC 2.7V 󰀐 3.0V12VCC 2.3V 󰀐 2.7V8TAFree-Air Operating Temperature󰀐4085qC

't/'VInput Edge Rate, V

IN 0.8V–2.0V, VCC 3.0V010ns/V

SymbolParameterConditionsVCCTA 󰀐40qC to 󰀎85qC

Units(V)MinMax

VIHHIGH Level Input Voltage2.3 󰀐 2.71.7V2.7 󰀐 3.62.0

VILLOW Level Input Voltage2.3 󰀐 2.70.7

V2.3 󰀐 3.60.8

VOLLOW Level Output VoltageIOL 100PA2.3 󰀐 3.60.2IOL = 8mA2.30.6IOL 12 mA2.70.4VIOL 16 mA3.00.4IOL 24 mA3.00.55IIInput Leakage Current0 d VI d 5.5V2.3 󰀐 3.6r5.0PAIOFFPower-Off Leakage CurrentVI or VO 5.5V010PAICCQuiescent Supply CurrentVI VCC or GND2.3 󰀐 3.610PA

3.6V d VI d 5.5V2.3 󰀐 3.6r10

'ICCIncrease in ICC per InputVIH VCC 󰀐0.6V2.3 󰀐 3.6500PA

IOHZOff State CurrentVO 5.52 - 3.610PA

元器件交易网www.cecb2b.com3www.fairchildsemi.com

74LCX38AC Electrical Characteristics

Note 5: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. Thespecification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).

Dynamic Switching Characteristics

Capacitance

SymbolParameterTA 󰀐40qC to 󰀎85qC, RL 500 :UnitsVCC 3.3V r 0.3VVCC 2.7V VCC 2.5V r 0.2VCL 50 pFCL 50 pFCL 30 pFMinMaxMinMaxMinMaxtPZLPropagation Delay Time1.55.01.55.51.56.5nstPLZ1.55.01.55.51.56.0

tOSHLOutput to Output Skew1.0

nstOSLH(Note 5)1.0

SymbolParameterConditions VCCTA 25qC

Units(V)Typical

VOLPQuiet Output Dynamic Peak VOLCL 50 pF, VIH 3.3V, VIL 0V3.30.8

合集下载

74HC138_中文资料(工程师必备蓝桥)

74HC138_中文资料(工程师必备蓝桥)

74HC138：工程师必备的蓝桥芯片详解一、74HC138芯片概述1. 输入端：具有3个地址输入端（A、B、C）和1个使能端（E1、E2A、E2B）；2. 输出端：共有8个输出端（Y0至Y7），分别对应8种不同的输入状态；3. 逻辑功能：当使能端有效时，根据地址输入端的组合，选择一个输出端为低电平，其余输出端为高电平；4. 驱动能力：输出端可驱动8个TTL负载。

二、74HC138芯片引脚功能1. A、B、C：地址输入端，用于选择输出端；2. E1：使能端1，低电平有效；3. E2A、E2B：使能端2，用于扩展译码器，低电平有效；4. Y0至Y7：输出端，对应8种不同的输入状态。

三、74HC138芯片工作原理74HC138芯片的工作原理如下：1. 当使能端E1为低电平，且E2A和E2B中至少有一个为高电平时，芯片处于工作状态；2. 根据地址输入端A、B、C的组合，选择一个输出端为低电平，其余输出端为高电平；3. 当使能端无效时，所有输出端均为高电平。

四、74HC138芯片应用示例假设我们需要设计一个电路，根据输入的三个开关状态（A、B、C），控制8个LED灯的亮灭。

具体步骤如下：1. 将74HC138芯片的A、B、C端分别连接到三个开关；2. 将E1端接地，确保芯片始终处于工作状态；3. 将E2A和E2B端接高电平，扩展译码器功能；4. 将Y0至Y7端分别连接到8个LED灯的正极，负极接地；5. 根据开关状态，对应的LED灯会点亮。

五、74HC138芯片的优势与应用场景74HC138芯片以其独特的优势，在多个领域发挥着重要作用：1. 优势：高集成度：一个小巧的芯片就能实现八路译码功能；低功耗：CMOS工艺制造，功耗较低，适用于电池供电设备；稳定性强：输出端具有高抗干扰能力，确保电路稳定运行；兼容性好：与TTL逻辑电平兼容，便于与其他数字电路芯片配合使用。

2. 应用场景：数字电路设计：用于地址译码、信号分配等；自动化控制：实现多种控制信号的切换；仪器仪表：用于多通道选择和信号处理；计算机及外设：用于接口电路设计，实现数据传输和控制。

74HC373中文资料_数据手册_参数

74HC373中文资料_数据手册_参数


All information provided in this document is subject to legal disclaimers.
Rev. 6 — 26 February 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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Fig 6. Pin configuration SO20, SSOP20 and TSSOP20
WHUPLQDO LQGH[DUHD
4 of 25
NXP Semiconductors
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
6. Functional description
6.1 Function table
Table 3. Function table[1]
Pin 1 2, 5, 6, 9, 12, 15, 16, 19 3, 4, 7, 8, 13, 14, 17, 18 10 11 20
Description 3-state output enable input (active LOW) 3-state latch output data input ground (0 V) latch enable input (active HIGH) supply voltage
3 of 25
NXP Semiconductors
74HC373; 74HCT373
CD74HC4538中文资料

CD74HC4538中文资料

Ordering Information
TEMP. RANGE
PART NUMBER
(oC)
PACKAGE

PKG. NO.
CD54HC4538F
-55 to 125 16 Ld CERDIP F16.3
CD74HC4538E
-55 to 125 16 Ld PDIP
E16.3
CD74HCT4538E
VCC
VCC
RX 2(14)
CX
1(15)
8
VCC
3(13) R
4(12) A
5(11) B
16 VCC
HIGH Z
VCC
D R1 R2 Q
CL FF CL
Q
VCC
R1
+ COMP II
-
R2
VCC
6(10) Q
7(9) Q
FIGURE 2. LOGIC DIAGRAM (1 MONO)
FUNCTIONAL TERMINAL CONNECTIONS
1
File Number 1671.2
元器件交易网 CD54HC4538, CD74HC4538, CD74HCT4538
Functional Diagram
1Cx 1Rx
1
2
VCC
1Cx 4 1A
1RxCx 6
1Q
5 1B
MONO 1
7 1Q
3 1R
13 2R
12 2A
元器件交易网
Data sheet acquired from Harris Semiconductor SCHS123 June 1998
CD54HC4538, CD74HC4538, CD74HCT4538
SN74HCT138中文资料

SN74HCT138中文资料

元器件交易网IMPORTANT NOTICETexas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgement, including thosepertaining to warranty, patent infringement, and limitation of liability.TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OFDEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICALAPPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, ORWARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHERCRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TOBE FULLY AT THE CUSTOMER’S RISK.In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TI’s publication of information regarding any thirdparty’s products or services does not constitute TI’s approval, warranty or endorsement thereof.Copyright © 1998, Texas Instruments Incorporated。