AND3222MST2中文资料

READ OperationREAD bursts are initiated with a READ command. The starting column and bank ad-dresses are provided with the READ command and auto precharge is either enabled or disabled for that burst access. If auto precharge is enabled, the row being accessed is automatically precharged at the completion of the burst. If auto precharge is disabled,the row will be left open after the completion of the burst.During READ bursts, the valid data-out element from the starting column address is available READ latency (RL) clocks later. RL is defined as the sum of posted CAS additive latency (AL) and CAS latency (CL) (RL = AL + CL). The value of AL and CL is programma-ble in the mode register via the MRS command. Each subsequent data-out element is valid nominally at the next positive or negative clock edge (that is, at the next crossing of CK and CK#). Figure 69 shows an example of RL based on a CL setting of 8 and an AL setting of 0.Figure 69: READ LatencyCKCK#CommandAddressDQDQS, DQS#Don’t CareTransitioning Data Indicates break in time scaleNotes:1.DO n = data-out from column n .2.Subsequent elements of data-out appear in the programmed order following DO n .DQS, DQS# is driven by the DRAM along with the output data. The initial LOW state on DQS and HIGH state on DQS# is known as the READ preamble (t RPRE). The LOW state on DQS and the HIGH state on DQS#, coincident with the last data-out element, isknown as the READ postamble (t RPST). Upon completion of a burst, assuming no other commands have been initiated, the DQ goes High-Z. A detailed explanation of t DQSQ (valid data-out skew), t QH (data-out window hold), and the valid data window are de-picted in Figure 80 (page 171). A detailed explanation of t DQSCK (DQS transition skew to CK) is also depicted in Figure 80 (page 171).Data from any READ burst may be concatenated with data from a subsequent READ command to provide a continuous flow of data. The first data element from the new burst follows the last element of a completed burst. The new READ command should be issued t CCD cycles after the first READ command. This is shown for BL8 in Figure 70(page 165). If BC4 is enabled, t CCD must still be met, which will cause a gap in the data output, as shown in Figure 71 (page 165). Nonconsecutive READ data is reflected in Figure 72 (page 166). DDR3 SDRAM does not allow interrupting or truncating any READ burst.Figure 100: Precharge Power-Down (Slow-Exit Mode) Entry and ExitCKCK#CommandCKEEnter power-downmode Exit power-downmodeDon’t CareIndicates break in time scaleNotes:1.Any valid command not requiring a locked DLL.2.Any valid command requiring a locked DLL.Figure 101: Power-Down Entry After READ or READ with Auto Precharge (RDAP)Don’t CareTransitioning Data CKCK#Command DQ BL8DQ BC4DQS, DQS#Address CKEPower-down or self refresh entryIndicates break in time scaleFigure 102: Power-Down Entry After WRITECKCK#Command DQ BL8DQ BC4DQS, DQS#AddressCKEself refresh entry1Don’t CareTransitioning Data Indicates break in time scaleNote:1.CKE can go LOW 2t CK earlier if BC4MRS.Figure 103: Power-Down Entry After WRITE with Auto Precharge (WRAP)Don’t CareTransitioning Data CKCK#CommandDQ BL8DQ BC4DQS, DQS#Address A10CKEPower-down or self refresh entry 2Start internal precharge Indicates break in time scaleNotes:1.t WR is programmed through MR0[11:9] and represents t WRmin (ns)/t CK rounded up tothe next integer t CK.2.CKE can go LOW 2t CK earlier if BC4MRS.Figure 104: REFRESH to Power-Down EntryCKCK#CommandCKET0T1T2T3Ta0Ta1Ta2Tb0Don’t CareIndicates break in time scaleNote:1.After CKE goes HIGH during t RFC, CKE must remain HIGH until t RFC is satisfied.Figure 105: ACTIVATE to Power-Down EntryCKCK#Command Address CKET0T1T2T3T4T5T6T7Figure 108: Power-Down Exit to Refresh to Power-Down EntryCKCK#CKET0T1T2T3T4Ta0Ta1Tb0Command。

-40°C to +85°C 20 Plastic DIP -40°C to +85°C 20 SSOP -40°C to +85°C 20 TSSOP
Applications
Notebook, Subnotebook, and Palmtop Computers Cellular Phones Battery-Powered Equipment Handheld Equipment Peripherals Printers
20 Thin QFN-EP* -40°C to +85°C T2055-5 (5mm x 5mm)
* Exposed paddle. Ordering Information continued at end of data sheet.
Selector Guide
PART MAX3221E NO. OF DRIVERS/ RECEIVERS 1/1 2/2 3/5 VCC RANGE (V) +3.0 to +5.5 +3.0 to +5.5 +3.0 to +5.5 AutoShutdown ✔ ✔ ✔
元器件交易网
±15kV ESD-Protected, 1µA, 3.0V to 5.5V, 250kbps, RS-232 Transceivers with AutoShutdown MAX3221E/MAX3223E/MAX3243E
ABSOLUTE MAXIMUM RATINGS
VCC to GND ..............................................................-0.3V to +6V V+ to GND (Note 1) ..................................................-0.3V to +7V V- to GND (Note 1) ...................................................+0.3V to -7V V+ + |V-| (Note 1) .................................................................+13V Input Voltages T_IN, EN, FORCEON, FORCEOFF to GND ............-0.3V to +6V R_IN to GND ......................................................................±25V Output Voltages T_OUT to GND................................................................±13.2V R_OUT, R2OUTB, INVALID to GND .........-0.3V to (VCC + 0.3V) Short-Circuit Duration T_OUT to GND .........................................................Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin SSOP (derate 7.14mW/°C above +70°C) ...........571mW 16-Pin TSSOP (derate 9.4mW/°C above +70°C) ........754.7mW 16-Pin TQFN (derate 20.8mW/°C above +70°C) ......1666.7mW 20-Pin Plastic DIP (derate 11.11mW/°C above +70°C)....889mW 20-Pin SSOP (derate 8.00mW/°C above +70°C) ...........640mW 20-Pin TSSOP (derate 10.9mW/°C above +70°C) .........879mW 20-Pin TQFN (derate 21.3mW/°C above +70°C) ......1702.1mW 28-Pin SSOP (derate 9.52mW/°C above +70°C)............762mW 28-Pin TSSOP (derate 12.8mW/°C above +70°C) .......1026mW Operating Temperature Ranges MAX32_ _EC_ _ ....................................................0°C to +70°C MAX32_ _EE_ _..................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10s) .................................+300°C

This product complies with the RoHS Directive (EU 2002/95/EC).
Transistors
2SD1992A
Silicon NPN epitaxial planar type
For low-frequency power strengthening and drive Complementary to 2SB1321A
Collector current IC (mA)
Collector current IC (mA)
6006006Fra bibliotek0400
400
200
200
0
0
0 40 80 120 160
0 0 4 8 12 16 20
0
2
4
6
8
10
Ambient temperature Ta (°C)
Collector-emitter voltage VCE (V)
(1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products, and no license is granted under any intellectual property right or other right owned by our company or any other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) The products described in this book are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). Consult our sales staff in advance for information on the following applications: – Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. – Any applications other than the standard applications intended. (4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of Matsushita Electric Industrial Co., Ltd.

_______________General DescriptionThe MAX320/MAX321/MAX322 are precision, dual,SPST analog switches designed to operate from ±3V to ±8V dual supplies. The MAX320 has two normally open (NO) switches and the MAX321 has two normally closed (NC) switches. The MAX322 has one NO and one NC switch. Low power consumption (1.25mW)makes these parts ideal for battery-powered equip-ment. They offer low leakage currents (100pA max) and fast switching speeds (t ON = 150ns max, t OFF = 100ns max).The MAX320 series, powered from ±5V supplies, offers 35Ωmax on-resistance (R ON ), 2Ωmax matching between channels, and 4Ωmax R ON flatness.These switches also offer 5pC max charge injection and a minimum of 2000V ESD protection per Method 3015.7.For equivalent devices specified for single-supply oper-ation, see the MAX323/MAX324/MAX325 data sheet.For quad versions of these switches, see the MAX391/MAX392/MAX393 data sheet.________________________ApplicationsBattery-Operated Systems Sample-and-Hold Circuits Heads-Up Displays Guidance and Control Systems Audio and Video Switching Military RadiosTest Equipment Communications Systems ±5V DACs and ADCsPBX, PABX____________________________Featureso Low On-Resistance, 35Ωmax (16Ωtypical)o R ON Matching Between Channels <2Ωo R ON Flatness <4Ωo Guaranteed Charge Injection <5pC o Bipolar Supply Operation (±3V to ±8V)o Low Power Consumption, <1.25mW o Low Leakage Current Over Temperature, <2.5nA at +85°C o Fast Switching, t ON <150ns, t OFF <100ns o Guaranteed Break-Before-Make (MAX322 only)______________Ordering InformationMAX320/MAX321/MAX322Precision, Dual-Supply, SPSTAnalog Switches________________________________________________________________Maxim Integrated Products 1_____________________Pin Configurations/Functional Diagrams/Truth TablesCall toll free 1-800-998-8800 for free samples or literature.19-0350; Rev 0; 12/94* Contact factory for dice specifications.** Contact factory for availability.Voltage Referenced to V-V+................................................................(V- - 0.3V) to +17V IN_, COM_, NC_, NO_ (Note 1).........(V- - 0.3V) to (V+ + 0.3V)Continuous Current (any terminal)......................................30mA Peak Current, COM_, NO_, NC_(pulsed at 1ms, 10% duty cycle max)..............................100mA ESD per Method 3015.7..................................................>2000V Continuous Power DissipationPlastic DIP (derate 9.09mW/°C above +70°C).............727mW Narrow SO (derate 5.88mW/°C above +70°C).............471mWµMAX (derate 4.10mW/°C above +70°C).....................330mW CERDIP (derate 8.00mW/°C above +70°C)..................640mW Operating Temperature RangesMAX32_C_ _........................................................0°C to +70°C MAX32_E_ _......................................................-40°C to +85°C MAX32_MJA...................................................-55°C to +125°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10sec).............................+300°CM A X 320/M A X 321/M A X 322Precision, Dual-Supply, SPST Analog Switches 2_______________________________________________________________________________________Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.ABSOLUTE MAXIMUM RATINGSNote 1:Signals on NC_, NO_, COM_, or IN_ exceeding V+ or V- are clamped by internal diodes. Limit forward diode current tomaximum current rating.ELECTRICAL CHARACTERISTICS(V+ = +5V ±10%, V- = -5V ±10%, V INH = 3.5V, V INL = 2.5V, T A = T MIN to T MAX , unless otherwise noted.)MAX320/MAX321/MAX322Precision, Dual-Supply, SPSTAnalog Switches_______________________________________________________________________________________3ELECTRICAL CHARACTERISTICS(V+ = +5V ±10%, V- = -5V ±10%, V INH = 3.5V, V INL = 2.5V, T A = T MIN to T MAX , unless otherwise noted.)Note 2:The algebraic convention where the most negative value is a minimum and the most positive value a maximum is used in this data sheet.Note 3:Guaranteed by design.Note 4:∆R ON = ∆R ON max - ∆R ON min.Note 5:Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal range.Note 6:Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25°C.Note 7:Off Isolation = 20 log 10[ V COM ⁄ (V NC or V NO )], V COM = output, V NC or V NO = input to off switch.Note 8:Between any two switches.M A X 320/M A X 321/M A X 322Precision, Dual-Supply, SPST Analog Switches 4_________________________________________________________________________________________________________________________________Typical Operating Characteristics(V+ = +5V, V- = -5V, T A = +25°C, unless otherwise noted.)0.0001-556585OFF LEAKAGE CURRENT vs. TEMPERATURE10TEMPERATURE (°C)O F F L E A K A G E C U R R E N T (n A )-1552545-351051250.10.00110.011000-8-602ON-RESISTANCE vs. VOLTAGE AT COM PIN30V COM (V)R O N (Ω)-4-24682052510150-5-3-4-234ON-RESISTANCE vs. VOLTAGE AT COM PIN(OVER TEMPERATURE)30V COM (V)R O N (Ω)-11252052515100-5-1ON-RESISTANCE MATCH vs. VOLTAGE AT COM PIN (OVER TEMPERATURE)V COM (V)∆R O N (Ω)130.300.350.100.050.400.450.200.250.150.505-30.0001-556585ON LEAKAGE CURRENT vs. TEMPERATURE10TEMPERATURE (°C)O N L E A K A G E C U R R E N T (n A )-1552545-351051250.10.00110.011000-556585SUPPLY CURRENT vs. TEMPERATURE100120M A X 320-07TEMPERATURE (°C)I S U P P L Y (µA )2545-35-15510512580204060140-20-5CHARGE INJECTION vs. VOLTAGE AT COM PIN15M A X 320-06V COM (V)Q (p C )-1050-15105-10-520-4-3-21234MAX320/MAX321/MAX322Precision, Dual-Supply, SPSTAnalog Switches_______________________________________________________________________________________5__________Applications InformationLogic LevelsCalculate the logic thresholds typically as follows: V IH =(V+ - 1.5V) and V IL = (V+ - 2.5V).Power-supply consumption is minimized when IN1 and IN2 are driven with logic-high levels equal to V+ and logic-low levels well below the calculated V IL of (V+ - 2.5V). IN1and IN2 can be driven to V- without damage.Analog Signal LevelsAnalog signals that range over the entire supply voltage (V- to V+) can be switched, with very little change in on-resistance over the entire voltage range (see Typical Operating Characteristics ). All switches are bidirec-tional, so NO_, NC_, and COM_ pins can be used as either inputs or outputs.Power-Supply Sequencing and Overvoltage ProtectionDo not exceed the absolute maximum ratings, because stresses beyond the listed ratings may cause perma-nent damage to the devices.Proper power-supply sequencing is recommended for all CMOS devices. Always apply V+, followed by V-,before applying analog signals or logic inputs, especial-ly if the analog or logic signals are not current-limited. Ifthis sequencing is not possible, and if the analog or logic inputs are not current-limited to <30mA, add two small signal diodes (D1, D2) as shown in Figure 1.Adding protection diodes reduces the analog signal range to a diode drop (about 0.7V) below V+ for D1,and a diode drop above V- for D2. Leakage is not affected by adding the diodes. On-resistance increas-es by a small amount at low supply voltages. Maximum supply voltage (V- to V+) must not exceed 17V.Adding protection diode D1 causes the logic thresh-olds to be shifted relative to the positive power-supply rail. This can be significant when low positive supply voltages (+5V or less) are used. Driving IN1 and IN2 all the way to the supply rails (i.e., to a diode drop higher than the V+ pin or a diode drop lower than the V- pin) is always acceptable.The protection diodes D1 and D2 also protect against some overvoltage situations. With the circuit of Figure 1,if the supply voltage is below the absolute maximum rating and if a fault voltage up to the absolute maximum rating is applied to an analog signal pin, no damage will result. For example, with ±5V supplies, analog sig-nals up to ±8.5V will not damage the circuit of Figure 1.If only a single fault signal is present, the fault voltage can rise to +12V or to -12V without damage._____________________Pin DescriptionFigure 1. Overvoltage Protection Using Two External Blocking DiodesM A X 320/M A X 321/M A X 322Precision, Dual-Supply, SPST Analog Switches 6_______________________________________________________________________________________Figure 4. Charge InjectionFigure 2. Switching TimeFigure 3. Break-Before-Make Interval (MAX322 only)______________________________________________Test Circuits/Timing DiagramsMAX320/MAX321/MAX322Precision, Dual-Supply, SPSTAnalog Switches_______________________________________________________________________________________7Figure 6. Crosstalk_________________________________Test Circuits/Timing Diagrams (continued)Figure 8. Channel-On CapacitanceFigure 7. Channel-Off Capacitance__Ordering Information (continued)___________________Chip Topography0.075" (1.90mm)0.055" (1.40mm)V+ IN2V-IN1COM2NO2 (MAX320) NC2 (MAX321/2)COM1NO1 (MAX320/2) NC1 (MAX321)* Contact factory for dice specifications.** Contact factory for availability.TRANSISTOR COUNT: 91SUBSTRATE CONNECTED TO V+M A X 320/M A X 321/M A X 322Precision, Dual-Supply, SPST Analog Switches________________________________________________________Package Informationimplied. Maxim reserves the right to change the circuitry and specifications without notice at any time.8___________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600©1994 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products.。