SN74AHC86DRG4中文资料

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SN54AHC86, SN74AHC86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS249I – OCTOBER 1995 – REVISED JULY 2003

1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265DOperating Range 2-V to 5.5-V VCCDLatch-Up Performance Exceeds 250 mA Per

JESD 17DESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

SN54AHC86...J OR W PACKAGE

SN74AHC86...D, DB, DGV, N, NS,

OR PW PACKAGE

(TOP VIEW)

1

2

3

4

5

6

714

13

12

11

10

9

81A

1B

1Y

2A

2B

2Y

GNDVCC

4B

4A

4Y

3B

3A

3Y3212019

9101112134

5

6

7

818

17

16

15

144A

NC

4Y

NC

3B1Y

NC

2A

NC

2B1B1ANC

3Y3AV4B

2Y

GNDNCSN54AHC86...FK PACKAGE

(TOP VIEW)

CC

NC – No internal connectionSN74AHC86...RGY PACKAGE

(TOP VIEW)

114

782

3

4

5

613

12

11

10

94B

4A

4Y

3B

3A1B

1Y

2A

2B

2Y1A

3YV

GNDCC

description/ordering information

The ’AHC86 devices are quadruple 2-input exclusive-OR gates. These devices perform the Boolean function

Y = A ⊕ B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced

in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the

output.

ORDERING INFORMATION

TAPACKAGE†ORDERABLE

PART NUMBERTOP-SIDE

MARKING

QFN – RGYTape and reelSN74AHC86RGYRHA86

PDIP – NTubeSN74AHC86NSN74AHC86N

SOIC–DTubeSN74AHC86DSOIC – DTape and reelSN74AHC86DRAHC86

–40°C to 85°CSOP – NSTape and reelSN74AHC86NSRAHC86

SSOP – DBTape and reelSN74AHC86DBRHA86

TSSOPPWTubeSN74AHC86PWTSSOP – PWTape and reelSN74AHC86PWRHA86

TVSOP – DGVTape and reelSN74AHC86DGVRHA86

CDIP – JTubeSNJ54AHC86JSNJ54AHC86J

–55°C to 125°CCFP – WTubeSNJ54AHC86WSNJ54AHC86W

LCCC – FKTubeSNJ54AHC86FKSNJ54AHC86FK

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

Copyright  2003, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are testedunless otherwise noted. On ll other products, productionprocessing does not necessarily include testing of all parameters.元器件交易网www.cecb2b.comSN54AHC86, SN74AHC86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCLS249I – OCTOBER 1995 – REVISED JULY 2003

2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265FUNCTION TABLE

(each gate)

INPUTSOUTPUT

ABY

LLL

LHH

HLH

HHL

exclusive-OR logic

An exclusive-OR gate has many applications, some of which can be represented better by alternative

logic symbols.

= 1EXCLUSIVE OR

These are five equivalent exclusive-OR symbols valid for an SN74AHC86 gate in positive logic; negation may be shown at any two ports.

=2k2k + 1LOGIC-IDENTITY ELEMENTEVEN-PARITY ELEMENTODD-PARITY ELEMENT

The output is active (low) if

all inputs stand at the same

logic level (i.e., A = B).The output is active (low) if

an even number of inputs

(i.e., 0 or 2) are active.The output is active (high) if

an odd number of inputs

(i.e., only 1 of the 2) are

active.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) –0.5 V to7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, VO (see Note 1) –0.5 V toVCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, IIK (VI < 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θJA(see Note 2):D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2):DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2):DGV package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .