PSMN020-150W中文资料

The PSMN020-150W is supplied in the SOT429 (TO247) conventional leaded package.
PINNING
PIN
DESCRIPTION
1 gate
2 drain
3 source
tab drain
SOT429 (TO247)
1 23
LIMITING VALUES
IS
Continuous source current
(body diode)
ISM
Pulsed source current (body
diode)
VSD
Diode forward voltage
IF = 25 A; VGS = 0 V IF = 75 A; VGS = 0 V
trr
Reverse recovery time
Tj = 175˚C
ID = 73 A; VDD = 120 V; VGS = 10 V
Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time
VDD = 75 V; RD = 3 Ω; VGS = 10 V; RG = 5 Ω
VGS = 0 V; ID = 0.25 mA; VDS = VGS; ID = 1 mA
VGS = 10 V; ID = 25 A VGS = ±10 V; VDS = 0 V VDS = 150 V; VGS = 0 V;
Tj = -55˚C Tj = 175˚C Tj = -55˚C Tj = 175˚C
TYP. -
45
MAX. 0.5
-
UNIT K/W
K/W
ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
V(BR)DSS
VGS(TO)
RDS(ON)
IGSS IDSS
Qg(tot) Qgs Qgd td on tr td off tf Ld Ld Ls
- 6429 7000 pF - 785 810 pF - 435 500 pF
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
February 1999
3
Rev 1.000
元器件交易网
Philips Semiconductors
TrenchMOS™ transistor
Objective specification
PSMN020-150W
DEFINITIONS
Data sheet status
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS VDGR VGS ID
IDM PD Tj, Tstg
Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current
d g
s
QUICK REFERENCE DATA
VDSS = 150 V ID = 73 A
RDS(ON) ≤ 20 mΩ
GENERAL DESCRIPTION
N-channel enhancement mode field-effect power transistor in a plastic envelope using ’trench’ technology. The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications.
-
V
-
- 4.4 V
- 18 20 mΩ
-
- 57 mΩ
-
2 100 nA
- 0.05 10 µA
-
- 500 µA
- 164 - nC - 30 - nC - 77 - nC
- 50 - ns - 114 - ns - 214 - ns - 114 - ns
- 3.5 - nH - 4.5 - nH - 7.5 - nH
SYMBOL PARAMETER
CONDITIONS
EAS
Non-repetitive avalanche Unclamped inductive load, IAS = 64 A;
energy
tp = 0.2 ms; Tj prior to avalanche = 25˚C;
VDD ≤ 25 V; RGS = 50 Ω; VGS = 5 V
UNIT A A1 b b1 b2 c
DE
e
L L1 P Q
q
RS
wY
α
β
mm 5.3 1.9 1.2 2.2 3.2 0.9 4.7 1.7 0.9 1.8 2.8 0.6
21 20
16 15
5.45
16 15
4.0 3.6
3.7 3.3
2.6 2.4
5.3
3.5 3.3
7.5 7.1
0.4
15.7 15.3
February 1999
2
Rev 1.000
元器件交易网
Philips Semiconductors
TrenchMOS™ transistor
Objective specification
PSMN020-150W
MECHANICAL DATA
Dimensions in mm Net Mass: 5 g
6° 4°
17° 13°
Note 1. Terminals are uncontrolled within zone L1.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
EIAJ
EUROPEAN PROJECTION
ISSUE DATE
SOT429
TO-247
97-06-11
Fig.1. SOT429; pin 2 connected to mounting base.
IF = 20 A; -dIF/dt = 100 A/µs;
Qrr
Reverse recovery charge VGS = 0 V; VR = 30 V
MIN. TYP. MAX. UNIT
-
- 73 A
-
- 290 A
- 0.85 1.2 V
- 1.1 -
V
- 200 - ns - 1.5 - µC
元器件交易网
Philips Semiconductors
TrenchMOS™ transistor
Objective specification
PSMN020-150W
FEATURES
SYMBOL
• ’Trench’ technology • Very low on-state resistance • Fast switching • High thermal cycling performance • Low thermal resistance
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Drain-source breakdown voltage Gate threshold voltage
Drain-source on-state resistance Gate source leakage current Zero gate voltage drain current
Total gate charge Gate-source charge Gate-drain (Miller) charge
Objective specification This data sheet contains target or goal specifications for product development.