ZC0301PLH Datasheet
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ZC0301PLH_1001.2_EnZC0301PLHUSB PC Camera Processor Datasheet Version 1.2 2005-04-07Notes1: The information is subject to change without notice. Before using this document, please confirm that this is the latest version. Notes2: Not all products and/or types are available in every country. Please check with a Vimicro sales representative availability and additional information.Page 1 of 19ZC0301PLH_1001.2_EnImportant NoticeVimicro Corporation and its subsidiaries reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to Vimicro’ terms and conditions of sale supplied at the time of order acknowledgment. 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Reproduction of this information with alteration is an unfair and deceptive business practice. Vimicro is not responsible or liable for such altered documentation. Resale of Vimicro products or services with statements different from or beyond the parameters stated by Vimicro for that product or service voids all express and any implied warranties for the associated Vimicro product or service and is an unfair and deceptive business practice. Vimicro is not responsible or liable for any such statements.Page 2 of 19ZC0301PLH_1001.2_EnTable of Contents1. 2. 3. 4. 5. GENERAL DESCRIPTION ..................................................................................................................................4 ZC0301PLH SYSTEM BLOCK DIAGRAM .......................................................................................................5 ZC0301PLH GENERAL FEATURES ..................................................................................................................6 ZC0301PLH CHIP BLOCK DIAGRAM..............................................................................................................7 PIN DEFINITION ..................................................................................................................................................8 5.1 5.2 6. PIN ASSIGNMENT .......................................................................................................................................8 PIN DESCRIPTION.......................................................................................................................................9ELECTRICAL CHARACTERISTICS...............................................................................................................10 6.1 6.2 6.3 6.4 ABSOLUTE MAXIMUM RATINGS ..............................................................................................................10 DC CHARACTERISTICS ............................................................................................................................10 WORKING CURRENT ................................................................................................................................10 AC TIMING ..............................................................................................................................................117.ZC0301PLH KEY FUNCTION BLOCKS .........................................................................................................15 7.1 7.2 7.3 7.4 7.5 7.6 IMAGE SENSOR INTERFACES ....................................................................................................................15 USB FEATURES........................................................................................................................................15 IMAGE SIGNAL PROCESSING ....................................................................................................................15 RASTER....................................................................................................................................................15 COMPRESSION ENGINE ............................................................................................................................16 SYSTEM CONTROLLER .............................................................................................................................168. PACKAGE INFORMATION ................................................................................................................................17 9. REVISION HISTORY..........................................................................................................................................1810. CONTACT INFORMATION ..............................................................................................................................19Page 3 of 19ZC0301PLH_1001.2_En1. General DescriptionThe ZC0301PLH chip provides a powerful single chip solution for the PC camera application. It communicates with PC host via Universal Serial Bus (USB) port. All major image processing functions including image signal processing (ISP), image compression and data transfer units are built in the chip. ZC0301PLH is LQFP 48-pin package (Pb free package is also available) chip for customers’ mass production. It has embedded USB device controller and transceiver, and no external DRAM requirement. Advance on-chip image signal processor and JPEG encoder produce images with superior quality. ZC0301PLH also provides up to 30fps@VGA, and some advanced features such as digital zoom, special effect, etc.Page 4 of 19ZC0301PLH_1001.2_En2. ZC0301PLH System Block DiagramFigure 2-1 shows the system block diagram of a typical PC camera set up. ZC0301PLH is set up between the image sensor and the computer, enabling the computer to capture and display still images and video stream at real-time.EEPROMESCK ESDAVSYNCOSCINHSYNCOSCOUTCRYSTAL 48M HzDATA[8:0]PCLKVC0303 ZC0301PLHENBSerial InterfaceUSB CABLEPCCMOS IMAGE SENSORSFigure 2.1 USB PC Camera System Block DiagramPage 5 of 19ZC0301PLH_1001.2_En3. ZC0301PLH General FeaturesLow cost, single chip solution for high resolution USB PC camera applications Support up to 30 fps VGA video streaming USB Device Controller compliant with USB protocol 1.1 USB parameters configurable through EEPROM Support 10/9/8-bit RGB Bayer pattern raw data input from CMOS image sensors Support programmable color correction and gamma correction Support ISO/IEC 10918-1 (JPEG) standard image compression Support 4 quantization tables for programmable image quality Support raw data output for high quality still image 3.3V I/O, 1.8V core No external DRAM required Flexible system level solution support Pin-to-pin compatible with ZC0301PL AGP Display adapter capable of 16-bit color at 1024x768 Pseudo 800*600 video streaming and still image Digital Zoom (for Mi360 and HV7131R only) Low light LED control Support various special effects: Several default frames including Red Post, Orchid Post, Red Telescope, etc User-defined frames Black & White Sepia Relief Negative Color-Range Cavas ……Page 6 of 19ZC0301PLH_1001.2_En4. ZC0301PLH Chip Block DiagramFigure 4-1 shows the block diagram of ZC0301PLH. The ISP block receives RGB raw data from CMOS image sensor interface and performs various image processing tasks such as white balance, color correction, gamma correction, and edge enhancement. The Sub-sample & Raster block handles the input image data scaling and converts input image data to 8x8 block data format required by DCT module. The JPEG Encoder block compresses the image data from ISP block into JPEG format data. The compressed image data is then transferred to PC host via USB Device Controller (UDC) block for display.EEPROMCIS (CMOS Image Sensor)EEPROM Interface UDC (USB Device Controller)System Controller CIS InterfacePC HOSTSubsample & RasterVC0303ZC0301PLHFIGURE 4.1 BLOCK DIAGRAM OF ZC0301PLHJPEG EncoderISPPage 7 of 19ZC0301PLH_1001.2_En5. Pin Definition5.1 Pin AssignmentCS_PWDB 38CS_RSTBCS_CLKHSYNCVSYNCCS_ENOVDD48474645444342414039CS_D[8] CS_D[7] CS_D[6] CS_D[5] NC NC CS_D[4] CS_D[3] CS_D[2] CS_D[1] CS_D[0] PWUP_RST37ESDAOVSSSDASCKNC1 2 3 4 5 6 7 8 9 10 11 1236 35 34 33 32PIO[3] ESCK PIO[2] PIO[1] PIO[0] TEST NC NC NC GND NC NCVC0303 - 48 ZC0301PLH31 30 29 28 27 26 251314151617181920212223 SNAPBVSS_USBCLKXINVDD_USBDVSSNCDPCLKXOUTFIGURE 5.1 48-PIN LQFP PACKAGESUSPENDBDVDDGNDDM24Page 8 of 19ZC0301PLH_1001.2_En5.2Pin DescriptionPinCS_D[8] CS_D[7] CS_D[6] CS_D[5] CS_D[4] CS_D[3] CS_D[2] CS_D[1] CS_D[0] PWUP_RST CLKXIN CLKXOUT DVSS VSS_USB DP DM VDD_USB SUSPENDB DVDD SNAPB GND GND TEST PIO[0] PIO[1] PIO[2] ESCK PIO[3] ESDA CS_PWDB VSYNC HSYNC OVSS CS_CLK OVDD SCK / SICLK SDA / SIVAL CS_ENB / SI_EN CS_RSTB / AECNTTypeI, PD I, PD I, PD I, PD I, PD I, PD I, PD I, PD I, PD I, Schmitt I O P P I/O I/O P O P I, PU P P I, PD I/O, PD I/O, PD I/O, PD O I/O, PD I/O, Schmitt O I/O, PD I/O, PD P O P O, PD I/O, Schmitt O, PD O, PDFunction Sensor data Sensor data Sensor data Sensor data Sensor data Sensor data Sensor data Sensor data Sensor data Power on reset, active low Crystal input Crystal output Core ground USB transceiver ground USB data USB data USB transceiver power Active-low suspend Core power Snapshot and remote wake up, active low Ground Ground Manufacturing test mode General purpose I/O General purpose I/O General purpose I/O SEEPROM clock General purpose I/O EEPROM data Power-down pin controlling DC/DC regulator Vertical synchronous signal Horizontal synchronous signal I/O ground Sensor clock I/O power Serial interface clock Serial interface data Sensor power enable / Serial interface enable Sensor reset / auto exposure for TASC VGA sensor48 Pin LQFP 1 2 3 4 7 8 9 10 11 12 13 14 15 16 17 18 19 21 22 23 24 27 31 32 33 34 35 36 37 38 39 40 41 42 43 45 46 47 48TABLE 5.1 VC0303 PIN DESCRIPTIONSPage 9 of 19ZC0301PLH_1001.2_En6. Electrical Characteristics6.1 Absolute Maximum RatingsAmbient temperature Storage temperature I/O pin voltage with respect to VSS 0 °C to 70 °C -40 °C to 125 °C -0.3V to OVDD + 0.3VTABLE 6.1 ABSOLUTE MAXIMUM RATINGS6.2DC CharacteristicsParameter 3.3V Power Supply 1.8V Power Supply 3.3V Power Supply Input Low voltage Input High voltage Output Low Voltage Output High Voltage Conditions Min 3 1.65 3 -0.5 2.0 2.4 Max 3.6 1.95 3.6 1 5.5 0.4 Unit V V V V V V VSymbol OVDD DVDD VDD_USB Vil Vih Vol VohTABLE 6.2 DC CHARACTERISTICS6.3Working CurrentCurrent Mode style Normal Mode Suspend Mode OVDD_IO Supply (mA) DVDD_Core Supply (mA)15 0.2540 0.02TABLE 6.3 WORKING CURRENTPage 10 of 19ZC0301PLH_1001.2_En6.4AC Timing6.4.1 USB Transceiver AC CharacteristicsSymbolTFR TFF TFRFFParameterRise time Fall time Rise and fall time matchingConditionsCL=50p CL=50p TLRLF=TLR/TLFMin4 4 90Typ20 20 111.11MaxUnitns ns %TABLE 6.4 FULL-SPEED DRIVER ELECTRICAL CHARACTERISTICSSymbolTLR TLF TLRLFParameterRise time Fall time Rise and fall time matchingConditionsCL=50p CL=600p CL=50p CL=600p TLRLF=TLR/TLFMin75TypMax300Unitns ns %75 300 80 125TABLE 6.5 LOW-SPEED DRIVER ELECTRICAL CHARACTERISTICSPage 11 of 19ZC0301PLH_1001.2_En6.4.2 RESET Timing AC CharacteristicsFIGURE 6.1 RESET TIMING AC CHARACTERISTICS DIAGRAMSymbol TrstParameter Reset Pulse WidthConditionsMin 20MaxUnit msTABLE 6.6 RESET SIGNAL AC CHARACTERISTICS6.4.3 Clock AC CharacteristicsFIGURE 6.2 CLOCK TIMING AC CHARACTERISTICS DIAGRAMSymbol1/Tcyc Thigh TlowParameterOscillator Frequency Oscillator Clock High Time Oscillator Clock Low TimeConditions48@10PPMMin8.3 8.3Max-UnitMHz ns nsTABLE 6.7 CLOCK SIGNAL AC CHARACTERISTICSPage 12 of 19ZC0301PLH_1001.2_En6.4.4 Input Signal AC CharacteristicsCS_CLK Tsu CS_DThValid dataCS_CLKVSYNC/HSYNCTsuThFIGURE 6.3 INPUT SIGNAL AC CHARACTERISTICS Symbol Parameter Input setup time Tsu Input hold time Th TABLE 6.8 CS_D INPUT SIGNAL AC CHARACTERISTICS Symbol parameter Input setup time Tsu Input hold time Th TABLE 6.9 VSYNC / HSYNC INPUT AC CHARACTERISTICS 0 ns conditions Min Max 20 Unit ns 0 ns Conditions Min Max 45 Unit ns6.4.5 Output Signal AC CharacteristicCS_CLKTdVSYNC/HSYNCFIGURE 6.4 VSYNC/HSYNC OUTPUT AC CHARACTERISTICSSymbol TdParameter Output delayConditionsMin -Max 1.5Unit nsTABLE 6.10 VSYNC/HSYNC OUTPUT AC CHARACTERISTICSPage 13 of 19ZC0301PLH_1001.2_En6.4.6 Serial Bus AC TimingFIGURE 6.5 SERIAL BUS TIMING DIAGRAMParameter SCK clock frequency Time that serial bus must be free before a new transmission can start Hold time for a START LOW period of SCK HIGH period of SCK Setup time for START Data hold time Data setup time Rise time of both SDA and SCK Fall time of both SDA and SCK Setup time for STOP Capacitive load of each bus lines (SDA, SCK)Symbol fsck tbuf thd;Sta tlow thigh tsu;Sta thd;dat tsu;dat tr tf tsu;Stp CbMin 0 4.7 4.0 4.7 4.0 4.7 0 200 4.7 -Max. 100 1 300 -Unit KHz us us us us us us ns us ns us pfTABLE 6.11 Serial Bus Timing TablePage 14 of 19ZC0301PLH_1001.2_En7. ZC0301PLH Key Function Blocks7.1 Image Sensor InterfacesSupport off-the-shelf CMOS image sensors 10/9/8-bit RGB raw data input Supports fifteen types of sensor: HV7131B(VGA), HV7121B(CIF), CS2102(VGA), CS2103(CIF), TAS5130C(VGA), TAS5110B(CIF), OV7620(VGA), HDCS-2020(VGA), HDCS-1020(CIF), PB0330(VGA), PB0111(CIF), ICM105A(VGA), ICM102A(CIF), PAS202B(VGA), PAS106B(CIF).7.2USB FeaturesUSB1.1 protocol compliant with built-in USB transceiver Suspend and Remote wakeup When audio function is enabled, interface 0 is for video transfer, interface 1 and 2 are for audio control and audio transfer. When audio function is disabled, interface 0 is for video transfer. Programmable OEM USB parameters by EEPROM including: vendor ID, product ID, MaxPower, serial number, manufacturer descriptor, and product descriptor and chip revision.7.3Image Signal ProcessingHardware Dead Pixel Compensation 2-wire/3-wire serial bus interface to CMOS image sensor Programmable white balance, color correction and gamma correction Automatic Exposure (AE), Automatic White Balance (AWB), Automatic Gain Control (AGC) Programmable AE/AWB windows Edge enhancement and noise removal 2x Sub-Sampling7.4RasterThe output data format is 4:2:2 YCbCr Change the input image data to 8x8 block data format required by the DCTPage 15 of 19ZC0301PLH_1001.2_En7.5Compression EngineStandard JPEG compression engine comply to ISO/IEC 10918-1 specifications 2 AC and 2 DC Huffman code table 4 quantization tables for flexible image quality control Bit Rate Control (BRC) engine Programmable simplified JPEG header for better performance VGA @ 30fps, CIF/SIF up to 30 fps Adjustable frame rate for efficient bandwidth usage7.6System ControllerControl ISI, ISP, Raster, JPEG, and USB blocks, and configure related control registers Generate chip internal/external clocks Error detection and handling through USB interfacePage 16 of 19ZC0301PLH_1001.2_En8. Package InformationLead Count Body Size Stand-Off Body Thickness Lead Width Lead Thickness Lead Pitch D1 E1 A1 A2 B C E487 7 0.1 1.4 0.2 0.127 0.5TABLE 8.1 ZC0301PLH PACKAGE DIMENSION (UNIT: MM)Fig. 8.1 ZC0301PLH Package DimensionNormal Package Marking InformationVimicro ZC0301PLH 48LQGreen PackageVimicro ZC0301PLH 48LQ-LF…… ……Note: “LF” means lead free.…… ……TABLE 8.2 ZC0301PLH MARKING INFORMATIONPage 17 of 19ZC0301PLH_1001.2_En9. Revision History Revision HistoryVersion No. 1.0 1.1 1.2 Content of Revision Initial Version Add marking information Increase in special effects Corrector Release Time3-2-2005 4-7-2005Page 18 of 19ZC0301PLH_1001.2_En10.Contact InformationVimicro Corporation, USA1758 N. Shoreline Blvd Mountain View, CA 94043 USA Tel: 1-650-966-1882 Fax: 1-650-966-1885Vimicro Corporation, Beijing15/F Shining Tower No.35 Xueyuan Road Haidian District, Beijing 100083 P. R. China Tel: 86-10-68948888 Fax: 86-10-68944075 Page 19 of 19。