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HT1623RAM Mapping 48´8LCD Controller for I/O m CSelection TableHT162X HT1620HT1621HT1622HT16220HT1623HT1625HT1626COM 44888816SEG32323232486448Built-in Osc.ÖÖÖÖÖCrystal Osc.ÖÖÖÖÖÖ1January 10,2001Features·Operating voltage:2.7V~5.2V ·Built-in RC oscillator·External 32.768kHz crystal or 32kHz frequency source input·1/4bias,1/8duty,frame frequency is 64Hz ·Max.48´8patterns,8commons,48segments ·Built-in internal resistor type bias generator ·3-wire serial interface·8kinds of time base/WDT selection ·Time base or WDT overflow output ·Built-in LCD display RAM·R/W address auto increment·Two selection buzzer frequencies (2kHz/4kHz)·Power down command reduces power consumption·Software configuration feature·Data mode and Command mode instructions ·Three data accessing modes·VLCD pin to adjust LCD operating voltage ·Cascade applicationGeneral DescriptionHT1623is a peripheral device specially de-signed for I/O type m C used to expand the dis-play capability.The max.display segment of the device are 384patterns (48´8).It also sup-ports serial interface,buzzer sound,watchdog timer or time base timer functions.The HT1623is a memory mapping and multi-function LCD controller.The softwareconfiguration feature of the HT1623make it suitable for multiple LCD applications includ-ing LCD modules and display subsystems.Only three lines are required for the interface be-tween the host controller and the HT1623.The HT162X series have many kinds of products that match various applications.Block DiagramPin AssignmentHT16232January 10,2001Pad AssignmentChip size:177´171(mil)2*The IC substrate should be connected to VDD in the PCB layout artwork.HT16233January 10,2001Pad CoordinatesUnit:mil Pad No.X Y Pad No.X Y 1-82.4579.353782.83-52.442-82.4567.023882.83-35.233-82.4560.393982.83-28.604-83.2146.714082.83-21.975-83.2132.304182.83-15.346-83.2125.204282.83-8.717-83.2118.574382.83-2.088-83.2111.944482.83 4.559-83.21 5.314582.8311.1810-83.21-4.844682.8317.8111-83.21-16.664782.8324.4412-83.21-29.924882.8331.0713-83.21-41.744982.8337.7014-83.21-48.375082.8344.3315-83.21-54.995182.8350.9616-83.21-61.635282.8357.5917-83.21-68.255382.8364.2218-82.88-78.965482.8370.8519-72.50-79.995582.8377.4820-65.88-79.995627.0379.3521-59.24-79.995720.4079.3522-52.62-79.995813.7779.3523-45.73-79.22597.1479.3524-33.32-79.22600.5179.3525-26.69-79.2261-6.1279.3526-14.28-79.2262-12.7579.3527-7.65-79.2263-19.3879.3528 4.76-79.2264-26.0179.352911.39-79.2265-32.6479.353023.80-79.2266-39.2779.353130.43-79.2267-45.9079.353242.84-79.2268-52.5379.353349.47-79.2269-59.1679.353461.88-79.2270-65.7979.353568.51-79.2271-72.4279.353680.92-79.22HT16234January 10,2001Pad DescriptionPad No.Pad Name I/O Description1CS I Chip selection input with pull-high resistor.When the CS is logic high,the data and command read from or written to the HT1623 are disabled.The serial interface circuit is also reset But if the CS is at logic low level and is input to the CS pad,the data and command transmission between the host controller and the HT1623are all enabled.2RD I READ clock input with pull-high resistor.Data in the RAM of the HT1623are clocked out on the rising edge of the RD signal.The clocked out data will appear on the data line.The host controller can use the next falling edge to latch the clocked out data.3WR I WRITE clock input with pull-high resistor.Data on the DATA line are latched into the HT1623on the rising edge of the WR sig-nal.4DATA I/O Serial data input/output with pull-high resistor5VSS¾Negative power supply,ground6OSCI I The OSCI and OSCO pads are connected to a32.768kHz crystalin order to generate a system clock.If the system clock comesfrom an external clock source,the external clock source should beconnected to the OSCI pad.But if an on-chip RC oscillator is se-lected instead,the OSCI and OSCO pads can be left open.7OSCO O8VDD¾Positive power supply9VLCD I LCD operating voltage input pad.10IRQ O Time base or watchdog timer overflow flag,NMOS open drainoutput11,12BZ,BZ O2kHz or4kHz tone frequency output pair13~15T1~T3I Not connected16~23COM0~COM7O LCD common outputs24~71SEG0~SEG47O LCD segment outputsAbsolute Maximum RatingsSupply Voltage..............................-0.3V to5.5V Storage Temperature.................-50°C to125°C Input Voltage................V SS-0.3V to V DD+0.3V Operating Temperature..............-25°C to75°C Note:These are stress ratings only.Stresses exceeding the range specified under²Absolute Maxi-mum Ratings²may cause substantial damage to the device.Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged expo-sure to extreme conditions may affect device reliability.5January10,2001D.C.Characteristics Ta=25°CSymbol ParameterTest ConditionsMin.Typ.Max.Unit V DD ConditionsV DD Operating Voltage¾¾ 2.7¾ 5.2VI DD1Operating Current 3V No load/LCD ONOn-chip RC oscillator¾155310m A 5V¾260420m AI DD2Operating Current 3V No load/LCD ONCrystal oscillator¾150310m A 5V¾250420m AI DD11Operating Current 3V No load/LCD OFFOn-chip RC oscillator¾830m A 5V¾2060m AI DD22Operating Current 3V No load/LCD OFFCrystal oscillator¾¾20m A 5V¾¾35m AI STB Standby Current 3V No loadPower down mode¾110m A 5V¾220m AV IL Input Low Voltage 3VDATA,WR,CS,RD0¾0.6V 5V0¾ 1.0VV IH Input High Voltage 3VDATA,WR,CS,RD2.4¾3V 5V 4.0¾5VI OL1BZ,BZ,IRQ 3V V OL=0.3V0.9 1.8¾mA 5V V OL=0.5V 1.73¾mAI OH1BZ,BZ 3V V OH=2.7V-0.9-1.8¾mA 5V V OH=4.5V-1.7-3¾mAI OL1DATA 3V V OL=0.3V0.9 1.8¾mA 5V V OL=0.5V 1.73¾mAI OH1DATA 3V V OH=2.7V-0.9-1.8¾mA 5V V OH=4.5V-1.7-3¾mAI OL2LCD Common Sink Current 3V V OL=0.3V80160¾m A 5V V OL=0.5V180360¾m AI OH2LCD Common Source Current 3V V OH=2.7V-40-80¾m A 5V V OH=4.5V-90-180¾m A6January10,2001V DD ConditionsI OL3LCD Segment Sink Current 3V V OL=0.3V50100¾m A 5V V OL=0.5V120240¾m AI OH3LCD Segment Source Current 3V V OH=2.7V-30-60¾m A 5V V OH=4.5V-70-140¾m AR PH Pull-high Resistor 3VDATA,WR,CS,RD100200300k W 5V50100150k WA.C.Characteristics Ta=25°CSymbol ParameterTest ConditionsMin.Typ.Max.Unit V DD Conditionsf SYS1System Clock 3VOn-chip RC oscillator223240kHz 5V243240kHzf SYS2System Clock 3VExternal clock source¾32¾kHz 5V¾32¾kHzf LCD1LCD Frame Frequency 3VOn-chip RC oscillator446480Hz 5V486480Hzf LCD2LCD Frame Frequency 3VExternal clock source¾64¾Hz 5V¾64¾Hzt COM LCD Common Period¾n:Number of COM¾n/f LCD¾secf CLK1Serial Data Clock(WR Pin)3VDuty cycle50%¾¾150kHz 5V¾¾300kHzf CLK2Serial Data Clock(RD Pin)3VDuty cycle50%¾¾75kHz 5V¾¾150kHzt CS Serial Interface Reset PulseWidth(Figure3)¾CS¾250¾nst CLK WR,RD Input Pulse Width(Figure1)3VWrite mode 3.34¾¾m s Read mode 6.67¾¾5VWrite mode 1.67¾¾m s Read mode 3.34¾¾7January10,2001V DDConditionst r ,t f Rise/Fall Time Serial Data Clock Width (Figure 1)3V ¾¾120¾ns 5V t su Setup Time DATA to WR,RD Clock Width (Figure 2)3V ¾¾120¾ns 5V t h Hold Time DATA to WR,RD Clock Width (Figure 2)3V ¾¾120¾ns 5V t su1Setup Time for CSto WR,RD Clock Width (Figure 3)3V ¾¾100¾ns 5V t h1Hold Time for CS to WR,RD Clock Width (Figure 3)3V ¾¾100¾ns5V8January 10,2001Figure 1Figure 2Figure 3Functional DescriptionDisplay memory-RAM structureThe static display RAM is organized into96´4 bits and stores the display data.The contents of the RAM are directly mapped to the contents of the LCD driver.Data in the RAM can be a c c e s s e d b y t h e R E A D,W R I T E a n d READ-MODIFY-WRITE commands.The fol-lowing is a mapping from the RAM to the LCD patterns.Time base and watchdog timer-WDTThe time base generator and WDT share the same divided(/256)counter.TIMER DIS/EN/CLR, WDT DIS/EN/CLR and IRQ EN/DIS are inde-pendent from each other.Once the WDT time-out occurs,the IRQ pin will remain at logic low level until the CLR WDT or the IRQ DIS command is issued.RAM mappingTimer and WDT configurations9January10,2001If an external clock is selected as the source of system frequency,the SYS DIS command turns out invalid and the power down mode fails to be carried out until the external clock source is re-moved.Buzzer tone outputA simple tone generator is implemented in the HT1623.The tone generator can output a pair of differential driving signals on the BZ and BZ which are used to generate a single tone.Command formatThe HT1623can be configured by the software setting.There are two mode commands to con-figure the HT1623resource and to transfer the LCD display data.The following are the data mode ID and the command mode ID:Operation Mode ID READ Data110 WRITE Data101 READ-MODIFY-WRITE Data101 COMMAND Command100 If successive commands have been issued,the command mode ID can be omitted.While the system is operating in the non-successive com-mand or the non-successive address data mode, the CS pin should be set to²1²and the previous operation mode will be reset also.The CS pin returns to²0²,a new operation mode ID should be issued first.Name Command Code FunctionTONE OFF0000-1000-X Turn-off tone outputTONE4K010X-XXXX-X Turn-on tone output,tone frequency is4kHzTONE2K0110-XXXX-X Turn-on tone output,tone frequency is2kHz10January10,2001Timing DiagramsREAD mode(command code:110)READ mdoe(successive address reading)11January10,2001WRITE mode(command code:101)WRITE mode(successive address writing)12January10,2001READ-MODIFY-WRITE mode(command code:101)READ-MODIFY-WRITE mode(successive address accessing)13January10,2001Command mode(command code:100)Mode(data and command mode)14January10,2001Application CircuitsNote:The connection of IRQ and RD pin can be selected depending on the requirement of the m C.The voltage applied to V LCD pin must be lower than V DD.Adjust VR to fit LCD display,at V DD=5V,V LCD=4V,VR=15k W±20%.Adjust R(external pull-high resistance)to fit user¢s time base clock.h15January10,2001Command SummaryName ID Command Code D/C Function Def. READ110A6A5A4A3A2A1A0D0D1D2D3D Read data from the RAMWRITE101A6A5A4A3A2A1A0D0D1D2D3D Write data to the RAMREAD-MODIFY-WRITE101A6A5A4A3A2A1A0D0D1D2D3D Read and Write data to the RAMSYS DIS1000000-0000-X C Turn off both system oscillatorand LCD bias generator Yes SYS EN1000000-0001-X C Turn on system oscillatorLCD OFF1000000-0010-X C Turn off LCD display Yes LCD ON1000000-0011-X C Turn on LCD displayTIMER DIS1000000-0100-X C Disable time base output Yes WDT DIS1000000-0101-X C Disable WDT time-out flag output Yes TIMER EN1000000-0110-X C Enable time base outputWDT EN1000000-0111-X C Enable WDT time-out flag output TONE OFF1000000-1000-X C Turn off tone outputs YesCLR TIMER1000000-1101-X C Clear the contents of the timebase generatorCLR WDT1000000-1111-X C Clear the contents of the WDTstageRC32K1000001-10XX-X C System clock source,on-chip RCoscillator YesEXT(XTAL)32K1000001-11XX-X C System clock source,external 32kHz clock source or crystal oscillator32.768kHzTONE4K100010X-XXXX-X C Tone frequency output:4kHzTONE2K1000110-XXXX-X C Tone frequency output:2kHzIRQ DIS100100X-0XXX-X C Disable IRQ output Yes IRQ EN100100X-1XXX-X C Enable IRQ outputF1100101X-0000-X C Time base clock output:1HzThe WDT time-out flag after:4sF2100101X-0001-X C Time base clock output:2HzThe WDT time-out flag after:2sF4100101X-0010-X C Time base clock output:4HzThe WDT time-out flag after:1s16January10,2001Name ID Command Code D/C Function Def. F8100101X-0011-X C Time base clock output:8HzThe WDT time-out flag after:1/2sF16100101X-0100-X C Time base clock output:16HzThe WDT time-out flag after:1/4sF32100101X-0101-X C Time base clock output:32HzThe WDT time-out flag after:1/8sF64100101X-0110-X C Time base clock output:64HzThe WDT time-out flag after:1/16sF128100101X-0111-X C Time base clock output:128HzThe WDT time-out flag after:1/32s Yes TEST1001110-0000-X C Test mode,user don¢t use. NORMAL1001110-0011-X C Normal mode Yes Note:X:Don¢t careA6~A0:RAM addressD3~D0:RAM dataD/C:Data/Command modeDef.:Power on reset defaultAll the bold forms,namely110,101,and100,are mode commands.Of these,100indicates the command mode ID.If successive commands have been issued,the command mode ID except for the first command will be omitted.The source of the tone frequency and of the time base/WDT clock fre-quency can be derived from an on-chip32kHz RC oscillator,a32.768kHz crystal oscillator,or an ex-ternal32kHz clock.Calculation of the frequency is based on the system frequency sources as stated above.It is recommended that the host controller should initialize the HT1623after power on reset, for power on reset may fail,which in turn leads to the malfunctioning of the HT1623.17January10,200118January 10,2001Copyright Ó2001by HOLTEK SEMICONDUCTOR INC.The information appearing in this Data Sheet is believed to be accurate at the time of publication.However,Holtek assumes no responsibility arising from the use of the specifications described.The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification,nor recommends the use of its products for application that may pres-ent a risk to human life due to malfunction or otherwise.Holtek reserves the right to alter its products without prior notification.For the most up-to-date information,please visit our web site at .Holtek Semiconductor Inc.(Headquarters)No.3Creation Rd.II,Science-based Industrial Park,Hsinchu,Taiwan,R.O.C.Tel:886-3-563-1999Fax:886-3-563-1189Holtek Semiconductor Inc.(Taipei Office)11F,No.576,Sec.7Chung Hsiao E.Rd.,Taipei,Taiwan,R.O.C.Tel:886-2-2782-9635Fax:886-2-2782-9636Fax:886-2-2782-7128(International sales hotline)Holtek Semiconductor (Hong Kong)Ltd.RM.711,Tower 2,Cheung Sha Wan Plaza,833Cheung Sha Wan Rd.,Kowloon,Hong Kong Tel:852-2-745-8288Fax:852-2-742-8657Holmate Technology Corp.48531Warm Spring Boulevard,Suite 413,Fremont,CA 94539Tel:510-252-9880Fax:510-252-9885Laipac Technology Inc.105West Beaver Greek Rd.,Unit 207Richmond Hill Ontario,L4B 1C6Canada Tel:1-905-762-1228Fax:1-905-770-6143。
关于HT1380/HT1381的应用关于HT1380/HT1381的应用HT1380是一款高精度、低功耗的串行输入/输出实时钟定时芯片。
特别适合于在那些由通用mcu构成的控制系统中由于mcu本身没有实时钟计数器而又需要实现RTC功能的电路中使用。
在实际使用过程中，根据多数用户曾经出现的问题，本文特别就用户在使用过程中应该特别关注的事项作一些讨论。
我们知道作为一款定时芯片，其定时的准确和精密是非常重要的指标，而该指标直接受到其定时基准32.768khz决定。
因此确保一个稳定而可靠并且“干净”的正弦波输入，是我们设计的基础。
一般都会选用常用的标准32.768khz晶体作为振荡器，根据需要计时的精确度来选择等级，一般来说+-20ppm的晶体可以达到每日误差在+-1秒内。
通常，在使用晶振时，由于晶振的振动带宽极其狭笮，大多采用匹配垫振电容的做法来微调中心频率同时改善电路的起振特性。
根据各个pcb板的分布电容的参数不同，点阵电容的容量大小也各不相同。
对于ht1380/1381我们一般推荐使用8p 左右的容量。
需要注意的是c1、c2应该尽可能使用高频特性好的独石或聚酯电容，避免使用普通瓷片或薄膜类电容（高频损耗大）。
由于小容量电容不可能完全一致，所以在使用上可以选择c1、c2相同的对称电路，也可以是c1、c2不相等的非对称电路。
有时非对称电路的效果更好，这些可由使用者视实际效果而定。
对于在使用过程中，电源电压变化较大的或者不太稳定的电路，也可以在2、3脚之间并入一个1~10Mohm的电阻来增大电压负反馈，提高振荡电路的稳定性。
此外，在pcb布板中，由于ht1380/1381的功耗极低，对抗干扰的能力相对较差，所以必须注意确保晶体及垫振电容等元件的参考地始终和芯片的地电位保持一致。
只要有可能，应该特别使用大面积“地”（铜箔）闭环包围这部分元件，同时引线应该尽可能短。
这样可以最大限度的改善其受周边分布参数的影响以及辐射能的影响。
特 点■基于32.768 kHz的石英晶体，可对秒，分，时，日，月，周以及带闰年补偿的年进行计数■工作电压范围：2.0V～5.5V■串行时钟输入最大值：V CC=2V时为500kHz，V CC=5V时为2MHz 。
■工作电流：2V时小于400nA ■ TTL兼容(V CC=5V)■双通道数据传输方式：单字节或多字节数据传送方式■串行I/O口传输■寄存器以BCD格式编码■封装形式：DIP8(HYM1380)，SOP8(HYM1381)应 用■微型机串行时钟■时钟和日历■传真机■便携仪器■电视机■复费率电度表、IC卡水表、IC卡煤气表概 述HYM1380/HYM1381是一款低功耗串行实时时钟芯片，可对秒，分，时，星期，日期，月，年进行计数。
对于小于31天的月，月末的日期自动进行调整和具有闰年校正的功能。
HYM1380/HYM1381具有两种工作方式：时钟可以采用带AM（上午）/PM（下午）的12小时格式或24小时格式。
HYM1380/HYM1381有多个寄存器用来存储8位数据格式的通信信息。
可准确计时基于32.768KHz的晶振。
为了减少管脚的数目，HYM1380/HYM1381使用串行I/O口传输方式与微处理器通信。
仅需3根通信线：（1）RST（复位）（2）SCLK（串行时钟）和（3）I/O（数据线）。
数据可以以单字节形式或多达8字节的多字节方式传输。
订购信息型号温度范围封装HYM1380 0°C to +70°C 8 DIPHYM1381 0°C to +70°C 8 SOP方框图和管脚功能方框图管脚图HYM1380 —8DIP, HYM1381 —8SOP 管脚说明绝对最大额定值参数名称 符号 额定值 单位 电源电压 V CC －0.3～5.5 V 工作温度 T A 0～70 ℃ 贮存温度 T S －50～125 ℃ 焊接温度T H260（10 秒）℃注：这里要调的是额定值。
HT1380/HT1381Serial Timekeeper ChipBlock DiagramPin Assignment1September 18,2000Features·Operating voltage:2.0V~5.5V·Maximum input serial clock:500kHz at V DD =2V,2MHz at V DD =5V·Operating current:less than 400nA at 2V,less than 1.2m A at 5V ·TTL compatible -V IH :2.0V~V DD +0.3V at V DD =5V -V IL :-0.3V~+0.8V at V DD =5V·Two data transmission modes:single-byte,or burst mode·Serial I/O transmission·All registers store BCD format ·HT1380:8-pin DIP package HT1381:8-pin SOP packageGeneral DescriptionThe HT1380/HT1381is a serial timekeeper IC which provides seconds,minutes,hours,day,date,month and year information.The number of days in each month and leap years are auto-matically adjusted.The HT1380/HT1381is de-signed for low power consumption and can operate in two modes:one is the 12-hour mode with an AM/PM indicator,the other is the 24-hour mode.The HT1380/HT1381has several registers to store the corresponding information with 8-bit data format.A 32768Hz crystal is required to provide the correct timing.In order to minimize the pin number,the HT1380/HT1381use a se-rial I/O transmission method to interface with a microprocessor.Only three wires are required:(1)REST,(2)SCLK and (3)I/O.Data can be de-livered 1byte at a time or in a burst of up to 8bytes.Applications·Microcomputer serial clock ·Clock and Calendarr r rPad Assignment Pad Coordinates Unit:m mPad No.X Y1-851.40775.002-851.40494.603-844.40-203.904845.90-618.305848.40-4.306845.90332.607844.40572.60 Chip size:2010´1920(m m)2*The IC substrate should be connected to VSS in the PCB layout artwork.Pad DescriptionPad No.Pad Name I/O InternalConnection Description 1X1I CMOS32768Hz crystal input pad2X2O CMOS Oscillator output pad3VSS¾CMOS Negative power supply,ground4REST I CMOS Reset pin with serial transmission5I/O I/O CMOS Data input/output pin with serial transmission6SCLK I CMOS Serial clock pulse pin with serial transmission7VDD¾CMOS Positive power supplyAbsolute Maximum RatingsSupply Voltage..............................-0.3V to5.5V Storage Temperature.................-50°C to125°C Input Voltage.................V SS-0.3V to V DD+0.3V Operating Temperature..................0°C to70°C Note:These are stress ratings only.Stresses exceeding the range specified under²Absolute Maxi-mum Ratings²may cause substantial damage to the device.Functional operation of this de-vice at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.2September18,2000D.C.Characteristics Ta=25°CSymbol ParameterTest ConditionsMin.Typ.Max.Unit V DD ConditionsV DD Operating Voltage¾¾2¾ 5.5VI STB Standby Current 2V¾¾¾100nA 5V¾¾100nAI DD Operating Current 2VNo load¾0.7 1.0m A 5V¾0.7 1.2m AI OH Source Current 2V V OH=1.8V-0.2-0.4¾mA 5V V OH=4.5V-0.5-1.0¾mAI OL Sink Current 2V V OL=0.2V0.7 1.5¾mA 5V V OL=0.5V 2.0 4.0¾mAV IH²H²Input Voltage5V¾2¾¾V V IL²L²Input Voltage5V¾¾¾0.8V f OSC System Frequency5V32768Hz X¢TAL¾32768¾Hzf SCLK Serial Clock 2V¾¾¾0.5MHz 5V¾¾2MHz*I STB is specified with SCLK,I/O,REST open.The clock halt bit must be set to logic1(oscillator disabled).A.C.Characteristics Ta=25°CSymbol ParameterTest ConditionsMin.Max.Unit V DD Conditionst DC Data to Clock Setup 2V¾200¾ns 5V¾50¾t CDH Clock to Data Hold 2V¾280¾ns 5V¾70¾t CDD Clock to Data Delay 2V¾¾800ns 5V¾¾200t CL Clock Low Time 2V¾1000¾ns 5V¾250¾t CH Clock High Time 2V¾1000¾ns 5V¾250¾f CLK Clock Frequency 2V¾¾0.5MHz5V¾ D.C. 2.03September18,2000Symbol ParameterTest ConditionsMin.Max.Unit V DD Conditionst rClock Rise and Fall Time 2V¾¾2000nst f5V¾¾500t CC Reset to Clock Setup 2V¾4¾us 5V¾1¾t CCH Clock to Reset Hold 2V¾240¾ns 5V¾60¾t CWH Reset Inactive Time 2V¾4¾us 5V¾1¾t CDZ Reset to I/O High Impedance 2V¾¾280ns5V¾¾704September18,2000Functional DescriptionThe HT1380/HT1381mainly contains the fol-lowing internal elements:a data shift register array to store the clock/calendar data,com-mand control logic,oscillator circuit and read timer clock.The clock is contained in eight read/write registers as shown below.Data con-tained in the clock register is in binary coded decimal format.Two modes are available for transferring the data between the microprocessor and the HT1380/HT1381.One is in single-byte mode and the other is in multiple-byte mode.The HT1380/HT1381also contains two addi-tional bits,the clock halt bit(CH)and the write protect bit(WP).These bits control the opera-tion of the oscillator and so data can be written to the register array.These two bits should first be specified in order to read from and write to the register array properly.Command byteFor each data transfer,a Command Byte is initiated to specify which register is accessed.This is to determine whether a read,write,or test cycle is operated and whether a single byte or burst mode transfer is to occur.Refer to the table shown below and follow the steps to write the data to the chip. First give a Command Byte of HT1380/HT1381,and then write a data in the register.This table illustrates the correlation between Command Byte and their bits:Command ByteFunction Description C7C6C5C4C3C2C1C0 Select Read or Write Cycle R/W Specify the Register to be Accessed A2A1A0Clock Halt Flag CFor IC Test Only1001x x x1 Select Single Byte or Burst Mode1011111x Note:²x²stands for don¢t careThe following table shows the register address and its data format:Register Name RangeDataRegister Definition AddressA2~A0BitR/WCommandByte D7D6D5D4D3D2D1D0Seconds00~59CH10SEC SEC000W R1000000010000001Minutes00~59010MIN MIN001W R1000001010000011Hours01~1200~2312\24AP10HRHR HOUR010WR1000010010000101Date01~310010DATE DATE011W R1000011010000111Month01~1200010M MONTH100W R1000100010001001Day01~070000DAY101W R1000101010001011Year00~9910YEAR YEAR110W R1000110010001101WriteProtect00~80WP ALWAYS ZERO111WR1000111010001111CH: WP:Clock Halt bitCH=0oscillator enabledCH=1oscillator disabledWrite protect bitWP=0register data can be written in WP=1register data can not be written inBit7of Reg2: Bit5of Reg2:12/24mode flagbit7=1,12-hour mode bit7=0,24-hour mode AM/PM mode defined AP=1PM modeAP=0AM modeR/W signalThe LSB of the Command Byte determines whether the data in the register be read or be written to.When it is set as²0²means that a write cycle is to take place otherwise this chip will be set into the read mode.A0~A2A0to A2of the Command Byte is used to specify which registers are to be accessed.There are eight registers used to control the month data, etc.,and each of these registers have to be set asa write cycle in the initial time.Burst modeWhen the Command Byte is10111110(or 10111111),the HT1380/HT1381is configured in burst mode.In this mode the eight clock/calen-dar registers can be written(or read)in series, starting with bit0of register address0(see the timing on the next page).Test modeWhen the Command Byte is set as1001xxx1, HT1380/HT1381is configured in test mode.The test mode is used by Holtek only for testing purposes.If used generally,unpredictable con-ditions may occur.5September18,2000Write protect registerThis register is used to prevent a write opera-tion to any other register.Data can be written into the designated register only if the Write Protect signal(WP)is set to logic0.The Write Protect Register should be set first before re-starting the system or before writing the new data to the system,and it should set as logic1in the read cycle.The Write Protect bit cannot be written to in the burst mode.Clock Halt bitD7of the Seconds Register is defined as the Clock Halt Flag(CH).When this bit is set to logic1,the clock oscilla-tor is stopped and the chip goes into a low-power standby mode.When this bit is writ-ten to logic0,the clock will start.12-hour/24-hour modeThe D7of the hour register is defined as the 12-hour or24-hour mode select bit.When this bit is in high level,the12-hour mode is selected otherwise it¢s the24-hour mode.AM-PM modeThese are two functions for the D5of the hour register determined by the value D7of the same register.One is used in AM/PM selection on the12-hour mode.When D5is logic1,it is PM,otherwise it¢s AM.The other is used to set the second 10-hour bit(20~23hours)on the24-hour mode.Reset and Serial Clock controlThe REST pin is used to allow access data to the shift register like a toggle switch.When the REST pin is taken high,the built-in control logic is turned on and the address/command se-quence can access the corresponding shift regis-ter.The REST pin is also used to terminate either single-byte or burst mode data format.The input signal of SCLK is a sequence of a fall-ing edge followed by a rising edge and it is used to synchronize the register data whether read or write.For data input,the data must be read after the rising edge of SCLK.The data on the I/O pin becomes output mode after the falling edge of the SCLK.All data transfer terminates if the REST pin is low and the I/O pin goes to a high impedance state.The data transfer is il-lustrated on the next page.Data in and Data outIn writing a data byte with HT1380/HT1381, the read/write should first set as R/W=0in the Command Byte and follow with the correspond-ing data register on the rising edge of the next eight SCLK cycles.Additional SCLK cycles are ignored.Data inputs are entered starting with bit0.In reading a data on the register of HT1380/HT1381,R/W=1should first be en-tered as input.The data bit outputs on the fall-ing edge of the next eight SCLK cycles.Note that the first data bit to be transmitted on the first falling edge after the last bit of the read command byte is written.Additional SCLK cy-cles re-transmits the data bytes as long as REST remains at high level.Data outputs are read starting with bit0.Crystal selectionA32768Hz crystal can be directly connected to the HT1380/HT1381via pin2and pin3(X1, X2).In order to obtain the correct frequency, two additional load capacities(C1,C2)are needed.The value of the capacity depends on how accurate the crystal is.We suggest that you can follow the table on the next page.6September18,2000The following diagram shows the single and burst mode transfer:The table illustrates the values suggested for capacities C1,C2Part No.Crystal Error Capacity ValueHT1380/HT1381±10ppm5pF 10~20ppm8pFOperating flowchartTo initiate any transfer of data,REST is taken high and an8-bit command byte is first loaded into the control logic to provide the register address and command information.Following the command word,the clock/calendar data is serially transferred to or from the corresponding register.The REST pin must be taken low again after the transfer operation is completed.All data enter on the rising edge of SCLK and outputs on the falling edge of SCLK.In total,16clock pulses are needed for a sin-gle byte mode and72for burst mode.Both input and output data starts with bit0.In using the HT1380/HT1381,set first the WP and CH to0and wait for about3seconds,the oscilla-tor will generate the clocks for internal use.Then,choose either single mode or burst mode to input the data.The read or write operating flowcharts are shown on the next page.7September18,2000 S r r*In reading data byte from HT1380/HT1381register,the first data bit to be transmitted at the first falling edge after the last bit of the command byte is written.8September 18,2000·To disable the write protect (WP=0)bit and enable the oscillator (CH=0)·Single byte data transfer·Burst mode data transferTiming DiagramsRead data transferWrite data transferApplication Circuits*Note:The value of the capacity depends on how accurate the crystal is.Refer to the suggestion table of page7.9September18,2000Holtek Semiconductor Inc.(Headquarters)No.3,Creation Rd.II,Science Park,Hsinchu,TaiwanTel:886-3-563-1999Fax:886-3-563-1189Holtek Semiconductor Inc.(Taipei Sales Office)4F-2,No.3-2,YuanQu St.,Nankang Software Park,Taipei115,TaiwanTel:886-2-2655-7070Fax:886-2-2655-7373Fax:886-2-2655-7383(International sales hotline)Holtek Semiconductor Inc.(Shanghai Sales Office)7th Floor,Building2,No.889,Yi Shan Rd.,Shanghai,China200233Tel:021-6485-5560Fax:021-6485-0313Holtek Semiconductor Inc.(Shenzhen Sales Office)5/F,Unit A,Productivity Building,Cross of Science M3rd Road and Gaoxin M2nd Road,Science Park,Nanshan District,Shenzhen,China518057Tel:0755-8616-9908,8616-9308Fax:0755-8616-9533Holtek Semiconductor Inc.(Beijing Sales Office)Suite1721,Jinyu Tower,A129West Xuan Wu Men Street,Xicheng District,Beijing,China100031Tel:************,66417751,66417752Fax:************Holtek Semiconductor Inc.(Chengdu Sales Office)709,Building3,Champagne Plaza,No.97Dongda Street,Chengdu,Sichuan,China610016Tel:028-6653-6590Fax:028-6653-6591Holmate Semiconductor,Inc.(North America Sales Office)46729Fremont Blvd.,Fremont,CA94538Tel:510-252-9880Fax:510-252-9885Copyright Ó2000by HOLTEK SEMICONDUCTOR INC.The information appearing in this Data Sheet is believed to be accurate at the time of publication.However,Holtek assumes no responsibility arising from the use of the specifications described.The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification,nor recommends the use of its products for application that may pres-ent a risk to human life due to malfunction or otherwise.Holtek¢s products are not authorized for use as critical com-ponents in life support devices or systems.Holtek reserves the right to alter its products without prior notification. For the most up-to-date information,please visit our web site at .10September18,2000。
DVD测码板MTK方案DVD在线读写操作说明在此操作之前，一定要完成测码板驱动的安装，否则会操作失败。
为了能更清楚的了解测码板的关键部件位置，方便下面的叙述，请看一下下面的图片：01、连接测码板与解码板先不要将USB线插到测码板，关闭DVD机器电源，拆开MTK方案（即使用MT1389系列芯片的）DVD机，在解码板上找到在线读写插座（MTK方案的DVD解码板基本都有这个插座，一般式4针的）。
MTK1389的不能直接接在VGA口处，要接在白色的三针座子上来进行读写，将上图所示的“在线读写三线插座”中的三条线与DVD机解码板上在线读写插座的除电源之外的三个脚对应相连。
一般情况下，GND（地线）先连接上，然后按照测码板上的另外两条线与解码板上的另外两针相连（电源脚空着不接）。
如果后面不能正常通讯可以按一下开关就可以转换了。
注：如果没有找到解码板上的在线读写插座，可以仔细找一下标注有“TX、RX”焊点，将连接线直接接到焊点上。
如果这个标记也找不到，那可以连接到MT1389芯片的引脚，具体脚位是：216脚的MT1389芯片101脚是RX、102脚是TX；128脚的MT1389芯片89 脚是RX、91脚是TX。
后面的操作不能正常通讯的话，可以按开关转换方式来读写数据，不需要换线了，操作很简单的。
如果要在线读写25T80的数据，打开DVD的电源和接通测码板跟电脑的联接，打开凌阳在线读写软件，端口等都设置好后，短接25T80的5脚和6脚5秒钟左右的时间，直至DVD屏幕没有显示，这时再点击读数据，这样操作方能读和写的。
请大家一定要记住这个步骤。
02、插上USB线到测码板及DVD打开电源接下来先将USB线接到测码板和电脑的USB端口，然后打开DVD机电源，准备使用软件进行读写。
03、使用Mtk-Tool软件进行在线读操作下面以使用Mtk-Tool软件为例（该软件可在网络下载到），介绍在线读写的具体软件操作步骤。
首先启动下图所示的软件，也就是在其上面鼠标双击。
Huaqiao university基于单片机控制的实时时钟HT1380的软件设计院（系）：机电及自动化学院专业：测控技术与仪器（信息）学号：姓名：级别：指导老师：2012年12月目录摘要 (1)1系统的硬件设计框图与原理概述 (2)1.1 电路设计框图 (2)1.2 系统硬件概述 (2)1..3 电路原理及说明 (2)2 系统的软件设计 (4)2.1 程序流程框图 (4)3 测试与结果分析 (6)3.1 软件测试 (6)3.2 测试结果分析 (6)3.3 测试结论 (6)4 课设总结 (7)5致谢 (8)6 参考文献 (9)附录一：系统程序清单 (10)附录二：系统硬件图 (20)附录三：硬件实物图 (21)摘要随着科技的快速发展，时间的流逝,至从观太阳、摆钟到现在电子钟，人类不断研究，不断创新纪录。
实时时钟电路HT1380,它可以对年、月、日、周日、时、分、秒进行计时，还具有闰年补偿等多种功能，而且HT1380的使用寿命长，误差小。
对于数字电子万年历采用直观的数字显示，可以同时显示年、月、日、周日、时、分、秒等信息，还具有时间校准等功能。
该电路采用AT89S52单片机作为核心，功耗小，能在3V的低压工作，电压可选用3~5V电压供电。
综上所述此万年历具有读取方便、显示直观、功能多样、电路简洁、成本低廉等诸多优点，符合电子仪器仪表的发展趋势，具有广阔的市场前景。
关键词:时钟电路，HT1380，单片机89S521.系统的硬件设计框图与原理概述1.1 电路设计框图图1系统原理图1.2 系统硬件概述本电路是由AT89S52单片机为控制核心，具有在线编程功能，低功耗，能在3V超低压工作；时钟电路由HT1380提供，它是一种高性能、低功耗、带RAM的实时时钟电路，它可以对年、月、日、周日、时、分、秒进行计时，具有闰年补偿功能，工作电压为2.5V～5.5V。
采用三线接口与CPU进行同步通信，并可采用突发方式一次传送多个字节的时钟信号或RAM数据。
在线读写操作说明01、连接编程器与解码板先不要将USB线插到编程器，关闭DVD机器电源，拆开MTK方案（即使用MT1389系列芯片的）DVD机，在解码板上找到在线读写插座（MTK方案的DVD解码板基本都有这个插座，一般式4针的）。
MTK1389的不能直接接在VGA口处，要接在白色的三针座子上来进行读写，将上图所示的“在线读写三线插座”中的三条线与DVD机解码板上在线读写插座的除电源之外的三个脚对应相连。
一般情况下，GND（地线）先连接上，然后按照编程器上的另外两条线与解码板上的另外两针相连（电源脚空着不接）。
如果后面不能正常通讯可以将三针线接到另外一个座子就可以转换了。
注：如果没有找到解码板上的在线读写插座，可以仔细找一下标注有“TX、RX”焊点，将连接线直接接到焊点上。
如果这个标记也找不到，那可以连接到MT1389芯片的引脚，具体脚位是：216脚的MT1389芯片101脚是RX、102脚是TX；128脚的MT1389芯片89脚是RX、91脚是TX。
后面的操作不能正常通讯的话，可以将三针线接到另外一个座子来读写数据，不需要换线了，操作很简单的。
如果要在线读写25T80的数据，先不要打开DVD的电源，接通一体板USB编程器和解码板跟电脑的联接，打开MTK_TOOL在线读写软件，端口等都设置好后，短接25T80的5脚和6脚，不要松开，打开DVD电源，继续短接25T80的5脚和6脚5秒钟左右的时间，然后松开5、6脚，这时快速点击读数据，这样操作方能读和写的。
请大家一定要记住这个步骤。
02、插上USB线到编程器及DVD打开电源接下来先将USB线接到编程器和电脑的USB端口，并将编程器的黄色按钮开关按上来，指示灯要变为绿色，然后打开DVD机电源，准备使用软件进行读写。
03、使用Flasher.exe软件进行在线读操作下面以使用Flasher.exe软件为例，介绍在线读写的具体软件操作步骤。
首先启动下图所示的软件，也就是在其上面鼠标双击。
nt3h1101读写NT3H1101是一种无接触式NFC标签芯片，也被称为NFC标签IC。
它是NXP公司开发的低功耗、低成本的集成电路，用于实现近距离无线通信和身份识别等功能。
这篇文章将介绍NT3H1101的特点、应用领域以及其在物联网（IoT）中的使用。
首先，NT3H1101是一款高度集成的芯片，具有低功耗和小尺寸的特点，使得它适用于各种电子设备和小型设备中。
它支持ISO/IEC 14443 Type A标准和ISO/IEC 15693标准，可以与多种设备进行无线通信，如智能手机、读卡器、便携式设备等。
此外，NT3H1101还具有内置的加密和认证功能，可以确保通信过程中的数据安全性和隐私保护。
NT3H1101的主要应用领域之一是身份识别。
通过将NT3H1101集成到智能卡或门禁系统中，可以实现身份验证和门禁控制等功能。
用户只需将包含NT3H1101芯片的卡片或设备靠近读卡器，就能够实现快速、安全的身份识别和出入控制。
这种无接触式的身份识别技术不仅提高了工作效率，还可以减少因物理接触导致的损坏和磨损。
另一个重要的应用领域是支付和电子票务。
采用NT3H1101芯片的移动支付解决方案可以实现便捷、安全的无线支付方式。
用户可以将包含NT3H1101芯片的NFC手机或卡片靠近支持NFC技术的POS终端进行支付。
这种支付方式可以提供更好的使用体验，减少支付过程中的人为错误和纸币币种差异等问题。
当然，NT3H1101的应用领域不仅限于身份识别和支付。
它还可以用于物联网中的智能家居、智能车辆和物流管理等领域。
通过在家庭设备、汽车和物流包装中集成NT3H1101芯片，可以实现设备之间的无线通信和数据交换。
例如，在智能家居系统中，用户可以通过手机或智能音箱等设备，通过与带有NT3H1101芯片的家电进行交互，实现智能化控制和自动化操作。
在物流管理中，NT3H1101芯片可以用于包装物品的追踪和识别，确保物流过程的可靠性和安全性。
DS1302 采用3线与单片机相连,可以存取内部的寄存器和RAM 本程序提供了DS1302的初始化程序,单字节读写和连续读写程序其中初始化程序很重要,当初就是因为初始化不好不能启动DS1302 并且单片机每次上电都要执行此程序.我使用该芯片多年了,一直没有出现什么问题. 另外需要注意的是: 上电时在VCC电压达到2.0伏前RST脚须保持逻辑"0". RST脚设为逻辑"1"前,SCLK须为逻辑"0". 我感觉DS1302的使用并不复杂,选择晶振也很重要,不匹配的晶振也不容易起振.我一般采用小园的,电子表上常用的那种. 目前我正在使用HT1380/HT1381 不同的是不含涓流充电和备用电池电路,可以自己设计一个,用二极管比较简单. 欢迎大家与我探讨;51MCU的DS1302数字时钟芯片控制程序; By:winhi ; winhimcu@ ;内存及口线定义;读写DS1302时使用的内存CDA T1 EQU 2EH CDAT2 EQU 2FH ;DS1302 在内存映射BCD码;所有数据必须依次存放秒,分,时,日,月,星期,年CSEC EQU 30H ;秒数据CMIN EQU 31H ;分数据CHR EQU 32H ;小时数据CDATE EQU 33H ;日数据CMONTH EQU 34H ;月数据CDAY EQU 35H ;星期数据CYEAR EQU 36H ;年数据低2位;读写口线定义CRST EQU P1.3 CIO EQU P1.1 CSCLK EQU P1.2 ;------应用方法;上电复位后初始化DS1302 ACALL DSINIT MOV CDAT1,#10000001B ACALL DSRORD ANL A,#01111111B MOV CDA T2,A MOV CDAT1,#10000000B ACALL DSWORD ACALL DSWRPRT ;写保护; ;只读出秒数据返回在A中MOV CDAT1,#10000001B ACALL DSRORD ; ;读DS1302中的时钟数据读入到内存ACALL DSRDC ; ;将内存中的时钟数据写入到DS1302 MOV CDAT1,#10001110B ;打开写保护MOV CDAT2,#00000000B ACALL DSWORD ACALL DSWRC ;数据写入到DS1302 ACALL DSWRPRT ;写保护; ;----DS1302 控制子程序; 初始化DS1302 ; 打开写保护设置涓流充电DSINIT: CLR CSCLK NOP CLR CRST MOV CDA T1,#10001110B ;打开写保护MOV CDAT2,#00000000B ACALL DSWORD MOV CDAT1,#10010000B ;涓流充电R0=2K MOV CDAT2,#10100101B ;R1=2K 一个二极管ACALL DSWORD RET ; ;读DS1302 内容到内存; 寄存器区: 0区DSRDC: PUSH PSW CLR PSW.3 CLR PSW.4 MOV R7,#7 MOV R0,#CSEC MOV B,#10000001B ;READ DS1302 SEC DSRDC1: CLR CSCLK NOP SETB CRST MOV A,B ACALL DSWRB ACALL DSRDB MOV @R0,A INC R0 ;NEXT ADDRESS/DA TA MOV A,B ADD A,#0000010B ;ADDRESS+1 MOV B,A CLR CRST NOP CLR CSCLK DJNZ R7,DSRDC1 POP PSW RET ; ;写内存到DS1302 ; 寄存器区: 0区DSWRC: PUSH PSW CLR PSW.3 CLR PSW.4 MOV R7,#7 MOV R0,#CSEC MOV B,#10000000B ;WRITE DS1302 SEC DSWRC1: CLR CSCLK NOP SETB CRST MOV A,B ACALL DSWRB MOV A,@R0 ACALL DSWRB INC R0 ;NEXT ADDRESS/DATA MOV A,B ADD A,#0000010B ;ADDRESS+1 MOV B,A CLR CRST NOP CLR CSCLK DJNZ R7,DSWRC1 POP PSW RET ; ;DS1302 单字节命令(数据)写; DSDA T1=地址DSDA T2=命令/数据; 寄存器区: 0区DSWORD: PUSH PSW CLR PSW.3 CLR PSW.4 CLR CSCLK NOP SETB CRST MOV A,CDAT1 ACALL DSWRB MOV A,CDAT2 ACALL DSWRB CLR CRST NOP CLR CSCLK POP PSW RET ; ;DS1302 单字节命令(数据)读; DSDA T1=地址DSDA T2=命令/数据; 寄存器区: 0区DSRORD: PUSH PSW CLR PSW.3 CLR PSW.4 CLR CSCLK NOP SETB CRST MOV A,CDAT1 ACALL DSWRB ACALL DSRDB MOV CDA T2,A CLR CRST NOP CLR CSCLK POP PSW RET ; ;DS1302 字节写时序; 内容在A中DSWRB: MOV R6,#8 CLR C DSWRB1: CLR CSCLK RRC A MOV CIO,C NOP SETB CSCLK DJNZ R6,DSWRB1 RET ; ;DS1302 字节读时序; 内容在A中DSRDB: MOV R6,#8 CLR C DSRDB1: CLR CSCLK NOP MOV C,CIO RRC A SETB CSCLK DJNZ R6,DSRDB1 RET ; ;DS1302写保护DSWRPRT:MOV CDAT1,#10001110B MOV CDAT2,#10000000B ACALL DSWORD RET [em26][em26]。
