74LVC16245ADL-T中文资料

© 2002 Fairchild Semiconductor Corporation DS500678October 2001Revised August 200274ALVC16245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs74ALVC16245Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and OutputsGeneral DescriptionThe ALVC16245 contains sixteen non-inverting bidirec-tional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. Each byte has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device.The OE inputs disable both the A and B ports by placing them in a high impedance state.The 74ALVC16245 is designed for low voltage (1.65V to 3.6V) V CC applications with I/O compatibility up to 3.6V.The 74ALVC16245 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain-ing low CMOS power dissipation.Featuress 1.65V–3.6V V CC supply operation s 3.6V tolerant inputs and outputs s t PD3.0 ns max for 3.0V to 3.6V V CC 3.5 ns max for 2.3V to 2.7V V CC 6.0 ns max for 1.65V to 1.95V V CCs Power-down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1)s Uses patented noise/EMI reduction circuitry s Latchup conforms to JEDEC JED78s ESD performance:Human body model > 2000V Machine model >200Vs Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA)Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.Ordering Code:Note 2: Ordering code “G ” indicates Trays.Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X ” to the ordering code.Logic SymbolOrder Number Package NumberPackage Description74ALVC16245G (Note 2)(Note 3)BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide74ALVC16245MTD (Note 3)MTD4848-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide 274A L V C 16245Connection DiagramsPin Assignment of TSSOPPin Assignment for FBGA(Top Thru View)Pin DescriptionsFBGA Pin AssignmentsTruth TablesH = HIGH Voltage Level L = LOW Voltage LevelX = Immaterial (HIGH or LOW, inputs and I/O ’s may not float)Z = High ImpedanceLogic DiagramPin Names DescriptionOE n Output Enable Input (Active LOW)T/R n Transmit/Receive InputA 0–A 15Side A Inputs or 3-STATE OutputsB 0–B 15Side B Inputs or 3-STATE Outputs NCNo Connect123456A B 0NC T/R 1OE 1NC A 0B B 2B 1NC NC A 1A 2C B 4B 3V CC V CC A 3A 4D B 6B 5GND GND A 5A 6E B 8B 7GND GND A 7A 8F B 10B 9GND GND A 9A 10G B 12B 11V CC V CC A 11A 12H B 14B 13NC NC A 13A 14JB 15NCT/R 2OE 2NCA 15InputsOutputsOE 1T/R 1L L Bus B 0–B 7 Data to Bus A 0–A 7L H Bus A 0–A 7 Data to Bus B 0–B 7H XHIGH Z State on A 0–A 7, B 0–B 7Inputs OutputsOE 2T/R 2L L Bus B 8–B 15 Data to Bus A 8–A 15L H Bus A 8–A 15 Data to Bus B 8–B 15HXHIGH Z State on A 8–A 15, B 8–B 1574ALVC16245Absolute Maximum Ratings (Note 4)Recommended Operating Conditions (Note 6)Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Rat-ings. The “Recommended Operating Conditions ” table will define the condi-tions for actual device operation.Note 5: I O Absolute Maximum Rating must be observed.Note 6: Floating or unused control inputs must be held HIGH or LOW.DC Electrical CharacteristicsSupply Voltage (V CC )−0.5V to +4.6V DC Input Voltage (V I )−0.5V to 4.6V Output Voltage (V O ) (Note 5)−0.5V to V CC +0.5VDC Input Diode Current (I IK ) V I < 0V−50 mA DC Output Diode Current (I OK )V O < 0V−50 mA DC Output Source/Sink Current (I OH /I OL )±50 mA DC V CC or GND Current per Supply Pin (I CC or GND)±100 mAStorage Temperature Range (T STG )−65°C to +150°CPower Supply Operating 1.65V to 3.6VInput Voltage 0V to V CC Output Voltage (V O )0V to V CCFree Air Operating Temperature (T A )−40°C to +85°CMinimum Input Edge Rate (∆t/∆V)V IN = 0.8V to 2.0V, V CC = 3.0V10 ns/VSymbol ParameterConditionsV CC Min MaxUnits(V)V IHHIGH Level Input Voltage1.65 - 1.950.65 x V CCV2.3 - 2.7 1.72.7 -3.62.0V ILLOW Level Input Voltage1.65 - 1.950.35 x V CCV 2.3 - 2.70.72.7 - 3.60.8V OHHIGH Level Output VoltageI OH = −100 µA 1.65 - 3.6V CC - 0.2VI OH = −4 mA 1.65 1.2I OH = −6 mA 2.3 2.0I OH = −12 mA2.3 1.72.7 2.23.02.4I OH = −24 mA3.02V OLLOW Level Output VoltageI OL = 100 µA 1.65 - 3.60.2V I OL = 4 mA 1.650.45I OL = 6 mA 2.30.4I OL = 12 mA 2.30.72.70.4I OL = 24 mA3.00.55I I Input Leakage Current 0 ≤ V I ≤ 3.6V 3.6±5.0µA I OZ 3-STATE Output Leakage 0 ≤ V O ≤ 3.6V3.6±10µA I CC Quiescent Supply Current V I = V CC or GND, I O = 0 3.640µA ∆I CCIncrease in I CC per InputV IH = V CC − 0.6V3 - 3.6750µA 474A L V C 16245AC Electrical CharacteristicsCapacitanceSymbolParameterT A = −40°C to +85°C, R L = 500ΩUnitsC L = 50 pFC L = 30 pFV CC = 3.3V ± 0.3V V CC = 2.7V V CC = 2.5V ± 0.2VV CC = 1.8V ± 0.15V MinMax Min Max Min Max Min Max t PHL , t PLH Propagation Delay 1.33 1.5 3.5 1.0 3.0 1.5 6.0ns t PZL , t PZH Output Enable Time 1.3 4.3 1.5 5.4 1.0 4.9 1.59.3ns t PLZ , t PHZOutput Disable Time1.34.21.54.71.04.21.57.6ns Symbol ParameterConditionsT A = +25°C Units V CC Typical C IN Input Capacitance V I = 0V or V CC 3.36pF C IO Input, Output Capacitance V O = 0V or V CC3.37pF C PDPower Dissipation CapacitanceOutputs Enabled f = 10 MHz, C L = 50 pF3.320pF2.52074ALVC16245AC Loading and WaveformsFIGURE 1. AC Test CircuitTABLE 1. Values for Figure 1 TABLE 2. Variable Matrix(Input Characteristics: f = 1MHz; t r = t f = 2ns; Z O = 50Ω)FIGURE 2. Waveform for Inverting and Non-inverting FunctionsFIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage LogicFIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage LogicTEST SWITCH t PLH , t PHL Open t PZL , t PLZ V L t PZH , t PHZGNDSymbol V CC3.3V ± 0.3V2.7V 2.5 ± 0.2V 1.8V ± 0.15VV mi 1.5V 1.5V V CC /2V CC /2V mo 1.5V 1.5V V CC /2V CC /2V X V OL + 0.3V V OL + 0.3V V OL + 0.15V V OL + 0.15V V Y V OH − 0.3VV OH − 0.3VV OH − 0.15V V OH − 0.15V V L6V6VV CC *2V CC *2 674A L V C 16245Physical Dimensionsinches (millimeters) unless otherwise noted54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm WidePackage Number BGA54A774ALVC16245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and OutputsPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm WidePackage Number MTD48Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。

74ALVC16245; 74ALVCH1624516-bit transceiver with direction pin; 3-stateRev. 03 — 12 May 2004Product data sheet1.General descriptionThe74ALVC16245;74ALVCH16245is a16-bit transceiver featuring non-inverting3-statebus compatible outputs in both send and receive directions.The 74ALVC16245; 74ALVCH16245 features two output enable inputs (pins nOE) foreasy cascading and two send or receive inputs(pins nDIR)for direction control.Pins nOEcontrol the outputs so that the buses are effectively isolated. This device can be used astwo 8-bit transceivers or one 16-bit transceiver.The 74ALVCH16245 has an active bushold circuitry which is provided to hold unused orfloating data inputs at a valid logic level. This feature eliminates the need for externalpull-up or pull-down resistors.2.Featuress Wide supply voltage range from 1.2 V to 3.6 Vs Complies with JEDEC standard JESD8-Bs CMOS low power consumptions MULTIBYTE flow-through standard pin-out architectures Low inductance multiple V CC and GND pins for minimize noise and ground bounces Direct interface with TTL levelss All data inputs have bushold (74ALVCH16245 only)s Output drive capability 50Ω transmission lines at 85°Cs Current drive±24mA at V CC=3.0V.3.Quick reference data[1]C PD is used to determine the dynamic power dissipation (P D in µW).P D = C PD ×V CC 2×f i ×N +∑(C L ×V CC 2×f o )where:f i = input frequency in MHz;f o = output frequency in MHz;C L =output load capacitance in pF;V CC =supply voltage in Volts;N =total load switching outputs;∑(C L ×V CC 2×f o )= sum of outputs.[2]The condition is V I = GND to V CC .4.Ordering informationTable 1:Quick reference data SymbolParameterConditionsMin Typ Max Unit t PHL , t PLH propagation delayAn to Bn; Bn to An V CC =2.5V; C L =30pF - 2.0-ns V CC =3.3V; C L =50pF- 1.9-ns C I input capacitance - 4.0-pF C I/O input/output capacitance-8.0-pF C PDpower dissipation capacitance per buffer outputs enabled [1][2]-29-pF outputs disabled[1][2]-5-pFTable 2:Ordering informationType numberPackageTemperature range NameDescriptionVersion 74ALVC16245DGG −40°C to +85°C TSSOP48plastic thin shrink small outline package;48leads; body width 6.1 mmSOT362-174ALVCH16245DGG −40°C to +85°C 74ALVC16245DL −40°C to +85°C SSOP48plastic shrink small outline package; 48 leads;body width 7.5 mmSOT370-174ALVCH16245DL−40°C to +85°C5.Functional diagramFig 1.Logic symbol.Fig 2.IEC logic symbol.Fig 3.Bushold circuit.001aaa8531B01B11OE 2OE 1B21B31B41B51B61B71DIR4746482544434140383723156891112242B02B12B22B32B42B52B62B71A01A11A21A31A41A51A61A72A02A12A22A32A42A52A62A7363533323029272613141617192022232DIRG3G63EN1[BA]6EN1[BA]3EN2[AB]6EN2[AB]21347364635314443351643326174130819402992038271122372612231A02A12A02A22A32A42A52A62A72B12B22B32B42B52B62B71OE1DIR 001aaa7901A11A21A31A41A51A61A71B02B01B11B21B31B41B51B61B7542125244812OE2DIRto internal circuitmna004V CCdata inputFig 4.Logic diagram.4711DIR2481B01B11B21B31B41B51B61B72B02B12B22B32B42B52B62B74634454364184093811371A01A11A21A31A41A51A61A72A02A12A22A32A42A52A62A7121OE2DIR2OE362413253514331632173019292027222623001aaa7896.Pinning information6.1Pinning6.2Pin descriptionFig 5.Pin configuration.162451DIR 1OE 1B01A01B11A1GND GND 1B21A21B31A3V CC V CC 1B41A41B51A5GND GND 1B61A61B71A72B02A02B12A1GND GND 2B22A22B32A3V CC V CC 2B42A42B52A5GND GND 2B62A62B72A72DIR 2OE001aaa791123456789101112131415161718192021222324484746454443424140393837363534333231302928272625Table 3:Pin description Pin Symbol Description11DIR direction control input 21B0data output or input 31B1data output or input 4GND ground (0V)51B2data output or input 61B3data output or input 7V CC positive supply voltage 81B4data output or input 91B5data output or input 10GND ground (0V)111B6data output or inputTable 3:Pin description …continuedPin Symbol Description121B7data output or input132B0data output or input142B1data output or input15GND ground (0V)162B2data output or input172B3data output or input18V CC positive supply voltage192B4data output or input202B5data output or input21GND ground (0V)222B6data output or input232B7data output or input242DIR direction control input252OE output enable input (active LOW) 262A7data input or output272A6data input or output28GND ground (0V)292A5data input or output302A4data input or output31V CC positive supply voltage322A3data input or output332A2data input or output34GND ground (0V)352A1data input or output362A0data input or output371A7data input or output381A6data input or output39GND ground (0V)401A5data input or output411A4data input or output42V CC positive supply voltage431A3data input or output441A2data input or output45GND ground (0V)461A1data input or output471A0data input or output481OE output enable input (active LOW)7.Functional description7.1Function table[1]H = HIGH voltage level L = LOW voltage level X = don’t careZ = high-impedance OFF-state.8.Limiting values[1]The input and output voltage ratings may be exceeded if the input and output current ratings are observed.[2]Above 55°C the value of P tot derates linearly with 11.3 mW/K.[3]Above 55°C the value of P tot derates linearly with 8 mW/K.Table 4:Function table[1]Input Input or outputnOE nDIR nAn nBn L L A = B input L H input B = A HXZZTable 5:Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).Symbol Parameter Conditions Min Max Unit V CC supply voltage −0.5+4.6V I IK input diode current V I < 0V−50-mA V Iinput voltagedata inputs with bushold [1]−0.5V CC + 0.5Vdata inputs without bushold [1]−0.5+4.6V control pins[1]−0.5+4.6V I OK output diode current V O > V CC or V O < 0V -±50mA V O output voltage [1]−0.5V CC + 0.5VI O output source or sink current V O = 0V to V CC-±50mA I GND , I CC V CC or GND current -±100mA T stg storagetemperature −65+150°CP totpower dissipation T amb =−40°C to +85°CSSOP package [2]-850mW TSSOP package[3]-600mW9.Recommended operating conditions10.Static characteristicsTable 6:Recommended operating conditions Symbol Parameter ConditionsMinTypMaxUnitV CCsupply voltagemaximum speed performance C L =30 pF 2.3- 2.7V C L =50 pF3.0- 3.6V low-voltage applications1.2- 3.6V V I input voltage 0-V CC V V O output voltage 0-V CC V T amb operating ambient temperature −40-+85°C t r , t finput rise and fall timesV CC = 2.3 V to 3.0 V 0-20ns/V V CC = 3.0 V to 3.6 V-10ns/VTable 7:Static characteristicsAt recommended operating conditions; voltages are referenced to GND (ground = 0 V).Symbol ParameterConditions Min Typ Max Unit T amb =−40°C to +85°C [1]V IH HIGH-level input voltage V CC = 2.3 V to 2.7 V 1.7 1.2-V V CC = 2.7 V to 3.6 V 2.0 1.5-V V IL LOW-level input voltage V CC = 2.3 V to 2.7 V - 1.20.7V V CC = 2.7 V to 3.6 V - 1.50.8V V OHHIGH-level output voltageV I = V IH or V ILI O =−100µA;V CC =2.3V to 3.6 V V CC − 0.2V CC-V I O =−6mA; V CC = 2.3 V V CC − 0.3V CC − 0.08-V I O =−12mA; V CC = 2.3 V V CC − 0.6V CC − 0.26-V I O =−12mA; V CC = 2.7 V V CC − 0.5V CC − 0.14-V I O =−12mA; V CC = 3.0 V V CC − 0.6V CC − 0.09-V I O =−24mA; V CC = 3.0 VV CC − 1.0V CC − 0.28-V V OLLOW-level output voltageV I =V IH or V ILI O =100µA;V CC =2.3V to 3.6 V -GND 0.20V I O =6mA; V CC = 2.3 V -0.070.40V I O =12mA; V CC = 2.3 V -0.150.70V I O =12mA; V CC = 2.7 V -0.140.40V I O =24mA; V CC = 3.0 V-0.270.55V I LI input leakage currentV I =V CC or GND;V CC =2.3V to 3.6 V -0.15µA I OZ3-state output OFF-state currentV I =V IH or V IL ;V O =V CC or GND;V CC =2.3V to 3.6 V-0.110µA[1]All typical values are measured at T amb =25°C .[2]Valid for data inputs of bushold parts.I CC quiescent supply currentV CC = 2.3V to 3.6 V;V I =V CC or GND; I O = 0A-0.240µA ∆I CC additional quiescent supply current given per data I/O pin with bushold V CC = 2.3 V to 3.6 V;V I =V CC − 0.6 V; I O =0A -150750µA I BHL bushold LOW sustaining current V CC = 2.3 V; V I = 0.7 V [2]45--µA V CC = 3.0 V; V I = 0.8 V [2]75150-µA I BHH bushold HIGH sustaining current V CC = 2.3 V; V I = 1.7 V [2]−45--µA V CC = 3.0 V; V I = 2.0 V [2]−75−175-µA I BHLO bushold LOW overdrive current V CC = 3.6 V [2]500--µA I BHHO bushold HIGH overdrive current V CC = 3.6 V[2]−500--µA C I input capacitance - 4.0-pF C I/Oinput/output capacitance-8.0-pFTable 7:Static characteristics …continuedAt recommended operating conditions; voltages are referenced to GND (ground = 0 V).Symbol ParameterConditionsMin Typ Max Unit11.Dynamic characteristics[1]All typical values are measured at T amb =25°C .[2]Typical values are measured at V CC = 2.5 V .[3]Typical values are measured at V CC = 3.3 V .[4]C PD is used to determine the dynamic power dissipation (P D in µW).P D = C PD ×V CC 2×f i ×N +∑(C L ×V CC 2×f o )where:f i = input frequency in MHz;f o = output frequency in MHz;C L =output load capacitance in pF;V CC =supply voltage in Volts;N =total load switching outputs;∑(C L ×V CC 2×f o )= sum of outputs.[5]The condition is V I = GND to V CC .Table 8:Dynamic characteristicsAt recommended operating conditions; voltages are referenced to GND (ground = 0 V); test circuit Figure 8.Symbol ParameterConditions Min Typ Max UnitT amb =−40°C to +85°C [1]t PHL , t PLHpropagation delay nAn to nBn;nBn to nAnsee Figure 6V CC = 2.3 V to 2.7 V [2] 1.0 2.0 3.7ns V CC = 3.0 V to 3.6 V [3]1.0 1.9 3.0ns V CC =2.7 V1.02.13.6ns t PZH , t PZL3-state output enable time nOE to nAn; nOE to nBnsee Figure 7V CC = 2.3 V to 2.7 V [2] 1.0 2.7 5.7ns V CC = 3.0 V to 3.6 V [3] 1.0 2.3 4.4ns V CC = 2.7 V1.0 3.0 5.4ns t PHZ , t PLZ3-state output disable time nOE to nAn; nOE to nBnsee Figure 7V CC = 2.3 V to 2.7 V [2] 1.0 2.2 5.2ns V CC = 3.0 V to 3.6 V [3] 1.0 2.8 4.1ns V CC = 2.7 V1.03.14.6ns C PDpower dissipation capacitance per bufferoutputs enabled [4][5]-29-pF outputs disabled[4][5]-5-pF12.WaveformsMeasurement points are given in Table 9.V OL and V OH are typical output voltage drop that occur with the output load.Fig 6.Input (nAn, nBn) to output (nBn, nAn) propagation delay times.Table 9:Measurement pointsSupply voltageInput Output V CC V M V M < 2.7 V 0.5× V CC 0.5× V CC ≥ 2.7 V1.5 V1.5 VMeasurement points are given in Table 10.V OL and V OH are typical output voltage drop that occur with the output load.Fig 7.3-state enable and disable times.Table 10:Measurement pointsSupply voltageInput Output V CC V M V M V XV Y< 2.7 V 0.5× V CC 0.5× V CC V OL + 0.15 V V OH − 0.15 V ≥ 2.7 V1.5 V1.5 VV OL + 0.3 VV OH − 0.3 V001aaa792nAn, nBn inputnBn, nAn outputt PHLt PLHGNDV IV MV MV OHV OL001aaa793t PLZt PHZoutputs disabledoutputs enabledV YV Xoutputs enabledQn output LOW-to-OFF OFF-to-LOWQn output HIGH-to-OFF OFF-to-HIGHnOE inputV IV OLV OHV CCV M V MGNDGNDt PZLt PZHV MV MTest data is given in T able 11.Definitions test circuit:R L = Load resistor.C L = Load capacitance includes jig and probe capacitance.R T = Termination resistance should be equal to Z o of pulse generator.Fig 8.Load circuitry for switching times.Table 11:Test dataSupply voltage Input Load V EXT V CC V I t r , t f C L R L t PLH , t PHL t PHZ , t PZH t PLZ , t PZL < 2.7 V V CC 2.0 ns 30 pF 500Ωopen GND 2× V CC 2.7 V − 3.6 V2.7 V2.5 ns50 pF500ΩopenGND2× V CCV EXTV CCV IV Omna616D.U.T.C LR TR LR LPULSE GENERATOR13.Package outlineFig 9.Package outline SSOP48.UNIT A 1A 2A 3b p c D (1)E (1)e H E L L p Q Z y w v θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IECJEDEC JEITAmm0.40.22.352.200.250.30.20.220.1316.0015.757.67.40.6351.40.2510.410.11.00.61.21.00.850.4080oo 0.180.1DIMENSIONS (mm are the original dimensions)Note1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.SOT370-199-12-2703-02-19(1)w Mb pD H EE Z ecv M AXAy4825MO-118241θAA 1A 2L pQdetail XL(A )3pin 1 index0510 mmscaleSSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mmSOT370-1Amax.2.8Fig 10.Package outline TSSOP48.UNIT A 1A 2A 3b p c D (1)E (2)e H E L L p Q Z y w v θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IECJEDEC JEITAmm0.150.050.20.180oo 0.1DIMENSIONS (mm are the original dimensions).Notes1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.SOT362-199-12-2703-02-19w MθAA 1A 2D L p Qdetail XE ZecLX(A )30.251244825ypin 1 indexb H 1.050.850.280.1712.612.46.26.00.510.258.37.90.500.350.80.40.080.80.4pEv M AATSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1Amax.1.20 2.5 5 mmscaleMO-15314.Revision historyTable 12:Revision historyDocument ID Release date Data sheet status Change notice Order number Supersedes74ALVC_ALVCH16245_320040512Product data-9397 750 1311774ALVCH16245_274ALVC16245_74ALVCH16245_1 Modifications:•The format of this data sheet has been redesigned to comply with the current presentationand information standard of Philips Semiconductors.•Section 1 “General description” updated.19980325Product specification-9397 750 03385-74ALVC16245_74ALVCH16245_174ALVCH16245_219980629Product specification-9397 750 0453874ALVCH16245_1 74ALVCH16245_119950102Preliminary---specification15.Data sheet status[1]Please consult the most recently issued data sheet before initiating or completing a design.[2]The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL .[3]For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.16.DefinitionsShort-form specification —The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device.These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.17.DisclaimersLife support —These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.Right to make changes —Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’),relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes noresponsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to theseproducts,and makes no representations or warranties that these products are free from patent,copyright,or mask work right infringement,unless otherwise specified.18.Contact informationFor additional information, please visit: For sales office addresses, send an email to: sales.addresses@Level Data sheet status [1]Product status [2][3]DefinitionI Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice.IIPreliminary dataQualificationThis data sheet contains data from the preliminary specification.Supplementary data will be published at a later date.Philips Semiconductors reserves the right to change the specification without notice,in order to improve the design and supply the best possible product.III Product data ProductionThis data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design,manufacturing and supply.Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).19.Contents1General description. . . . . . . . . . . . . . . . . . . . . . 12Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Quick reference data. . . . . . . . . . . . . . . . . . . . . 24Ordering information. . . . . . . . . . . . . . . . . . . . . 25Functional diagram . . . . . . . . . . . . . . . . . . . . . . 36Pinning information. . . . . . . . . . . . . . . . . . . . . . 56.1Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56.2Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 57Functional description . . . . . . . . . . . . . . . . . . . 77.1Function table. . . . . . . . . . . . . . . . . . . . . . . . . . 78Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 79Recommended operating conditions. . . . . . . . 810Static characteristics. . . . . . . . . . . . . . . . . . . . . 811Dynamic characteristics . . . . . . . . . . . . . . . . . 1012Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1113Package outline . . . . . . . . . . . . . . . . . . . . . . . . 1314Revision history. . . . . . . . . . . . . . . . . . . . . . . . 1515Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 1616Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1617Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1618Contact information . . . . . . . . . . . . . . . . . . . . 16© Koninklijke Philips Electronics N.V.2004All rights are reserved.Reproduction in whole or in part is prohibited without the priorwritten consent of the copyright owner.The information presented in this document doesnot form part of any quotation or contract,is believed to be accurate and reliable and maybe changed without notice.No liability will be accepted by the publisher for anyconsequence of its use.Publication thereof does not convey nor imply any license underpatent- or other industrial or intellectual property rights.Date of release: 12 May 2004Document order number: 9397 750 13117。

MC74LCX16245Low−Voltage CMOS16−Bit TransceiverWith 5 V−Tolerant Inputs and Outputs(3−State, Non−Inverting)The MC74LCX16245 is a high performance, non−inverting 16−bittransceiver operating from a 2.3 to 3.6 V supply. The device is byte controlled. Each byte has separate Output Enable inputs which can be tied together for full 16−bit operation. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A V I specification of 5.5 V allows MC74LCX16245 inputs to be safely driven from 5.0 V devices. The MC74LCX16245 is suitable for memory address driving and all TTL level bus oriented transceiver applications.The 4.5 ns maximum propagation delays support high performance applications. Current drive capability is 24 mA at both A and B ports. The Transmit/Receive (T/Rn) inputs determine the direction of data flow through the bidirectional transceiver. Transmit (active−HIGH) enables data from A ports to B ports; Receive (active−LOW) enables data from B to A ports. The Output Enable inputs (OEn), when HIGH, disable both A and B ports by placing them in a HIGH Z condition. Features•Designed for 2.3 to 3.6 V V CC Operation•4.5 ns Maximum t pd•5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic •Supports Live Insertion and Withdrawal•I OFF Specification Guarantees High Impedance When V CC = 0 V •LVTTL Compatible•LVCMOS Compatible•24 mA Balanced Output Sink and Source Capability•Near Zero Static Supply Current in All Three Logic States (20 m A) Substantially Reduces System Power Requirements •Latchup Performance Exceeds 500 mA•ESD Performance:Human Body Model >2000 V;Machine Model >200 V•These are Pb−Free Devices**For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet.ORDERING INFORMATIONFigure 1. Pinout: 48−Lead (Top View)481OE1T/R1472A0B0463A1B1454GND GND 445A2B2436A3B3427V CC V CC 418A4B4409A5B53910GND GND 3811A6B63712A7B73613A8B83514A9B93415GND GND 3316A10B103217A11B113118V CC V CC 3019A12B122920A13B132821GND GND 2722A14B142623A15B152524OE2T/R2Table 1. PIN NAMESPinsFunctionOEn T/Rn A0 − A15B0 − B15Output Enable Inputs Transmit/Receive InputsSide A Inputs or 3−State Outputs Side B Inputs or 3−State OutputsT/R1Figure 2. Logic DiagramTRUTH TABLEInputs OutputsInputsOutputsOE1T/R1OE2T/R2L L Bus B0:7 Data to Bus A0:7L L Bus B8:15 Data to Bus A8:15L H Bus A0:7 Data to Bus B0:7L H Bus A8:15 Data to Bus B8:15H XHigh Z State on A0:7, B0:7HXHigh Z State on A8:15, B8:15H =High Voltage Level L =Low Voltage Level Z =High Impedance StateX=High or Low Voltage Level and Transitions Are Acceptable; for I CC reasons, DO NOT FLOAT InputsORDERING INFORMATIONDevice Package Shipping†MC74LCX16245DT TSSOP−48*39 Units / RailMC74LCX16245DTG TSSOP−48*39 Units / RailMC74LCX16245DTR2TSSOP−48*2500 / Tape & ReelM74LCX16245DTR2G TSSOP−48*2500 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.*This package is inherently Pb−Free.MAXIMUM RATINGSSymbol Parameter Value Condition Unit V CC DC Supply Voltage−0.5 to +7.0V V I DC Input Voltage−0.5 ≤ V I≤ +7.0V V O DC Output Voltage−0.5 ≤ V O≤ +7.0Output in 3−State V−0.5 ≤ V O≤ V CC + 0.5Output in HIGH or LOW State. (Note 1)VI IK DC Input Diode Current−50V I < GND mAI OK DC Output Diode Current−50V O < GND mA+50V O > V CC mAI O DC Output Source/Sink Current±50mAI CC DC Supply Current Per Supply Pin±100mAI GND DC Ground Current Per Ground Pin±100mAT STG Storage Temperature Range−65 to +150°C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.1.I O absolute maximum rating must be observed.RECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Typ Max UnitV CC Supply Voltage OperatingData Retention Only 2.01.52.5,3.32.5,3.33.63.6VV I Input Voltage0 5.5VV O Output Voltage(HIGH or LOW State)(3−State)0V CC5.5VI OH HIGH Level Output Current V CC = 3.0 V − 3.6 VV CC = 2.7 V − 3.0 VV CC = 2.3 V − 2.7 V − 24− 12− 8mAI OL LOW Level Output Current V CC = 3.0 V − 3.6 VV CC = 2.7 V − 3.0 VV CC = 2.3 V − 2.7 V + 24+ 12+ 8mAT A Operating Free−Air Temperature−40+85°C D t/D V Input Transition Rise or Fall Rate, V IN from 0.8 V to 2.0 V, V CC = 3.0 V010ns/VDC ELECTRICAL CHARACTERISTICSSymbol Characteristic Condition T A = −40°C to +85°CUnit Min MaxV IH HIGH Level Input Voltage (Note 2) 2.3 V ≤ V CC≤ 2.7 V 1.7V2.7 V ≤ V CC≤3.6 V 2.0V IL LOW Level Input Voltage (Note 2) 2.3 V ≤ V CC≤ 2.7 V0.7V2.7 V ≤ V CC≤3.6 V0.8V OH HIGH Level Output Voltage 2.3 V ≤ V CC≤ 3.6 V; I OL = 100 m A V CC−0.2VV CC = 2.3 V; I OH = −8 mA 1.8V CC = 2.7 V; I OH = −12 mA 2.2V CC = 3.0 V; I OH = −18 mA 2.4V CC = 3.0 V; I OH = −24 mA 2.2 V OL LOW Level Output Voltage 2.3 V ≤ V CC≤ 3.6 V; I OL = 100 m A0.2VV CC = 2.3 V; I OL= 8 mA0.6V CC = 2.7 V; I OL= 12 mA0.4V CC = 3.0 V; I OL = 16 mA0.4V CC = 3.0 V; I OL = 24 mA0.55I I Input Leakage Current 2.3 V ≤ V CC≤ 3.6 V; 0 V ≤ V I≤ 5.5 V±5.0m AI OZ3−State Output Current 2.3 ≤ V CC≤ 3.6 V; 0V ≤ V O≤ 5.5 V;V I = V IH or V IL±5.0m AI OFF Power−Off Leakage Current V CC = 0 V; V I or V O = 5.5 V10m AI CC Quiescent Supply Current 2.3 ≤ V CC≤ 3.6 V; V I = GND or V CC20m A2.3 ≤ V CC≤3.6 V; 3.6 ≤ V I or V O≤ 5.5 V±20m AD I CC Increase in I CC per Input 2.3 ≤ V CC≤ 3.6 V; V IH = V CC − 0.6 V500m A2.These values of V I are used to test DC electrical characteristics only.AC CHARACTERISTICS t R = t F = 2.5 ns; R L = 500 WSymbol Parameter WaveformT A = −40°C to +85°CUnit V CC = 3.3 V ± 0.3 VC L = 50 pFV CC = 2.7 VC L = 50 pFV CC = 2.5 V ± 0.2 VC L = 30 pFMin Max Min Max Min Maxt PLH t PHL Propagation DelayInput to Output1 1.51.54.54.51.51.55.25.21.51.55.45.4nst PZH t PZL Output Enable Time toHigh and Low Level2 1.51.56.56.51.51.57.27.21.51.58.58.5nst PHZ t PLZ Output Disable Time FromHigh and Low Level2 1.51.56.46.41.51.56.96.91.51.57.77.7nst OSHL t OSLH Output−to−Output Skew(Note 3)1.01.0ns3.Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t OSHL) or LOW−to−HIGH (t OSLH); parameter guaranteed by design.DYNAMIC SWITCHING CHARACTERISTICSSymbol Characteristic ConditionT A = +25°CUnit Min Typ MaxV OLP Dynamic LOW Peak Voltage(Note 4)V CC = 3.3 V, C L = 50 pF, V IH = 3.3 V, V IL = 0 VV CC = 2.5 V, C L = 30 pF, V IH = 2.5 V, V IL = 0 V0.80.6VVV OLV Dynamic LOW Valley Voltage (Note 4)V CC = 3.3 V, C L = 50 pF, V IH = 3.3 V, V IL = 0 VV CC = 2.5 V, C L = 30 pF, V IH = 2.5 V, V IL = 0 V−0.8−0.6VV4.Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output ismeasured in the LOW state.CAPACITIVE CHARACTERISTICSSymbol Parameter Condition Typical UnitC IN Input Capacitance V CC = 3.3 V, V I = 0 V or V CC7pFC I/O Input/Output Capacitance V CC = 3.3 V, V I = 0 V or V CC8pFC PD Power Dissipation Capacitance10 MHz, V CC = 3.3 V, V I = 0 V or V CC20pFAn, Bn WAVEFORM 1 − PROPAGATION DELAYS t R = t F = 2.5 ns, 10% to 90%; f = 1 MHz; t W = 500 ns V CC0 VV OHV OLAn, BnBn, AnWAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMESt R = t F = 2.5 ns, 10% to 90%; f = 1 MHz; t W = 500 ns0 VOEn,T/RnAn, BnFigure 3. AC WaveformsV OH V HZ V OLV CCV LZ Table 2. AC WAVEFORMSSymbol V CC3.3 V ±0.3 V2.7 V 2.5 V +0.2 V Vmi 1.5 V 1.5 V V CC / 2Vmo 1.5 V 1.5 V V CC / 2V HZ V OL + 0.3 V V OL+ 0.3 V V OL + 0.15 V V LZV OH − 0.3 VV OH − 0.3 VV OH − 0.15 VOPEN V 6 V or V CC x 2GNDFigure 4. Test CircuitTable 3. TEST CIRCUITTESTSWITCH t PLH , t PHL Opent PZL , t PLZ6 V at V CC = 3.3 0.3 V 6 V at V CC = 2.5 0.2 VOpen Collector/Drain t PLH and t PHL 6 V t PZH , t PHZGNDC L = 50 pF at V CC = 3.3 0.3 V or equivalent (includes jig and probe capacitance)C L = 30 pF at V CC = 2.5 0.2 V or equivalent (includes jig and probe capacitance)R L = R 1 = 500 W or equivalentR T = Z OUT of pulse generator (typically 50 W )PACKAGE DIMENSIONSTSSOP−48DT SUFFIX CASE 1201−01ISSUE ADIM MIN MAX MIN MAX INCHESMILLIMETERS A 12.4012.600.4880.496B 6.00 6.200.2360.244C −−− 1.10−−−0.043D 0.050.150.0020.006F 0.500.750.0200.030G 0.50 BSC 0.0197 BSC H 0.37−−−0.015−−−J 0.090.200.0040.008J10.090.160.0040.006K 0.170.270.0070.011K10.170.230.0070.009L 7.958.250.3130.325M0 8 0 8 ____NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.5.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.6.DIMENSIONS A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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