TP2522_07中文资料
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-1.0
ID (amperess)
-0.1
TO-243AA (DC)
-0.01 -1
-10
VDS
-100
-1000 3
Thermal Resistance (normalized)
PD (watts)
ID (amperes)
TP2522
Saturation Characteristics
-2.0
-1.6
Capacitance vs. Drain-to-Source Voltage
200
f = 1MHz
150
100
CISS
50
0 0
CRSS
-10
-20
VDS (volts)
COSS
-30
-40
Switching Waveforms and Test Circuit
0V INPUT
-10V
10%
0V
OUTPUT VDD
t(ON)
td(ON)
tr
10%
90%
90% t(OFF)
td(OFF)
tF
90%
10%
PULSE GENERATOR
RGEN
INPUT
D.U.T. Output RL VDD
∆VGS(th) Change in VGS(th) with temperature
-
-
4.5 mV/OC VGS = VDS, ID= -1.0mA
IGSS
Gate body leakage
-
- -100
nA
VGS = ± 20V, VDS = 0V
IDSS
Zero gate voltage drain current
元器件交易网
TP2522
Thermal Characteristics
Package
I
I
Power Dissipation
D
D
(continuous)* (pulsed)
@ TA = 25OC
θjc
θja
IDR*
IDRM
(mA)
(A)
(W)
OC/W
OC/W
(mA)
(A)
-2.4
ID(ON)
min (A)
-0.75
General Description
This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermallyinduced secondary breakdown.
2
元器件交易网
Typical Performance Curves
Output Characteristics
-2.5
VGS = -10V
-8V
-2.0
ID (amperes)
-1.5
-6V
-1.0
-4V
-0.5
-3V
0 0
1.0
-10
-20
-30
-40
-50
VDS
Transconductance vs. Drain Current
-
-
1.7
%/OC VGS = -10V, ID = -200mA
GFS
Forward transconductance
100 250
-
mmho VDS = -25V, ID = -200mA
CISS
Input capacitance
-
75 125
VGS = 0V,
COSS
Common source output capacitance
Hale Waihona Puke -20 85pF
VDS = -25V,
CRSS
Reverse transfer capacitance
-
10 35
f = 1.0 MHz
td(ON) tr td(OFF) tf
Turn-ON delay time Rise time Turn-OFF delay time Fall time
-
-
10
Package Options
TO-243AA (SOT-89)
Die*
TP2522N8-G
TP2522ND
Pin Configuration
DRAIN
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage Drain-to-gate voltage Gate-to-source voltage
Applications
► Logic level interfaces – ideal for TTL and CMOS ► Solid state relays ► Battery operated systems ► Photo voltaic drives ► Analog switches ► General purpose line drivers ► Telecom switches
Ordering Information
BVDSS/BVDGS
(V)
RDS(ON)
max (Ω)
-220
12
-G indicates package is RoHS compliant (‘Green’) * MIL visual screening available.
VGS(th)
max (V)
-
-10
μA
VGS = 0V, VDS = Max Rating
-
-
-1.0
mA
VGS = 0V, VDS = 0.8 Max Rating, TA = 125°C
ID(ON)
ON-state drain current
-0.25 -0.7
-
-0.75 -2.1
-
A
VGS = -4.5V, VDS = -25V
VDS = -25V
0.8
GFS (siemens)
0.6
TA = -55°C
0.4
TA = 25°C TA = 125°C
0.2
0
0
-0.4
-0.8
-1.2
-1.6
-2.0
ID (amperes)
Maximum Rated Safe Operating Area
-10
TA = 25°C
TO-243AA (pulsed)
VGS = -10V, VDS = -25V
RDS(ON)
Static drain-to-source ON-State resistance
10 15 -
8.0 12
Ω
VGS = -4.5V, ID = -100mA
VGS = -10V, ID = -200mA
∆RDS(ON) Change in RDS(ON) with temperature
BVDSS BVDGS ±20V
Operating and storage temperature
-55°C to +150°C
Soldering temperature*
300°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.
* Distance of 1.6 mm from case for 10 seconds.
SOURCE DRAIN GATE
TO-243AA (SOT-89) (N8)
Product Marking
TP5CW W = Code for week sealed
TO-243AA (SOT-89) (N8)
Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
ID (amperess)
-0.1
TO-243AA (DC)
-0.01 -1
-10
VDS
-100
-1000 3
Thermal Resistance (normalized)
PD (watts)
ID (amperes)
TP2522
Saturation Characteristics
-2.0
-1.6
Capacitance vs. Drain-to-Source Voltage
200
f = 1MHz
150
100
CISS
50
0 0
CRSS
-10
-20
VDS (volts)
COSS
-30
-40
Switching Waveforms and Test Circuit
0V INPUT
-10V
10%
0V
OUTPUT VDD
t(ON)
td(ON)
tr
10%
90%
90% t(OFF)
td(OFF)
tF
90%
10%
PULSE GENERATOR
RGEN
INPUT
D.U.T. Output RL VDD
∆VGS(th) Change in VGS(th) with temperature
-
-
4.5 mV/OC VGS = VDS, ID= -1.0mA
IGSS
Gate body leakage
-
- -100
nA
VGS = ± 20V, VDS = 0V
IDSS
Zero gate voltage drain current
元器件交易网
TP2522
Thermal Characteristics
Package
I
I
Power Dissipation
D
D
(continuous)* (pulsed)
@ TA = 25OC
θjc
θja
IDR*
IDRM
(mA)
(A)
(W)
OC/W
OC/W
(mA)
(A)
-2.4
ID(ON)
min (A)
-0.75
General Description
This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermallyinduced secondary breakdown.
2
元器件交易网
Typical Performance Curves
Output Characteristics
-2.5
VGS = -10V
-8V
-2.0
ID (amperes)
-1.5
-6V
-1.0
-4V
-0.5
-3V
0 0
1.0
-10
-20
-30
-40
-50
VDS
Transconductance vs. Drain Current
-
-
1.7
%/OC VGS = -10V, ID = -200mA
GFS
Forward transconductance
100 250
-
mmho VDS = -25V, ID = -200mA
CISS
Input capacitance
-
75 125
VGS = 0V,
COSS
Common source output capacitance
Hale Waihona Puke -20 85pF
VDS = -25V,
CRSS
Reverse transfer capacitance
-
10 35
f = 1.0 MHz
td(ON) tr td(OFF) tf
Turn-ON delay time Rise time Turn-OFF delay time Fall time
-
-
10
Package Options
TO-243AA (SOT-89)
Die*
TP2522N8-G
TP2522ND
Pin Configuration
DRAIN
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage Drain-to-gate voltage Gate-to-source voltage
Applications
► Logic level interfaces – ideal for TTL and CMOS ► Solid state relays ► Battery operated systems ► Photo voltaic drives ► Analog switches ► General purpose line drivers ► Telecom switches
Ordering Information
BVDSS/BVDGS
(V)
RDS(ON)
max (Ω)
-220
12
-G indicates package is RoHS compliant (‘Green’) * MIL visual screening available.
VGS(th)
max (V)
-
-10
μA
VGS = 0V, VDS = Max Rating
-
-
-1.0
mA
VGS = 0V, VDS = 0.8 Max Rating, TA = 125°C
ID(ON)
ON-state drain current
-0.25 -0.7
-
-0.75 -2.1
-
A
VGS = -4.5V, VDS = -25V
VDS = -25V
0.8
GFS (siemens)
0.6
TA = -55°C
0.4
TA = 25°C TA = 125°C
0.2
0
0
-0.4
-0.8
-1.2
-1.6
-2.0
ID (amperes)
Maximum Rated Safe Operating Area
-10
TA = 25°C
TO-243AA (pulsed)
VGS = -10V, VDS = -25V
RDS(ON)
Static drain-to-source ON-State resistance
10 15 -
8.0 12
Ω
VGS = -4.5V, ID = -100mA
VGS = -10V, ID = -200mA
∆RDS(ON) Change in RDS(ON) with temperature
BVDSS BVDGS ±20V
Operating and storage temperature
-55°C to +150°C
Soldering temperature*
300°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.
* Distance of 1.6 mm from case for 10 seconds.
SOURCE DRAIN GATE
TO-243AA (SOT-89) (N8)
Product Marking
TP5CW W = Code for week sealed
TO-243AA (SOT-89) (N8)
Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
