SF2038B-2;中文规格书,Datasheet资料

NAND Flash MemoryMT29F4G08ABADAH4, MT29F4G08ABADAWP, MT29F4G08ABBDAH4, MT29F4G08ABBDAHC, MT29F4G16ABADAH4, MT29F4G16ABADAWP, MT29F4G16ABBDAH4, MT29F4G16ABBDAHC, MT29F8G08ADADAH4,MT29F8G08ADBDAH4, MT29F8G16ADADAH4, MT29F8G16ADBDAH4, MT29F16G08AJADAWPFeatures•Open NAND Flash Interface (ONFI) 1.0-compliant1•Single-level cell (SLC) technology •Organization–Page size x8: 2112 bytes (2048 + 64 bytes)–Page size x16: 1056 words (1024 + 32 words)–Block size: 64 pages (128K + 4K bytes)–Plane size: 2 planes x 2048 blocks per plane–Device size: 4Gb: 4096 blocks; 8Gb: 8192 blocks 16Gb: 16,384 blocks•Asynchronous I/O performance–t RC/t WC: 20ns (3.3V), 25ns (1.8V)•Array performance–Read page: 25µs 3–Program page: 200µs (TYP: 1.8V, 3.3V)3–Erase block: 700µs (TYP)•Command set: ONFI NAND Flash Protocol •Advanced command set–Program page cache mode4–Read page cache mode 4–One-time programmable (OTP) mode–Two-plane commands 4–Interleaved die (LUN) operations–Read unique ID–Block lock (1.8V only)–Internal data move•Operation status byte provides software method for detecting–Operation completion–Pass/fail condition–Write-protect status•Ready/Busy# (R/B#) signal provides a hardware method of detecting operation completion•WP# signal: Write protect entire device •First block (block address 00h) is valid when ship-ped from factory with ECC. For minimum required ECC, see Error Management.•Block 0 requires 1-bit ECC if PROGRAM/ERASE cy-cles are less than 1000•RESET (FFh) required as first command after pow-er-on•Alternate method of device initialization (Nand_In-it) after power up (contact factory)•Internal data move operations supported within the plane from which data is read•Quality and reliability–Data retention: 10 years–Endurance: 100,000 PROGRAM/ERASE cycles •Operating voltage range–V CC: 2.7–3.6V–V CC: 1.7–1.95V•Operating temperature:–Commercial: 0°C to +70°C–Industrial (IT): –40ºC to +85ºC•Package–48-pin TSOP type 1, CPL2–63-ball VFBGANotes: 1.The ONFI 1.0 specification is available at2.CPL = Center parting line.3.See Program and Erase Characteristics fort R_ECC and t PROG_ECC specifications.4.These commands supported only with ECCdisabled.Figure 78: TWO-PLANE BLOCK ERASERE#CE#ALECLE I/Ox R/B#WE#Figure 79: TWO-PLANE/MULTIPLE-DIE READ STATUS CycleCE#CLE ALE RE#I/Ox4Gb, 8Gb, 16Gb: x8, x16 NAND Flash MemoryTwo-Plane OperationsInterleaved Die (Multi-LUN) OperationsIn devices that have more than one die (LUN) per target, it is possible to improve per-formance by interleaving operations between the die (LUNs). An interleaved die (multi-LUN) operation is one that is issued to an idle die (LUN) (RDY = 1) while another die (LUN) is busy (RDY = 0).Interleaved die (multi-LUN) operations are prohibited following RESET (FFh), identifi-cation (90h, ECh, EDh), and configuration (EEh, EFh) operations until ARDY =1 for all of the die (LUNs) on the target.During an interleaved die (multi-LUN) operation, there are two methods to determine operation completion. The R/B# signal indicates when all of the die (LUNs) have finish-ed their operations. R/B# remains LOW while any die (LUN) is busy. When R/B# goes HIGH, all of the die (LUNs) are idle and the operations are complete. Alternatively, the READ STATUS ENHANCED (78h) command can report the status of each die (LUN) in-dividually.If a die (LUN) is performing a cache operation, like PROGRAM PAGE CACHE (80h-15h),then the die (LUN) is able to accept the data for another cache operation when status register bit 6 is 1. All operations, including cache operations, are complete on a die when status register bit 5 is 1.During and following interleaved die (multi-LUN) operations, the READ STATUS (70h)command is prohibited. Instead, use the READ STATUS ENHANCED (78h) command to monitor status. This command selects which die (LUN) will report status. When two-plane commands are used with interleaved die (multi-LUN) operations, the two-plane commands must also meet the requirements in Two-Plane Operations.See Command Definitions for the list of commands that can be issued while other die (LUNs) are busy.During an interleaved die (multi-LUN) operation that involves a PROGRAM series (80h-10h, 80h-15h) operation and a READ operation, the PROGRAM series operation must be issued before the READ series operation. The data from the READ series opera-tion must be output to the host before the next PROGRAM series operation is issued.This is because the 80h command clears the cache register contents of all cache regis-ters on all planes.4Gb, 8Gb, 16Gb: x8, x16 NAND Flash MemoryInterleaved Die (Multi-LUN) OperationsError ManagementEach NAND Flash die (LUN) is specified to have a minimum number of valid blocks(NVB) of the total available blocks. This means the die (LUNs) could have blocks thatare invalid when shipped from the factory. An invalid block is one that contains at leastone page that has more bad bits than can be corrected by the minimum required ECC.Additional blocks can develop with use. However, the total number of available blocksper die (LUN) will not fall below NVB during the endurance life of the product.Although NAND Flash memory devices could contain bad blocks, they can be usedquite reliably in systems that provide bad block management and error-correction algo-rithms. This type of software environment ensures data integrity.Internal circuitry isolates each block from other blocks, so the presence of a bad blockdoes not affect the operation of the rest of the NAND Flash array.NAND Flash devices are shipped from the factory erased. The factory identifies invalidblocks before shipping by attempting to program the bad block mark into every loca-tion in the first page of each invalid block. It may not be possible to program every loca-tion with the bad block mark. However, the first spare area location in each bad block isguaranteed to contain the bad block mark. This method is compliant with ONFI FactoryDefect Mapping requirements. See the following table for the first spare area locationand the bad block mark.System software should check the first spare area location on the first page of eachblock prior to performing any PROGRAM or ERASE operations on the NAND Flash de-vice. A bad block table can then be created, enabling system software to map aroundthese areas. Factory testing is performed under worst-case conditions. Because invalidblocks could be marginal, it may not be possible to recover this information if the blockis erased.Over time, some memory locations may fail to program or erase properly. In order toensure that data is stored properly over the life of the NAND Flash device, the followingprecautions are required:•Always check status after a PROGRAM or ERASE operation•Under typical conditions, use the minimum required ECC (see table below)•Use bad block management and wear-leveling algorithmsThe first block (physical block address 00h) for each CE# is guaranteed to be validwith ECC when shipped from the factory.Table 21: Error Management DetailsTable 21: Error Management Details (Continued)。

COLLECTOR SATURATION VOLTAGE : VCE(sat)[V]
1
Ta=25°C
1
IC/IB=20
10000
VCE=2V
COLLECTOR CURRENT : IC [mA]
1000
0.1
0.1
100
Ta=125°C 75°C 25°C -40°C
0.01
IC/IB=50 20 10
1 0.1
1
10
100
10 10
100 EMITTER CURRENT : IE[mA] Fig.8 Gain Bandwidth Product vs. Emitter Current
1000
100
COLLECTOR - BASE VOLTAGE : VCB [V] EMITTER - BASE VOLTAGE : VEB [V] Fig.7 Emitter Input Capacitance vs. Emitter-Base Voltage Collector Output Capacitance vs. Collector-Base Voltage
0.001 1 10 100 1000 10000 COLLECTOR CURRENT : IC[mA] Fig.5 Collector-Emitter Saturation Voltage vs. Collector Current ( ΙΙ )
1 0 0.5 1 1.5 BASE TO EMITTER VOLTAGE : VBE[V] Fig.6 Ground Emitter Propagation Characteristics
*1 Pw=10ms, Single Pulse *2 Each terminal mounted on a recommended land. *3 Mounted on a ceramic board. (40x40x0.7mm³)

Finisar Corporation October 6, 2005 Rev B
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FTLF8519F2xTL 2x5 Pin SFF Product Specification – October 2005
I.
Pin Descriptions
Product Specification
2.125 Gb/s RoHS Compliant Short Wavelength 2x5 SFF Transceiver
FTLF8519F2xTL
PRODUCT FEATURES Up to 2.125 Gb/s bi-directional data links Standard 2x5 pin SFF footprint (MSA compliant) 850nm Oxide VCSEL laser transmitter Duplex LC connector RoHS compliant and Lead Free Up to 500m on 50/125µm MMF, 300m on 62.5/125µm MMF Metal enclosure, for lower EMI Single 3.3V power supply Low power dissipation <750mW Industrial operating temperature range: -40°C to 85°C Finisar’s FTLF8519F2xTL Small Form Factor (SFF) transceivers comply with the 2x5 standard package defined by the Small Form Factor Multi-Sourcing Agreement (MSA)1. They are simultaneously compatible with Gigabit Ethernet as specified in IEEE Std 802.32 and Fibre Channel FC- PI-2 Rev. 7.03. They are RoHS compliant and lead-free per Directive 2002/95/EC4 and Finisar Application Note AN-2038. PRODUCT SELECTION APPLICATIONS 1.25 Gb/s 1000Base-SX Ethernet Dual Rate 1.063/2.125 Gb/s Fibre Channel

®1/6Table 1: Main Product CharacteristicsI F(AV) 2 x 30 A V RRM 170 V T j 175 °C V F (max)0.76 VSTPS60170CHIGH VOLTAGE POWER SCHOTTKY RECTIFIERREV. 1September 2005FEATURES AND BENEFITS■High junction temperature capability ■Low leakage current■Good trade off between leakage current and forward voltage drop ■Low thermal resistance ■High frequency operation ■Avalanche specificationDESCRIPTIONDual center tab Schottky rectifier suited for High Frequency Switched Mode Power Supplies.Packaged in TO-220AB, this device is intended for use to enhance the reliability of the application.Table 2: Order CodePart Number Marking STPS60170CTSTPS60170CTTable 3: Absolute Ratings (limiting values, per diode)Symbol ParameterValue Unit V RRM Repetitive peak reverse voltage 170V I F(RMS)RMS forward current 60A I F(AV)Average forward currentT c = 150 °C δ = 0.5Per diode Per device3060A I FSM Surge non repetitive forward current t p = 10 ms sinusoidal 270A P ARM Repetitive peak avalanche power t p = 1 µs T j = 25 °C17300W T stg Storage temperature range-65 to + 175°C T j Maximum operating junction temperature *175°C dV/dtCritical rate of rise of reverse voltage10000V/µs* : thermal runaway condition for a diode on its own heatsink dPtot dTj---------------1Rth j a –()-------------------------<STPS60170C2/6Table 4: Thermal Parameters Table 5: Static Electrical Characteristics (per diode)Pulse test:* tp = 5 ms, δ < 2%** tp = 380 µs, δ < 2%To evaluate the conduction losses use the following equation: P = 0.60 x I F(AV) + 0.053 I F 2(RMS)Symbol ParameterValue Unit R th(j-c)Junction to casePer diode Total 1.00.7°C/WR th(c)Coupling0.4When the diodes 1 and 2 are used simultaneously:∆ Tj(diode 1) = P(diode 1) x R th(j-c)(Per diode) + P(diode 2) x R th(c)Symbol ParameterTests conditions Min.Typ Max.Unit I R *Reverse leakage currentT j = 25 °C V R = V RRM35µA T j = 125 °C 835mAV F **Forward voltage dropT j = 25 °CI F = 30 A0.94VT j = 125 °C 0.720.76T j = 25 °C I F = 60 A0.97 1.05T j = 125 °C0.860.92STPS60170C3/6Figure 1: Average forward power dissipation versus average forward current (per diode)Figure 2: Average forward current versus ambient temperature (δ = 0.5, per diode)Figure 3: Normalized avalanche power derating versus pulse durationFigure 4: Normalized avalanche power derating versus junction temperatureFigure 5: Non repetitive surge peak forward current versus overload duration (maximum values, per diode)Figure 6: Relative variation of thermal impedance junction to case versus pulse durationTd =t /Tt pTd =t /Tt ptTd =t /Tt pSTPS60170C4/6Figure 7: Reverse leakage current versus reverse voltage applied (typical values, per diode)Figure 8: Junction capacitance versus reverse voltage applied (typical values, per diode)Figure 9: Forward voltage drop versus forward current (per diode, low level)Figure 10: Forward voltage drop versus forward current (per diode, high level)STPS60170C5/6Figure 11: TO-220AB Package Mechanical DataIn order to meet environmental requirements, ST offers these devices in ECOPACK® packages. Thesepackages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: .Table 6: Ordering Information■Epoxy meets UL94, V0■Cooling method: by conduction (C)■Recommended torque value: 0.55 Nm.■Maximum torque value: 0.7 Nm.Ordering type Marking Package Weight Base qtyDelivery mode STPS60170CTSTPS60170CTTO-220AB2.20 g50TubeTable 7: Revision HistoryDate RevisionDescription of Changes16-Sep-20051First issue.STPS60170CInformation furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronics.All other names are the property of their respective owners© 2005 STMicroelectronics - All rights reservedSTMicroelectronics group of companiesAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America6/6分销商库存信息: STMSTPS60170CT。