SI2303CDS中文资料

Vishay SiliconixSi2301CDSP-Channel 20-V (D-S) MOSFET FEATURES•Halogen-free Option Available•TrenchFET ® Power MOSFETAPPLICATIONS •Load SwitchMOSFET PRODUCT SUMMARYV DS (V)R DS(on) (Ω)I D (A)a Q g (Typ.)- 200.112 at V GS = - 4.5 V - 3.1 3.3 nC0.142 at V GS = - 2.5 V- 2.7Notes:a. Based on T C = 25 °C.b. Surface Mounted on 1" x 1" FR4 board.c. t = 5 s.d. Maximum under Steady State conditions is 175 °C/W.ABSOLUTE MAXIMUM RATINGS T A = 25°C, unless otherwise notedParameter Symbol Limit U nitDrain-Source Voltage V DS - 20VGate-Source Voltage V GS ± 8Continuous Drain Current (T J = 150 °C)T C = 25 °C I D- 3.1A T C = 70 °C - 2.5T A = 25 °C - 2.3b, c T A = 70 °C - 1.8b, cPulsed Drain Current I DM - 10Continuous Source-Drain Diode CurrentT C = 25 °C I S - 1.3T A = 25 °C - 0.72b, c Maximum Power Dissipation T C = 25 °C P D 1.6WT C = 70 °C 1.0T A = 25 °C 0.86b, c T A = 70 °C 0.55b, cOperating Junction and Storage T emperature Range T J , T stg - 55 to 150°C THERMAL RESISTANCE RATINGSParameter Symbol Typical Maximum UnitMaximum Junction-to-Ambient b, d ≤ 5 s R thJA 120145°C/WMaximum Junction-to-Foot (Drain)Steady State R thJF 6278Vishay SiliconixSi2301CDSNotes:a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.b. Guaranteed by design, not subject to production testing.Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.MOSFET SPECIFICATIONS T J = 25°C, unless otherwise notedParameter Symbol Test Conditions Min.Typ.Max.U nit StaticDrain-Source Breakdown Voltage V DS V DS = 0 V, I D = - 250 µA- 20VV DS Temperature Coefficient ΔV DS /T J I D = - 250 µA - 18mV/°C V GS(th) T emperature Coefficient ΔV GS(th)/T J 2.2Gate-Source Threshold Voltage V GS(th) V DS = V GS , I D = - 250 µA - 0.4- 1V Gate-Source LeakageI GSS V DS = 0 V , V GS = ± 8 V ± 100nA Zero Gate Voltage Drain Current I DSS V DS = - 20 V , V GS = 0 V - 1µA V DS = - 20 V, V GS = 0 V , T J = 55 °C- 10On-State Drain Current aI D(on) V DS ≤ - 5 V , V GS = - 4.5 V - 6A Drain-Source On-State Resistance aR DS(on) V GS = - 4.5 V, I D = - 2.8 A 0.0900.112ΩV GS = - 2.5 V, I D = - 2.0 A 0.1100.142Forward T ransconductance a g fsV DS = - 5 V , I D = - 2.8 A2.0SDynamic bInput Capacitance C iss V DS = - 10 V , V GS = 0 V , f = 1 MHz405pFOutput CapacitanceC oss 75Reverse Transfer Capacitance C rss 55Total Gate Charge Q g V DS = - 10 V , V GS = - 4.5 V , ID = - 3 A 5.510nC V DS = - 10 V , V GS = - 2.5 V , I D = - 3 A 3.36Gate-Source Charge Q gs 0.7Gate-Drain Charge Q gd 1.3Gate Resistance R g f = 1 MHz6.0ΩTurn-On Delay Time t d(on) V DD = - 10 V, R L = 10 ΩI D = - 1 A, V GEN = - 4.5 V , R G = 1 Ω1120ns Rise Timet r 3560Turn-Off Delay Time t d(off) 3050Fall Timet f1020Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I S T C = 25 °C- 1.3A Pulse Diode Forward Current a I SM - 10Body Diode VoltageV SD I S = - 0.7 A- 0.8- 1.2V Body Diode Reverse Recovery Time t rr I F = - 3.0 A, dI/dt = 100 A/µs, T J = 25 °C3050ns Body Diode Reverse Recovery Charge Q rr 2550nC Reverse Recovery Fall Time t a 15nsReverse Recovery Rise Timet b15Output CharacteristicsOn-Resistance vs. Drain Current and Gate VoltageTransfer CharacteristicsCapacitanceOn-Resistance vs. Junction TemperatureThreshold VoltageSingle Pulse PowerVishay SiliconixSi2301CDSTYPICAL CHARACTERISTICS 25°C, unless otherwise notedVishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see /ppg?68741.Normalized Thermal Transient Impedance, Junction-to-FootDisclaimer Legal Disclaimer NoticeVishayAll product specifications and data are subject to change without notice.Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product.Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products.No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay.The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.Product names and markings noted herein may be trademarks of their respective owners.元器件交易网。

Document Revision 1.3
元器件交易网
24 VDD_PLL 25 GND_PLL 26 PLL_TEST 27 OSC1 28 OSC2
After reset, this pin becomes output. It output the inverse of SHTD_N. P 5V power for PLL P Ground for PLL I PLL test mode control I Crystal oscillator input O Crystal oscillator output
to new section
Date
August 29, 2002 August 01, 2002
July 03, 2002
PL-2303 Product Datasheet
-2-
Document Revision 1.3
元器件交易网
Release Date: July, 2002
This pin is input during reset. Pull high with a 220K resistor to indicate the heavy load USB device (500mA). Pull down with a 220K resistor to indicate the light load USB device 100mA).
TXD
1
DTR_N 2
RTS_N 3
VDD_232 4
RXD
5
RI_N
6
GND
7
VDD
8
DSR_N 9
DCD_N
10
CTS_N
11

Phase-Aligned Clock MultiplierCY2303Features•3-multiplier configuration (1x, 2x, 4x Ref)•10 MHz to 166.67 MHz operating range (reference input from 10 MHz to 41.67 MHz)•Phase Alignment •80 ps typical period jitter •Output enable pin •3.3V operation •5V Tolerant input•8-pin 150-mil SOIC package•Commercial and Industrial Temperature availableFunctional DescriptionThe CY2303 is a 3 output 3.3V phase-aligned system clock designed to distribute high-speed clocks in PC, workstation,datacom, telecom, and other high-performance applications.The part allows user to obtain 1x, 2x, and 4x Ref output frequencies on respective output pins.The CY2303 has an on-chip PLL, which locks to an input clock presented on the REFIN pin. The PLL feedback is internally connected to the REF output. The input-to-output skew is guaranteed to be less than ±200 ps, and output-to-output skew is guaranteed to be less than 200 ps.Multiple CY2303 devices can accept the same input clock and distribute it in a system. In this case, the skew between the outputs of two devices is guaranteed to be less than 400 ps. The CY2303 is available in commercial and industrial temper-ature ranges.Selector GuidePart Number OutputsInput Frequency Range Output Frequency Range SpecificsCY2303SC,CY2303SXC 310 MHz–41.67 MHz 10 MHz–166.67 MHzCommercial TemperatureCY2303SI,CY2303SXI310 MHz–41.67 MHz10 MHz–166.67 MHz Industrial TemperaturePLLREFREFx2REFx4OEx1x2x412345876REF GND REFIN N/CV DD OE REFx2Top View8-pin SOICREFx4REFINBlock DiagramPin ConfigurationFBKMaximum RatingsSupply Voltage to Ground Potential...............–0.5V to +7.0V DC Input Voltage (Except Ref)...............–0.5V to V DD + 0.5V DC Input Voltage REFIN........................................–0.5 to 7V Storage Temperature .................................–65°C to +150°C Junction Temperature................................................. 150°C Static Discharge Voltage(per MIL-STD-883, Method 3015).............................>2000VPin DescriptionPin Signal[1]Description1REF REF output (1x Reference input)2GND Ground3REFIN Input reference frequency, 5V tolerant input4N/C No Connect5REFx22x Reference input6REFx44x Reference input7VDD 3.3V Supply8OE Output Enable (weak pull-up)Operating Conditions for CY2303SC Commercial Temperature DevicesParameter Description Min.Max.Unit V DD Supply Voltage 3.0 3.6V T A Operating Temperature (Ambient Temperature)070°C C L Load Capacitance, Fout < 133.33 MHz–18pFLoad Capacitance, 133.33 MHz < Fout < 166.67 MHz–12pF C IN Input Capacitance–7pF t PU Power-up time for all VDDs to reach minimum specified voltage (powerramps must be monotonic)0.0550msElectrical Characteristics for CY2303SC Commercial Temperature Devices Parameter Description Test Conditions Min.Max.Unit V IL Input LOW Voltage–0.8V V IH Input HIGH Voltage 2.0–V I IL Input LOW Current V IN = 0V–100µA I IH Input HIGH Current V IN = V DD–50µA V OL Output LOW Voltage[2]I OL = 8 mA –0.4V V OH Output HIGH Voltage[2]I OH = –8 mA 2.4–V I DD Supply Current Unloaded outputs, REFIN = 41.67 MHz–45mAUnloaded outputs, REFIN = 25 MHz –32mAUnloaded outputs, REFIN = 10 MHz–18mA Notes:1.Weak pull-down on all outputs.2.Parameter is guaranteed by design and characterization. It is not 100% tested in production.Switching Characteristics for CY2303SC Commercial Temperature DevicesParameter Name Test Conditions Min.Typ.Max.Unit 1/t1Output Frequency18-pF load10–133.33MHz12-pF load––166.67MHz Duty Cycle[3] = t2÷ t1Measured at V DD/2405060% t3Rise Time[3]Measured between 0.8V and 2.0V–– 1.20ns t4Fall Time[3]Measured between 0.8V and 2.0V–– 1.20nst5Output to Output Skew on risingedges[3]All outputs equally loadedMeasured at V DD/2––200pst6Delay, REFIN Rising Edge toREF Rising Edge[3]Measured at V DD/2 from REFIN to anyoutput––±200pst7Device to Device Skew[3]Measured at V DD/2 on the REF pin of thedevice (pin 1)––400pst J Period Jitter[3]Measured at Fout < 133.33 MHz, loadedoutputs, 18-pF load–80±175pst LOCK PLL Lock Time[3]Stable power supply, valid clocks presentedon REFIN–– 1.0ms Operating Conditions for CY2303SI Industrial Temperature DevicesParameter Description Min.Max.Unit V DD Supply Voltage 3.0 3.6VT A Operating Temperature (Ambient Temperature)–4085°CC L Load Capacitance, Fout <133.33 MHz–15pFLoad Capacitance, 133.33 MHz < Fout < 166.67 MHz,–10pFt PU Power-up time for all VDDs to reach minimum specified voltage(power ramps must be monotonic)0.0550ms Electrical Characteristics for CY2303SI Industrial Temperature DevicesParameter Description Test Conditions Min.Max.Unit V IL Input LOW Voltage–0.8VV IH Input HIGH Voltage 2.0–VI IL Input LOW Current V IN = 0V–100µAI IH Input HIGH Current V IN = V DD–50µAV OL Output LOW Voltage[2]I OL = 8 mA –0.4VV OH Output HIGH Voltage[2]I OH = –8 mA 2.4–VI DD Supply Current Unloaded outputs, REFIN = 41.67 MHz–48mAUnloaded outputs, REFIN = 25 MHz–35mAUnloaded outputs, REFIN = 10 MHz–20mA Note:3.All parameters are specified with loaded outputs.Switching Characteristics for CY2303SI Industrial Temperature DevicesParameter NameTest ConditionsMin.Typ.Max.Unit 1/t 1Output Frequency 15-pF load 10–133.33MHz 10-pF load ––166.67MHz Duty Cycle [3] = t 2 ÷ t 1Measured at V DD /2405060%t 3Rise Time [3]Measured between 0.8V and 2.0V –– 1.20ns t 4Fall Time [3]Measured between 0.8V and 2.0V–– 1.20ns t 5Output to Output Skew on rising edges [3]All outputs equally loaded Measured at V DD /2––200ps t 6Delay, REFIN Rising Edge to REF Rising Edge [3]Measured at V DD /2 from REFIN to any output––±200ps t 7Device to Device Skew [3]Measured at V DD /2 on the REF pin of the device (pin 1)––400ps t J Period Jitter [3]Measured at Fout < 133.33 MHz, loaded outputs, 15-pF load–80±175ps t LOCKPLL Lock Time [3]Stable power supply, valid clocks presented on REFIN––1.0msSwitching WaveformsDuty Cycle Timingt 1t 2V DD /2All Outputs Rise/Fall TimeOUTPUTt 33.3V 0V0.8V 2.0V 2.0V 0.8Vt 4Output-Output SkewV DD /2t 5OUTPUTOUTPUTV DD /2Test CircuitsSwitching Waveforms (continued)Input-Output Propagation DelayV DD /2t 6INPUTFBKV DD /2V DD /2t 7FBK, Device 1FBK, Device 2Device-Device SkewV DD /20.1µFV DDCLK OUT C LOADOUTPUTSGNDTest Circuit # 1Ordering InformationOrdering Code Package TypeOperating RangeCY2303SC 8-Pin 150-mil SOICCommercial CY2303SCT 8-Pin 150-mil SOIC - Tape and Reel Commercial CY2303SI 8-Pin 150-mil SOICIndustrial CY2303SIT 8-Pin 150-mil SOIC - Tape and ReelIndustrialLead-freeCY2303SXC 8-Pin 150-mil SOICCommercial CY2303SXCT 8-Pin 150-mil SOIC - Tape and Reel Commercial CY2303SXI 8-Pin 150-mil SOICIndustrial CY2303SXIT8-Pin 150-mil SOIC - Tape and ReelIndustrialPackage DiagramDocument #: 38-07249 Rev. *B Page 6 of 7Document Title: CY2303 Phase-Aligned Clock Multiplier Document Number: 38-07249REV.ECN NO.IssueDateOrig. ofChange Description of Change**11051401/07/02SZV Change from Spec number: 38-01036 to 38-07249*A12185212/14/02RBI Power up requirements added to Operating Conditions Information *B390413See ECN RGL Added Lead-free devicesAdded typical values for jitter。

si2303场效应管参数si2303场效应管是一种常用的场效应管型号，具有一系列特定的参数。

本文将从不同角度介绍si2303场效应管的参数。

我们来了解一下si2303场效应管的特点。

si2303场效应管是一种N 沟道MOS场效应管，具有低电压驱动、低电阻、低静态功耗、高速开关等特点。

它适用于低压驱动的应用，如电源管理、电池充放电保护、DC-DC转换等。

si2303场效应管的第一个参数是最大漏极电流（Id）。

最大漏极电流是指场效应管能够承受的最大漏极电流的数值。

在设计电路时，需要根据实际需要选择合适的场效应管，使其能够承受电路中的最大漏极电流。

第二个参数是漏极-源极电压（Vds）。

漏极-源极电压是指场效应管的漏极与源极之间的电压差。

在工作时，需要注意控制漏极-源极电压的大小，以保证场效应管正常工作。

第三个参数是漏极-源极电阻（Rds(on)）。

漏极-源极电阻是指场效应管在导通状态下的电阻大小。

电阻越小，场效应管的导通能力越好。

在选择场效应管时，需要根据具体应用要求，选择合适的漏极-源极电阻。

第四个参数是栅极-源极电压（Vgs）。

栅极-源极电压是指场效应管的栅极与源极之间的电压差。

在控制场效应管的导通与截止时，需要根据具体的电路设计要求，选择合适的栅极-源极电压。

第五个参数是栅极-源极电容（Ciss）。

栅极-源极电容是指场效应管的栅极与源极之间的电容大小。

在高频应用中，栅极-源极电容会对电路的性能产生影响，需要合理设计电路，以降低电容对信号传输的影响。

第六个参数是栅极-漏极电容（Crss）。

栅极-漏极电容是指场效应管的栅极与漏极之间的电容大小。

在高频应用中，栅极-漏极电容也会对电路的性能产生影响，需要合理设计电路，以降低电容对信号传输的影响。

第七个参数是栅极-源极电流（Igs）。

栅极-源极电流是指场效应管的栅极与源极之间的电流大小。

在工作时，需要注意控制栅极-源极电流的大小，以保证场效应管正常工作。