PT6312 - VFD

步步高DVD机故障检修一、解码部分原理机心读取的信号经过ＵＤＥ接口电路送入解码芯片（ＺＩＶＡ－４．１）进行解码，还原出模拟的视频信号和数字音频信号，其中模拟视频信号（亮度Ｙ、色度Ｃ及复合视频信号ＣＶＢＳ）直接从解码芯片ＺＩＶＡ－４．１输出。

数字音频信号送入至ＣＳ４２２８进行音频Ｄ／Ａ转换后输出５．１声道模拟信号，经低通滤波后输出。

解码电路正常工作所必须具备的三个基本条件是：电源、时钟和复位信号。

同时还需要存储器来存储一定的信息，ＦＬＡＳＨＲＯＭ是快闪存储器，主要用来存储开机画面、ＯＳＤ字符显示、工作微码指令以及用户信息等，ＳＤＲＡＭ是随机存储器，主要用来存储解码前后的数据，起缓冲作用。

二、三无故障检修三无即无图、无声、无屏显，检修流程见图１，维修实例如下（故障现象均为“三无”）。

［例１］ＡＢ９０５型机分析与检修：开机后，检测开关电源各输出电压全部正常，判断故障在解码系统部分。

首先对解码板工作电压进行检测，发现＋３．３Ｖ输出端只有２．５Ｖ的电压输出，由于该电压是由＋５Ｖ经ＶＤ２１４、ＶＤ２１５降压后得到，分别测量两个二极管上的导通压降，ＶＤ２１４为０．８Ｖ左右，正常；而ＶＤ２１５上为１．５Ｖ左右，怀疑二极管ＶＤ２１５损坏，用同型号二极管１Ｎ５４０１代替后，通电试机，故障排除。

［例２］ＡＢ９０５Ｋ型机分析与检修：通电后观察显示屏灯丝发亮，机心托盘有复位动作，因此可以判断故障在解码电路。

首先检查解码部分的供电＋５Ｖ、＋３．３Ｖ、＋２．５Ｖ均正常，再检查时钟电路，其电路图如图２所示。

检测晶体Ｘ２０４两端有２．３Ｖ左右电压，而Ｕ２１８第{4}脚电压只有１．５Ｖ左右，怀疑六非门反相器７４ＨＣＵ０４不良，当用手触摸该ＩＣ时感觉特别发烫，更换７４ＨＣＵ０４后故障排除。

［例３］ＡＢ９０７Ｋ型机分析与检修：开机观察显示屏灯丝发亮，经检测开关电源输出电压正常，解码电路工作电压也正常。

用示波器检测２７ＭＨｚ时钟电路，发现ＶＣＫ无波形输出，怀疑该电路未起振。

PT6311VFD Driver/Controller IC DESCRIPTIONPT6311 is a Vacuum Fluorescent Display (VFD)Controller driven on a 1/8 to 1/16 duty factor housed in52-pin plastic QFP Package. Twelve segment outputlines, 8 grid output lines, 8 segment/grid output drivelines, one display memory, control circuit, key scancircuit are all incorporated into a single chip to build ahighly reliable peripheral device for a single chip microcomputer. Serial data is fed to PT6311 via a three-lineserial interface.APPLICATIONS•Microcomputer Peripheral DevicesFEATURES• CMOS Technology•Low Power Consumption•Key Scanning (12 x 4 matrix)•Multiple Display Modes: (12 segments, 16 digits to20 segments, 8 digits)•8-Step Dimming Circuitry•LED Ports Provide (5 channels, 20mA max.)•4- Bits General Purpose Input Ports Provided•Serial Interface for Clock, Data Input, Data Output,Strobe Pins•No External Resistors Needed for Driver Outputs•Available in 52pins QFP and LQFP BLOCK DIAGRAMDINDOUTCLKSTBVDDOSCSW1SW2SW3SW4LED1LED2LED3LED4LED5SerialDataInterfaceGeneralInputRegisterLEDDriverControlDisplay MemoryTiming GeneratorKey Matrix MemoryK1K2K3K4VDD GND VEEDimming CircuitSegment Driver /Grid Driver /Key Scan OutputGridDriverSG1/KS1SG2/KS2SG3/KS3SG4/KS4SG5/KS5SG6/KS6SG7/KS7SG8/KS8SG9/KS9SG10/KS10SG11/KS11SG12/KS12SG13/GR16SG14/GR15SG15/GR14SG16/GR13SG17/GR12SG18/GR11SG19/GR10SG20/GR9GR1GR2GR3GR4GR5GR6GR7GR8OSC12-GRID X 16-SEGMENT VFD APPLICATION CIRCUITORDER INFORMATIONValid Part Number Package Type Top Code PT6311 52 Pins, QFP PT6311PT6311-LQ 52 Pins, LQFP PT6311-LQ PIN CONFIGURATIONPIN DESCRIPTIONPin Name I/O Description Pin No. SW1 to SW4I General Purpose Input Pins1 to 4 DOUT O Data Output Pin (N-Channel, Open-Drain)This pin outputs serial data at the falling edge of the shiftclock (starting from the lower bit). 5DIN I Data Input PinThis pin inputs serial data at the rising edge of the shiftclock (starting from the lower bit).6NC - No Connection7 CLK I Clock Input PinThis pin reads serial data at the rising edge and outputsdata at the falling edge. 8STB I Serial Interface Strobe PinThe data input after the STB has fallen is processed as acommand. When this in is “HIGH”, CLK is ignored. 9K1 to K4 I Key Data Input PinsThe data inputted to these pins is latched at the end of thedisplay cycle.10 to 13 VDD - Logic Power Supply14, 33, 45 SG1/KS1 to SG12/KS12 OHigh-Voltage Segment Output PinsAlso acts as the Key Source.15 to 26SG20/GR9 to SG19/GR10SG18/GR11 to SG13/GR16O High-Voltage Segment/Grid Output Pins36 to 35 32 to 27VEE - Pull-Down Level 34 GR1 to GR8 O High-Voltage Grid Output Pins 44 to 37 LED1 to LED5 O LED Output Pin50 to 46GND - Ground Pin51 OSC I Oscillator Input PinA resistor is connected to this pin to determine theoscillation frequency. 52INPUT/OUTPUT CONFIGURATIONSThe schematic diagrams of the input and output circuits of the logic section are shown below: OUTPUT PINS: SGn/GRnINPUT PINS: DIN, CLK, STBINPUT PINS: SW1 TO SW4, K1 TO K4OUTPUT PIN: DOUTOUTPUT PINS: LED1 TO LED5FUNCTION DESCRIPTIONCOMMANDSCommands determine the display mode and status of PT6311. A command is the first byte (b0 to b7) inputted to PT6311 via the DIN Pin after STB Pin has changed from “HIGH” to “LOW” State. If for some reason the STB Pin is set to “HIGH” while data or commands are being transmitted, the serial communication is initialized, and the data/commands being transmitted are considered invalid.COMMAND 1: DISPLAY MODE SETTING COMMANDSPT6311 provides 9 display mode settings as shown in the diagram below: As stated earlier a command is the first one byte (b0 to b7) transmitted to PT6311 via the DIN Pin when STB is “LOW”. However, for these commands, the bits 5 to 6 (b4 to b5) are ignored, bits 7 & 8 (b6 to b7) are given a value of “0”.The Display Mode Setting Commands determine the number of segments and grids to be used (1/8 to 1/16 duty, 20 to 12 segments). When these commands are executed, the display is forcibly turned off, the key scanning stops. A display command “ON” must be executed in order to resume display. If the same mode setting is selected, no command execution is take place, therefore, nothing happens.When Power is turned “ON”, the 16-digit, 12-segment modes is selected.Not Relevant Display Mode Settings:20segments80XXX:digits,1000: 9 digits, 19 segmentssegments1001:18digits,10segments171010:digits,1116digits,segments121011:15segmentsdigits,131100:14segments14digits,1101:digits,segments13151110:12segments161111:digits,DISPLAY MODE AND RAM ADDRESSData transmitted from an external device to PT6311 via the serial interface are stored in the Display RAM and areassigned addresses. The RAM Addresses of PT6311 are given below in 8 bits unit.SG1 SG4 SG5 SG8 SG9 SG12 SG13 SG16 SG17 SG20DIG1 00HL 00HU 01HL 01HU 02HL03HL 03HU 04HL 04HU 05HLDIG2DIG3 06HL 06HU 07HL 07HU 08HLDIG4 09HL 09HU 0AHL 0AHU 0BHLDIG5 0CHL 0CHU 0DHL 0DHU 0EHLDIG6 0FHL 0FHU 10HL 10HU 11HLDIG7 12HL 12HU 13HL 13HU 14HLDIG8 15HL 15HU 16HL 16HU 17HLDIG9 18HL 18HU 19HL 19HU 1AHLDIG10 1BHL 1BHU 1CHL 1CHU 1DHLDIG11 1EHL 1EHU 1FHL 1FHU 20HLDIG12 21HL 21HU 22HL 22HU 23HLDIG13 24HL 24HU 25HL 25HU 26HL27HL 27HU 28HL 28HU 29HLDIG14DIG15 2AHL 2AHU 2BHL 2BHU 2CHLDIG16 2DHL 2DHU 2EHL 2EHU 2FHLb0 b3 b4 b7xxHL xxHULower 4 bits Higher 4 bitsCOMMAND 2: DATA SETTING COMMANDSThe Data Setting Commands executes the Data Write or Data Read Modes for PT6311. The data Setting Command, the bits 5 and 6 (b4, b5) are ignored, bit 7 (b6) is given the value of “1” while bit 8 (b7) is given the value of “0”. Please refer to the diagram below.When power is turned ON, bit 4 to bit 1 (b3 to b0) are given the value of “0”.DisplayModetoPortLEDtoDataKeySWDataMode):(DisplayModeSettingsbeenhasWrittenDataAddressafterModeOperationNormal0:Mode1:TestPT6311 KEY MATRIX & KEY INPUT DATA STORAGE RAMPT6311 Key Matrix consists of 12 x 4 arrays as shown below:K1K2K3K4S G 1/K S1S G 2/K S 2S G 3/K S 3S G 4/K S 4S G 5/K S 5S G 6/K S 6S G 7/K S 7S G 8/K S 8S G 9/K S 9S G 10/K S 10S G 11/K S 11S G 12/K S 12Each data inputted by each key are stored as follows. They are read by a READ Command, starting from the last significant bit. When the most significant bit of the data (SG12, b7) has been read, the least significant bit of the next data (SG1, b0) is read.K1…………………K4 K1…………………K4ReadingSequence SG1/KS1 SG2/KS2 SG3/KS3 SG4/KS4 SG5/KS5 SG6/KS6 SG7/KS7 SG8/KS8SG9/KS9 SG10/KS10 SG11/KS11 SG12/KS12b0………………….b3 b4………………….b7LED DISPLAYPT6311 provides 5 LED Display Terminals, namely LED1 to LED5. Data is written to the LED Port starting from the least significant bit (b0) of the port using a WRITE Command. Each bit starting from the least significant (b0) activates a specific LED Display Terminal -- b0 corresponds LED1 Display, b1 activates LED2 and so forth. Since there are only 5 LED display terminals, bits 6 to 8 (b5 ~ b7) are not used and therefore ignored. This means that b5 to b7 does NOT in anyway activate any LED Display, they are totally ignored.When a bit (b0 ~ b4) in the LED Port is “0”, the corresponding LED is ON. Conversely, when the bit is “1”, the LED Display is turned OFF. For example, Bit 1 (as designated by b0) has the value of “0”, then this means that LED1 is ON. It must be noted that when power is turned ON, bit 5 to bit 1 (b4 to b0) are given the value of “1”. Please refer to the diagrams below:SWITCH DATAPT6311 provides 4 Switch Inputs, namely: SW1 to SW4. SW Data is read starting from the least significant bit (b0) using a READ Command. Each bit starting from the least significant (b0) corresponds to a specific Switch Input -- b0 corresponds SW1, b1 to SW2 and so forth. Since there are only 4 Switch Inputs, Bits 5 to 8 (b4 to 7) are given the value of “0”. Please refer to the diagram below.LED1LED2LED3LED4LED5SW1 SW2 SW3 SW4COMMAND 3: ADDRESS SETTING COMMANDSAddress Setting Commands are used to set the address of the display memory. The address is considered valid if it has a value of “00H” to “2FH”. If the address is set to 30H or higher, the data is ignored until a valid address is set. When power is turned ON, the address is set at “00H”.Please refer to the diagram below .width =1/16 width = 2/16 width =4/16 width = 10/16 width – 11/16 width =12/16 width =13/16 width = 14/16 0: Display Off (Key Scan Continues) 1: Display OnSCANNING AND DISPLAY TIMINGThe Key Scanning and display timing diagram is given below. One cycle of key scanning consists of 2 frames. The data of the 12 x 4 matrix is stored in the RAM.SERIAL COMMUNICATION FORMATThe following diagram shows the PT6311 serial communication format. The DOUT Pin is an N-channel, open-drain output pin; therefore, it is highly recommended that an external pull-up resistor (1 K Ω to 10 K Ω) must be connected to DOUT.STBDINCLKSTB DIN CLKDOUTb0b1b2b6b712378Data Read Command is setReception (Data/Command Write)Transmission (Data Read)where: twait (waiting time) > 1µsIt must be noted that when the data is read, the waiting time (twait) between the rising of the eighth clock that has set the command and the falling of the first clock that has read the data is greater or equal to 1µs.SWITCHING CHARACTERISTIC WAVEFORMPT6311 Switching Characteristics Waveform is given below.OSCSTBCLKDINDOUTSn/Gnwhere:fosc = Oscillation Frequency PW CLK (Clock Pulse Width)≥400ns PW STB (Strobe Pulse Width)≥1µs t CLK-STB (Clock - Strobe Time)≥1µs t setup (Data Setup Time)≥100ns t hold (Data Hold Time)≥100ns t TZH1 (Segment Rise Time)≤2µs (VDD=5V) t TZH1 (Segment Rise Time)≤4µs (VDD=3.3V) t TZH2 (Grid Rise Time)≤0.5µs (VDD=5V) t TZH2 (Grid Rise Time)≤1.2µs (VDD=3.3V) t THZ (Segment & Grid Fall Time)≤150µs t PZL (Propagation Delay Time)≤100nst PLZ (Propagation Delay Time)≤400ns (VDD=5V)t PLZ (Propagation Delay Time)≤600ns (VDD=3.3V)APPLICATIONSDisplay memories are updated by incrementing addresses. Please refer to the following diagram.where: Command 1: Display Mode Setting Command Command 2: Data Setting Command Command 3: Address Setting CommandData 1 to n : Transfer Display Data (48 Bytes max.) Command 4: Display Control CommandSTBCLK DINThe following diagram shows the waveforms when updating specific addresses.STBCLK DINwhere: Command 2: Data Setting Command Command 3: Address Setting Command Data: Display DataCommand 2Command 3DataCommand 3DataINITIALSETTINGMAINLOOPNotes:1. Command 1: Display Mode Commands2. Command 2: Data Setting Commands3. Command 3: Address Setting Commands4. Command 4: Display Control Commands5. When IC power is applied for the first time, the contents of the Display RAM are not defined; thus, it is strongly suggested that the contents of theDisplay RAM must be cleared during the initial setting.ABSOLUTE MAXIMUM RATINGS(Unless otherwise stated, Ta=25℃, GND=0V)Parameter Symbol Ratings Unit Logic supply voltage VDD -0.3 to +7 VDriver supply voltage VEE VDD +0.3 to VDD -40 VLogic input voltage VI -0.3 to VDD +0.3 V VFD driver output voltage VO VEE -0.3 to VDD +0.3 VLED driver output current IOLED +25 mAOscillation frequency fosc 3M(Max.) HzOperating temperature Topr -40 to +85 ℃Storage temperature Tstg -65 to +150 ℃VFD driver output current IOVFD-40 (Grid)-15 (Segment)mARECOMMENDED OPERATING RANGE(Unless otherwise stated, Ta=25℃, GND=0V)Parameter Symbol Min. Typ. Max. Unit Logic supply voltage VDD 3 5 5.5 VHigh-Level input voltage VIH 0.7VDD - VDD VLow-Level input voltage VIL 0 - 0.3VDD VDriver supply voltage VEE VDD -35 - 0 V POWER SUPPLY SEQUENCENote: The power on/off sequence suggestion:Applications must observe the following sequence when turning the power on or off.•At power on: First turn on the logic system power (VDD), and then turn on the driver power (VEE).•At power off: First turn off the driver power (VEE), and then turn off the logic system power (VDD).ELECTRICAL CHARACTERISTICS(Unless otherwise stated, VDD=5V, GND=0V, VEE=VDD-35 V, Ta=25℃)Parameter Symbol Test Condition Min. Typ. Max. UnitHigh-Level output voltage VOHLED IOHLED=-1mALED1 to LED50.9VDD - - VLow-Level output voltage VOLLED IOLLED=+20mALED1 to LED5- - 1 VLow-Level output voltage VOLDOUT DOUT, IOLDOUT=4mA - - 0.4 VHigh-Level output current IOHSG VO=VDD -2VSG1 to SG12-3 - - mAHigh-Level output current IOHGRVO=VDD -2V,GR1 to GR8,SG13/GR16 to SG20/GR9-15 - - mAHigh-Level input voltage VIH - 0.7VDD - - V Low-Level input voltage VIL - - - 0.3VDD V Oscillation frequency fosc R=56KΩ 350500650KHz Input current II VI=VDD or GND - - ±1 μA Dynamic current consumption IDDdyn Under no load Display OFF - - 5 mA (Unless otherwise stated, VDD=3.3V, GND=0V, VEE=VDD-35 V, Ta=25℃)Parameter Symbol Test Condition Min. Typ. Max. UnitHigh-Level output voltage VOHLED IOHLED = -1mALED1 to LED50.9VDD - - VLow-Level output voltage VOLLED IOLLED = +20mALED1 to LED5- - 1 VLow-Level output voltage VOLDOUT DOUT, IOLDOUT = 4mA - - 0.4 VHigh-Level output current IOHSG VO = VDD -2VSG1 to SG12-1.5 - - mAHigh-Level output current IOHGRVO = VDD -2VGR1 to GR8,SG13/GR16 to SG20/GR9-6 - - mAHigh-Level input voltage VIH - 0.7VDD - - V Low-Level input voltage VIL - - - 0.2VDD V Oscillation frequency fosc R = 56 KΩ 350500650KHz Input current II VI = VDD or GND - - ±1 μA Dynamic current consumption IDDdyn Under no load Display OFF - - 3 mAPACKAGE INFORMATION52 PINS, QFP (BODY SIZE: 14MM X 14MM, PITCH=1.00MM)SymbolDimensions (MM)Min. Nom. Max.A - - 3.15 A1 0.00 - 0.25 A2 1.90 - 2.90 b 0.29 0.35 0.41 c 0.11 - 0.23 D 17.20 BSC D1 14.00 BSC E 17.20 BSC E1 14.00 BSC e 1.00 BSC θ0° - 8° L 0.65 - 1.05 L1 1.60 REFNote: Refer to JEDEC MS-022 BD52 PINS, LQFPSymbol Dimensions (MM) Min. Nom. Max.A - - 1.60A1 0.05 - 0.15A2 1.35 1.40 1.45b 0.35 - 0.50c 0.09 - 0.20D 16.00 BSCD1 14.00 BSCE 16.00 BSCE1 14.00 BSCe 1.00 BSCθ0° 3.5° 7° L 0.70 0.85 1.00L1 1.30 REFNote: Refer to JEDEC MS-026IMPORTANT NOTICEPrinceton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time.PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied.Princeton Technology Corp.2F, 233-1, Baociao Road,Sindian, Taipei 23145, TaiwanTel: 886-2-66296288Fax: 886-2-29174598。

VFD的实现原理和驱动设计单片机音响技术网2008/2/21VFD 的简单介绍VFD 是指真空荧光显示器，是Vacuum Fluorescent Display 的缩写，利用电子撞击玻璃基板上的荧光粉而发光，通过VFD上面的各个亮点的组合一起发亮来显示字符，数字，特定的图标等等。

由于VFD的显示，清晰明亮低工耗等特点被广泛用于家用电器，仪器设备，自动动化设备等上面，用来显示数字信息如温度，字符信息如：名称和一些标记指示信息。

有关VFD的硬件结构，工作原理，在网上有很多的介绍，在官方网站可以很容易的找到非常准确的介绍。

VFD原理及使用请在本站下载DVD视盘机的VFD显示典型硬件电路VFD的硬件电路可根据VFD屏的SPEC了解其需要驱动的段，位，选择相应的驱动IC，常用的包括PT6312，PT6311，PT6311相对驱动的段，位多些，可连接的按键也多些。

驱动电路的外围元件参数参照PT6311，PT6312的SPEC即可，需要注意的是，6312，6311有很多品牌均可通用，不同品牌的驱动注意其振荡电阻阻值的差异，其余基本相同，另外在电路半设计中驱动电压+5V的去藕电容尽量靠近IC，驱动数据线（DATA，STB，CLK）各连接一个101瓷片到地，保证IC，数据线不受干扰或减轻干扰。

VFD显示屏的供电VFD显示屏的供电包括交流~3V3灯丝电压和驱动芯片需要的-21V~-27V以及+5V，上图是典型的变压器次级供电处理电路。

还有一种方法是用直流逆变得到或者使用开关电源，现在市场上很多专门的DVD开关电源，满足DVD解码板以及VFD 显示的电源要求，电源组包括：+5V，±12V，-21V，~3V3，有些还带常用集成功放的电源，使用他们也非常方便。

笔者设计的TOPAV-2008开发平台，其VFD供电采用了直流逆变交流的方式，结构非常简洁，使用方便，详细可到单片机音响技术网了解。

VFD 的软件控制驱动设计前面说过VFD用途广泛，所以就非常有必要搞清楚如何通过软件去驱动它了，怎样让VFD显示我们要显示的内容，这就是一个程序员要思考的问题了，也是本文的目力所在。

液晶8脚贴片元器件参数大集合4532 内含P沟道、N沟道MOS管各一，高压板用（30V 4.7A；30V 4.5A）4532M 内含P沟道、N沟道MOS管各一，高压板用（30V 4.5A；30V 4.5A）9916H 18V 35A 50W 小贴片9960GM 8脚贴片，高压板用。

AF4502CS 内含P沟道、N沟道MOS管各一，高压板用（30V 8.4A；30V 6.8A） AO4403 30V 6.1A 单P沟道 8脚贴片AO4404 30V 8.5A 单N沟道 8脚贴片AO4405 30V 6A 3W 单P沟道8脚贴片AO4406 30V，11.5A，单N沟道，8脚贴片AO4407 30V 12A 3W 单P沟道，8脚贴片AO4407 30V 12A 3W 单P沟道，8脚贴片AO4408 30V 12A 单N沟道 8脚贴片AO4409(30V15A-P) 30V 15A P沟道场效应 8脚贴片AO4410 30V 18A 单N沟道 8脚贴片AO4411 30V 8A 3W P沟道场效应，8脚贴片AO4413 30V 15A 3W 单P沟道，8脚贴片AO4413 30V 15A 3W 单P沟道，8脚贴片AO4414 30V，8.5A，3W 单N沟道，8脚贴片AO4418 30V 11.5A N沟道 8脚贴片AO4422 30V 11A N沟道 8脚贴片AO4423 30V 15A 3.1W 单P沟道，8脚贴片AO4425 38V 14A P沟道8脚贴片AO4431 30V,8A P沟道。

高压板用MOS，贴片8脚AO4600 内含P沟道、N沟道MOS管各一，高压板用（30V 6.9A；30V 5A）AO4606 内含P沟道、N沟道MOS管各一，高压板用（30V 6.9A；30V 6A）AO4607 内含P沟道、N沟道MOS管各一，高压板用AO4828 60V 4.5A 双N沟道 8脚贴片AOD405 30V，18A，P 高压板MOS管贴片AOD408 30V，18A，N 高压板MOS管贴片AOD409 60V 26/18A P 高压板MOS管贴片AOD409 60V 26/18A P 高压板MOS管贴片AOD420 30V，10A，N 高压板MOS管贴片AOD442 60V，38/27A，N 高压板MOS管贴片AOD442 60V，38/27A，N 高压板MOS管贴片AOD444 60V，12A，N 高压板MOS管贴片AOP600 内含P、N沟道各1，30V 7.5A、30V 4.5A。

For assistance or to order , call (800) 531-5782Power Trends, Inc. 27715 Diehl Road, Warrenville, IL 60555 (800) 531-5782 Fax: (630) 393-6902 /powertrendsPACKAGING INFORMATIONOrderable DeviceStatus (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball FinishMSL Peak Temp (3)PT6311N NRND SIP MOD ULE EBD 1212TBD Call TI Level-1-215C-UNLIM PT6312N NRND SIP MOD ULE EBD 1212TBD Call TI Level-1-215C-UNLIM PT6312R NRND SIP MOD ULE EBE 1212TBD Call TI Level-1-215C-UNLIM PT6313ANRNDSIP MOD ULEEBA1212Pb-Free (RoHS)Call TIN /A for Pkg Type(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined 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