SN74LV166ADGVRE4中文资料

PACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)SN74F161AD ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74F161ADE4ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74F161ADG4ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74F161ADR ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74F161ADRE4ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74F161ADRG4ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74F161AN ACTIVE PDIP N1625Pb-Free(RoHS)CU NIPDAU N/A for Pkg Type SN74F161AN3OBSOLETE PDIP N16TBD Call TI Call TISN74F161ANE4ACTIVE PDIP N1625Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeSN74F161ANSR ACTIVE SO NS162000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74F161ANSRE4ACTIVE SO NS162000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74F161ANSRG4ACTIVE SO NS162000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS),Pb-Free(RoHS Exempt),or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free(RoHS Exempt):This component has a RoHS exemption for either1)lead-based flip-chip solder bumps used between the die and package,or2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free(RoHS compatible)as defined above.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.TAPE AND REEL INFORMATION*All dimensions are nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74F161ADR SOIC D 162500330.016.4 6.510.3 2.18.016.0Q1SN74F161ANSRSONS162000330.016.48.210.52.512.016.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) SN74F161ADR SOIC D162500333.2345.928.6SN74F161ANSR SO NS162000367.0367.038.0IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary 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FEATURESV CCA V CCBBGNDADBV PACKAGE(TOP VIEW)DCK PACKAGE(TOP VIEW)V CCA V CCBBAV CCBDRL PACKAGE(TOP VIEW)See mechanical drawings for dimensions.DIRDIRYZP PACKAGE(BOTTOM VIEW)V CCAAV CCBBGND DIR DESCRIPTION/ORDERING INFORMATIONWITH CONFIGURABLE VOLTAGE TRANSLATION AND3-STATE OUTPUTSSCES515H–DECEMBER2003–REVISED JANUARY2007•Available in the Texas Instruments•Max Data RatesNanoFree™Package–420Mbps(3.3-V to5-V Translation)•Fully Configurable Dual-Rail Design Allows–210Mbps(Translate to3.3V) Each Port to Operate Over the Full1.65-V to–140Mbps(Translate to2.5V)5.5-V Power-Supply Range–75Mbps(Translate to1.8V)•V CC Isolation Feature–If Either V CC Input Is at•Latch-Up Performance Exceeds100mA Per GND,Both Ports Are in the High-ImpedanceJESD78,Class IIState•ESD Protection Exceeds JESD22•DIR Input Circuit Referenced to V CCA–2000-V Human-Body Model(A114-A)•Low Power Consumption,4-µA Max I CC–200-V Machine Model(A115-A)•±24-mA Output Drive at3.3V–1000-V Charged-Device Model(C101)•I off Supports Partial-Power-Down ModeOperationThis single-bit noninverting bus transceiver uses two separate configurable power-supply rails.The A port is designed to track V CCA.V CCA accepts any supply voltage from1.65V to5.5V.The B port is designed to track V CCB.V CCB accepts any supply voltage from1.65V to5.5V.This allows for universal low-voltage bidirectional translation between any of the1.8-V,2.5-V,3.3-V,and5-V voltage nodes.ORDERING INFORMATIONT A PACKAGE(1)ORDERABLE PART NUMBER TOP-SIDE MARKING(2)NanoFree™–WCSP(DSBGA)Reel of3000SN74LVC1T45YZPR___TA_0.23-mm Large Bump–YZP(Pb-free)Reel of3000SN74LVC1T45DBVRSOT(SOT-23)–DBV CT1_Reel of250SN74LVC1T45DBVT–40°C to85°CReel of3000SN74LVC1T45DCKRSOT(SC-70)–DCKReel of250SN74LVC1T45DCKT TA_SOT(SOT-533)–DRL Reel of4000SN74LVC1T45DRLR(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at/sc/package.(2)DBV/DCK/DRL:The actual top-side marking has one additional character that designates the assembly/test site.YZP:The actual top-side marking has three preceding characters to denote year,month,and sequence code,and one following character to designate the assembly/test site.Pin1identifier indicates solder-bump composition(1=SnPb,•=Pb-free).Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.NanoFree is a trademark of Texas Instruments.PRODUCTION DATA information is current as of publication date.Copyright©2003–2007,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.DESCRIPTION/ORDERING INFORMATION (CONTINUED)BDIRAV CCA V CCBWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007The SN74LVC1T45is designed for asynchronous communication between two data buses.The logic levels of the direction-control (DIR)input activate either the B-port outputs or the A-port outputs.The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated.The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess I CC and I CCZ .The SN74LVC1T45is designed so that the DIR input is powered by V CCA .This device is fully specified for partial-power-down applications using I off .The I off circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.The V CC isolation feature ensures that if either V CC input is at GND,then both ports are in the high-impedance state.NanoFree™package technology is a major breakthrough in IC packaging concepts,using the die as the package.FUNCTION TABLE (1)INPUT OPERATION DIR L B data to A bus HA data toB bus(1)Input circuits of the data I/Os always are active.LOGIC DIAGRAM (POSITIVE LOGIC)2Submit Documentation FeedbackAbsolute Maximum Ratings (1)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over operating free-air temperature range (unless otherwise noted)MINMAX UNIT V CCA Supply voltage range –0.5 6.5V V CCB V I Input voltage range (2)–0.5 6.5V V O Voltage range applied to any output in the high-impedance or power-off state (2)–0.5 6.5V A port –0.5V CCA +0.5V O Voltage range applied to any output in the high or low state (2)(3)V B port –0.5V CCB +0.5I IK Input clamp current V I <0–50mA I OK Output clamp current V O <0–50mA I OContinuous output current±50mA Continuous current through V CC or GND±100mADBV package165DCK package 259θJAPackage thermal impedance (4)°C/W DRL package 142YZP package123T stg Storage temperature range–65150°C (1)Stresses beyond those listed under "absolute maximum ratings"may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.(3)The value of V CC is provided in the recommended operating conditions table.(4)The package thermal impedance is calculated in accordance with JESD 51-7.3Submit Documentation FeedbackRecommended Operating Conditions (1)(2)(3)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007V CCIV CCOMIN MAX UNIT V CCA 1.65 5.5Supply voltageVV CCB1.655.51.65V to 1.95VV CCI ×0.652.3V to 2.7V 1.7High-level V IHData inputs (4)Vinput voltage3V to 3.6V 24.5V to5.5V V CCI ×0.71.65V to 1.95VV CCI ×0.352.3V to 2.7V 0.7Low-level V ILData inputs (4)V input voltage3V to 3.6V 0.84.5V to5.5V V CCI ×0.31.65V to 1.95VV CCA ×0.652.3V to 2.7V 1.7High-level DIRV IHVinput voltage(referenced to V CCA )(5)3V to 3.6V 24.5V to5.5V V CCA ×0.71.65V to 1.95VV CCA ×0.352.3V to 2.7V 0.7Low-level DIRV ILV input voltage (referenced to V CCA )(5)3V to 3.6V 0.84.5V to5.5VV CCA ×0.3V I Input voltage 0 5.5V V OOutput voltageV CCOV 1.65V to 1.95V–42.3V to 2.7V –8I OHHigh-level output currentmA 3V to 3.6V –244.5V to 5.5V –321.65V to 1.95V42.3V to 2.7V 8I OLLow-level output currentmA 3V to 3.6V 244.5V to 5.5V321.65V to 1.95V202.3V to 2.7V 20Data inputsInput transition ∆t/∆v3V to 3.6V 10ns/V rise or fall rate4.5V to5.5V5Control inputs1.65V to 5.5V5T A Operating free-air temperature–4085°C (1)V CCI is the V CC associated with the input port.(2)V CCO is the V CC associated with the output port.(3)All unused data inputs of the device must be held at V CCI or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs ,literature number SCBA004.(4)For V CCI values not specified in the data sheet,V IH min =V CCI ×0.7V,V IL max =V CCI ×0.3V.(5)For V CCI values not specified in the data sheet,V IH min =V CCA ×0.7V,V IL max =V CCA ×0.3V.4Submit Documentation FeedbackElectrical Characteristics (1)(2)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range (unless otherwise noted)T A =25°C –40°C to 85°C PARAMETERTEST CONDITIONS V CCA V CCB UNITMINTYPMAXMIN MAXV CCO I OH =–100µA1.65V to 4.5V1.65V to 4.5V–0.1I OH =–4mA 1.65V 1.65V 1.2V OHV I =V IHVI OH =–8mA 2.3V 2.3V 1.9I OH =–24mA 3V 3V 2.4I OH =–32mA 4.5V 4.5V 3.8I OL =100µA 1.65V to 4.5V1.65V to 4.5V0.1I OL =4mA1.65V 1.65V 0.45V OLI OL =8mA V I =V IL 2.3V 2.3V 0.3V I OL =24mA 3V 3V 0.55I OL =32mA4.5V 4.5V 0.55I I DIR V I =V CCA or GND 1.65V to5.5V1.65V to 5.5V ±1±2µA A port 0V 0to 5.5V ±1±2I off V I or V O =0to 5.5V µA B port 0to 5.5V 0V ±1±2A or B I OZV O =V CCO or GND1.65V to 5.5V 1.65V to 5.5V ±1±2µA port1.65V to 5.5V1.65V to 5.5V3I CCAV I =V CCI or GND,I O =05.5V 0V 2µA 0V 5.5V -21.65V to 5.5V1.65V to 5.5V3I CCBV I =V CCI or GND,I O =05.5V 0V -2µA 0V5.5V 2I CCA +I CCB V I =V CCI or GND,I O =0 1.65V to 5.5V1.65V to 5.5V4µA (see Table 1)A port at V CCA –0.6V,A port50DIR at V CCA ,B port =open ∆I CCA3V to 5.5V3V to 5.5VµA DIR at V CCA –0.6V,DIRB port =open,50A port at V CCA or GNDB port at V CCB –0.6V,∆I CCB B port DIR at GND,3V to 5.5V 3V to 5.5V 50µA A port =openC i DIR V I =V CCA or GND 3.3V 3.3V 2.5pF A or B C io V O =V CCA/B or GND3.3V3.3V6pFport(1)V CCO is the V CC associated with the output port.(2)V CCI is the V CC associated with the input port.5Submit Documentation FeedbackSwitching CharacteristicsSwitching CharacteristicsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range,V CCA =1.8V ±0.15V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 317.7 2.210.3 1.78.3 1.47.2A B ns t PHL 2.814.3 2.28.5 1.87.1 1.77t PLH 317.7 2.316 2.115.5 1.915.1B A ns t PHL 2.814.3 2.112.9212.6 1.812.2t PHZ 5.219.4 4.818.5 4.718.4 5.117.1DIR A ns t PLZ 2.310.5 2.110.5 2.410.7 3.110.9t PHZ 7.421.9 4.911.5 4.610.3 2.88.2DIR B ns t PLZ 4.216 3.79.2 3.38.4 2.46.4t PZH (1)33.725.223.921.5DIR A ns t PZL (1)36.224.422.920.4t PZH (1)28.220.81918.1DIRBns t PZL (1)33.72725.524.1(1)The enable time is a calculated value,derived using the formula shown in the enable times section.over recommended operating free-air temperature range,V CCA =2.5V ±0.2V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 2.316 1.58.5 1.3 6.4 1.1 5.1A B ns t PHL 2.112.9 1.47.5 1.3 5.40.9 4.6t PLH 2.210.3 1.58.5 1.4817.5B A ns t PHL 2.28.5 1.47.5 1.370.9 6.2t PHZ 38.1 3.18.1 2.88.1 3.28.1DIR A ns t PLZ 1.3 5.9 1.3 5.9 1.3 5.91 5.8t PHZ 6.523.7 4.111.4 3.910.2 2.47.1DIR B ns t PLZ 3.918.9 3.29.6 2.88.4 1.85.3t PZH (1)29.218.116.412.8DIR A ns t PZL (1)32.218.917.213.3t PZH (1)21.914.412.310.9DIRBns t PZL (1)2115.613.512.7(1)The enable time is a calculated value,derived using the formula shown in the enable times section.6Submit Documentation FeedbackSwitching CharacteristicsSwitching CharacteristicsOperating CharacteristicsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range,V CCA =3.3V ±0.3V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAXMIN MAX MIN MAX t PLH 2.115.5 1.480.7 5.80.7 4.4A B ns t PHL 212.6 1.370.850.74t PLH 1.78.3 1.3 6.40.7 5.80.6 5.4B A ns t PHL 1.87.1 1.3 5.40.850.7 4.5t PHZ 2.97.337.3 2.87.3 3.47.3DIR A ns t PLZ 1.8 5.6 1.6 5.6 2.2 5.7 2.2 5.7t PHZ 5.420.5 3.910.1 2.98.8 2.4 6.8DIR B ns t PLZ 3.314.5 2.97.8 2.47.1 1.74.9t PZH (1)22.814.212.910.3DIR A ns t PZL (1)27.615.513.811.3t PZH (1)21.113.611.510.1DIRBns t PZL (1)19.914.312.311.3(1)The enable time is a calculated value,derived using the formula shown in the enable times section.over recommended operating free-air temperature range,V CCA =5V ±0.5V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 1.915.117.50.6 5.40.5 3.9A B ns t PHL 1.812.20.9 6.20.7 4.50.5 3.5t PLH 1.47.21 5.10.7 4.40.5 3.9B A ns t PHL 1.770.9 4.60.740.5 3.5t PHZ 2.1 5.4 2.2 5.4 2.2 5.5 2.2 5.4DIR A ns t PLZ 0.9 3.81 3.81 3.70.9 3.7t PHZ 4.820.2 2.59.818.5 2.5 6.5DIR B ns t PLZ 4.214.8 2.57.4 2.57 1.64.5t PZH (1)2212.511.48.4DIR A ns t PZL (1)27.214.412.510t PZH (1)18.911.39.17.6DIRBns t PZL (1)17.611.6108.6(1)The enable time is a calculated value,derived using the formula shown in the enable times section.T A =25°CV CCA =V CCA =V CCA =V CCA =TEST V CCB =1.8VV CCB =2.5VV CCB =3.3VV CCB =5VPARAMETERUNITCONDITIONS TYP TYP TYP TYP A-port input,B-port output C L =0pF,3444C pdA(1)f =10MHz,pF B-port input,A-port output 18192021t r =t f =1ns A-port input,B-port output C L =0pF,18192021C pdB (1)f =10MHz,pF B-port input,A-port output3444t r =t f =1ns(1)Power dissipation capacitance per transceiver7Submit Documentation FeedbackPower-Up ConsiderationsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007A proper power-up sequence always should be followed to avoid excessive supply current,bus contention,oscillations,or other anomalies.To guard against such power-up problems,take the following precautions:1.Connect ground before any supply voltage is applied.2.Power up V CCA .3.V CCB can be ramped up along with or after V CCA .Table 1.Typical Total Static Power Consumption (I CCA +I CCB )V CCAV CCB UNIT0V 1.8V 2.5V 3.3V 5V 0V 0<1<1<1<11.8V <1<2<2<222.5V <1<2<2<2<2µA 3.3V <1<2<2<2<25V<12<2<2<28Submit Documentation FeedbackTYPICAL CHARACTERISTICSt P H L − n sC L − pF105101520253035t P L H− n s C L − pF5101520253035t P H L− n sC L − pF5101520253035t P L H − n sC L − pFWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =1.8VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =1.8V9Submit Documentation Feedback5101520253035t P H L − n sC L − pF5t P L H − n sC L − pFt P H L− n s C L − pF12345678910t P L H − n sC L − pFWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =2.5VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =2.5V10Submit Documentation Feedbackt P H L − n sC L − pFt P L H − n sC L − pFt P H L− n s C L − pFt P L H − n s C L − pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =3.3VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =3.3Vt P H L− n s C L − pFt P L H − n s C L − pFt P H L − n sC L − pFt P L H − n sC L − pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =5VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =5VPARAMETER MEASUREMENT INFORMATIONV OH V OLLOAD CIRCUIT × V CCOOpenOutput Control (low-level enabling)Output Waveform 1S1 at 2 × V CCO (see Note B)Output Waveform 2S1 at GND (see Note B)0 V0 VV CCI0 VV CCAV CCOVOLTAGE WAVEFORMS PROPAGATION DELAY TIMESVOLTAGE WAVEFORMS PULSE DURATIONVOLTAGE WAVEFORMS ENABLE AND DISABLE TIMESInputt pd t PLZ /t PZL t PHZ /t PZHOpen 2 × V CCO GNDTEST S1NOTES: A.C L includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, Z O = 50 Ω, dv/dt ≥ 1 V/ns.D.The outputs are measured one at a time, with one transition per measurement.E.t PLZ and t PHZ are the same as t dis .F.t PZL and t PZH are the same as t en .G.t PLH and t PHL are the same as t pd .H.V CCI is the V CC associated with the input port.I.V CCO is the V CC associated with the output port.J.All parameters and waveforms are not applicable to all devices.1.8 V ± 0.15 V2.5 V ± 0.2 V3.3 V ± 0.3 V 5 V ± 0.5 V2 k Ω2 k Ω2 k Ω2 k ΩV CCO R L 0.15 V 0.15 V 0.3 V 0.3 VV TP C L 15 pF 15 pF 15 pF 15 pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 1.Load Circuit and Voltage WaveformsAPPLICATION INFORMATIONSYSTEM-1SYSTEM-2SN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 2shows an example of the SN74LVC1T45being used in a unidirectional logic level-shifting application.PIN NAME FUNCTION DESCRIPTION1V CCA V CC1SYSTEM-1supply voltage (1.65V to 5.5V)2GND GND Device GND3A OUT Output level depends on V CC1voltage.4B IN Input threshold value depends on V CC2voltage.5DIR DIR GND (low level)determines B-port to A-port direction.6V CCBV CC2SYSTEM-2supply voltage (1.65V to 5.5V)Figure 2.Unidirectional Logic Level-Shifting ApplicationAPPLICATION INFORMATIONSYSTEM-1SYSTEM-2Enable TimesSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 3shows the SN74LVC1T45being used in a bidirectional logic level-shifting application.Since the SN74LVC1T45does not have an output-enable (OE)pin,the system designer should take precautions to avoid bus contention between SYSTEM-1and SYSTEM-2when changing directions.The following table shows data transmission from SYSTEM-1to SYSTEM-2and then from SYSTEM-2to SYSTEM-1.STATE DIR CTRLI/O-1I/O-2DESCRIPTION1H Out In SYSTEM-1data to SYSTEM-2SYSTEM-2is getting ready to send data to SYSTEM-1.I/O-1and I/O-2are disabled.The 2H Hi-Z Hi-Z bus-line state depends on pullup or pulldown.(1)DIR bit is flipped.I/O-1and I/O-2still are disabled.The bus-line state depends on pullup or 3L Hi-Z Hi-Z pulldown.(1)4LOutInSYSTEM-2data to SYSTEM-1(1)SYSTEM-1and SYSTEM-2must use the same conditions,i.e.,both pullup or both pulldown.Figure 3.Bidirectional Logic Level-Shifting ApplicationCalculate the enable times for the SN74LVC1T45using the following formulas:•t PZH (DIR to A)=t PLZ (DIR to B)+t PLH (B to A)•t PZL (DIR to A)=t PHZ (DIR to B)+t PHL (B to A)•t PZH (DIR to B)=t PLZ (DIR to A)+t PLH (A to B)•t PZL (DIR to B)=t PHZ (DIR to A)+t PHL (A to B)In a bidirectional application,these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected.For example,if the SN74LVC1T45initially is transmitting from A to B,then the DIR bit is switched;the B port of the device must be disabled before presenting it with an input.After the B port has been disabled,an input signal applied to it appears on the corresponding A port after the specified propagation delay.PACKAGING INFORMATIONOrderable Device Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)SN74LVC1T45DBVR ACTIVE SOT-23DBV 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVRE4ACTIVE SOT-23DBV 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVT ACTIVE SOT-23DBV 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVTE4ACTIVE SOT-23DBV 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKR ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKRE4ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKRG4ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKT ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKTE4ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKTG4ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DRLR ACTIVE SOT-533DRL 64000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DRLRG4ACTIVE SOT-533DRL 64000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45YZPRACTIVEWCSPYZP63000Green (RoHS &no Sb/Br)SNAGCULevel-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device isin production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is 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GQN OR ZQN PACKAGE (TOP VIEW)
1234
A B C D E
TERMINAL ASSIGNMENTS
1
2
3
4
A
1A1
1OE
VCC
2OE
B
1A2
2A4
2Y4
1Y1
C
1A3
2Y3
2A3
1Y2
D
1A4
2A2
2Y2
1Y3
E
GND
2Y1
2A1
1Y4
FUNCTION TABLE (EACH BUFFER)
11
GND 2A1
TA –40°C to 85°C
–40°C to 125°C
ORDERING INFORMATION
PACKAGE (1)
ORDERABLE PART NUMBER
QFN – RGY
Reel of 1000
SN74LVC244ARGYR
VFBGA – GQN Reel of 1000
INPUTS
OE
A
L
H
L
L
H
X
OUTPUT Y
H L Z
2
元器件交易网

1 1OE 1A1 2
SN74LVC244A OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCAS414X – NOVEMBER 1992 – REVISED MARCH 2005
Reel of 2000
SN74LVC244ADGVR
TOP-SIDE MARKING LC244A LC244A SN74LVC244AN LVC244A LVC244A LC244A

74HC164中文资料（功能,真值表,引脚图及电气参数介绍）
移位寄存器74HC164中文资料(功能,真值表,引脚图及电气参数介绍)
SN54HC164,/SN74HC164是8位移位寄存器，当其中一个（或二个）选通串行输入端的低电平禁止进入新数据，并把第一个触发器在下一个时钟脉冲来后复位到低电平时，门控串行输入端（A 和B）可完全控制输入数据。

一个高电平输入后就使另一个输入端赋能，这个输入就决定了第一个触发器的状态。

虽然不管时钟处于高电平或低电平时，串行输入端的数据都可以被改变，但只有满足建立条件的信息才能被输入。

时钟控制发生在时钟输入由低电平到高电平的跃变上。

为了减小传输线效应，所有输入端均采用二极管钳位。

74HC164功能表：
H=高电平（稳定态） L=低电平（稳定态）×=不定↑=从低电平转换到高电平
QA0…QH0=在稳定态输入条件建立前QA…QH 的相应电平
QAn…QHn=在最近的时钟输入条件（↑）建立前QA…QH 的相应电平，表示移位一位
74HC164引脚图及逻辑图:
图1 逻辑图（正逻辑）
图2 引脚图
74HC164电气参数:
Absolute Maximum Ratings绝对最大额定值
DC SPECIFICATIONS直流电气规格表：
DC SPECIFICATIONS直流电气规格（续）
图3 参数测量信息
74HC164典型工作时序图
图4 typical clear, shift, and clear sequence典型清除、移位和清除时序
74HC164应用电路
TAG标签：74真值引脚表图。