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恩智浦专项赛比赛说明恩智浦专项赛以计算机技术为基础，将软件内核或应用文件系统嵌入到硬件中，完成应用需求。
比赛不限定命题，通过作品资料远程评审的形式选拔进入全国总决赛，具体说明如下。
一、参赛条件1、参赛单位：以学校或学院为基本参赛单位，统一报名、邮寄资料和参赛，预赛每个学校不能超过10支队伍（独立学院可单独计算），超过10支队伍的学校自行校内筛选。
2、参赛队员：具有正式学籍的全日制在校本、专科生均有资格报名参赛；每支参赛队最多三名队员组队。
分赛区比赛开始后，参赛队员不得更换。
如发现顶替或更换，将取消参赛及评奖资格，如有特殊情况需报请大赛组委会批准。
3、指导教师：每支队伍不超过2名指导教师，每位老师指导的队伍不超过3支。
4、作品要求：作品必须为原创，如有违反大赛规定和法律条款将取消大赛的参赛和评奖资格。
二、比赛方式恩智浦专项赛参赛队伍基于指定平台提前准备作品，通过邮寄规定文档和资料远程评审的方式进行初赛选拔，进入全国总决赛后需携实物作品在比赛现场进行演示和PPT答辩。
三、可兼选奖项风河专项奖：兼选风河专项奖的队伍必须将风河指定软件与大赛规定的硬件平台结合设计作品，此奖项可与硬件奖兼得。
要求所使用的风河操作系统均为正版，并出示相应License号码。
非风河Yocto Linux无要求。
1、风河VxWorks创新奖：为鼓励已加入风河大学计划内的相关院校学生队伍采用以风河VxWorks作为操作系统来构建其博创杯嵌入式大赛作品。
凡是采用风河VxWorks操作系统的作品均可参加本奖项评审。
风河VxWorks具备32位和64位支持能力，可提供全面的多核处理器支持，是业界公认稳定、可靠、安全的实时操作系统。
Wind River VxWorks平台被各行业采用并开发出富于创新的产品。
除了具有业界领先的VxWorks实时操作系统，VxWorks平台还包括了集成化的run-time技术以及基于Eclipse的开放型开发套件。
IC China 2013展会新增三大应用体验馆
佚名
【期刊名称】《集成电路应用》
【年(卷),期】2013(0)9
【摘要】中国半导体行业协会、中国电子器材总公司与上海市经信委在协会会议室召开“Ic Chirla 2013”上海地区推介会。
上海市集成电路行业协会薛自高级顾问主持会议。
【总页数】1页(P45-45)
【关键词】IC;应用;展会;行业协会;电子器材;上海地区;集成电路;上海市
【正文语种】中文
【中图分类】TN402
【相关文献】
1.本土IC业喜人,IC China 2013将于11月上海开幕 [J],
2.震撼视听，精彩无限！云集世界顶级品牌、产品与解决方案，与您共同见证与体验最新潮流与科技2013中国影音集成科技展（CIT2013）展会前瞻 [J], 编辑部
3.第24届中国国际测量控制与仪器仪表展览(MICONEX2013) 展会原名:多国仪器仪表展2013年8月27～30日在北京·中国国际展览中心(老馆) 展商快讯第一期[J],
4.数字印刷刷新“视”界“2013年中国数字印刷联盟高峰年会”将于China Print 2013展会期间隆重召开 [J],
5.2013电子圈内最热之地第十八届国际集成电路研讨会暨展览会（IIC—China2013）于2013年2月28日-3月2日在深圳会展中心2号馆举行 [J],
因版权原因，仅展示原文概要，查看原文内容请购买。
2011中国（深圳）消费电子展China Consumer Electronics Fair 2011 (Shenzhen)数字技术创新生活2011年4月8日～10日深圳会展中心三网融合 N屏百花齐放展示无处不在的个性化消费电子终端及技术、内容随着“三网融合”决策的实施推进，以及互联网的飞速发展，一个很明显的趋势，就是互联网应用越来越个性化、终端越来越智能化——除PC之外，上网本、智能手机、移动互联网设备（MID）、平板电脑、电子书、电视、车载信息娱乐设备（IVI）等多样化的个人终端，都已经具备了接入网络的能力，甚至延伸至物物相联的“物联网”，催生了家电全面联网的趋势和智能家居生活。
内容渗入终端，4C更形融合。
带屏幕的终端百花齐放，无处不在的互联网正在成为现实。
根据个人兴趣、需求和社交网络打造的无缝的个性化体验，则可以随时随地为人们提供所需的信息和娱乐。
这就是“N屏”个性化互联网体验的图景。
中国（深圳）消费电子展（CCEF）作为将新技术、新产品成功推向终端消费者的价值链合作及媒介整合传播平台，将集中展示全球最前沿消费电子终端和内容，正成为数字技术消费者的盛大节日。
作为最贴近全球最大市场的有效推广方式，CCEF正成为全球消费电子厂商不可或缺的选择。
CCEF 2011将在N屏百花齐放的时代重点展示无处不在的个性化互联网终端、技术及内容。
分享容量最大、发展最快的中国消费电子市场目前中国拥有世界上最大规模的互联网用户人群，在手机、平板电视等行业都已成为全球最大的区域市场，今年底中国PC市场也将跃居世界第一，成为全球最大的IT市场。
中国消费电子市场的重要性使得中国市场不仅已成为全球消费电子巨头最新技术和产品的首发地之一，更将成为新技术、新产品的发源地和试金石。
随着城镇化的加速，中国消费电子市场仍保持着强劲增长动力。
本土市场哺育的民族品牌厂商与国际巨头将展开新一轮的争夺，共同分享中国市场高速发展商机，并藉此走向世界。
用k2_viewer替换GDS赵美云1，殷浩2（1.恩智浦（中国）管理有限公司，上海200070；2.上海楷登电子科技有限公司，上海100083）摘要：当一个芯片或一个大版图需要改版，而实际只需要改动几个具体模块，可以使用k2_viewer对整个GDS进行操作，可以先把模块版图改好,PVS验证完导出模块GDS，在k2_viewer界面里把需要改动的模块从整个大的版图里替换成新的版图，这个方法中没有涉及对整个芯片或大版图的GDS导入导出，省时快捷方便安全高效。
关键词：版图；改版；导出；导入Replace database with k2_viewerZHAO Mei-yun1,YIN Hao2（1.NXP（China）Management,Shanghai200070,China;2.Cadence Shanghai Office,Shanghai100083,China）Abstract:when a whole chip or big layout need to be engineering change order（ECO）,the changes are located in some sub-block,the best way is to modify the sub-block first,stream out the sub-block GDS after finishing PVS check,replacing the old GDS with the updated GDS from the whole GDS with tool k2_viewer,there is not streaming in/streaming out the whole GDS,this is method is efficient,fast,easy and safe.Key words:layout;ECO;stream in;stream out引言K2_viewer 是Cadence 的一个实用工具，它包含PVS 软件包，可以独立运行。
Using the CSE (Cryptographic Services Engine) Module in MCAL4.3by: NXP Semiconductors1 IntroductionToday, people are concerned about sharing/transmittinginformation in a secure and trusted manner betweenparties in the automotive area. The security functionsimplemented with Cryptographic Services Engine(CSE)module are described in the Secure HardwareExtension(SHE) functional specification.This application note provides an introduction to theCSE module on the MPC5777C and explains how toconfigure and use this module in MCAL4.3. Afterreading this application note, you should be able to:• Understand the CSE configuration process inMCAL4.3• Understand how CSE module working on theMPC5777CThe application note also provides examples for specificconfigurations. The examples are provided in thesoftware package accompanying this document and isalso explained in detail. To aid in understanding of thisdocument and software package, you need to downloadthe MPC5777C reference manual from the NXPwebsite. The following table shows the abbreviationsused throughout the document.NXP SemiconductorsDocument Number: AN 13061 Application Notes Rev. 0 , 12/2020 Contents 1 Introduction ............................................................................ 1 3 CSE module on MPC5777C device ....................................... 2 3.1 Chip-specific CSE information ............................... 2 3.2 Main features .......................................................... 2 3.3 Modes of operation ................................................. 3 3.4 Block diagram ......................................................... 3 4 AES-128 encryption and decryption overview ....................... 5 4.1 Electronic Codebook (ECB) ................................... 5 4.2 Chiper-block chaining (CBC) ................................. 5 4.3 CMAC (Cipherbased Message Authentication Code) 6 5 CRYPTO module in MCAL4.3 ......................................... 7 6 CRYPTO loading key and processing primitive .............. 11 7 References . (12)2 CSE module on MPC5777CTable 1. Abbreviations and acronyms2 CSE module on MPC5777CThe Cryptographic Services Engine (CSE) is a peripheral module that implements the security functions described in the Secure Hardware Extension (SHE) Functional Specification Version 1.1.The CSE design includes a host interface with a set of memory mapped registers and a system bus interface. The host interface are used by the CPU to issue commands. The system bus interface allows the CSE to access system memory directly. Two dedicated blocks of system flash memory are used by the CSE for secure key storage.2.1 Chip-specific CSE informationThis chip has one instance of the CSE module. The module:•Executes the chip's secure boot process. See the System Boot details in the MPC5777C Reference Manual.•Exclusive access to the flash memory blocks mapped to the C55FMC_LOCK1 register, PASS_LOCK1_PGn registers, and TDRn_LOCK1 DCF client. See C55FMC_LOCK1 register bit mapping. The system MPU is automatically configured to prevent other bus masters frominterfering with CSE's access to the flash memory.2.2 FeaturesThe CSE has the following features:•Secure storage for cryptographic keys•AES-128 encryption and decryption•AES-128 CMAC authentication•True random number generation•Secure boot mode•System bus master interface2.3 Modes of operationThe CSE supports operation in Normal and Debug modes of operation. The use of the cryptographic keys stored by the CSE is controlled based on the activation of the CPU debug port and the successful completion of the secure boot process.The CSE has a low-power mode that disables the clock to all logic except the host interface. Register accesses are supported in this mode, but commands are not processed.2.4 Block diagramThe CSE design includes a command processor, host interface, system bus interface, local memory, AES logic, and True Random Number Generator (TRNG) as shown below.A host interface (via the peripheral bridge) with a set of memory mapped registers that are used by the CPU to issue commands. Furthermore, a system bus interface (via the crossbar interface) allows the CSE to directly access system memory. Here the crypto module behaves like any other master on the Crossbar switch (XBAR). Through the host interface, you can configure and control the CSE module, like putting the module into low power mode, enabling interrupts for finished command processing, or suspending command processing. A status and error register gives further system information. For a complete list of CSE commands see MPC5777C reference manual.Two dedicated blocks of system flash memory are used by the CSE for secure key and firmware storage. These blocks are not accessible by other masters from the system. Therefore, they are called secure flash. The command processing is done by a 32-bit CSE core with attached ROM and RAM running at system frequency. After system boot, the core comes out of reset and executes boot code from the module ROM. This code will load the firmware from the secure flash into the module RAM and start executing from there. This reduces the flash accesses by the crypto core on the Crossbar. The AES block is a slave to the crypto internal bus. It processes the encryption (plaintext → ciphertext) and decryption (ciphertext → plaintext) and offers AES CMAC authentication. This application note deals only with the authentication capabilities of the CSE.2 CSE module on MPC5777CFigure 1. CSE block diagram on MPC5777C3 AES-128 encryption and decryption overviewBlock ciphers like the AES algorithm, working with a defined granularity, are often 64 bits or 128 bits. The simplest way to encode data is to split the message in the cipher specific granularity. In this case, the cipher output depends only on the key and input value. The drawback of this cipher mode, which is called Electronic Code Book (ECB), is that the same input values will be decoded into the same output values. This gives attackers the opportunity to use statistical analysis (for example, in a normal text some letter combinations occur much more often than others).To overcome this issue other cipher modes were developed like the Cipher-block chaining (CBC), Cipher feedback (CFB), Output feedback (OFB) and Counter (CTR) mode.The CSE module supports only the ECB and the CBC mode which are described in the following sections.3.1 Electronic Codebook (ECB)Each block has no relationship with another block of the same message or information. The following figure shows the block diagram of the ECB mode.Figure 2. ECB block diagramThe following figure shows the drawback of the ECB mode. Taking the Freescale logo as an example it is still visible in the encoded form using this mode. It is obvious that this is not very secure.Figure 3. Encoding using ECB mode3.2 Cipher-block chaining (CBC)The Cipher-block (CBC) mode, invented in 1976, is one of the most important cipher modes. In this mode the output of the last encoding step is xor’ed with the input block of the actual encoding step. Because of this, an additional value for the first encoding step is necessary which is called initialization vector (IV). Using this method each cipher block depends on the plaintext blocks processed up to that point.3 AES-128 encryption and decryption overviewThe following figure shows the block diagram of the CBC mode.Figure 4. CBC block diagramThe following figure shows the encoding result of the Freescale logo using the CBC cipher mode. The difference from the ECB mode is self-evident. In many applications ECB mode may not be appropriate.Figure 5. Encoding using CBC mode3.3 CMAC (Cipher-based Message Authentication Code)A CMAC provides a method for authenticating messages and data. The CMAC algorithm accepts as input a secret key and an arbitrary-length message to be authenticated, and outputs a CMAC. The CMAC value protects both a message's data integrity as well as its authenticity, by allowing verifiers (who also possess the secret key) to detect any change in the message contentFigure 6. CMAC SchemeIf you want more information about CSE functional description and CSE commands, see MPC5777C reference manual.CRYPTO module in MCAL4.34 CRYPTO module in MCAL4.3The following figure shows the location of Crypto Driver module in the micro controller abstraction layer. It is below the Crypto Interface module and Crypto Service Manager module. It implements a generic interface for synchronous and asynchronous cryptographic primitives. It also supports key storage, key configuration, and key management for cryptographic services.To provide cryptographic functionalities an ECU needs to integrate one unique Crypto Service Manager module and one Crypto Interface. However, the Crypto interface can access several Crypto Drivers, each of them is configured according to the underlying Crypto Driver Object.Figure 7. AUTOSAR layered view with crypto moduleA Crypto Driver Object represents an instance of independent crypto hardware “device” (e.g. AES accelerator). There could be a channel for fast AES and CMAC calculations on a HSM for jobs with high priority, which ends on a native AES calculation service in the Crypto Driver. But it is also possible that a Crypto Driver Object is a piece of software, e.g. for RSA calculations where jobs are able to encrypt, decrypt, sign or verify. The Crypto Driver Object is the endpoint of a crypto channel.NOTECrypto have layers including Crypto Cryif and CSM, since CSM is alwaysa stub and only in order to avoid compiler error. Thejob_configuration_structure is responsible by CSM, so the job structurecannot generated by NXP CSM itself, as CSM is a stub in MCALperspective. Developers need to manually update the structure and passingit to Crypto_Process_Job. So if need more CSM package support andshould contact the third party(i.e vector DaVinci).CRYPTO module in MCAL4.3Figure 8 shows the relationship between different configuration items in EB:Cryptoprimitives ->CryptoDriverObject->CryIfChannel->CsmQueue->CsmJobs CryptokeyElement->CryptokeyType->Cryptokey->CryIfKey->CsmKeysCrypto Driver Object: A Crypto Driver implements one or more Crypto Driver Objects. The Crypto Driver Object can offer different crypto primitives in hardware or software. The Crypto Driver Objects of one Crypto Driver are independent of each other. There is only one workspace for each Crypto Driver Object (i.e. only one crypto primitive can be performed at the same time)CryptoKeyElement: Key elements are used to store data. This data can be key material or the IV needed for AES encryption. It can also be used to configure the behavior of the key management functions.CryptoKeyType: A key type consists of references to key elements. The key types are typically pre-configured by the vendor of the Crypto Driver.CryptoKey: A Key can be referenced by a job in the CSM. In the Crypto Driver, the key references a specific key type.CryptoPrimitive: A crypto primitive is an instance of a configured cryptographic algorithm realized in a Crypto Driver Object.Figure 8. Crypto configuration in EBCRYPTO module in MCAL4.3 CryIf: The crypto drivers are called by CryIf, the Crypto drivers access the underlying hardware and software objects to calculate results with their cryptographic primitives. The results are forwarded to CryIf.CsmJob: A job is an instance of a job’s configured in cryptographic primitive. An operation of a crypto primitive declares what part of the crypto primitive will be performed. There are three different operation modes:•START is a operation mode indicates a new request of a crypto primitive and will be cancel all previous request of the same job and preemptive•UPDATE mode indicates that the crypto primitive expects input data•FINISH mode indicates that after this part all data are fed completely and the crypto primitive can finalize the calculationThe priority of a job defines the importance of it. The higher the priority means more immediately the job is executed. The priority of a cryptographic job is part of the configuration.Figure 9. Cryif and CsmJobs in EBNOTEThe crypro driver does not have callback function in CryIf.c file, so itshould add SampleAppCrypto(job, result) intoCryIf_CallbackNotification(const Crypto_JobType* job, Std_ReturnTyperesult) function in CryIf.c file.CRYPTO module in MCAL4.3As show in the following figure, this sample configure three primitives, ENCRYPT, RNG(random number generated) and DECRYPT.Figure 10. CryptoPrimitive configuration in EBAs show in the following figure, A CryptoKeyElement having the CryptoKeyElementId set to 1 represents a key material and cannot be set be using the field CryptoKeyElementInitValue. All the other CryptoKeyElementIds can be set either using CryptoKeyElementSet function or the Tresos field CryptoKeyElementInitValue.Figure 11. CryptoKeyEelment configuration in EBAs show in the following figure, key elements and keys have to be configured for all primitives supported in this release. Containers CryptoKeyElements, CryptoKeyTypes and CryptoKeys should be activated or deactivated in Tresos in the same time. For a key it is mandatory to have a key type and configured key elements. The index of the different key elements from the different Crypto services are defined as in imported types table SWS_Csm_01022(in AUOTOSAR document Specification of Crypto Service Manager)A key has a state which is either 'valid' or 'invalid'. By default, all the keys are 'invalid' and have to be set to valid by using the function Crypto_KeySetValid. If a key is in the invalid state then the Crypto services which make use of the key returns CRYPTO_E_KEY_NOT_VALID value.Figure 12. CryptoKey configuration in EBCRYPTO loading key and processing primitive Because crypto driver not include CSM layer, so the Crypto_JobType structure should be initialized manually in the code.Figure 13. Csm in EB5 CRYPTO loading key and processing primitiveTo process a primitive (random number generation, MAC generation or verification, AESencrypt/decrypt), the following sequence should be followed:1.If keys are needed, the containers CryptoKeyElements, CryptoKeyTypes, CryptoKeys should beenabled2.Crypto_KeyElementSet(65536, CryptoKeyElementId_0, aes_test01_key, 16) meaning a keymaterial corresponding to key 65536 and having the size 16 bytes is configured3.Call the API function Crypto_KeySetValid(65536) to enable key 655364.Call the API function Crypto_ProcessJob() to process job, it process three jobs(randomgenerated, encryption and decryption) in this sample codeFigure 14. Process job in sample code6 ReferencesCall API function StringCompare ((uint8_t*)ucPlainText, ucDecText, 16) to verify the encryption and decryption functionality.Figure 15. Compare the ucPlainText and ucDecText6 References•MPC5777C Reference Manual (Document ID: MPC5777CPRM)•Specification of Crypto Service Manager(Document link)•Specification of Crypto Driver(Document link)•AUTOSAR_MCAL_CRYPTO_IM•AUTOSAR_MCAL_CRYPTO_UMDocument Number: AN 13061 Rev. 0 12/2020 How to Reach Us: Home Page: Web Support: /supportInformation in this document is provided solely to enable system and software implementers to use NXP products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. NXP reserves the right to make changes without further notice to any products herein. NXP makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does NXP assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical ” parameters that may be provided in NXP data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer's technical experts. NXP does not convey any license under its patent rights nor the rights of others. NXP sells products pursuant to standard terms and conditions of sale, which can be found at the following address:/SalesTermsandConditions . While NXP has implemented advanced security features, all products may be subject to unidentified vulnerabilities. Customers are responsible for the design and operation of their applications and products to reduce the effect of these vulnerabilities on customer’s applications and products, and NXP accepts no li ability for any vulnerability that is discovered. Customers should implement appropriate design and operating safeguards to minimize the risks associated with their applications and products. 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Arm, AMBA, Arm Powered, Artisan, Cortex, Jazelle, Keil, SecurCore, Thumb, TrustZone, and μVision are registered trademarks of Arm Limited (or its subsidiaries) in the EU and/or elsewhere. Arm7, Arm9, Arm11, big.LITTLE, CoreLink, CoreSight, DesignStart, Mali, Mbed, NEON, POP, Sensinode, Socrates, ULINK and Versatile are trademarks of Arm Limited (or its subsidiaries) in the EU and/or elsewhere. All rights reserved. Oracle and Java are registered trademarks of Oracle and/or its affiliates. The Power Architecture and word marks and the Power and logos and related marks are trademarks and service marks licensed by . © 2020 NXP B.V.。
