DM74S10中文资料

130. 74LS374 TTL 三态反相八D锁存器
131. 74LS375 TTL 4位双稳态锁存器
132. 74LS377 TTL 单边输出公共使能八D锁存器
133. 74LS378 TTL 单边输出公共使能六D锁存器
134. 74LS379 TTL 双边输出公共使能四D锁存器
135. 74LS38 TTL 开路输出2输入端四与非缓冲器
165. 74LS534 TTL 三态反相八D锁存器
166. 74LS54 TTL 四路输入与或非门
167. 74LS540 TTL 八位三态反相输出总线缓冲器
168. 74LS55 TTL 4输入端二路输入与或非门
169. 74LS563 TTL 八位三态反相输出触发器
170. 74LS564 TTL 八位三态反相输出D触发器
36. 74LS156 TTL 开路输出译码器/分配器
37. 74LS157 TTL 同相输出四2选1数据选择器
38. 74LS158 TTL 反相输出四2选1数据选择器
39. 74LS16 TTL 开路输出六反相缓冲/驱动器
40. 74LS160 TTL 可预置BCD异步清除计数器
41. 74LS161 TTL 可予制四位二进制异步清除计数器
108. 74LS37 TTL 开路输出2输入端四与非缓冲器
109. 74LS373 TTL 三态同相八D锁存器
110. 74LS374 TTL 三态反相八D锁存器
111. 74LS375 TTL 4位双稳态锁存器
112. 74LS377 TTL 单边输出公共使能八D锁存器
113. 74LS378 TTL 单边输出公共使能六D锁存器

74ls74中文资料74LS74内含两个独立的D上升沿双d触发器，每个触发器有数据输入（D）、置位输入（）复位输入（）、时钟输入（CP）和数据输出（Q、）。

、的低电平使输出预置或清除，而与其它输入端的电平无关。

当、均无效（高电平式）时，符合建立时间要求的D数据在CP上升沿作用下传送到输出端。

74ls74功能表:输入输出S D R D CP D Qn＋1 Qn＋10 1 ×× 1 01 0 ××0 10 0 ××φ φ1 1 ↑ 1 1 01 1 ↑0 0 11 1 ↓×Qn Qn图1 74ls74引脚图实验：用74LS74构成4位寄存器一个D触发器可实现一位二进数的存储，因此应采用4个D触发器实现4位寄存器。

由于要实现移位寄存，4个D触发器之间应相互联接。

（1）首先在图2中完成相应的联线，构成可实现并入并出、串入串出、并入串出、串入并出的多功能移位寄存。

按图接好电路。

(2) D3 D2 D1 D0分别接逻辑开关，Q3 Q2 Q1 Q0接发光二极管；(3) 先清零；(4) 按下列要求，实现相应功能，观察结果，并描述工作过程。

并入并出：使数据输入端D3D2D1D0=1011，给CP端输入一个正单脉冲，观察Q3Q2Q1Q0发光二极管的状态，、将结果填入表中。

并入串出：使数据输入端D3D2D1D0=1011，给CP端输入4个正单脉冲，观察Q3端发光二极管的状态，将结果填入表6中。

串入并出：使数据输入端D0分别为1011，同时通过给CP端输入正单脉冲将D0端的4 个数据送入寄存器。

观察Q3Q2Q1Q0端发光二极管的状态，将结果填入表中。

串入串出：使数据输入端D0分别为1011，同时通过给CP端输入正单脉冲，将D0端的4 个数据送入寄存器。

在CP端输完8个脉冲后，观察Q3端发光二极管的状态，将结果填入表2中。

并入并出：D3D2D1D0=10111个CP脉冲Q3Q2Q1Q0=结论：并入串出D3D2D1D0=10114个CP脉冲Q3=结论串入并出D3=10114个CP脉冲Q3Q2Q1Q0=结论串入串出D3=10118个CP脉冲Q3=结论图274ls153芯片管脚图引脚逻辑功能以及封装2007年12月17日 23:53 本站原创作者：本站用户评论（）关键字：74ls153管脚图逻辑功能图封装：74LS163引脚功能表及管脚定义图(带时序波形图)发布:2011-08-30 | 作者: | 来源: huangjiapeng| 查看:2620次 | 用户关注：定时器由与系统秒脉冲（由时钟脉冲产生器提供）同步的计数器构成，要求计数器在状态信号ST作用下，首先清零，然后在时钟脉冲上升沿作用下，计数器从零开始进行增1计数，向控制器提供模5的定时信号TY和模25的定时信号TL。

© 2000 Fairchild Semiconductor Corporation DS006439August 1986Revised March 2000DM74LS00 Quad 2-Input NAND GateDM74LS00Quad 2-Input NAND GateGeneral DescriptionThis device contains four independent gates each of which performs the logic NAND function.Ordering Code:Devices also available in T ape and Reel. Specify by appending the suffix letter “X” to the ordering code.Connection Diagram Function TableY = ABH = HIGH Logic Level L = LOW Logic LevelOrder Number Package NumberPackage DescriptionDM74LS00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow DM74LS00SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS00NN14A14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 WideInputs OutputA B Y L L H L H H H L H HHL 2D M 74L S 00Absolute Maximum Ratings (Note 1)Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings.The “Recommended Operating Conditions” table will define the conditions for actual device operation.Recommended Operating ConditionsElectrical Characteristicsover recommended operating free air temperature range (unless otherwise noted)Note 2: All typicals are at V CC = 5V, T A = 25°C.Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.Switching Characteristicsat V CC = 5V and T A = 25°CSupply Voltage 7V Input Voltage7VOperating Free Air Temperature Range 0°C to +70°C Storage Temperature Range−65°C to +150°CSymbol ParameterMin Nom Max Units V CC Supply Voltage4.7555.25V V IH HIGH Level Input Voltage 2V V IL LOW Level Input Voltage 0.8V I OH HIGH Level Output Current −0.4mA I OL LOW Level Output Current 8mA T AFree Air Operating Temperature70°CSymbol ParameterConditionsMinTyp Max Units (Note 2)V I Input Clamp Voltage V CC = Min, I I = −18 mA −1.5V V OH HIGH Level V CC = Min, I OH = Max, 2.73.4VOutput Voltage V IL = Max V OLLOW Level V CC = Min, I OL = Max,0.350.5Output VoltageV IH = MinVI OL = 4 mA, V CC = Min 0.250.4I I Input Current @ Max Input Voltage V CC = Max, V I = 7V 0.1mA I IH HIGH Level Input Current V CC = Max, V I = 2.7V 20µA I IL LOW Level Input Current V CC = Max, V I = 0.4V −0.36mA I OS Short Circuit Output Current V CC = Max (Note 3)−20−100mA I CCH Supply Current with Outputs HIGH V CC = Max 0.8 1.6mA I CCLSupply Current with Outputs LOWV CC = Max2.44.4mAR L = 2 k ΩSymbol ParameterC L = 15 pF C L = 50 pF UnitsMin Max Min Max t PLH Propagation Delay Time 310415ns LOW-to-HIGH Level Output t PHLPropagation Delay Time 310415ns HIGH-to-LOW Level OutputDM74LS00Physical Dimensions inches (millimeters) unless otherwise noted14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 NarrowPackage Number M14A 4D M 74L S 00Physical Dimensionsinches (millimeters) unless otherwise noted (Continued)14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage Number M14D5DM74LS00 Quad 2-Input NAND GatePhysical Dimensions inches (millimeters) unless otherwise noted (Continued)14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 WidePackage Number N14AFairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。

© 2000 Fairchild Semiconductor Corporation DS006290April 1984Revised March 2000DM74AS157 • DM74AS158 Quad 1 of 2 Line Data Selector/MultiplexerDM74AS157 • DM74AS158Quad 1 of 2 Line Data Selector/MultiplexerGeneral DescriptionThese data selectors/multiplexers contain inverters and drivers to supply full on-chip data selection to the four out-put gates. A separate STROBE input is provided. A 4-bit word is selected from one of two sources and is routed to the four outputs. The AS157 presents true data whereas the AS158 presents inverted data to minimize propagation delay time.Featuress Switching specifications at 50 pFs Switching specifications guaranteed over full tempera-ture and V CC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s Functionally and pin for pin compatible with Schottky,low power Schottky, and advanced low power Schottky TTL counterpart s Improved AC performance over Schottky, low power Schottky, and advanced low power Schottky counter-parts s Expand any data input point s Multiplex dual data busess General four functions of two variables (one variable is common)s Source programmable countersOrdering Code:Devices also available in T ape and Reel. Specify by appending the suffix letter “X” to the ordering code.Connection Diagram Function TableH = HIGH Level L = LOW Level X = Don't CareOrder Number Package NumberPackage DescriptionDM74AS157M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74AS157SJX M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74AS157N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide DM74AS158M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74AS158NN16E16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 WideInputsOutput YSTROBE SelectA B DM74AS157DM74AS158H X X X L H L L L X L H L L H X H L L H X L L H LHXHHL 2D M 74A S 157 • D M 74A S 158Logic DiagramsDM74AS157DM74AS158DM74AS157 • DM74AS158Absolute Maximum Ratings (Note 1)Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings.The “Recommended Operating Conditions” table will define the conditions for actual device operation.Recommended Operating ConditionsElectrical Characteristicsover recommended operating free air temperature range. All typical values are measured at V CC = 5V, T A = 25°C.Note 2: The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit current, I OS .Supply Voltage 7V Input Voltage7VOperating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°CTypical θJA N Package75.0 °C/WSymbol ParameterMin Nom Max Units V CC Supply Voltage4.555.5V V IH HIGH Level Input Voltage 2V V IL LOW Level Input Voltage 0.8V I OH HIGH Level Output Current −2mA I OL LOW Level Output Current 20mA T AFree Air Operating Temperature70°CSymbol ParameterConditionsMinTypMax Units V IK Input Clamp Voltage V CC = 4.5V, I I = −18 mA −1.2V V OH HIGH Level V CC = 4.5V to 5.5V V CC −2V Output Voltage I OH = −2 mA V OL LOW Level V CC = 4.5V0.350.5V Output Voltage I OL = 20 mA I I Input Current at Max V CC = 5.5V Select 0.2mA Input Voltage V IH = 7V All Others 0.1I IH HIGH Level V CC = 5.5V Select 40µA Input Current V IH = 2.7V All Others 20I ILLOW Level V CC = 5.5VSelect −1mA Input Current V IL = 0.4VAll Others−0.5I O (Note 2)Output Drive Current V CC = 5.5V, V O = 2.25V −30−112mA I CCSupply CurrentV CC = 5.5VDM74AS15717.528mA DM74AS15815.622.5mA 4D M 74A S 157 • D M 74A S 158DM74AS157 Switching Characteristicsover recommended operating free air temperature range DM74AS158 Switching Characteristicsover recommended operating free air temperature range Symbol ParameterConditionsFrom To Min Max Units (Input)(Output)t PLH Propagation Delay Time,V CC = 4.5V to 5.5V,Data Y 16ns LOW-to-HIGH Level Output C L = 50 pF,t PHL Propagation Delay Time,R L = 500ΩData Y 1 5.5ns HIGH-to-LOW Level Output t PLH Propagation Delay Time,STROBE Y 210.5ns LOW-to-HIGH Level Output t PHL Propagation Delay Time,STROBE Y 27.5ns HIGH-to-LOW Level Output t PLH Propagation Delay Time,Select Y 211ns LOW-to-HIGH Level Output t PHLPropagation Delay Time,SelectY210nsHIGH-to-LOW Level OutputSymbol ParameterConditionsFrom To Min Max Units (Input)(Output)t PLH Propagation Delay Time,V CC = 4.5V to 5.5V,Data Y 15ns LOW-to-HIGH Level Output C L = 50 pF,t PHL Propagation Delay Time,R L = 500ΩData Y 1 4.5ns HIGH-to-LOW Level Output t PLH Propagation Delay Time,STROBE Y 2 6.5ns LOW-to-HIGH Level Output t PHL Propagation Delay Time,STROBE Y 210ns HIGH-to-LOW Level Output t PLH Propagation Delay Time,Select Y 29.5ns LOW-to-HIGH Level Output t PHLPropagation Delay Time,SelectY210.5nsHIGH-to-LOW Level Output DM74AS157 • DM74AS158Physical Dimensions inches (millimeters) unless otherwise noted16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 NarrowPackage Number M16A 6D M 74A S 157 • D M 74A S 158Physical Dimensionsinches (millimeters) unless otherwise noted (Continued)16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage Number M16D7DM74AS157 • DM74AS158 Quad 1 of 2 Line Data Selector/MultiplexerPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 WidePackage Number N16EFairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。