74LVX157MTR,74LVX157MTR,74LVX157TTR, 规格书,Datasheet 资料

74HCT157Quad 2−Input Data Selectors / MultiplexersHigh−Performance Silicon−Gate CMOSThe 74HCT157 is identical in pinout to the LS157. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the outputs in noninverted form. A high level on the Output Enable input sets all four Y outputs to a low level.Features•Output Drive Capability: 10 LSTTL Loads•TTL/NMOS−Compatible Input Levels•Outputs Directly Interface to CMOS, NMOS, and TTL •Operating V oltage Range: 4.5 to 5.5 V•Low Input Current: 1.0 m A•High Noise Immunity Characteristic of CMOS Devices•In Compliance with the Requirements Defined by JEDEC Standard No. 7A•ESD Performance: HBM > 2000 V; Machine Model > 200 V •Chip Complexity: 82 FETs or 20.5 Equivalent Gates•These are Pb−Free DevicesMARKINGDIAGRAMSSOIC−16D SUFFIXCASE 751BTSSOP−16DT SUFFIXCASE 948F116HCT157GAWLYWWHCT157ALYW GG11674HCT157= Device CodeA= Assembly LocationL, WL= Wafer LotY= YearW, WW= Work WeekG or G= Pb−Free PackageSee detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.ORDERING INFORMATION(Note: Microdot may be in either location)DATAOUTPUTSNIBBLEA INPUTSNIBBLEPIN 16 = V CCPIN 8 = GNDFUNCTION TABLEInputsOutput OutputsEnable Select Y0 − Y3X = don’t careA0 − A3, B0 − B3 = the levels of therespective Data−Word Inputs.HLLXLHLA0−A3B0−B3Figure 1. Pin AssignmentSELECTY0B0A0Y1B1A1GNDY3B3A3OUTPUTENABLEV CCB2A2Y2Figure 2. Logic DiagramORDERING INFORMATIONDevice Package Shipping†74HCT157DR2G SOIC−16(Pb−Free)2500 Units / Reel 74HCT157DTR2G TSSOP−16*2500 Units / Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.*This package is inherently Pb−Free.MAXIMUM RATINGSSymbol ParameterValue Unit V CC DC Supply Voltage (Referenced to GND)– 0.5 to + 7.0V V in DC Input Voltage (Referenced to GND)– 0.5 to V CC + 0.5V V out DC Output Voltage (Referenced to GND)– 0.5 to V CC + 0.5V I in DC Input Current, per Pin ±20mA I out DC Output Current, per Pin±25mA I CC DC Supply Current, V CC and GND Pins ±50mA P D Power Dissipation in Still Air,SOIC Package†TSSOP Package†500450mW T stg Storage Temperature– 65 to + 150_C T LLead Temperature, 1 mm from Case for 10 Seconds(SOIC or TSSOP Package)260_CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied.Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.†Derating —SOIC Package: – 7 mW/_C from 65_ to 125_CTSSOP Package: − 6.1 mW/_C from 65_ to 125_CFor high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High −Speed CMOS Data Book (DL129/D).RECOMMENDED OPERATING CONDITIONSSymbol ParameterMin Max Unit V CC DC Supply Voltage (Referenced to GND) 4.5 5.5V V in , V outDC Input Voltage, Output Voltage (Referenced to GND)0V CC V T A Operating Temperature, All Package Types – 55+ 125_C t r , t fInput Rise and Fall Time V CC = 2.0 V (Figure 1)V CC = 4.5 V V CC = 6.0 V0001000500400nsDC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)V CC (V)Guaranteed LimitSymbol ParameterCondition−55 to 25°C≤85°C ≤125°C Unit V IH Minimum High −Level Input Voltage V out = 0.1V |I out | ≤ 20m A 4.55.5 2.02.0 2.02.0 2.02.0V V IL Maximum Low −Level Input Voltage V out = V CC − 0.1V |I out | ≤ 20m A 4.55.50.80.80.80.80.80.8V V OHMinimum High −Level Output VoltageV in = V IL |I out | ≤ 20m A 4.55.5 4.45.4 4.45.4 4.45.4VV in = V IL|I out | ≤ 4.0mA4.5 3.98 3.84 3.70V OLMaximum Low −Level Output VoltageV in = V IH |I out | ≤ 20m A 4.55.50.10.10.10.10.10.1V V in = V IH|I out | ≤ 4.0mA 4.50.260.330.40I in Maximum Input Leakage Current V in = V CC or GND 5.5±0.1±1.0±1.0m A I CCMaximum Quiescent Supply Current (per Package)V in = V CC or GND I out = 0m A5.54.04040m A D I CCAdditional Quiescent Supply CurrentV in = 2.4V, Any One InputV in = V CC or GND, Other Inputs I out = 0m A5.5≥ −55°C25 to 125°CmA2.92.4rmation on typical parametric values can be found in Chapter 2 of the ON Semiconductor High −Speed CMOS Data Book (DL129/D).2.Total Supply Current = I CC + ΣD I CC .This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high −impedance cir-cuit. For proper operation, V in and V out should be constrained to the range GND v (V in or V out ) v V CC .Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ).Unused outputs must be left open.AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = t f = 6.0 ns)Symbol Parameter V CC(V)Guaranteed LimitUnit – 55 to25_C v85_C v 125_Ct PLH, t PHL Maximum Propagation Delay, Input A or B to Output Y(Figures 1 and 4)4.5212632nst PLH, t PHL Maximum Propagation Delay, Select to Output Y(Figures 2 and 4)4.5222833nst PLH, t PHL Maximum Propagation Delay, Output Enable to Output Y(Figures 3 and 4)4.5202530nst TLH, t THL Maximum Output Transition Time, Any Output(Figures 1 and 4)4.5151922nsC in Maximum Input Capacitance−101010pF NOTE:For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).C PD Power Dissipation Capacitance (Per Package)*Typical @ 25°C, V CC = 5.0 VpF33*Used to determine the no−load dynamic power consumption: P D = C PD V CC2f + I CC V CC. For load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).PIN DESCRIPTIONSINPUTSA0, A1, A2, A3 (Pins 2, 5, 11, 14)Nibble A inputs. The data present on these pins is transferred to the outputs when the Select input is at a low level and the Output Enable input is at a low level. The data is presented to the outputs in noninverted form.B0, B1, B2, B3 (Pins 3, 6, 10, 13)Nibble B inputs. The data present on these pins is transferred to the outputs when the Select input is at a high level and the Output Enable input is at a low level. The data is presented to the outputs in noninverted form.OUTPUTSY0, Y1, Y2, Y3 (Pins 4, 7, 9, 12)Data outputs. The selected input Nibble is presented at these outputs when the Output Enable input is at a low level.The data present on these pins is in its noninverted form. For the Output Enable input at a high level, the outputs are at a low level.CONTROL INPUTS Select (Pin 1)Nibble select. This input determines the data word to be transferred to the outputs. A low level on this input selects the A inputs and a high level selects the B inputs.Output Enable (Pin 15)Output Enable input. A low level on this input allows the selected input data to be presented at the outputs. A high level on this input sets all outputs to a low level.SWITCHING WAVEFORMS*Includes all probe and jig capacitanceC L *V CCGNDFigure 5. HCT157Figure 6. Test CircuitEXPANDED LOGIC DIAGRAMA0B0A1B1A2B2A3B3Y0Y1Y2Y3OUTPUT ENABLESELECTDATA OUTPUTSNIBBLE OUTPUTSSOIC −16CASE 751B −05ISSUE KNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.SBM0.25 (0.010)AST DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.8010.000.3860.393B 3.80 4.000.1500.157C 1.35 1.750.0540.068D 0.350.490.0140.019F 0.40 1.250.0160.049G 1.27 BSC 0.050 BSC J 0.190.250.0080.009K 0.100.250.0040.009M 0 7 0 7 P 5.80 6.200.2290.244R0.250.500.0100.019____16X0.58SOLDERING FOOTPRINT**For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.TSSOP −16CASE 948F −01ISSUE BDIM MIN MAX MIN MAX INCHESMILLIMETERS A 4.90 5.100.1930.200B 4.30 4.500.1690.177C −−− 1.20−−−0.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.180.280.0070.011J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSC M0 8 0 8 NOTES:DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.CONTROLLING DIMENSION: MILLIMETER.DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS.MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W −.____*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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© 2003 Fairchild Semiconductor Corporation DS012008February 1994Revised October 200374LVXC3245 8-Bit Dual Supply Configurable Voltage Interface Transceiver with 3-STATE Outputs74LVXC32458-Bit Dual Supply Configurable Voltage Interface Transceiver with 3-STATE OutputsGeneral DescriptionThe LVXC3245 is a 24-pin dual-supply, 8-bit configurable voltage interface transceiver suited for PCMCIA and other real time configurable I/O applications. The V CCA pin accepts a 3V supply level. The A Port is a dedicated 3V port. The V CCB pin accepts a 3V-to-5V supply level. The B Port is configured to track the V CCB supply level respec-tively. A 5V level on the V CC pin will configure the I/O pins at a 5V level and a 3V V CC will configure the I/O pins at a 3V level. The A Port should interface with a 3V host system and the B Port to the card slots. This device will allow the V CCB voltage source pin and I/O pins on the B Port to float when OE is HIGH. This feature is necessary to buffer data to and from a PCMCIA socket that permits PCMCIA cards to be inserted and removed during normal operation.Featuress Bidirectional interface between 3V and 3V-to-5V buses s Control inputs compatible with TTL level s Outputs source/sink up to 24 mAs Guaranteed simultaneous switching noise level and dynamic threshold performance s Implements patented EMI reduction circuitry s Flexible V CCB operating ranges Allows B Port and V CCB to float simultaneously when OE is HIGH s Functionally compatible with the 74 series 245Ordering Code:Devices also available in T ape and Reel. Specify by appending suffix letter “X” to the ordering code.Logic Symbol Pin DescriptionsConnection DiagramOrder Number Package NumberPackage Description74LVXC3245WM M24B 224-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LVXC3245QSC MQA2424-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide 74LVXC3245MTCMTC2424-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePin NamesDescriptionOE Output Enable Input T/R Transmit/Receive InputA 0–A 7Side A Inputs or 3-STATE OutputsB 0–B 7Side B Inputs or 3-STATE Outputs 274L V X C 3245Truth TableH= HIGH Voltage Level L = LOW Voltage Level X = ImmaterialLogic DiagramInputs OutputsOE T/R L L Bus B Data to Bus A L H Bus A Data to Bus B HXHIGH-Z State74LVXC3245Absolute Maximum Ratings (Note 1)Recommended Operating Conditions (Note 2)Note 1: The “Absolute Maximum Ratings ” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings.The “Recommended Operating Conditions ” table will define the conditions for actual device operation.Note 2: The A Port unused pins (inputs or I/Os) must be held HIGH or LOW. They may not float.DC Electrical CharacteristicsSupply Voltage (V CCA , V CCB )−0.5V to +7.0V DC Input Voltage (V I ) @ OE, T/R −0.5V to V CCA +0.5V DC Input/Output Voltage (V I/O )@ A n −0.5V to V CCA +0.5V @ B n−0.5V to V CCB +0.5VDC Input Diode Current (I IK )@ OE, T/R±20 mA DC Output Diode (I OK ) Current ±50 mA DC Output Source or Sink Current (I O )±50 mA DC V CC or Ground Current per Output Pin (I CC or I GND )±50 mA and Max Current±200 mAStorage Temperature Range (T STG )−65°C to +150°CDC Latch-Up Source or Sink Current±300 mASupply Voltage V CCA 2.7V to 3.6V V CCB3.0V to 5.5V Input Voltage (V I ) @ OE, T/R 0V to V CCA Input Output Voltage (V I/O )@ A n 0V to V CCA @ B n0V to V CCBFree Air Operating Temperature (T A )−40°C to +85°CMinimum Input Edge Rate (∆V/∆t)8 ns/VV IN from 30% to 70% of V CC V CC @ 3.0V, 4.5V, 5.5VSymbol ParameterV CCA V CCB T A = 25°C T A = −40°C to +85°C UnitsConditions(V)(V)TypGuaranteed LimitsV IHAMinimum HIGH A n , 2.7 3.0 2.0 2.0V V OUT ≤ 0.1V Level Input OE 3.0 3.6 2.0 2.0orVoltageT/R 3.6 5.5 2.0 2.0≥V CC − 0.1VV IHBB n2.73.0 2.0 2.03.0 3.6 2.0 2.03.65.5 3.85 3.85V ILAMaximum LOW A n , 2.7 3.00.80.8VV OUT ≤ 0.1V Level Input OE 3.0 3.60.80.8orVoltageT/R 3.6 5.50.80.8≥V CC − 0.1V V ILBB n2.73.00.80.83.0 3.60.80.83.65.5 1.65 1.65V OHAMinimum HIGH Level 3.0 3.0 2.99 2.9 2.9VI OUT = −100 µA Output Voltage3.0 3.0 2.85 2.56 2.46I OH = −12 mA 3.0 3.0 2.65 2.35 2.25I OH = −24 mA 2.7 3.0 2.5 2.3 2.2I OH = −12 mA 2.74.5 2.3 2.1 2.0I OH = −24 mA V OHB3.0 3.0 2.99 2.9 2.9V I OUT = −100 µA 3.0 3.0 2.85 2.56 2.46I OH = −12 mA 3.0 3.0 2.65 2.35 2.25I OH = −24 mA 3.04.5 4.25 3.86 3.76I OH = −24 mA V OLAMaximum LOW Level 3.0 3.00.0020.10.1V I OUT = 100 µA Output Voltage3.0 3.00.210.360.44I OL = 24 mA 2.7 3.00.110.360.44I OL = 12 mA 2.74.50.220.420.5I OL = 24 mA V OLB3.0 3.00.0020.10.1V I OUT = 100 µA 3.0 3.00.210.360.44I OL = 24 mA 3.04.50.180.360.44I OL = 24 mA I INMaximum Input 3.6 3.6±0.1±1.0µA V I = V CCA , GND Leakage Current @ 3.65.5±0.1±1.0OE, T/R 474L V X C 3245DC Electrical Characteristics (Continued)Note 3: Worst case package.Note 4: Max number of outputs defined as (n). Data inputs are driven 0V to V CC level; one output at GND.Note 5: Max number of Data Inputs (n) switching. (n –1) inputs switching 0V to V CC level. Input-under-test switching: V CC level to threshold (V IHD ), 0V to threshold (V ILD ), f = 1 MHz.Symbol ParameterV CCA V CCB T A = 25°C T A = −40°C to +85°C Units Conditions(V)(V)TypGuaranteed LimitsI OZAMaximum 3-STATE 3.6 3.6±0.5±5.0µA V I = V IL , V IH ,Output Leakage 3.6 5.5±0.5±5.0OE = V CCA @ A nV O = V CCA , GND I OZBMaximum 3-STATE 3.6 3.6±0.5±5.0µA V I = V IL , V IH ,Output Leakage 3.65.5±0.5±5.0OE = V CCA @ B nV O = V CCB , GND ∆I CC Maximum B n 3.6 5.5 1.01.35 1.5mAV I = V CCB –2.1V I CC /Input All Inputs3.6 3.60.350.5V I = V CC –0.6V I CCA1Quiescent V CCA A n = V CCA or GND Supply Current 3.6Open550µAB n = Open, OE = V CCA ,as B Port FloatsT/R = V CCA , V CCB = OpenI CCA2Quiescent V CCA 3.6 3.6550µAA n = V CCA or GND,Supply Current3.6 5.5550B n = V CCB or GND,OE = GND, T/R = GND I CCBQuiescent V CCB 3.6 3.6550µA A n = V CCA or GND,Supply Current3.6 5.5880B n = V CCB or GND,OE = GND, T/R = V CCAV OLPA Quiet Output 3.3 3.30.8V (Note 3)(Note 4)Maximum Dynamic 3.3 5.00.8V OLPB V OL3.3 3.30.8V (Note 3)(Note 4)3.3 5.0 1.5V OLVA Quiet Output 3.3 3.3−0.8V (Note 3)(Note 4)Minimum Dynamic 3.3 5.0−0.8V OLVB V OL3.3 3.3−0.8V (Note 3)(Note 4)3.3 5.0−1.2V IHDA Minimum HIGH 3.3 3.3 2.0V (Note 3)(Note 5)Level Dynamic 3.3 5.0 2.0V IHDB Input Voltage 3.3 3.3 2.0V (Note 3)(Note 5)3.3 5.0 3.5V ILDA Maximum LOW 3.3 3.30.8V (Note 3)(Note 5)Level Dynamic 3.3 5.00.8V ILDBInput Voltage3.3 3.30.8V(Note 3)(Note 5)3.35.01.574LVXC3245AC Electrical CharacteristicsNote 6: Typical values at V CCA = 3.3V, V CCB = 5.0V @ 25°C.Note 7: Typical values at V CCA = 3.3V, V CCB = 3.3V @ 25°C.Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t OSHL ) or LOW-to-HIGH (t OSLH ). Parameter guaranteed by design.CapacitanceNote 9: C PD is measured at 10 MHz.SymbolParameterT A = +25°C T A = −40°C to +85°CT A = +25°C T A = −40°C to +85°CUnitsC L = 50 pFC L = 50 pF C L = 50 pF C L = 50 pF V CCA = 2.7V–3.6V V CCA = 2.7V–3.6V V CCA = 2.7V–3.6V V CCA = 2.7V–3.6V V CCB = 4.5V–5.5V V CCB = 4.5V–5.5V V CCB = 3.0V–3.6V V CCB = 3.0V–3.6V MinTyp Max Min Max Min Typ Max Min Max (Note 6)(Note 7)t PHL Propagation Delay 1.0 4.88.0 1.08.5 1.0 5.58.5 1.09.0ns t PLH A to B1.0 3.9 6.5 1.07.0 1.0 5.28.0 1.08.5t PHL Propagation Delay 1.0 3.8 6.5 1.07.0 1.0 4.47.0 1.07.5ns t PLH B to A1.0 4.37.5 1.08.0 1.0 5.17.5 1.08.0t PZL Output Enable Time 1.0 4.78.0 1.08.5 1.0 6.09.0 1.09.5ns t PZH OE to B1.0 4.88.5 1.09.0 1.0 6.19.5 1.010.0t PZL Output Enable Time 1.0 5.99.5 1.010.0 1.0 6.410.0 1.010.5ns t PZH OE to A1.0 5.49.0 1.09.5 1.0 5.89.0 1.09.5t PHZ Output Disable Time 1.0 4.08.0 1.08.5 1.0 6.39.5 1.010.0ns t PLZ OE to B1.0 3.87.5 1.08.0 1.0 4.58.0 1.08.5t PHZ Output Disable Time 1.0 4.69.5 1.010.0 1.0 5.29.5 1.010.0nst PLZ OE to A 1.03.1 6.5 1.07.0 1.03.4 6.5 1.07.0t OSHL Output to Output t OSLHSkew (Note 8) 1.01.51.51.01.51.5nsData to OutputSymbol Parameter Typ Units ConditionsC IN Input Capacitance 4.5pF V CC = Open C I/O Input/Output Capacitance 10pF V CCA = 3.3V V CCB = 5.0V C PDPower Dissipation A →B 50pF V CCB = 5.0V Capacitance (Note 9)B →A40pFV CCA = 3.3V 674L V X C 3245Power Up ConsiderationsTo insure the system does not experience unnecessary I CC current draw, bus contention, or oscillations during power up, the following guidelines should be adhered to (refer to Table 1):•Power up the control side of the device first. This is the V CCA side.•OE should ramp with or ahead of V CCA . This will help guard against bus contention.•The Transmit/Receive control pin (T/R) should ramp with V CCA , this will ensure that the A Port data pins are con-figured as inputs. With V CCA receiving power first, the A I/O Port should be configured as inputs to help guard against bus contention and oscillations.• A side data inputs should be driven to a valid logic level.This will prevent excessive current draw.The above steps will ensure that no bus contention or oscil-lations, and therefore no excessive current draw occurs during the power up cycling of these devices. These steps will help prevent possible damage to the translator devices and potential damage to other system components.TABLE 1. Low Voltage Translator Power Up Sequencing TablePlease reference Application Note AN-5001 for more detailed information on using Fairchild ’s LVX Low Voltage Dual Supply CMOS Translating Transceivers.Configurable I/O Application for PCMCIA Cards Block DiagramThe LVXC3245 is a 24-pin dual supply device well suited for PCMCIA configurable I/O applications. Ideal for low power notebook designs, the LVXC3245 consumes less than 1mW of quiescent power in all modes of operation.The LVXC3245 meets all PCMCIA I/O voltage require-ments at 5V and 3.3V operation. By tying V CCB of the LVXC3245 to the card voltage supply, the PCMCIA cardwill always experience rail to rail output swings, maximizing the reliability of the interface.The V CCA pin on the LVXC3245 must always be tied to a 3V power supply. This voltage connection provides internal references needed to account for variations in V CCB . When connected as in the figure above, the LVXC3245 meets all the voltage and current requirements of the ISA bus stan-dard (IEEE P996).Device Type V CCA V CCB T/R OE A Side I/O B Side I/O Floatable Pin Allowed 74LVXC32453V 3V to 5.5V ramp ramp logic outputsyes, V CCB and B (power up 1st)configurablewith V CCAwith V CCA0V or V CCAI/O ’s w/ OE HIGH74LVXC3245Physical Dimensions inches (millimeters) unless otherwise noted24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" WidePackage Number M24B24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" WidePackage Number MQA24874L V X C 3245 8-B i t D u a l S u p p l y C o n f i g u r a b l e V o l t a g e I n t e r f a c e T r a n s c e i v e r w i t h 3-S T A T E O u t p u t sPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage Number MTC24Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。

74LVC1G157-Q100Single 2-input multiplexerRev. 2 — 8 December 2016Product data sheet1.General descriptionThe 74LVC1G157-Q100 is a single 2-input multiplexer which select data from two datainputs (I0 and I1) under control of a common data select input (S). The state of thecommon data select input determines the particular register from which the data comes.The output (Y) presents the selected data in the true (non-inverted) form.Inputs can be driven from either 3.3V or5V devices. This feature allows the use of thesedevices as translators in mixed 3.3V and5V applications.This device is fully specified for partial power-down applications using I OFF.The I OFF circuitry disables the output, preventing the damaging backflow current throughthe device when it is powered down.Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise andfall times.This product has been qualified to the Automotive Electronics Council (AEC) standardQ100 (Grade 1) and is suitable for use in automotive applications.2.Features and benefits⏹Automotive product qualification in accordance with AEC-Q100 (Grade 1)◆Specified from -40︒C to +85︒C and from -40︒C to +125︒C⏹Wide supply voltage range from 1.65 V to5.5V⏹High noise immunity⏹Complies with JEDEC standard:◆JESD8-7 (1.65 V to1.95V)◆JESD8-5 (2.3 V to2.7V)◆JESD8B/JESD36 (2.7 V to3.6V)⏹±24mA output drive (V CC=3.0V)⏹CMOS low power consumption⏹Latch-up performance exceeds 250mA⏹Direct interface with TTL levels⏹Inputs accept voltages up to 5V⏹ESD protection:◆MIL-STD-883, method 3015 exceeds 2000 V◆HBM JESD22-A114F exceeds 2000V◆MM JESD22-A115-A exceeds 200V (C = 200 pF, R = 0 Ω)⏹Multiple package options3. Ordering informationTable 1.Ordering informationType number PackageTemperature range Name Description Version 74LVC1G157GW-Q100-40︒C to+125︒C SC-88plastic surface-mounted package; 6 leads SOT363 74LVC1G157GV-Q100-40 ︒C to +125 ︒C SC-74plastic surface-mounted package (TSOP6); 6 leads SOT4574. MarkingTable 2.MarkingType number Marking code[1]74LVC1G157GW-Q100YP74LVC1G157GV-Q100YP[1]The pin 1 indicator is located on the lower left corner of the device, below the marking code.5. Functional diagram6. Pinning information6.1Pinning6.2Pin descriptionTable 3.Pin descriptionSymbol Pin DescriptionI11data input from source 1 GND2ground (0V)I03data input from source 0 Y4multiplexer outputV CC5supply voltageS6common data select input7. Functional descriptionTable 4.Function table[1]Inputs OutputS I1I0YL X L LL X H HH L X LH H X H[1]H=HIGH voltage level;L=LOW voltage level;X=don’t care.8. Limiting valuesTable 5.Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max UnitV CC supply voltage-0.5+6.5VI IK input clamping current V I < 0 V-50-mAV I input voltage[1]-0.5+6.5VI OK output clamping current V O > V CC or V O < 0 V-±50mAV O output voltage Active mode[1][2]-0.5V CC + 0.5VPower-down mode[1][2]-0.5+6.5VI O output current V O = 0 V to V CC-±50mAI CC supply current-100mAI GND ground current-100-mAP tot total power dissipation T amb=-40︒C to+125︒C[3]-250mWT stg storage temperature-65+150︒C[1]The input and output voltage ratings may be exceeded if the input and output current ratings are observed.[2]When V CC=0V (Power-down mode), the output voltage can be 5.5V in normal operation.[3]For SC-88 and SC-74 packages: above 87.5︒C the value of P tot derates linearly with 4.0mW/K.9. Recommended operating conditions10. Static characteristicsTable 6.Recommended operating conditions Symbol Parameter ConditionsMin Typ Max Unit V CC supply voltage 1.65- 5.5V V I input voltage 0- 5.5V V O output voltage Active mode--V CC V V CC = 0 V; Power-down mode -- 5.5V T amb ambient temperature-40-+125︒C ∆t/∆Vinput transition rise and fall rate V CC = 1.65 V to 2.7 V--20ns/V V CC = 2.7 V to 5.5 V --10ns/VTable 7.Static characteristicsAt recommended operating conditions. Voltages are referenced to GND (ground =0V).Symbol Parameter Conditions-40 ︒C to +85 ︒C -40 ︒C to +125 ︒C UnitMin Typ [1]Max Min Max V IHHIGH-level input voltageV CC = 1.65 V to 1.95 V 0.65V CC--0.65V CC-V V CC = 2.3 V to 2.7 V 1.7-- 1.7-V V CC = 2.7 V to 3.6 V 2.0-- 2.0-V V CC = 4.5 V to 5.5 V0.7V CC--0.7V CC-V V ILLOW-level input voltageV CC = 1.65 V to 1.95 V --0.35V CC-0.35V CC VV CC = 2.3 V to 2.7 V --0.7-0.7V V CC = 2.7 V to 3.6 V --0.8-0.8V V CC = 4.5 V to 5.5 V--0.3V CC-0.3V CCV V OHHIGH-level output voltage V I =V IH or V IL I O =-100 μA;V CC =1.65V to 5.5VV CC -0.1--V CC -0.1-V I O =-4mA; V CC = 1.65V 1.2 1.54-0.95-V I O =-8mA; V CC = 2.3V 1.9 2.15- 1.7-V I O =-12mA; V CC = 2.7 V 2.2 2.50- 1.9-V I O =-24mA; V CC = 3.0 V 2.3 2.62- 2.0-V I O =-32mA; V CC = 4.5 V3.84.11- 3.4-V V OLLOW-level output voltage V I =V IH or V IL I O =100μA;V CC =1.65V to 5.5 V--0.10-0.10V I O =4mA;V CC = 1.65V -0.070.45-0.70V I O =8mA;V CC = 2.3V -0.120.30-0.45V I O =12mA;V CC = 2.7 V -0.170.40-0.60V I O =24mA;V CC = 3.0 V -0.330.55-0.80V I O =32mA;V CC = 4.5 V-0.390.55-0.80V[1]All typical values are measured at T amb =25︒C.11. Dynamic characteristics[1]Typical values are measured at T amb =25︒C and V CC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.[2]t pd is the same as t PLH and t PHL .[3]C PD is used to determine the dynamic power dissipation (P D in μW).P D =C PD ⨯V CC 2⨯f i ⨯N +∑(C L ⨯V CC 2⨯f o )where:f i =input frequency in MHz;f o =output frequency in MHz;C L =output load capacitance in pF;V CC =supply voltage in Volts;N =number of inputs switching;∑(C L ⨯V CC 2⨯f o )=sum of the outputs.I I input leakage currentV I = 5.5 V or GND; V CC =0V to 5.5V-±0.1±1-±1μA I OFF power-off leakage current V CC = 0 V; V I or V O =5.5V -±0.1±2-±2μA I CC supply current V I = 5.5 V or GND; I O = 0 A; V CC =1.65V to 5.5 V -0.14-4μA ∆I CC additional supply currentper pin; V CC = 2.3 V to 5.5 V; V I =V CC -0.6V; I O =0 A -5500-500μA C Iinput capacitanceV CC =3.3V;V I = GND to V CC-2.5---pFTable 7.Static characteristics …continuedAt recommended operating conditions. Voltages are referenced to GND (ground =0V).Symbol Parameter Conditions -40 ︒C to +85 ︒C -40 ︒C to +125 ︒C Unit MinTyp [1]Max Min Max Table 8.Dynamic characteristicsVoltages are referenced to GND (ground =0V); for load circuit see Figure 7.Symbol Parameter Conditions-40 ︒C to +85 ︒C -40 ︒C to +125 ︒C UnitMinTyp [1]Max Min Max t pdpropagation delay I0, I1 to Y; see Figure 6[2]V CC = 1.65 V to 1.95 V 1.5 4.311.0 1.513.0ns V CC = 2.3 V to 2.7 V 1.0 2.9 6.1 1.07.6ns V CC = 2.7 V 1.0 3.1 5.6 1.07.0ns V CC = 3.0 V to 3.6 V 1.0 2.7 5.0 1.0 6.3ns V CC = 4.5 V to 5.5 V 0.52.2 4.00.5 5.0ns S to Y; see Figure 6[2]V CC = 1.65 V to 1.95 V 1.5 4.311.0 1.513.0ns V CC = 2.3 V to 2.7 V 1.0 2.9 6.9 1.08.6ns V CC = 2.7 V 1.0 3.3 5.9 1.07.4ns V CC = 3.0 V to 3.6 V 1.0 2.9 5.0 1.0 6.3ns V CC = 4.5 V to 5.5 V0.52.3 4.00.5 5.0ns C PDpower dissipation capacitanceV I = GND to V CC ; V CC =3.3 V [3]-18---pF12. WaveformsTable 9.Measurement pointsSupply voltage Input Output V CC V M V M1.65V to 1.95V0.5V CC0.5V CC2.3V to 2.7V0.5V CC0.5V CC2.7V 1.5V 1.5V3.0V to 3.6V 1.5V 1.5V4.5V to5.5V0.5V CC0.5V CCTable 10.Test dataSupply voltage Input Load V EXTV CC V I t r=t f C L R L t PLH, t PHL1.65V to 1.95V V CC≤2.0ns30pF1kΩopen2.3V to 2.7V V CC≤2.0ns30pF500Ωopen2.7V 2.7V≤2.5ns50pF500Ωopen3.0V to 3.6V 2.7V≤2.5ns50pF500Ωopen4.5V to5.5V V CC≤2.5ns50pF500Ωopen13. Package outline3ODVWLF VXUIDFH PRXQWHG SDFNDJH OHDGV627Fig 8.Package outline SOT363 (SC-88)3ODVWLF VXUIDFH PRXQWHG SDFNDJH 7623 OHDGV627Fig 9.Package outline SOT457 (SC-74)14. AbbreviationsTable 11.AbbreviationsAcronym DescriptionCMOS Complementary Metal Oxide SemiconductorDUT Device Under TestESD ElectroStatic DischargeHBM Human Body ModelMM Machine ModelMIL MilitaryTTL Transistor-Transistor Logic15. Revision historyTable 12.Revision historyDocument ID Release date Data sheet status Change notice Supersedes74LVC1G157_Q100 v.220161208Product data sheet-74LVC1G157_Q100 v.1 Modifications:•Table7: The maximum limits for leakage current and supply current have changed.74LVC1G157_Q100 v.120130121Product data sheet--16. Legal information16.1 Data sheet status[1]Please consult the most recently issued document before initiating or completing a design.[2]The term ‘short data sheet’ is explained in section “Definitions”.[3]The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product statusinformation is available on the Internet at URL .16.2 DefinitionsDraft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give anyrepresentations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia salesoffice. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia andcustomer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product isdeemed to offer functions and qualities beyond those described in the Product data sheet.16.3 DisclaimersLimited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. 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This document supersedes and replaces all information supplied prior to the publication hereof.Suitability for use in automotive applications — This Nexperiaproduct has been qualified for use in automotiveapplications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expectedto result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability forinclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk.Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperiaaccepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications andproducts planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.Nexperia does not accept any liability related to any default,damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications andthe products or of the application or use by customer’s third partycustomer(s). Nexperia does not accept any liability in this respect.Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.Terms and conditions of commercial sale — Nexperiaproducts are sold subject to the general terms and conditions of commercial sale, as published at /profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects toapplying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer.Document status[1][2]Product status[3]DefinitionObjective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.Product [short] data sheet Production This document contains the product specification.No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.16.4 TrademarksNotice: All referenced brands, product names, service names and trademarks are the property of their respective owners.17. Contact informationFor more information, please visit: For sales office addresses, please send an email to: ***************************18. Contents1 General description. . . . . . . . . . . . . . . . . . . . . . 12 Features and benefits . . . . . . . . . . . . . . . . . . . . 13 Ordering information. . . . . . . . . . . . . . . . . . . . . 24 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 26 Pinning information. . . . . . . . . . . . . . . . . . . . . . 36.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 37 Functional description . . . . . . . . . . . . . . . . . . . 48 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 49 Recommended operating conditions. . . . . . . . 510 Static characteristics. . . . . . . . . . . . . . . . . . . . . 511 Dynamic characteristics . . . . . . . . . . . . . . . . . . 612 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 713 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 914 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 1115 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 1116 Legal information. . . . . . . . . . . . . . . . . . . . . . . 1216.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 1216.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1216.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 1216.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 1317 Contact information. . . . . . . . . . . . . . . . . . . . . 1318 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14© Nexperia B.V. 2017. All rights reserved For more information, please visit: Forsalesofficeaddresses,pleasesendanemailto:*************************** Date of release:Mouser ElectronicsAuthorized DistributorClick to View Pricing, Inventory, Delivery & Lifecycle Information:N experia:74LVC1G157GV-Q100H74LVC1G157GW-Q100H。

AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
SYMBOL PARAMETER
74HC
+25
−40 to +85
tPHL/ tPLH tPHL/ tPLH
propagation delay nI0 to nY; nI1 to nY
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard ICC category: MSI
Product specification
74HC/HCT157
DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: MSI
Fig.4 Functional diagram.
December 1990
Fig.5 Logic diagram. 4
元器件交易网
Philips Semiconductors
Quad 2-input multiplexer
Product specification
74HC/HCT157
Product specification
74HC/HCT157