FEATURES2OECCCC3OESN54LVT16240...WD PACKAGESN74LVT16240...DGG OR DL PACKAGE(TOP VIEW) DESCRIPTION/ORDERING INFORMATIONSN54LVT16240,SN74LVT162403.3-V ABT16-BIT BUFFERS/DRIVERSWITH3-STATE OUTPUTSSCBS717A–APRIL2000–REVISED NOVEMBER2006•Members of the Texas Instruments Widebus™Family•State-of-the-Art Advanced BiCMOSTechnology(ABT)Design for3.3-V Operationand Low Static-Power Dissipation•Support Mixed-Mode Signal Operation(5-VInput and Output Voltages With3.3-V VCC)•Support Unregulated Battery Operation Downto2.7V•Typical V OLP(Output Ground Bounce)<0.8Vat VCC=3.3V,TA=25°C•I off and Power-Up3-State Support HotInsertion•Distributed V CC and GND Pins MinimizeHigh-Speed Switching Noise•Flow-Through Architecture Optimizes PCBLayout•Latch-Up Performance Exceeds100mA PerJESD78,Class II•ESD Protection Exceeds JESD22–2000-V Human-Body Model(A114-A)–200-V Machine Model(A115-A)–1000-V Charged-Device Model(C101)•Package Options Include Plastic ShrinkSmall-Outline(DL)and Thin ShrinkSmall-Outline(DGG)Packages and380-milFine-Pitch Ceramic Flat(WD)Package Using25-mil Center-to-Center SpacingsThe'LVT16240devices are16-bit buffers and line drivers designed specifically for low-voltage(3.3-V)V CC operation,but with the capability to provide a TTL interface to a5-V system environment.These devices are designed specifically to improve both the performance and density of3-state memory address drivers,clock drivers,and bus-oriented receivers and transmitters.The devices can be used as four4-bit buffers,two8-bit buffers,or one16-bit buffer.The devices provide inverting outputs and symmetrical active-low output-enable(OE)inputs.When V CC is between0and1.5V,the devices are in the high-impedance state during power up or power down. However,to ensure the high-impedance state above1.5V,OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.These devices are fully specified for hot-insertion applications using I off and power-up3-state.The I off circuitry disables the outputs,preventing damaging current backflow through the devices when they are powered down. The power-up3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.Widebus is a trademark of Texas Instruments.PRODUCTION DATA information is current as of publication date.Copyright©2000–2006,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.DESCRIPTION/ORDERING INFORMATION (CONTINUED)1A11A21A31A41Y11Y21Y31Y42A12A22A32A42Y12Y22Y32Y43A13A23A33A43Y13Y23Y33Y44A14A24A34A44Y14Y24Y34Y41OE 2OE 3OE 4OE SN54LVT16240,SN74LVT162403.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTSSCBS717A–APRIL 2000–REVISED NOVEMBER 2006The SN54LVT16240is characterized for operation over the full military temperature range of –55°C to 125°C.The SN74LVT16240is characterized for operation from –40°C to 85°C.ORDERING INFORMATIONT APACKAGE (1)ORDERABLE PART NUMBER TOP-SIDE MARKINGSN74LVT16240DLR Reel of 1000SN74LVT16240DLRG4SSOP –DLLVT16240SN74LVT16240DL –40°C to 85°CTube of 25SN74LVT16240DLG474LVT16240DGGRE4TSSOP –DGGReel of 2000LVT16240SN74LVT16240DGGR(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at /sc/package.FUNCTION TABLE (each 4-bit buffer)INPUTSOUTPUTYOE A L H L L L H HXZLOGIC SYMBOL (1)(1)This symbol is in accordance with ANSI/IEEE Std 91-1984and IEC Publication 617-12.2Submit Documentation Feedback1OE1A1 1A2 1A3 1A41Y1 1Y2 1Y3 1Y42OE2A1 2A2 2A3 2A42Y12Y22Y32Y43OE3A13A23A33A43Y13Y23Y33Y4 4OE4A14A24A34A44Y14Y24Y34Y4Absolute Maximum Ratings(1)SN54LVT16240,SN74LVT162403.3-V ABT16-BIT BUFFERS/DRIVERSWITH3-STATE OUTPUTSSCBS717A–APRIL2000–REVISED NOVEMBER2006 LOGIC DIAGRAM(POSITIVE LOGIC)over operating free-air temperature range(unless otherwise noted)MIN MAX UNITV CC Supply voltage range–0.5 4.6VV I Input voltage range(2)–0.57VV O Voltage range applied to any output in the high-impedance or power-off state(2)–0.57VV O Voltage range applied to any output in the high state(2)–0.5V CC+0.5VSN54LVT1624096I O Current into any output in the low state mASN74LVT16240128SN54LVT1624048I O Current into any output in the high state(3)mASN74LVT1624064I IK Input clamp current V I<0–50mAI OK Output clamp current V O<0–50mADGG package70θJA Package thermal impedance(4)°C/WDL package63T stg Storage temperature range–65150°C (1)Stresses beyond those listed under"absolute maximum ratings"may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated under"recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.(3)This current flows only when the output is in the high state and V O>V CC.(4)The package thermal impedance is calculated in accordance with JESD51.3Submit Documentation FeedbackRecommended Operating Conditions (1)SN54LVT16240,SN74LVT162403.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTSSCBS717A–APRIL 2000–REVISED NOVEMBER 2006SN54LVT16240SN74LVT16240UNIT MINMAX MIN MAX V CC Supply voltage 2.7 3.62.73.6V V IH High-level input voltage 22V V IL Low-level input voltage 0.80.8V V I Input voltage5.5 5.5V I OH High-level output current –24–32mA I OL Low-level output current 4864mA ∆t/∆v Input transition rise or fall rate Outputs enabled1010ns/V ∆t/∆V CC Power-up ramp rate200200µs/V T A Operating free-air temperature–55125–4085°C(1)All unused control inputs of the device must be held at V CC or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs ,literature number SCBA004.4Submit Documentation FeedbackElectrical CharacteristicsSN54LVT16240,SN74LVT16240 3.3-V ABT16-BIT BUFFERS/DRIVERSWITH3-STATE OUTPUTS SCBS717A–APRIL2000–REVISED NOVEMBER2006over recommended operating free-air temperature range(unless otherwise noted)SN54LVT16240SN74LVT16240 PARAMETER TEST CONDITIONS UNITMIN TYP(1)MAX MIN TYP(1)MAXV IK V CC=2.7V,I I=–18mA–1.2–1.2V V CC=2.7V to3.6V,I OH=–100µA V CC–0.2V CC–0.2V CC=2.7V,I OH=–8mA 2.4 2.4V OH VI OH=–24mA2V CC=3VI OH=–32mA2I OL=100µA0.20.2V CC=2.7VI OL=24mA0.50.5I OL=16mA0.40.4V OL VI OL=32mA0.50.5V CC=3VI OL=48mA0.55I OL=64mA0.55V CC=0or3.6V,V I=5.5V1010Control inputs V CC=3.6V,V I=V CC or GND±1±1I IµAV I=V CC11 Data inputs V CC=3.6VV I=0–5–5I off V CC=0,V I or V O=0to4.5V±100µAI OZH V CC=3.6V,V O=3V55µAI OZL V CC=3.6V,V O=0.5V–5–5µAV CC=0to1.5V,V O=0.5V to3V,I OZPU±100(2)±100µAOE=don't careV CC=1.5V to0,V O=0.5V to3V,I OZPD±100(2)±100µAOE=don't careOutputs high0.190.19 V CC=3.6V,I CC I O=0,Outputs low55mAV I=V CC or GND Outputs disabled0.190.19V CC=3V to3.6V,∆I CC(3)One input at V CC–0.6V,0.20.2mA Other inputs at V CC or GNDC i V I=3V or044pFC o V O=3V or099pF(1)All typical values are at V CC=3.3V,T A=25°C.(2)On products compliant to MIL-PRF-38535,this parameter is not production tested.(3)This is the increase in supply current for each input that is at the specified TTL voltage level,rather than V CC or GND.5Submit Documentation FeedbackSwitching CharacteristicsSN54LVT16240,SN74LVT162403.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTSSCBS717A–APRIL 2000–REVISED NOVEMBER 2006over recommended operating free-air temperature range,C L =50pF (unless otherwise noted)(see Figure 1SN54LVT16240SN74LVT16240FROM TO V CC =3.3V V CC =3.3V PARAMETERV CC =2.7V V CC =2.7V UNIT(INPUT)(OUTPUT)±0.3V ±0.3V MINMAX MINMAX MIN TYP (1)MAX MINMAXt PLH 1 3.6 4.11 2.2 3.54A Y ns t PHL 1 3.6 4.11 2.7 3.54t PZH 1 4.2 5.11 2.64 4.9OE Y ns t PZL 1.1 4.6 4.8 1.2 2.6 4.4 4.6t PHZ 1.9 4.7 5.22 3.4 4.55OEYns t PLZ 1.94.44.523.24.2 4.2t sk(LH)0.50.5ns t sk(HL)0.50.5(1)All typical values are at V CC =3.3V,T A =25°C.6Submit Documentation FeedbackPARAMETER MEASUREMENT INFORMATIONFrom Output Under TestC L LOAD CIRCUITOpen Data InputTiming Input2.7 V0 V2.7 V0 V2.7 V0 VInputVOLTAGE WAVEFORMS SETUP AND HOLD TIMESVOLTAGE WAVEFORMS PROPAGATION DELAY TIMESINVERTING AND NONINVERTING OUTPUTSVOLTAGE WAVEFORMS PULSE DURATIONV OHV OHV OLV OL2.7 V0 V InputOutput Control Output Waveform 1S1 at 6 V (see Note B)Output Waveform 2S1 at GND (see Note B)V OLV OH 3 V0 V≈ 0 V2.7 VVOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLINGOutputOutputt PHL /t PLH t PLZ /t PZL t PHZ /t PZHOpen 6 V GNDTEST S1NOTES: A.C L includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z O = 50 Ω, t r ≤ 2.5 ns, t f ≤ 2.5 ns.D.The outputs are measured one at a time with one transition per measurement.SN54LVT16240,SN74LVT162403.3-V ABT 16-BIT BUFFERS/DRIVERSWITH 3-STATE OUTPUTSSCBS717A–APRIL 2000–REVISED NOVEMBER 2006Figure 1.Load Circuit and Voltage Waveforms7Submit Documentation FeedbackPACKAGING INFORMATIONOrderable Device Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)74LVT16240DGGRE4ACTIVE TSSOP DGG 482000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM 74LVT16240DGGRG4ACTIVE TSSOP DGG 482000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT16240DGGR ACTIVE TSSOP DGG 482000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT16240DL ACTIVE SSOP DL 4825Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT16240DLG4ACTIVE SSOP DL 4825Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT16240DLR ACTIVE SSOP DL 481000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT16240DLRG4ACTIVESSOPDL481000Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and freeof Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.PACKAGE OPTION ADDENDUM18-Sep-2008TAPE AND REEL INFORMATION*All dimensions are nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74LVT16240DGGR TSSOP DGG 482000330.024.48.615.8 1.812.024.0Q1SN74LVT16240DLRSSOPDL481000330.032.411.3516.23.116.032.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) SN74LVT16240DGGR TSSOP DGG482000346.0346.041.0 SN74LVT16240DLR SSOP DL481000346.0346.049.0IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements,improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its 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