27c010

M27C10011Mbit (128Kb x8)UV EPROM and OTP EPROMSeptember 19981/165V ±10%SUPPLY VOLTAGE in READ OPERATIONFAST ACCESS TIME:35nsLOW POWER CONSUMPTION:–Active Current 30mA at 5Mhz –Standby Current 100µAPROGRAMMING VOLTAGE:12.75V ±0.25V PROGRAMMING TIME:100µs/byte (typical)ELECTRONIC SIGNATURE –Manufacturer Code:20h –Device Code:05hDESCRIPTIONThe M27C1001is a 1Mbit EPROM offered in the two ranges UV (ultra violet erase)and OTP (one time programmable).It is ideally suited for micro-processorsystems requiring large programs and is organized as 131,072words of 8bits.The FDIP32W (window ceramic frit-seal package)and the LCCC32W (leadless chip carrier package)have a transparent lids which allow the user to expose the chip to ultraviolet light to erase the bit pattern.A new pattern can then be written to the device by following the programming procedure.For applications where the content is programmed only one time and erasure is not required,the M27C1001is offered in PDIP32,PLCC32and TSOP32(8x 20mm)packages.AI00710B17A0-A16P Q0-Q7V PPV CCM27C1001GE V SS8Figure 1.Logic DiagramA0-A16Address Inputs Q0-Q7Data Outputs E Chip Enable G Output Enable P Program V PP Program Supply V CC Supply Voltage V SSGroundTable 1.Signal NamesPLCC32(C)LCCC32W (L)132FDIP32W (F)TSOP32(N)8x 20mm321PDIP32(B)DEVICE OPERATIONThe operating modes of the M27C1001are listed in the Operating Modes table.A single power sup-ply is required in the read mode.All inputs are TTL levels except for V PP and 12V on A9for Electronic Signature.Read ModeThe M27C1001has two control functions,both of which must be logically active in order to obtain data at the outputs.Chip Enable (E)is the power control and should be used for device selection.Output Enable (G)is the output control and should be used to gate data to the output pins,inde-pendent of device selection.Assuming that the addresses are stable,the address access time (t AVQV )is equalto the delayfrom E to output (t ELQV ).Data is availableat the output after a delay of t GLQV from the falling edge of G,assuming that E has been low and the addresses have been stable for at least t AVQV -t GLQV .Standby ModeThe M27C1001has a standby mode which re-duces the supply current from 30mA to 100µA.The M27C1001is placed in the standby mode by ap-plying a CMOS high signal to the E input.When in the standby mode,the outputs are in a high imped-ance state,independent of the G input.A1A0Q0A7A4A3A2A6A5A13A10A8A9Q7A14A11G E Q5Q1Q2Q3V SSQ4Q6NC P A16A12V PP V CCA15AI00711M27C10018123456791011121314151632313029282726252423222120191817Figure 2A.DIP Pin ConnectionsA1A0Q0A7A4A3A2A6A5A13A10A8A9Q7A14A11G E Q5Q1Q2Q3Q4Q6NC P A16A12V PP V CC A15AI01151BM27C1001 (Normal)8191617242532V SS Figure 2C.TSOP Pin ConnectionsWarning:NC =Not Connected.Warning:NC =Not Connected.AI00712N CA8A10Q 517A1A0Q0Q 1Q 2Q 3Q 4A7A4A3A2A6A59P A91A 16A11A13A 12Q732V P P V C C M27C1001A 15A14Q 6G E 25V S S Figure 2B.LCC Pin ConnectionsWarning:NC =Not Connected.2/16M27C1001Mode E G P A9V PP Q0-Q7 Read V IL V IL X X V CC or V SS Data Out Output Disable V IL V IH X X V CC or V SS Hi-Z Program V IL V IH V IL Pulse X V PP Data In Verify V IL V IL V IH X V PP Data Out Program Inhibit V IH X X X V PP Hi-Z Standby V IH X X X V CC or V SS Hi-Z Electronic Signature V IL V IL V IH V ID V CC Codes Note:X=V IH or V IL,V ID=12V±0.5VTable3.Operating ModesIdentifier A0Q7Q6Q5Q4Q3Q2Q1Q0Hex Data Manufacturer’s Code V IL0010000020h Device Code V IH0000010105h Table4.Electronic SignatureTwo Line Output ControlBecauseEPROMs are usually used in largermem-ory arrays,this product features a2line control function which accommodates the use of multiple memory connection.The two line control function allows:a.the lowest possible memory power dissipation,plete assurance that output bus contentionwill not occur.For the most efficientuse of thesetwo controllines, E should be decoded and used as the primary device selecting function,while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus.This ensures that all deselectedmem-ory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.Symbol Parameter Value Unit T A Ambient Operating Temperature(3)–40to125°CT BIAS Temperature Under Bias–50to125°CT STG Storage Temperature–65to150°C V IO(2)Input or Output Voltages(except A9)–2to7VV CC Supply Voltage–2to7VV A9(2)A9Voltage–2to13.5VV PP Program Supply Voltage–2to14V Notes:1.Except for the rating”Operating Temperatur e Range”,stresses above those listed in the Table”Absolute Maximum Ratings”may cause permanent damage to the device.These are stress ratings only and operation of the device at these or any otherconditions above those indicated in the Operating sections of this specification is not implied.Exposure to Absolute MaximumRating conditions for extended periods may affect device reliability.Refer also to the STMicroelectronics SURE Program and other relevant quality documents.2.Minimum DC voltage on Input or Output is–0.5V with possible undershoot to–2.0V for a period less than20ns.Maximum DCvoltage on Output is V CC+0.5V with possible overshoot to V CC+2V for a period less than20ns.3.Depends on range.Table2.Absolute Maximum Ratings(1)3/16M27C1001AI018223VHigh Speed0V1.5V2.4VStandard 0.4V2.0V 0.8VFigure 3.AC Testing Input Output Waveform AI01823B1.3VOUTC LC L =30pF for High Speed C L =100pF for Standard C L includes JIG capacitance3.3k Ω1N914DEVICE UNDER TESTFigure 4.AC Testing Load CircuitHigh SpeedStandard Input Rise and Fall Times ≤10ns ≤20ns Input Pulse Voltages0to 3V 0.4V to 2.4V Input and Output Timing Ref.Voltages1.5V0.8V and 2VTable 5.AC Measurement ConditionsSymbol ParameterTest ConditionMinMax Unit C IN Input Capacitance V IN =0V 6pF C OUTOutput CapacitanceV OUT =0V12pFNote:1.Sampled only,not 100%tested.Table 6.Capacitance (1)(T A =25°C,f =1MHz )System ConsiderationsThe power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the devices.The supply current,I CC ,has three seg-ments that are of interest to the system designer:the standby current level,the active current level,and transient current peaks that are produced by the falling and rising edges of E.The magnitude of the transient current peaks is dependent on the capacitiveand inductiveloading of the deviceat the output.The associated transient voltage peaks can be suppressed by complying with the two line outputcontrol and by properly selected decoupling ca-pacitors.It is recommended that a 0.1µF ceramic capacitor be used on every device between V CC and V SS .This should be a high frequencycapacitor of low inherent inductance and should be placed as close to the device as possible.In addition,a 4.7µF bulk electrolytic capacitor should be used between V CC and V SS for every eight devices.The bulk capacitor should be located near the power supply connection point.The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.4/16M27C1001Symbol ParameterTest Condition MinMax Unit I LI Input Leakage Current 0V ≤V IN ≤V CC ±10µA I LO Output Leakage Current 0V ≤V OUT ≤V CC ±10µA I CC Supply CurrentE =V IL ,G =V IL ,I OUT =0mA,f =5MHz30mA I CC1Supply Current (Standby)TTL E =V IH 1mA I CC2Supply Current (Standby)CMOS E >V CC –0.2V 100µA I PP Program Current V PP =V CC10µA V IL Input Low Voltage –0.30.8V V IH (2)Input High Voltage 2V CC +1V V OL Output Low Voltage I OL =2.1mA 0.4V V OHOutput High Voltage TTL I OH =–400µA 2.4V Output High Voltage CMOSI OH =–100µAV CC –0.7VNote: 1.V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP .2.Maximum DC voltage on Output is V CC +0.5V.Table 7.Read Mode DC Characteristics (1)(T A =0to 70°C,–40to 85°C or –40to 125°C;V CC =5V ±5%or 5V ±10%;V PP =V CC )SymbolAltParameterTest ConditionM27C1001Unit-45(3)-60-70MinMax MinMax MinMax t AVQV t ACC Address Valid to Output Valid E =V IL ,G =V IL456070ns t ELQV t CE Chip Enable Low to Output Valid G =V IL 456070ns t GLQV t OE Output Enable Low to Output Valid E =V IL 253035ns t EHQZ (2)t DF Chip Enable High to Output Hi-Z G =V IL 025030030ns t GHQZ(2)t DF Output Enable High to Output Hi-Z E =V IL 025030030ns t AXQXt OHAddress Transition to Output TransitionE =V IL ,G =V IL0nsNotes:1.V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP .2.Sampled only,not 100%tested.3.In case of 45ns speed see High Speed AC measurament conditions.Table 8A.Read Mode AC Characteristics (1)(T A =0to 70°C,–40to 85°C or –40to 125°C;V CC =5V ±5%or 5V ±10%;V PP =V CC )5/16M27C1001SymbolAltParameterTest ConditionM27C1001Unit-80-90-10-12/-15/-20/-25MinMax Min Max MinMax Min Maxt AVQV t ACC Address Valid to Output Valid E =V IL ,G =V IL8090100120ns t ELQV t CE Chip Enable Low to Output Valid G =V IL 8090100120ns t GLQV t OE Output Enable Low to Output Valid E =V IL 40455060ns t EHQZ (2)t DF Chip Enable High to Output Hi-Z G =V IL 030030030040ns t GHQZ(2)t DF Output Enable High to Output Hi-Z E =V IL 030030030040ns t AXQXt OHAddress Transition to Output TransitionE =V IL ,G =V ILnsNotes:1.V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP .2.Sampled only,not 100%tested.Table 8B.Read Mode AC Characteristics (1)(T A =0to 70°C,–40to 85°C or –40to 125°C;V CC =5V ±5%or 5V ±10%;V PP =V CC )AI00713BtAXQXtEHQZA0-A16EGQ0-Q7tAVQVtGHQZtGLQVtELQVVALID Hi-ZVALIDFigure 5.Read Mode AC WaveformsProgrammingWhen delivered (and after each erasure for UV EPROM),all bits of the M27C1001are in the ’1’state.Data is introduced by selectively program-ming ’0’s into the desired bit locations.Although only ’0’s will be programmed,both ’1’s and ’0’s can be present in the data word.The only way tochangea ’0’to a ’1’is by die expositionto ultraviolet light (UV EPROM).The M27C1001is in the pro-gramming mode when V pp input is at 12.75V,E is at V IL and P is pulsed to V IL .The data to be programmed is applied to 8bits in parallel to the data output pins.The levels required for the ad-dress and data inputs are TTL.V CC is specified to be 6.25V ±0.25V.6/16M27C1001Symbol ParameterTest Condition MinMax Unit I LI Input Leakage Current V IL ≤V IN ≤V IH±10µA I CC Supply Current 50mA I PP Program Current E =V IL50mA V IL Input Low Voltage –0.30.8V V IH Input High Voltage 2V CC +0.5V V OL Output Low Voltage I OL =2.1mA 0.4V V OH Output High Voltage TTL I OH =–400µA2.4V V IDA9Voltage11.512.5VNote: 1.V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP .Table 9.Programming Mode DC Characteristics (1)(T A =25°C;V CC =6.25V ±0.25V;V PP =12.75V ±0.25V)Symbol Alt ParameterTest Condition Min Max Unit t AVPL t AS Address Valid to Program Low 2µs t QVPL t DS Input Valid to Program Low 2µs t VPHPL t VPS V PP High to Program Low 2µs t VCHPL t VCS V CC High to Program Low 2µs t ELPL t CES Chip Enable Low to Program Low 2µst PLPH t PW Program Pulse Width 95105µs t PHQX t DH Program High to Input Transition2µs t QXGL t OES Input Transition to Output Enable Low2µst GLQV t OE Output Enable Low to Output Valid100ns t GHQZ(2)t DFP Output Enable High to Output Hi-Z0130ns t GHAXt AHOutput Enable High to Address TransitionnsNotes:1.V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP .2.Sampled only,not 100%tested.Table 10.ProgrammingMode AC Characteristics (1)(T A =25°C;V CC =6.25V ±0.25V;V PP =12.75V ±0.25V)7/16M27C1001tAVPLVALIDAI00714A0-A16Q0-Q7V PPV CCPGDATA INDATA OUTEtQVPLtVPHPLtVCHPLtPHQXtPLPHtGLQVtQXGLtELPLtGHQZtGHAXPROGRAM VERIFYFigure 6.Programming and Verify Modes AC WaveformsAI00715Cn =0Last AddrVERIFYP =100µs Pulse++n =25++AddrV CC =6.25V,V PP =12.75VFAILCHECK ALL BYTES 1st:V CC =6V 2nd:V CC =4.2VYES NOYESNOYESNO Figure 7.Programming FlowchartPRESTO II Programming AlgorithmPRESTO II Programming Algorithm allows the whole array to be programmed,with a guaranteed margin,in a typical time of 13seconds.Program-ming with PRESTO II involves in applying a se-quence of 100µs program pulses to each byte until a correct verify occurs (see Figure 7).During pro-gramming and verify operation,a MARGIN MODE circuit is automaticallyactivated in order to guaran-tee that each cell is programmed with enough margin.No overprogram pulse is applied since the verify in MARGIN MODE provides necessary mar-gin to each programmed cell.Program InhibitProgramming of multiple M27C1001s in parallel with different data is also easily accomplished.Except for E,all like inputs including G of the parallel M27C1001may be common.A TTL low level pulse applied to a M27C1001’s P input,with E low and V PP at 12.75V,will program that M27C1001.A high level E input inhibits the other M27C1001s from being programmed.Program VerifyA verify (read)should be performed on the pro-grammed bits to determinethat they were correctly programmed.The verify is accomplished with E and G at V IL ,P at V IH ,V PP at 12.75V and V CC at 6.25V.8/16M27C1001On-Board ProgrammingThe M27C1001can be directly programmed in the application circuit.See the relevant Application Note AN620.Electronic SignatureThe Electronic Signature(ES)mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type.This mode is intended for use by programming equipment to automatically match the device to be programmed with its correspondingprogrammingalgorithm.The ES mode is functional in the25°C±5°C ambient temperature range that is required when program-ming the M27C1001.To activate the ES mode,the programmingequipment mustforce11.5Vto12.5V on address line A9of the M27C1001,with V PP=V CC=5V.Two identifier bytes may then be sequenced from the device outputs by toggling address line A0from V IL to V IH.All other address lines must be held at V IL during Electronic Signa-ture mode.Byte0(A0=V IL)represents the manufacturercode and byte1(A0=V IH)the device identifier code.For the STMicroelectronics M27C1001,these two identifier bytes are given in Table4and can be read-out on outputs Q0to Q7.ERASURE OPERATION(applies to UV EPROM) The erasure characteristics of the M27C1001is such that erasure begins when the cells are ex-posed to light with wavelengths shorter than ap-proximately4000Å.It shouldbe notedthat sunlight and some type of fluorescent lamps have wave-lengthsin the3000-4000Årange.Research shows that constant exposure to room level fluorescent lighting could erase a typical M27C1001in about3 years,while it would take approximately1week to cause erasure when exposed to direct sunlight.If the M27C1001is to be exposed to these types of lighting conditions for extended periods of time,it is suggested that opaque labels be put over the M27C1001window to prevent unintentional era-sure.The recommended erasure procedurefor the M27C1001is exposure to short wave ultraviolet light which has a wavelength of2537Å.The inte-grated dose(i.e.UV intensity x exposure time)for erasure should be a minimum of15W-sec/cm2. The erasure time with this dosage is approximately 15to20minutes using an ultraviolet lamp with 12000µW/cm2power rating.The M27C1001 should be placed within2.5cm(1inch)of the lamp tubes during the erasure.Some lamps have a filter on their tubes which should be removed before erasure.9/16M27C1001ORDERING INFORMATION SCHEMENote: 1.High Speed,see AC Characteristics section for further informationFor a listof availableoptions (Speed,Package,etc...)or forfurther informationon any aspect of this device,please contact the STMicroelectronics Sales Office nearest to you.Speed-45(1)45ns -6060ns -7070ns -8080ns -9090ns -10100ns -12120ns -15150ns -20200ns -25250nsV CC Tolerance X ±5%blank±10%Package F FDIP32W B PDIP32L LCCC32W C PLCC32NTSOP328x 20mmTemperature Range 10to 70°C 3–40to 125°C 6–40to 85°COption X Additional Burn-in TRTape &Reel PackingExample:M27C1001-35XC1TR10/16M27C1001FDIP32W -32pin Ceramic Frit-seal DIP,with windowFDIPW-aA3A1A LB1B eD SE1EN1CαeA D2∅eBA2Symb mminches TypMinMax TypMinMax A 5.720.225A10.51 1.400.0200.055A2 3.91 4.570.1540.180A3 3.89 4.500.1530.177B 0.410.560.0160.022B1 1.45––0.057––C 0.230.300.0090.012D 41.7342.04 1.643 1.655D238.10–– 1.500––E 15.24––0.600––E113.0613.360.5140.526e 2.54––0.100––eA 14.99––0.590––eB 16.1818.030.6370.710L 3.180.125S 1.52 2.490.0600.098∅7.11––0.280––α4°11°4°11°N3232Drawing is not to scale.11/16PDIP32-32lead Plastic DIP,600mils widthSymbmm inches TypMinMax TypMinMax A 5.080.200A10.380.015A2 3.56 4.060.1400.160B 0.380.510.0150.020B1 1.52––0.060––C 0.200.300.0080.012D 41.7842.04 1.645 1.655D238.10–– 1.500––E 15.24––0.600––E113.5913.840.5350.545e1 2.54––0.100––eA 15.24––0.600––eB 15.2417.780.6000.700L 3.18 3.430.1250.135S 1.78 2.030.0700.080α0°10°0°10°N3232PDIPA2A1A LB1B e1D SE1EN1CαeA eBD2Drawing is not to scale.12/16LCCC32W -32lead Leadless Ceramic Chip Carrier,square windowLCCCW-ae31NL1BLh x 45oj x 45oe2ee1ADEKK1Symbmm inches TypMinMax TypMinMax A 2.280.090B 0.510.710.0200.028D 11.2311.630.4420.458E 13.7214.220.5400.560e 1.27––0.050––e10.39–0.015–e27.62––0.300––e310.16––0.400––h 1.02––0.040––j 0.51––0.020––L 1.14 1.400.0450.055L1 1.96 2.360.0770.093K 10.5010.800.4130.425K18.038.230.3160.324N3232Drawing is not to scale.13/16PLCCD NeE1E1ND1NdCPBD2/E2eB1A1AR0.51(.020)1.14(.045)F A2Drawing is not to scale.PLCC32-32lead Plastic Leaded Chip Carrier,rectangularSymb mminches TypMin Max TypMin Max A 2.54 3.560.1000.140A1 1.52 2.410.0600.095A2–0.38–0.015B 0.330.530.0130.021B10.660.810.0260.032D 12.3212.570.4850.495D111.3511.560.4470.455D29.9110.920.3900.430E 14.8615.110.5850.595E113.8914.100.5470.555E212.4513.460.4900.530e 1.27––0.050––F 0.000.250.0000.010R 0.89––0.035––N 3232Nd 77Ne 99CP0.100.00414/16TSOP32-32lead Plastic Thin Small Outline,8x 20mmTSOP-aD1E1NCPBeA2AN/2DDIECLA1αSymbmm inches TypMinMax TypMinMax A 1.200.047A10.050.150.0020.007A20.95 1.050.0370.041B 0.150.270.0060.011C 0.100.210.0040.008D 19.8020.200.7800.795D118.3018.500.7200.728E 7.908.100.3110.319e 0.50--0.020--L 0.500.700.0200.028α0°5°0°5°N 3232CP0.100.004Drawing is not to scale.15/16Information furnished is believed to be accurate and reliable.However,STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use.No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics.Specifications mentioned in this publication are subject to change without notice.This publication supersedes and replaces all information previously supplied.STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronics©1998STMicroelectronics-All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia-Brazil-Canada-China-France-Germany-Italy-Japan-Korea-Malaysia-Malta-Mexico-Morocco-The Netherlands-Singapore-Spain-Sweden-Switzerland-Taiwan-Thailand-United Kingdom-U.S.A.16/16。