datasheet_lmsz620

ML6206中文资料ML6206ML6206 Series Low ESR Cap. Compatible Positive Voltage RegulatorApplicationBattery Powered Equipment PalmtopsPortable Cameras and Video RecordersReference Voltage SourcesFeaturesCMOS Low Power Consumption :T ypical 1.0uA at V out=3.0V Output V oltage Range : 1.5V to 5.0V in 0.1V increments Highly Accurate:Output V oltage + 3% for 1.5V to 1.9V Output V oltage + 2% for 2.0V to 5.0VMaximum Output Current: 250mA(within the maximum power dissipation, V out=5.0V) Small Input-Output V oltage Differential:0.16V at 100mA and 0.4V at 200mA Input stability: T yp.0.2%/VPackage A vailable:SOT - 23 (150mW), SOT - 89 (500mW) & TO - 92 (300mW) Reverse Battery Protection Current LimitAbsolute Maximum RatingsParameter Symbol Ratings UnitsInput V oltage V IN 6.5 V Output Current I OUT 500mA Output V oltageV OUT V SS -0.3 ~V IN +0.3V SOT-23 150SOT-89500 ContinuousTotal Power DissipationTO-92P d 300 mWOperating Ambient Temperature T opr -40 ~ +70 oC Storage Temperature T stg -40 ~ +70o CGeneral DescriptionThe ML6206 series are highly precise, low power consumption, high voltage, positive voltage output, three-pin regulator. It provides high output current even when the input/output voltage differential is small.The ML6206 consists of a high-precision voltage reference, an error correction circuit, a currentlimited output driver and reverse battery protection.Block Diagram元器件交易网Package Pin Number SOT23 SOT89 TO-92 Pin Name Function 1 1 1 VSSGround 3 2 2 VIN Power Input2 3 3VOUTOutputStandard CircuitNote on Use1. Oscillation may occur as a result of the impedance presentbetween the power supply and the IC’s input. Please use a capacitor (CIN) of at least 1uF, when the impedance is 10 ohm or more.With a large output current, Voltage output can be stabilised by increasing capacitor (CIN) size. If CIN is small and capacitor (CL) size is increased, oscillation may occur. In such cases, Voltage output can be stabilised by either increasing the size of CIN or decreasing the size of CL.2. Please ensure that output current (IOUT) is less than Pd / (VIN-VOUT) and does not exceed the stipulated Continuous Total Power Dissipation value (Pd).Test CircuitTest Circuit 1Pin ConfigurationTest Circuit 2SOT-23SOT-89TO-92元器件交易网OUTOUTOUTNote : 1. VOUT(T) = Specified Output Voltage. 2. VOUT(E) = Effective Output Voltage (i.e. the output voltage when (VOUT(T)+1.0V) is provided at the VIN pinwhile maintaining a certain IOUT value). 3. Vdif = VIN1(Note 4) – VOUT(E)4. VIN1 = The input voltage at the time 98% of VOUT (E) is output (input voltage has been gradually reduced).Electrical Characteristic1) Output Voltage vs. Output CurrentML6206P153 ML6206P3022) Current LimitTypical Performance CharacteristicsML6206P302ML6206P502ML6206P1533) Output Voltage vs. Input VoltageML6206P153 ML6206P3024) Supply Current vs. Input VoltageML6206P153 ML6206P3025) Output Voltage vs. Ambient Temperature ML6206P153 ML6206P3026) Supply Current vs. Ambient Temperature ML6206P153 ML6206P3027) Input Transient Response 1ML6206P153ML6206P3028) Input Transient Response 2ML6206P153ML6206P3029) Load Transient ResponseML6206P153ML6206P30210) Power Supply Rejection RatioML6206P153ML6206P302Ordering InformationML6206P ①②③④⑤⑥DesignatorDescriptionOutput Voltage eg. 30=3.0V ①②50=5.0V③Output Voltage Accuracy 2 = + 2.0% 3 = + 3.0% ④Package Type M = SOT-23 P = SOT-89 T = TO-92 ⑤Device Orientation R = Embossed Tape (Orientation of Device : Right) L = Embossed Tape (Orientation of Device : Left) B = Bag (TO-92)H = Paper Tape (TO-92) ⑥G = ROHS Part GG = Green PartML6206P302Packaging InformationRecommended Pattern LayoutSOT-89 :TO-92 :Units : mm SOT-23 : SOT-89SOT-23 :Tape and Reel InformationSOT-23 Taping Specifications :“R” type [Orientation of Device: Right ]Standard Type“L” type [Orientation of Device: Left ]Reverse TypeSIZE (mm) A ? 178 ± 0.8 B 2 ± 0.2 C ? 13 ± 0.2 D ? 21 ± 0.8 G 8 ± 0.5 H ? 603,000 pcs / reelSOT-23 :SOT-89 Taping Specifications : “R” type [Orientation of Device: Right ]Standard TypeSOT-89 :SIZE (mm) A ? 178 ± 0.8 B 2 ± 0.2 C ? 13 ± 0.2 D ? 21 ± 0.8 G 12 ± 0.5 H ? 601,000 pcs / reelReverse TypeSIZE (mm) P 12.7 ± 1.0 PO 12.7 ± 0.3 P2 6.35 ± 0.4 +0.45F 2.5 -0.15W 18.0 ± 1.0 WO 6.0 ± 0.3 W1 9.0 ± 0.5 W2 0.5 MAX H 19.0 ± 0.5 H0 16.0 ± 0.5 H1 32.25MAX D ? 4.0 ±0.2 t 0.6 ± 0.2 L13.5 MIN2,000 pcs / boxTO-92 Taping Specifications : MiniLogic reserves the rights to change the information and specification s without prior notice. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use.。

20ns/DIVV S = 3.3VV IN = 0.1V TO 1.1Vf = 10MHz620567 TA01b12ELECTRICAL CHARACTERISTICS The q denotes specifications which apply over the specified temperature range, otherwise specifications are at T A = 25°C. V S = 3V, 0V; V S = 5V, 0V; V CM = V OUT = 1V, unless otherwise noted.SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMRR Common Mode Rejection Ratio V CM = 0 to V+– 2V q7890dB Input Voltage Range q0V+ – 2V PSRR Power Supply Rejection Ratio V S = 3V to 12V q6775dBV CM = V OUT = 0.5VMinimum Supply Voltage V CM = 0.5V q 2.7V A VOL Large-Signal Voltage Gain V S = 5V, V O = 0.5V to 4.5V, R L = 1k q30100V/mVV S = 5V, V O = 1V to 3V, R L = 150Ωq520V/mVV S = 3V, V O = 0.5V to 2.5V, R L = 1k q2060V/mV V OL Output Voltage Swing Low (Note 7)No Load, Input Overdrive = 30mV q1025mVI SINK = 5mA q75150mVV S = 5V, I SINK = 25mA q300500mVV S = 3V, I SINK = 15mA q200350mV V OH Output Voltage Swing High (Note 7)No Load, Input Overdrive = 30mV q60100mVI SOURCE = 5mA q140250mVV S = 5V, I SOURCE = 25mA q6501200mVV S = 3V, I SOURCE = 15mA q300500mV I SC Short-Circuit Current V S = 5V, Output Shorted to GND3560mAq25mAV S = 3V, Output Shorted to GND3050mAq20mA I S Supply Current per Amplifier 3.755 mAq 5.75 mA GBW Gain Bandwidth Product f = 2MHz q65100MHz SR Slew Rate V S = 5V, A V = 2, R F = R G = 1k450V/µsV O = 1V to 4V, Measured from 1.5V to 3.5VChannel Separation f = 10MHz90dB FPBW Full Power Bandwidth V OUT = 2V P-P (Note 8)71MHz t S Settling time to 3%V S = 5V, ∆V OUT = 2V, A V = –1, R L = 150Ω15ns Settling time to 1%25nsDifferential Gain V S = 5V, A V = 2, R L = 150Ω, Output Black Level =1V0.05%Differential Phase V S = 5V, A V = 2, R L = 150Ω, Output Black Level =1V0.08DegThe q denotes specifications which apply over the specified temperature range, otherwise specifications are at T A = 25°C. V S = ±5V; V CM = V OUT = 0V, unless otherwise noted.SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Input Offset Voltage 1.3 4.5mVq6mV Input Offset Voltage Match13mV(Channel-to-Channel) (Note 5)q4mVInput Offset Voltage Drift (Note 6)q1018µV/°C I B Input Bias Current q1830µA I OS Input Offset Current q0.63µAInput Noise Voltage0.1Hz to 10Hz2µV P-P3620567f4620567fSYMBOL PARAMETERCONDITIONS MIN TYP MAX UNITS e n Input Noise Voltage Density f = 10kHz 9nV/√Hz i nInput Noise Current Density f = 10kHz 4pA/√Hz Input Resistance V CM = –5V to 3V 1M ΩInput Capacitance2pF CMRR Common Mode Rejection Ratio V CM = –5V to 3Vq 7890dBInput Voltage Range q –53V PSRR Power Supply Rejection Ratio V S = ±2V to ±6V q 6775dB A VOLLarge-Signal Voltage Gain V O = –4V to 4V, R L = 1k q 50133V/mV V O = –3V to 3V, R L = 150Ωq 7.520V/mVOutput Voltage SwingNo Load, Input Overdrive = 30mV q ±4.88±4.92V I OUT = ±5mA q ±4.75±4.85V I OUT = ±25mA q±3.8±4.35V I SC Short-Circuit Current Short to Ground±40±60mA q±30mA I S Supply Current per Amplifier45.6 mA q6.5mA GBW Gain Bandwidth Product f = 2MHzq 65100MHz SRSlew Rate A V = –1, R L = 1k350600V/µs V O = –4V to 4V, Measured from –3V to 3V Channel Separationf = 10MHz90dB FPBW Full Power Bandwidth V OUT = 8V P-P (Note 8)1424MHz t SSettling Time to 3%∆V OUT = 2V, A V = –1, R L = 150Ω15ns Settling Time to 1%25ns Differential Gain A V = 2, R L = 150Ω, Output Black Level = 1V 0.05%Differential PhaseA V = 2, R L = 150Ω, Output Black Level = 1V0.08DegELECTRICAL CHARACTERISTICSThe q denotes specifications which apply over the specified temperaturerange, otherwise specifications are at T A = 25°C. V S = ±5V; V CM = V OUT = 0V, unless otherwise noted.Note 1: Absolute Maximum ratings are those values beyond which the life of a device may be impaired.Note 2: The inputs are protected by back-to-back diodes. If the differential input voltage exceeds 1.4V, the input current should be limited to less than 10mA.Note 3: A heat sink may be required to keep the junction temperature below absolute maximum. This depends on the power supply voltage and how many amplifiers are shorted.Note 4: The LT6205C/LT6206C/LT6207C are guaranteed to meet specified performance from 0°C to 70°C and are designed, characterized and expected to meet specified performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LT6205I/LT6206I/LT6207I are guaranteed to meet specified performance from –40°C to 85°C.Note 5: Matching parameters are the difference between the two amplifiers A and D and between B and C of the LT6207; between the two amplifiers of the LT6206.Note 6: This parameter is not 100% tested.Note 7: Output voltage swings are measured between the output and power supply rails.Note 8: Full power bandwidth is calculated from the slew rate measurement: FPBW = SR/2πV PEAK .Note 9: There are reverse biased ESD diodes on all inputs and outputs.If these pins are forced beyond either supply, unlimited current will flow through these diodes. If the current is transient in nature and limited to less than 25mA, no damage to the device will occur.5V S = 5V, 0VV CM = 1VT A = 25°CTIME (2 SEC/DIV)620567 G16 67V S = 5V, 0V50ns/DIVA V = 1R L = 150Ω620567 G35V S = 5V, 0V50ns/DIVA V = 1R L = 150Ω620567 G3689APPLICATIO S I FOR ATIOWUU U V S = ±5V 50ns/DIVA V = 1R L = 150Ω620567 G37V S = ±5V 50ns/DIVA V = 1R L = 150Ω620567 G38V S = 5V, 0V 100ns/DIVA V = 2620567 G39Q13I1I2I3R2V +10620567fAPPLICATIO S I FOR ATIOW UUU Amplifier CharacteristicsFigure 1 shows a simplified schematic of the LT6205/LT6206/LT6207. The input stage consists of transistors Q1 to Q8 and resistor R1. This topology allows for high slew rates at low supply voltages. The input common mode range extends from ground to typically 1.75V from V CC , and is limited by 2 VBEs plus a saturation voltage of a current source. There are back-to-back series diodes, D1to D4, across the + and – inputs of each amplifier to limit the differential voltage to ±1.4V. R IN limits the current through these diodes if the input differential voltage ex-ceeds ±1.4V. The input stage drives the degeneration resistors of PNP and NPN current mirrors, Q9 to Q12,which convert the differential signals into a single-ended output. The complementary drive generator supplies cur-rent to the output transistors that swing from rail-to-rail.The current generated through R1, divided by the capaci-tor CM, determines the slew rate. Note that this current,and hence the slew rate, are proportional to the magnitude of the input step. The input step equals the output step divided by the closed loop gain. The highest slew rates are therefore obtained in the lowest gain configurations. The Typical Performance Characteristic Curve of Slew Rate vs Closed Loop Gain shows the details.ESDThe LT6205/LT6206/LT6207 have reverse-biased ESD protection diodes on all inputs and outputs as shown in Figure 1. If these pins are forced beyond either supply unlimited current will flow through these diodes. If the current is transient, and limited to 25mA or less, no damage to the device will yout and Passive ComponentsWith a gain bandwidth product of 100MHz and a slew rate of 450V/µs the LT6205/LT6206/LT6207 require special attention to board layout and supply bypassing. Use a ground plane, short lead lengths and RF-quality low ESR supply bypass capacitors. The positive supply pin should be bypassed with a small capacitor (typically 0.01µF to 0.1µF) within 0.25 inches of the pin. When driving heavy loads, an additional 4.7µF electrolytic capacitor should be used. When using split supplies, the same is true for thenegative supply pin. For optimum performance all feed-back components and bypass capacitors should be con-tained in a 0.5 inch by 0.5 inch area. This helps ensure minimal stray capacitances.The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole which can degrade stability. In general, use feedback resistors of 1k or less.Capacitive LoadThe LT6205/LT6206/LT6207 are optimized for wide band-width video applications. They can drive a capacitive load of 20pF in a unity-gain configuration. When driving a larger capacitive load, a resistor of 10Ω to 50Ω should be connected between the output and the capacitive load to avoid ringing or oscillation. The feedback should still be taken from the output pin so that the resistor will isolate the capacitive load and ensure stability. The Typical Per-formance Curves show the output overshoot when driving a capacitive load with different series resistors.Video Signal CharacteristicsComposite video is the most commonly used signal in broadcast-grade products and includes Luma (or lumi-nance, the intensity information), Chroma (the colorim-etry information) and Sync (vertical and horizontal raster timing) elements combined into a single signal, NTSC and PAL being the common formats. Component video for entertainment systems include separate signal(s) for the Luma and Chroma (i.e. Y/C or YPbPr) with Sync generally applied to the Luma channel (Y signal). In some instances,native RGB signals (separate intensity information for each primary color: red, green, blue) will have Sync included as well. All the signal types that include Sync are electrically similar from a voltage-swing standpoint, though various timing and bandwidth relationships exist depend-ing on the applicable standard.The typical video waveforms that include Sync (including full composite) are specified to have nominal 1V P-P ampli-tude. The lower 0.3V is reserved for “sync tips” that carry timing information, and by being at a lower potential than all the other information, represents blacker-than-black intensity, thereby causing scan retrace activity to be11620567fAPPLICATIO S I FOR ATIOW UUU invisible on a CRT. The “black” level of the waveform is at (or “setup” very slightly above) the upper limit of the sync information. Waveform content above the black-level is intensity information, with peak brightness represented at the maximum signal level. In the case of composite video,the modulated color subcarrier is superimposed on the waveform, but the dynamics remain inside the 1V P-P limit (a notable exception is the chroma ramp used for differen-tial-gain and differential-phase measurements, which can reach 1.15V P-P ).DC-Coupled Video Amplifier ConsiderationsTypically video amplifiers drive cables that are series terminated (“back-terminated”) at the source and load-terminated at the destination with resistances equal to the cable characteristic impedance, Z 0 (usually 75Ω). This configuration forms a 2:1 resistor divider in the cabling that must be accounted for in the driver amplifier by delivering 2V P-P output into an effective 2 • Z 0 load (e.g.150Ω). Driving the cable can require more than 13mA while the output is approaching the saturation-limits of the amplifier output. The absolute minimum supply is: V MIN =2 + V OH +V OL . For example, the LT6206 dual operating on 3.3V as shown on the front page of this datasheet, with exceptionally low V OH ≤ 0.5V and V OL ≤ 0.35V, provides a design margin of 0.45V. The design margin must be large enough to include supply variations and DC bias accuracy for the DC-coupled video input.Handling AC-Coupled Video SignalsAC-coupled video inputs are intrinsically more difficult to handle than those with DC-coupling because the average signal voltage of the video waveform is effected by the picture content, meaning that the black-level at the ampli-fier “wanders” with scene brightness. The wander is measured as 0.56V for a 1V P-P NTSC waveform changing from black-field to white-field and vice-versa, so an addi-tional 1.12V allowance must be made in the amplifier supply (assuming gain of 2, so V MIN = 3.12 + V OH +V OL ).For example, an LT6205 operating on 5V has a conserva-tive design margin of 1.03V. The amplifier output (for gain of 2) must swing +1.47V to –1.65V around the DC-operating point, so the biasing circuitry needs to be designed accordingly for optimal fidelity.Clamped AC-Input Cable DriverA popular method of further minimizing supply require-ments with AC-coupling is to employ a simple clamping scheme as shown in Figure 2. In this circuit, the LT6205operates from 3.3V by having the sync-tips control the charge on the coupling capacitor C1, thereby reducing the black-level input wander to ≈ 0.07V. The only minor drawback to this circuit is the slight sync-tip compression (≈ 0.025V at input) due to the diode conduction current,though the picture content remains full fidelity. This circuit has nearly the design margin of its DC-coupled counter-part, at 0.31V (for this circuit, V MIN = 2.14 + V OH +V OL ). The clamp-diode anode bias is selected to set the sync-tip output voltage at or slightly above V OL .YPbPr to RGB Component-Video ConverterThe back-page application uses the LT6207 quad to imple-ment a minimum amplifier count topology to transcode consumer component-video into RGB. In this circuit,signals only pass through one active stage from any input to any output, with passive additions being performed by the cable back-termination resistors. The compromise in using passive output addition is that the amplifier outputs must be twice as large as that of a conventional cable driver. The Y-channel section also has the demanding requirement that it single-handedly drives all three out-puts to full brightness during times of white content, so a helper current source is used to assure unclipped video when operating from ±5V supplies. This circuit maps sync-on-Y to sync on all the RGB channels, and for best results should have input black-levels at 0V nominal to prevent clipping.12131415Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.16Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 q FAX: (408) 434-0507 q © LINEAR TECHNOLOGY CORPORA TION 2003LT/TP 1003 1K • PRINTED IN USA。

ZL6201产品简介手册LDO AS01020200 1.0.01 Date:2020/12/17修订历史©2019 Guangzhou ZHIYUAN Micro Electronics Co., Ltd©2019 Guangzhou ZHIYUAN Micro Electronics Co., Ltd目 录1. 概述 (1)1.1ZL6201系列LDO ....................................................................................... 1 1.1.1 超低的静态电流 ................................................................................... 1 1.1.2 低压差 ................................................................................................. 1 1.1.3 良好的调整率....................................................................................... 2 1.1.4多种输出电压可选 (2)2. 免责声明 (3)1. 概述ZL6201系列芯片是广州致远微电子有限公司自行设计的低压差线性稳压器（LDO），采用先进的CMOS工艺技术打造，外部仅需要少量的元器件即可实现低压差线性稳压功能。

1.1 ZL6201系列LDOZL6201是一款超低功耗的100mA低压差线性稳压器，具有良好的线性调整率和负载调整率，包含过流保护，短路保护等保护功能。

ZL6201使用SOT23-3的极简封装和仅需极少的外围元件，加上超低功耗的设计使得它非常适用于低功耗场合，ZL6201提供多种输出电压型号可供选择。