当前位置：文档之家 › 51单片机外文文献【范本模板】

51单片机外文文献【范本模板】

  • 格式：doc
  • 大小：140.50 KB
  • 文档页数：14

The Introduction of AT89C51

Description

The AT89C51 is a low—power, high—performance CMOS 8—bit microcomputer

with 4K bytes of Flash programmable and erasable read only memory (PEROM）。

The device is manufactured using Atmel’s high—density nonvolatile memory

technology and is compatible with the industry-standard MCS—51 instruction set.

The on-chip Flash allows the program memory to be reprogrammed in—system or

by a conventional nonvolatile memory programmer。 By combining a versatile 8—bit

CPU with Flash on a monolithic chip， the Atmel AT89C51 is a powerful

microcomputer which provides a highly-flexible and cost—effective solution to many

embedded control applications.

Function characteristic

The AT89C51 provides the following standard features: 4K bytes of Flash, 128

bytes of RAM， 32 I/O lines, two 16-bit timer/counters， one 5 vector two-level

interrupt architecture， a full duplex serial port， one-chip oscillator and clock

circuitry. In addition， the AT89C51 is designed with static logic for operation down

to zero frequency and supports two software selectable power saving modes. The

Idle Mode stops the CPU while allowing the RAM， timer/counters, serial port and

interrupt system to continue functioning。 The Power—down Mode saves the RAM

contents but freezes the oscillator disabling all other chip functions until the next

hardware reset.

Pin Description

VCC：Supply voltage。

GND:Ground. Port 0

Port 0 is an 8—bit open-drain bi-directional I/O port. As an output port, each

pin can sink eight TTL inputs。 When 1s are written to port 0 pins, the pins can be

used as high—impedance inputs. Port 0 may also be configured to be the

multiplexed address/data bus during accesses to external program and data

memory。 In this mode P0 has internal Pull—up resistor。 Port 0 also receives the code

bytes during Flash programming, and outputs the code bytes during Program

verification。 External Pull—up resistors are required during Program verification.

Port 1

Port 1 is an 8—bit bi—directional I/O port with internal Pull-up resistors。 The

Port 1 output buffers can sink/source four TTL inputs。 When 1s are written to Port 1

pins they are pulled high by the internal Pull-up resistors and can be used as inputs。

As inputs， Port 1 pins that are externally being pulled low will source current （IIL)

because of the internal Pull-up resistors. Port 1 also receives the low—order address

bytes during Flash programming and verification.

Port 2

Port 2 is an 8-bit bi—directional I/O port with internal Pull—up resistor。 The Port

2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins

they are pulled high by the internal Pull—up resistor and can be used as inputs。 As

inputs, Port 2 pins that are externally being pulled low will source current， because

of the internal Pull—up resistor. Port 2 emits the high-order address byte during

fetches from external program memory and during accesses to external data

memory that use 16-bit addresses. In this application， it uses strong internal Pull-up

resistor when emitting 1s. During accesses to external data memory that use 8—bit

addresses, Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high—order address bits and some control signals during Flash

programming and verification。

Port 3

Port 3 is an 8—bit bi—directional I/O port with internal Pull-up resistor. The Port

3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins

they are pulled high by the internal Pull-up resistor and can be used as inputs。 As

inputs， Port 3 pins that are externally being pulled low will source current (IIL）

because of the Pull—up resistor。 Port 3 also serves the functions of various special

features of the AT89C51 as listed below：

Port 3 also receives some control signals for Flash programming and verification.

RST

Reset input. A high on this pin for two machine cycles while the oscillator is

running resets the device. ALE/PROG

Address Latch Enable output pulse for latching the low byte of the address

during accesses to external memory. This pin is also the program pulse input

（PROG） during Flash programming. In normal operation ALE is emitted at a

constant rate of 1/6 the oscillator frequency, and may be used for external timing or

clocking purposes. Note, however， that one ALE pulse is skipped during each access

to external Data Memory。

If desired， ALE operation can be disabled by setting bit 0 of SFR location 8EH. With

the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin

is weakly pulled high。 Setting the ALE—disable bit has no effect if the

合集下载

基于51单片机的英文论文

基于51单片机的英文论文

the Real-Time Clock Based on AT89S51

Author: Class: ; Name:

Abstract: Digital clock has become indispensable in people's daily life, it is widely

used in public places such as the family and the office, and it gives people great

convenience in study, work and entertainment. Due to the development of digital

integrated circuit technology and the advanced quartz technology, the digital clock has

advantages of accurate, stable performance and easy to carry. It is also used in

automatic control, automatic signal and etc. Although the digital clocks are already

sold on the market, but the single chip microcomputer timer function also can

complete the design of the digital clock circuit. So it is necessary to the design of the

digital clock. By single chip microcomputer internal timer timing precision, the four

单片机-英文参考文献

单片机-英文参考文献

Structure and function of the MCS-51 series

Structure and function of the MCS-51 series one-chip computer MCS-51 is a

name of a piece of one-chip computer series which Intel Company produces. This

company introduced 8 top-grade one-chip computers of MCS-51 series in 1980 after

introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of

kinds this line of one-chip computer the chips have,such as 8051, 8031, 8751,

80C51BH, 80C31BH,etc., their basic composition, basic performance and instruction

system are all the same. 8051 daily representatives- 51 serial one-chip computers .

An one-chip computer system is made up of several following parts: ( 1) One

microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not

depositting not can reading /data that write, such as result not middle of operation,

51单片机外文文献

51单片机外文文献

The Introduction of AT89C51

Description

The AT89C51 is a low—power, high-performance CMOS 8-bit microcomputer

with 4K bytes of Flash programmable and erasable read only memory （PEROM）。

The device is manufactured using Atmel's high—density nonvolatile memory

technology and is compatible with the industry—standard MCS-51 instruction set.

The on—chip Flash allows the program memory to be reprogrammed in—system or

by a conventional nonvolatile memory programmer. By combining a versatile 8-bit

CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful

microcomputer which provides a highly-flexible and cost—effective solution to many

embedded control applications.

Function characteristic

The AT89C51 provides the following standard features: 4K bytes of Flash, 128

bytes of RAM, 32 I/O lines， two 16-bit timer/counters， one 5 vector two—level

关于51单片机英文文献的英文翻译

关于51单片机英文文献的英文翻译

利用单片机的定时器

6.1 前言

这一章包含一个描述的定时器系统微控制器，包括通用定时器，该定时器，和看门狗。

6.2 总体结构和功能，计时器系统

时间是必不可少的操作微控制器系统，可以生成信号的精确确定的期限，或外部事件计数。这原因，定时器子系统，是目前所有的微控制器的实现，和涵盖的范围广泛的功能包括：

•生成精确的时间间隔

•测量时间的外部事件

•计数外部事件。

多数微控制器提供专用定时器，或使用通用计时器实现以下功能：

•实时时钟

•产生的脉冲宽度调制（脉宽调制）信号

•看门狗检测程序失控情况。

虽然有很大的差异在不同的实现通用定时器在不同的微控制器，有许多相似在操作的原则和结构的定时器子系统。

图6.1显示了一个定时器系统总体框图，说明原则实施最单片机定时器。核心要素的定时器子系统是一个计数器，tcnt（8或16位在长度），这可能是读或写的软件（有时）。时钟tcnt得到从系统时钟，除以一个可编程分频器，或外部时钟应用到一个单片机引脚。软件控制的计时器68使用6单片机定时器。

采用控制寄存器晶体管和信息方面的各种事件相关的计时器，可以读取状态寄存器tflg。几种工作模式是可能的计时器：

定时器溢出。在这种模式下，如果感兴趣的是当tcnt计数器达到它的最大数量和返回到零在下一个时钟脉冲。溢出信号这标志着这一事件是应用于中断控制逻辑（Ⅱ），这可能产生一个中断请求处理器。之间的时间间隔连续溢出控制通过修改输入时钟频率应用到tcnt，或以书面tcnt一初始值的计算。

•输入捕获。在这种经营模式，内容tcnt此刻的发生外部事件，定义边缘的一个输入信号，转移在捕获寄存器（民事），和一个中断请求可能会生成。由比较连续值捕获率，有可能确定之间的时间间隔的外部事件。

•输出比较。在这种经营模式，内容tcnt不断比较了硬件的内容的光学字符识别（比较寄存器的输出）指数字比较器的比较。当一个寄存器的内容比赛中，一个中断请求可能会生成。或者，可以比较匹配通过编程改变现状的一个或多个输出线。