1.General descriptionThe P89LPC938is a single-chip microcontroller,available in low cost packages,based on a high performance processor architecture that executes instructions in two to four clocks,six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC938 in order to reduce component count, board space, and system cost.2.Features2.1Principal featuress 8kB byte-erasable Flash code memory organized into 1kB sectors and 64-bytepages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.s 256-byte RAM data memory and a 512-byte auxiliary on-chip RAM.s 512-byte customer Data EEPROM on chip allows serialization of devices, storage of set-up parameters, etc.s 8-input multiplexed 10-bit A/D converter. Two analog comparators with selectable inputs and reference source.s Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output)and a 23-bit system timer that can also be used as a RTC.s Enhanced UART with fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400kHz byte-wide I 2C-bus communication port and SPI communication port.s CCU provides PWM, input capture, and output compare functions.s High-accuracy internal RC oscillator option allows operation without external oscillator components. The RC oscillator option is selectable and fine tunable.s 2.4V to 3.6V V DD operating range. I/O pins are 5V tolerant (may be pulled up or driven to 5.5V).s 28-pin TSSOP , PLCC, and HVQFN packages with 23 I/O pins minimum and up to 26I/O pins while using on-chip oscillator and reset options.P89LPC9388-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable Flash with 10-bit A/D converterRev. 01 — 25February 2005Product data sheet2.2Additional featuress A high performance 80C51 CPU provides instruction cycle times of 111ns to 222ns for all instructions except multiply and divide when executing at 18MHz. This is sixtimes the performance of the standard 80C51 running at the same clock frequency. Alower clock frequency for the same performance results in power savings and reduced EMI.s Serial Flash ICP allows simple production coding with commercial EPROM programmers. Flash security bits prevent reading of sensitive application programs.s Serial Flash ISP allows coding while the device is mounted in the end application.s In-Application Programming of the Flash code memory.This allows changing the code in a running application.s Watchdog timer with separate on-chip oscillator, requiring no external components.The watchdog prescaler is selectable from eight values.s Low voltage reset (brownout detect) allows a graceful system shutdown when power fails. May optionally be configured as an interrupt.s Idle and two different power-down reduced power modes. Improved wake-up from Power-down mode (a LOW interrupt input starts execution). Typical power-downcurrent is 1µA (total power-down with voltage comparators disabled).s Active-LOW reset. On-chip power-on reset allows operation without external reset components. A reset counter and reset glitch suppression circuitry prevent spuriousand incomplete resets. A software reset function is also available.s Configurable on-chip oscillator with frequency range options selected by user programmed Flash configuration bits. Oscillator options support frequencies from20kHz to the maximum operating frequency of 18MHz.s Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator allowing it to perform an oscillator fail detect function.s Programmable port output configuration options: quasi-bidirectional, open drain, push-pull, input-only.s Port ‘input pattern match’ detect. Port0 may generate an interrupt when the value of the pins match or do not match a programmable pattern.s LED drive capability (20mA) on all port pins. A maximum limit is specified for the entire chip.s Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10ns minimum ramp times.s Only power and ground connections are required to operate the P89LPC938 when internal reset option is selected.s Four interrupt priority levels.s Eight keypad interrupt inputs, plus two additional external interrupt inputs.s Schmitt trigger port inputs.s Second data pointer.s Emulation support.3.Ordering information3.1Ordering optionsTable 1:Ordering informationType numberPackage NameDescriptionVersion P89LPC938FA PLCC28plastic leaded chip carrier; 28 leads SOT261-2P89LPC938FDH TSSOP28plastic thin shrink small outline package;28leads; body width 4.4mmSOT361-1P89LPC938FHNHVQFN28plastic thermal enhanced very thin quad flat package; no leads; 28 terminals;body 6×6×0.85mmSOT788-1Table 2:Ordering optionsType number Flash memory Temperature range Frequency P89LPC938FA 8kB −40°C to +85°C 0 MHz to 18MHz P89LPC938FDH 8kB −40°C to +85°C 0 MHz to 18MHz P89LPC938FHN8kB−40°C to +85°C0 MHz to 18MHz4.Block diagramFig 1.Block diagram.ACCELERATED 2-CLOCK 80C51 CPU8 kBCODE FLASH 256-BYTE DATA RAM PORT 2CONFIGURABLE I/Os PORT 1CONFIGURABLE I/Os PORT 0CONFIGURABLE I/OsKEYPAD INTERRUPT PROGRAMMABLE OSCILLATOR DIVIDERCPU clockCONFIGURABLE OSCILLATORON-CHIP RCOSCILLATORinternal busCRYST AL ORRESONA TORPOWER MONITOR (POWER-ON RESET, BROWNOUT RESET)002aab106UARTANALOG COMP ARATORS512-BYTE AUXILIARY RAMI 2C-BUS512-BYTE DAT A EEPROM PORT 3CONFIGURABLE I/Os CCU (CAPTURE/COMPARE UNIT)P89LPC938WATCHDOG TIMER AND OSCILLATORTIMER 0TIMER 1REAL-TIME CLOCK/SYSTEM TIMERSPIADC0P3[1:0]P2[7:0]P1[7:0]P0[7:0]X2X1TXD RXD SCL SDA T0T1CMP2CIN2B CIN2A CMP1CIN1A CIN1B OCAOCB OCC OCD ICAAD00AD01AD02AD03AD04AD05AD06AD07ICBSPICLK MOSI MISO SS5.Functional diagramFig 2.P89LPC938 functional diagram.V DDV SSPORT 0PORT 3TXD RXD T0INT0INT1RST SCL SDA002aab075CMP2CIN2B CIN2A CIN1B CIN1A CMPREF CMP1T1XT AL2XT AL1KBI0KBI1KBI2KBI3KBI4KBI5KBI6KBI7MOSI MISO SSSPICLK AD00AD01AD02AD03AD05PORT 1PORT 2P89LPC938OCB OCC ICB OCD OCA ICAAD04AD07AD06CLKOUT6.Pinning information6.1PinningFig 3.TSSOP28 pin configuration. Fig 4. PLCC28 pin configuration.P89LPC938FDH002aab1011 2 3 4 5 6 7 8 9 10 11 1213 1416 15 18 17 20 19 22 21 24 23 26 25 28 27P2.0/ICB/AD07P2.1/OCD/AD06 P0.0/CMP2/KBI0/AD05P1.7/OCC/AD04P1.6/OCBP1.5/RSTV SSP3.1/XTAL1 P3.0/XTAL2/CLKOUTP1.4/INT1P1.3/INT0/SDAP1.2/T0/SCLP2.2/MOSIP2.3/MISOP2.7/ICAP2.6/OCAP0.1/CIN2B/KBI1/AD00P0.2/CIN2A/KBI2/AD01P0.3/CIN1B/KBI3/AD02P0.4/CIN1A/KBI4/AD03P0.5/CMPREF/KBI5V DDP0.6/CMP1/KBI6P0.7/T1/KBI7P1.0/TXDP1.1/RXDP2.5/SPICLKP2.4/SSP89LPC938FA002aab0855 6 7 8 9 10 1125242322212019 121314151617184321282726P1.6/OCBP1.5/RSTV SSP3.1/XTAL1 P3.0/XTAL2/CLKOUTP1.4/INT1P1.3/INT0/SDA P1.7/OCC/AD4P./CMP2/KBI/AD5P2.1/OCD/AD6P2./ICB/AD7P2.7/ICAP2.6/OCAP.1/CIN2B/KBI1/ADP0.2/CIN2A/KBI2/AD01P0.3/CIN1B/KBI3/AD02P0.4/CIN1A/KBI4/AD03P0.5/CMPREF/KBI5V DDP0.6/CMP1/KBI6P0.7/T1/KBI7P1.2/T/SCLP2.2/MOSIP2.3/MISOP2.4/SSP2.5/SPICLKP1.1/RXDP1./TXD6.2Pin descriptionFig 5.HVQFN28 pin configuration (top view).002aab073P89LPC938FHNTransparent top view71561651741831922012189101112131428272625242322terminal 1index area P 1.7/O C C /A D 04P 2.7/I C AP 2.1/O C D /A D 06P 2.0/I C B /A D 07P 0.0/C M P 2/K B I 0/A D 05P 2.6/O C AP 0.1/C I N 2B /K B I 1/A D 00P 2.4/S S P 2.2/M O S IP 2.3/M I S O P 1.2/T 0/S C LP 2.5/S P I C L K P 1.0/T X D P 1.1/R X D P1.4/INT1P1.3/INT0/SDAP3.0/XTAL2/CLKOUTP3.1/XTAL1V SS P1.5/RSTP1.6/OCB P0.6/CMP1/KBI6P0.7/T1/KBI7P0.5/CMPREF/KBI5V DDP0.4/CIN1A/KBI4/AD03P0.3/CIN1B/KBI3/AD02P0.2/CIN2A/KBI2/AD01Table 3:Pin descriptionSymbolPinType DescriptionTSSOP28,PLCC28HVQFN28P0.0 to P0.7I/OPort 0:Port 0 is an 8-bit I/O port with a user-configurable output type.During reset Port 0latches are configured in the input only mode with the internal pull-up disabled. The operation of Port 0 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to Section 7.13.1 “Port configurations”and Table 10 “DC electrical characteristics” for details.The Keypad Interrupt feature operates with Port 0 pins.All pins have Schmitt triggered inputs.Port 0 also provides various special functions as described below:P0.0/CMP2/KBI0/AD05327I/O P0.0 —Port 0 bit 0.O CMP2 —Comparator 2 output.I KBI0 —Keyboard input 0.IAD05 —ADC0 channel 5 analog input.P0.1/CIN2B/KBI1/AD002622I/O P0.1 —Port 0 bit 1.I CIN2B —Comparator 2 positive input B.I KBI1 —Keyboard input 1.IAD00 —ADC0 channel 0 analog input.P0.2/CIN2A/KBI2/AD012521I/O P0.2 —Port 0 bit 2.I CIN2A —Comparator 2 positive input A.I KBI2 —Keyboard input 2.IAD01 —ADC0 channel 1 analog input.P0.3/CIN1B/KBI3/AD022420I/O P0.3 —Port 0 bit 3.I CIN1B —Comparator 1 positive input B.I KBI3 —Keyboard input 3.IAD02 —ADC0 channel 2 analog input.P0.4/CIN1A/KBI4/AD032319I/O P0.4 —Port 0 bit 4.I CIN1A —Comparator 1 positive input A.I KBI4 —Keyboard input 4.IAD03 —ADC0 channel 3 analog input.P0.5/CMPREF/KBI52218I/O P0.5 —Port 0 bit 5.I CMPREF —Comparator reference (negative) input.IKBI5 —Keyboard input 5.P0.6/CMP1/KBI62016I/O P0.6 —Port 0 bit 6.O CMP1 —Comparator 1 output.IKBI6 —Keyboard input 6.P0.7/T1/KBI71915I/O P0.7 —Port 0 bit 7.I/O T1 —Timer/counter 1 external count input or overflow output.IKBI7 —Keyboard input 7.P1.0 to P1.7I/O,I [1]Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type,except for three pins as noted below. During reset Port 1 latches areconfigured in the input only mode with the internal pull-up disabled. The operation of the configurable Port 1 pins as inputs and outputs depends upon the port configuration selected. Each of the configurable port pins are programmed independently. Refer to Section 7.13.1 “Portconfigurations” and Table 10 “DC electrical characteristics” for details.P1.2 to P1.3 are open drain when used as outputs. P1.5 is input only.All pins have Schmitt triggered inputs.Port 1 also provides various special functions as described below:P1.0/TXD 1814I/O P1.0 —Port 1 bit 0.O TXD —Transmitter output for the serial port.P1.1/RXD 1713I/O P1.1 —Port 1 bit 1.I RXD —Receiver input for the serial port.P1.2/T0/SCL128I/O P1.2 —Port 1 bit 2 (open-drain when used as output).I/O T0 —Timer/counter 0external count input or overflow output (open-drain when used as output).I/OSCL —I 2C serial clock input/output.Table 3:Pin description …continuedSymbolPinType DescriptionTSSOP28,PLCC28HVQFN28P1.3/INT0/SDA 117I/O P1.3 —Port 1 bit 3 (open-drain when used as output).I INT0 —External interrupt 0 input.I/OSDA —I 2C serial data input/output.P1.4/INT1106I P1.4 —Port 1 bit 4.I INT1 —External interrupt 1 input.P1.5/RST62I P1.5 —Port 1 bit 5 (input only).IRST —External Reset input during power-on or if selected via UCFG1.When functioning as a reset input, a LOW on this pin resets themicrocontroller, causing I/O ports and peripherals to take on their default states, and the processor begins execution at address 0. Also used during a power-on sequence to force In-System Programming mode.When using an oscillator frequency above 12MHz, the reset input function of P1.5 must be enabled. An external circuit is required to hold the device in reset at power-up until V DD has reached itsspecified level. When system power is removed V DD will fall below the minimum specified operating voltage. When using an oscillator frequency above 12MHz, in some applications, an externalbrownout detect circuit may be required to hold the device in reset when V DD falls below the minimum specified operating range.P1.6/OCB 51I/O P1.6 —Port 1 bit 6.O OCB —Output Compare B.P1.7/OCC/AD04428I/O P1.7 —Port 1 bit 7.O OCC —Output Compare C.I AD04 —ADC0 channel 4 analog input.P2.0 to P2.7I/OPort 2: Port 2 is an 8-bit I/O port with a user-configurable output type.During reset Port 2latches are configured in the input only mode with the internal pull-up disabled. The operation of Port 2 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to Section 7.13.1 “Port configurations”and Table 10 “DC electrical characteristics” for details.All pins have Schmitt triggered inputs.Port 2 also provides various special functions as described below:P2.0/ICB/AD07125I/O P2.0 —Port 2 bit 0.I ICB —Input Capture B.IAD07 —ADC0 channel 7 analog input.P2.1/OCD/AD06226I/O P2.1 —Port 2 bit 1.O OCD —Output Compare D.IAD06 —ADC0 channel 6 analog input.P2.2/MOSI 139I/O P2.2 —Port 2 bit 2.I/OMOSI —SPI master out slave in. When configured as master, this pin is output; when configured as slave, this pin is input.P2.3/MISO 1410I/O P2.3 —Port 2 bit 3.I/OMISO —When configured as master, this pin is input, when configured as slave, this pin is output.Table 3:Pin description …continuedSymbolPinType DescriptionTSSOP28,PLCC28HVQFN28[1]Input/Output for P1.0 to P1.4, P1.6, P1.7. Input for P1.5.P2.4/SS 1511I/O P2.4 —Port 2 bit 4.I SS —SPI Slave select.P2.5/SPICLK1612I/O P2.5 —Port 2 bit 5.I/OSPICLK —SPI clock. When configured as master, this pin is output;when configured as slave, this pin is input.P2.6/OCA 2723I/O P2.6 —Port 2 bit 6.O OCA —Output Compare A.P2.7/ICA 2824I/O P2.7 —Port 2 bit 7.I ICA —Input Capture A.P3.0 to P3.1I/OPort 3: Port 3 is a 2-bit I/O port with a user-configurable output type.During reset Port 3latches are configured in the input only mode with the internal pull-up disabled. The operation of Port 3 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to Section 7.13.1 “Port configurations”and Table 10 “DC electrical characteristics” for details.All pins have Schmitt triggered inputs.Port 3 also provides various special functions as described below:P3.0/XT AL2/CLKOUT95I/O P3.0 —Port 3 bit 0.O XTAL2 —Output from the oscillator amplifier (when a crystal oscillator option is selected via the Flash configuration.OCLKOUT —CPU clock divided by 2 when enabled via SFR bit (ENCLK -TRIM.6). It can be used if the CPU clock is the internal RC oscillator,watchdog oscillator or external clock input, except when XTAL1/XT AL2are used to generate clock source for the RTC/system timer.P3.1/XT AL184I/O P3.1 —Port 3 bit 1.IXTAL1 —Input to the oscillator circuit and internal clock generatorcircuits (when selected via the Flash configuration). It can be a port pin if internal RC oscillator or watchdog oscillator is used as the CPU clock source,and if XT AL1/XTAL2 are not used to generate the clock for the RTC/system timer.V SS 73I Ground: 0V reference.V DD2117IPower Supply: This is the power supply voltage for normal operation as well as Idle and Power-down modes.Table 3:Pin description …continuedSymbolPinType DescriptionTSSOP28,PLCC28HVQFN28Philips Semiconductors P89LPC9388-bit microcontroller with 10-bit A/D converter 7.Functional descriptionRemark:Please refer to the P89LPC938 User’s Manual for a more detailed functionaldescription.7.1Special function registersRemark:SFR accesses are restricted in the following ways:•User must not attempt to access any SFR locations not defined.•Accesses to any defined SFR locations must be strictly for the functions for the SFRs.•SFR bits labeled ‘-’, ‘0’ or ‘1’ can only be written and read as follows:–‘-’ Unless otherwise specified,must be written with ‘0’, but can return any valuewhen read (even if it was written with ‘0’). It is a reserved bit and may be used infuture derivatives.–‘0’must be written with ‘0’, and will return a ‘0’ when read.–‘1’must be written with ‘1’, and will return a ‘1’ when read.9397 750 14051© Koninklijke Philips Electronics N.V . 2005. All rights reserved.Product data sheet Rev. 01 — 25February 200512 of 68Philips Semiconductors P89LPC9388-bit microcontroller with 10-bit A/D converterTable 4:P89LPC938 Special function registers* indicates SFRs that are bit Description SFR addr.Bit functions and addresses Reset valueMSB LSB Hex BinaryBit address E7E6E5E4E3E2E1E0ACC*Accumulator E0H 0000000000AD0CON ADC0 control register 97H ENBI0ENADCI 0TMM0EDGE0ADCI0ENADC0ADCS01ADCS000000000000AD0INS ADC0 input select A3H ADI07ADI06ADI05ADI04ADI03ADI02ADI01ADI000000000000AD0MOD AADC0 mode register A C0H BNDI0BURST0SCC0SCAN0----0000000000AD0MOD BADC0 mode register B A1H CLK2CLK1CLK0-----00000x0000AUXR1Auxiliary function register A2H CLKLP EBRR ENT1ENT0SRST 0-DPS 00000000x0Bit address F7F6F5F4F3F2F1F0B* B register F0H 0000000000BRGR0[1]Baud rate generator rate low BEH 0000000000BRGR1[1]Baud rate generator rate high BFH 0000000000BRGCON Baud rate generator control BDH ------SBRGS BRGEN 00[1]xxxxxx00CCCRA Capture compare A control registerEAH ICECA2ICECA1ICECA0ICESA ICNFA FCOA OCMA1OCMA00000000000CCCRB Capture compare B control registerEBH ICECB2ICECB1ICECB0ICESB ICNFB FCOB OCMB1OCMB00000000000CCCRC Capture compare C control registerECH -----FCOC OCMC1OCMC000xxxxx000CCCRD Capture compare D control registerEDH -----FCOD OCMD1OCMD000xxxxx000CMP1Comparator 1 control register ACH --CE1CP1CN1OE1CO1CMF100[2]xx000000CMP2Comparator 2 control register ADH --CE2CP2CN2OE2CO2CMF200[2]xx000000DEECON Data EEPROM control registerF1H EEIF HVERR ECTL1ECTL0---EADR80E 00001110DEEDA T Data EEPROM data register F2H 0000000000DEEADR Data EEPROM address registerF3H 0000000000DIVM CPU clock divide-by-M control 95H 00000000009397 750 14051© Koninklijke Philips Electronics N.V . 2005. All rights reserved.Product data sheet Rev. 01 — 25February 200513 of 68Philips Semiconductors P89LPC9388-bit microcontroller with 10-bit A/D converter DPTR Data pointer (2bytes)DPH Data pointer high 83H 0000000000DPL Data pointer low 82H 0000000000FMADRH Program Flash address high E7H 0000000000FMADRL Program Flash address low E6H 0000000000FMCON Program Flash control (Read)E4H BUSY ---HVA HVE SV OI 7001110000Program Flash control (Write)E4H FMCMD.7FMCMD.6FMCMD.5FMCMD.4FMCMD.3FMCMD.2FMCMD.1FMCMD.FMDA T A Program Flash data E5H 0000000000I2ADR I 2C slave address register DBH I2ADR.6I2ADR.5I2ADR.4I2ADR.3I2ADR.2I2ADR.1I2ADR.0GC 0000000000Bit address DF DE DD DC DB DA D9D8I2CON*I 2C control register D8H -I2EN STA STO SI AA -CRSEL 00x00000x0I2DA T I 2C data register DAHI2SCLH Serial clock generator/SCL duty cycle register highDDH 0000000000I2SCLL Serial clock generator/SCL duty cycle register lowDCH 0000000000I2ST AT I 2C status register D9H STA.4ST A.3ST A.2ST A.1ST A.0000F811111000ICRAH Input capture A register high ABH 0000000000ICRAL Input capture A register low AAH 0000000000ICRBH Input capture B register high AFH 0000000000ICRBL Input capture B register low AEH 0000000000Bit address AF AE AD AC AB AA A9A8IEN0*Interrupt enable 0A8H EA EWDRT EBO ES/ESR ET1EX1ET0EX00000000000Bit address EF EE ED EC EB EA E9E8IEN1*Interrupt enable 1E8H EIEE EST -ECCU ESPI EC EKBI EI2C 00[2]00x00000IEN2Interrupt enable 2D5H ------EADC -00[2]00x00000Bit address BF BE BD BC BB BA B9B8IP0*Interrupt priority 0B8H -PWDRT PBO PS/PSR PT1PX1PT0PX000[2]x0000000Table 4:P89LPC938 Special function registers …continued* indicates SFRs that are bit addressable.Name Description SFR addr.Bit functions and addresses Reset valueMSB LSB Hex Binary9397 750 14051© Koninklijke Philips Electronics N.V . 2005. All rights reserved.Product data sheet Rev. 01 — 25February 200514 of 68Philips Semiconductors P89LPC9388-bit microcontroller with 10-bit A/D converter IP0H Interrupt priority 0 high B7H -PWDRT H PBOH PSH/PSRHPT1H PX1H PT0H PX0H 00[2]x0000000Bit address FF FE FD FC FB FA F9F8IP1*Interrupt priority 1F8H PADEE PST -PCCU PSPI PC PKBI PI2C 00[2]00x00000IP1H Interrupt priority 1 high F7H P ADEEH PSTH -PCCUH PSPIH PCH PKBIH PI2CH 00[2]00x00000IP2Interrupt priority 2D6H ------P ADC -00[2]00x00000IP2H Interrupt priority 2 high D7H ------PADCH -00[2]00x00000KBCON Keypad control register 94H ------PA TN _SELKBIF 00[2]xxxxxx00KBMASK Keypad interrupt mask register86H 0000000000KBP ATN Keypad pattern register FF 11111111OCRAH Output compare A register highEFH 0000000000OCRAL Output compare A register lowEEH 0000000000OCRBH Output compare B register highFBH 0000000000OCRBL Output compare B register lowFAH 0000000000OCRCH Output compare C register highFDH 0000000000OCRCL Output compare C register lowFCH 0000000000OCRDH Output compare D register highFFH 0000000000OCRDL Output compare D register lowFEH 0000000000Bit address 8786858483828180P0*Port 080H T1/KB7CMP1/KB6CMPREF /KB5CIN1A /KB4CIN1B /KB3CIN2A /KB2CIN2B /KB1CMP2/KB0[2]Bit address 9796959493929190Table 4:P89LPC938 Special function registers …continued* indicates SFRs that are bit addressable.Name Description SFR addr.Bit functions and addresses Reset valueMSB LSB Hex Binary9397 750 14051© Koninklijke Philips Electronics N.V . 2005. All rights reserved.Product data sheet Rev. 01 — 25February 200515 of 68Philips Semiconductors P89LPC9388-bit microcontroller with 10-bit A/D converter P1*Port 190H OCC OCB RST INT1INT0/SDAT0/SCL RXD TXD [2]Bit address 9796959493929190P2*Port 2A0H ICA OCA SPICLK SS MISO MOSI OCD ICB [2]Bit address B7B6B5B4B3B2B1B0P3*Port 3B0H ------XT AL1XT AL2[2]P0M1Port 0 output mode 184H (P0M1.7)(P0M1.6)(P0M1.5)(P0M1.4)(P0M1.3)(P0M1.2)(P0M1.1)(P0M1.0)FF [2]11111111P0M2Port 0 output mode 285H (P0M2.7)(P0M2.6)(P0M2.5)(P0M2.4)(P0M2.3)(P0M2.2)(P0M2.1)(P0M2.0)00[2]00000000P1M1Port 1 output mode 191H (P1M1.7)(P1M1.6)-(P1M1.4)(P1M1.3)(P1M1.2)(P1M1.1)(P1M1.0)D3[2]11x1xx11P1M2Port 1 output mode 292H (P1M2.7)(P1M2.6)-(P1M2.4)(P1M2.3)(P1M2.2)(P1M2.1)(P1M2.0)00[2]00x0xx00P2M1Port 2 output mode 1A4H (P2M1.7)(P2M1.6)(P2M1.5)(P2M1.4)(P2M1.3)(P2M1.2)(P2M1.1)(P2M1.0)FF [2]11111111P2M2Port 2 output mode 2A5H (P2M2.7)(P2M2.6)(P2M2.5)(P2M2.4)(P2M2.3)(P2M2.2)(P2M2.1)(P2M2.0)00[2]00000000P3M1Port 3 output mode 1B1H ------(P3M1.1)(P3M1.0)03[2]xxxxxx11P3M2Port 3 output mode 2B2H ------(P3M2.1)(P3M2.0)00[2]xxxxxx00PCON Power control register 87H SMOD1SMOD0BOPD BOI GF1GF0PMOD1PMOD00000000000PCONA Power control register A B5H RTCPD DEEPD VCPD ADPD I2PD SPPD SPD CCUPD 00[2]00000000Bit address D7D6D5D4D3D2D1D0PSW*Program status word D0H CY AC F0RS1RS0OV F1P 0000000000PT0AD Port 0 digital input disable F6H --PT0AD.5PT0AD.4PT0AD.3PT0AD.2PT0AD.1-00xx00000x RSTSRC Reset source register DFH --BOF POF R_BK R_WD R_SF R_EX [3]RTCCON RTC control D1H RTCF RTCS1RTCS0---ERTC RTCEN 60[2][4]011xxx00RTCH RTC register high D2H 00[4]00000000RTCL RTC register low D3H 00[4]00000000SADDR Serial port address register A9H 0000000000SADEN Serial port address enable B9H 0000000000SBUF Serial Port data buffer register 99H xx xxxxxxxxBit address 9F 9E 9D 9C 9B 9A 9998SCON*Serial port control 98H SM0/FE SM1SM2REN TB8RB8TI RI 0000000000SSTA T Serial port extended status register BAH DBMOD INTLO CIDIS DBISEL FE BR OE STINT 0000000000Table 4:P89LPC938 Special function registers …continued* indicates SFRs that are bit addressable.Name Description SFR addr.Bit functions and addresses Reset valueMSB LSB Hex Binary9397 750 14051© Koninklijke Philips Electronics N.V . 2005. All rights reserved.Product data sheet Rev. 01 — 25February 200516 of 68Philips Semiconductors P89LPC9388-bit microcontroller with 10-bit A/D converter SP Stack pointer 81H 0700000111SPCTL SPI control register E2H SSIG SPEN DORD MSTR CPOL CPHA SPR1SPR00400000100SPST AT SPI status register E1H SPIF WCOL ------0000xxxxxx SPDA T SPI data register E3H 0000000000T AMOD Timer 0 and 1 auxiliary mode 8FH ---T1M2---T0M200xxx0xxx0Bit address 8F 8E 8D 8C 8B 8A 8988TCON*Timer 0 and 1 control 88H TF1TR1TF0TR0IE1IT1IE0IT00000000000TCR20*CCU control register 0C8H PLEEN HLTRN HLTEN ALTCD ALT AB TDIR2TMOD21TMOD200000000000TCR21CCU control register 1F9H TCOU2---PLLDV .3PLLDV .2PLLDV .1PLLDV .0000xxx0000TH0Timer 0 high 8CH 0000000000TH1Timer 1 high 8DH 0000000000TH2CCU timer high CDH 0000000000TICR2CCU interrupt control register C9H TOIE2TOCIE2D TOCIE2C TOCIE2B TOCIE2A -TICIE2B TICIE2A 0000000x00TIFR2CCU interrupt flag register E9H TOIF2TOCF2D TOCF2C TOCF2B TOCF2A -TICF2B TICF2A 0000000x00TISE2CCU interrupt status encode register DEH -----ENCINT .2ENCINT .1ENCINT .000xxxxx000TL0Timer 0 low 8AH 0000000000TL1Timer 1 low 8BH 0000000000TL2CCU timer low CCH 0000000000TMOD Timer 0 and 1 mode 89H T1GA TE T1C/T T1M1T1M0T0GATE T0C/T T0M1T0M00000000000TOR2H CCU reload register high CFH 0000000000TOR2L CCU reload register low CEH 0000000000TPCR2H Prescaler control register high CBH ------TPCR2H.1TPCR2H.000xxxxxx00TPCR2L Prescaler control register low CAH TPCR2L.7TPCR2L.6TPCR2L.5TPCR2L.4TPCR2L.3TPCR2L.2TPCR2L.1TPCR2L.00000000000TRIM Internal oscillator trim register 96H RCCLK ENCLK TRIM.5TRIM.4TRIM.3TRIM.2TRIM.1TRIM.0[5][4]WDCON Watchdog control register A7H PRE2PRE1PRE0--WDRUN WDTOF WDCLK [6][4]Table 4:P89LPC938 Special function registers …continued* indicates SFRs that are bit addressable.Name Description SFR addr.Bit functions and addresses Reset valueMSB LSB Hex Binary9397 750 14051© Koninklijke Philips Electronics N.V. 2005. All rights reserved.Product data sheet Rev. 01 — 25February200517 of 68Philips Semiconductors P89LPC9388-bit microcontroller with 10-bit A/D converter[1]BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN =1, the result is unpredictable.[2]All ports are in input only (high-impedance) state after power-up.[3]The RSTSRC register reflects the cause of the P89LPC938 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset value isxx110000.[4]The only reset source that affects these SFRs is power-on reset.[5]On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.[6]After reset, the value is 111001x1, i.e., PRE2-PRE0 are all logic 1, WDRUN =1 and WDCLK =1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.Other resets will not affect WDTOF .WDL Watchdog load C1H FF 11111111WFEED1Watchdog feed 1C2HWFEED2Watchdog feed 2C3HTable 4:P89LPC938 Special function registers …continued* indicates SFRs that are bit addressable.Name Description SFR addr.Bit functions and addresses Reset valueMSB LSB Hex Binary。
