IntroductiontoMEMSDesignandFabrication

半导体工艺经典教材
以下是一些被认为是半导体工艺经典教材的书籍：
1. "Introduction to Microelectronic Fabrication: Volume 1" by Richard C. Jaeger and Travis N. Blalock
《微电子制造导论：第一卷》
2. "Fundamentals of Semiconductor Fabrication" by Gary S. May and Simon M. Sze
《半导体制造基础》
3. "Principles of Semiconductor Devices" by Simon M. Sze and Kwok K. Ng
《半导体器件原理》
4. "Modern Semiconductor Device Physics" by S. M. Sze and Ming-Kwei Lee
《现代半导体器件物理学》
5. "Physics of Semiconductor Devices" by S. M. Sze and Kwok K. Ng
《半导体器件物理学》
6. "Fundamentals of Microfabrication and Nanotechnology" by Marc J. Madou
《微制造与纳米技术基础》
7. "Advanced Semiconductor Fundamentals" by Robert F. Pierret 《半导体基础进阶》
这些书籍涵盖了半导体工艺的基础知识和先进的概念，适合学习和研究半导体工艺的学生和专业人员。

Semiconductor Manufacturing Technology半导体制造技术Instructor’s ManualMichael QuirkJulian SerdaCopyright Prentice HallTable of Contents目录OverviewI. Chapter1. Semiconductor industry overview2. Semiconductor materials3. Device technologies—IC families4. Silicon and wafer preparation5. Chemicals in the industry6. Contamination control7. Process metrology8. Process gas controls9. IC fabrication overview10. Oxidation11. Deposition12. Metallization13. Photoresist14. Exposure15. Develop16. Etch17. Ion implant18. Polish19. Test20. Assembly and packagingII. Answers to End-of-Chapter Review QuestionsIII. Test Bank (supplied on diskette)IV. Chapter illustrations, tables, bulleted lists and major topics (supplied on CD-ROM)Notes to Instructors:1)The chapter overview provides a concise summary of the main topics in each chapter.2)The correct answer for each test bank question is highlighted in bold. Test bankquestions are based on the end-of-chapter questions. If a student studies the end-of-chapter questions (which are linked to the italicized words in each chapter), then they will be successful on the test bank questions.2Chapter 1Introduction to the Semiconductor Industry Die:管芯 defective:有缺陷的Development of an Industry•The roots of the electronic industry are based on the vacuum tube and early use of silicon for signal transmission prior to World War II. The first electronic computer, the ENIAC, wasdeveloped at the University of Pennsylvania during World War II.•William Shockley, John Bardeen and Walter Brattain invented the solid-state transistor at Bell Telephone Laboratories on December 16, 1947. The semiconductor industry grew rapidly in the 1950s to commercialize the new transistor technology, with many early pioneers working inSilicon Valley in Northern California.Circuit Integration•The first integrated circuit, or IC, was independently co-invented by Jack Kilby at Texas Instruments and Robert Noyce at Fairchild Semiconductor in 1959. An IC integrates multiple electronic components on one substrate of silicon.•Circuit integration eras are: small scale integration (SSI) with 2 - 50 components, medium scale integration (MSI) with 50 – 5k components, large scale integration (LSI) with 5k to 100kcomponents, very large scale integration (VLSI) with 100k to 1M components, and ultra large scale integration (ULSI) with > 1M components.1IC Fabrication•Chips (or die) are fabricated on a thin slice of silicon, known as a wafer (or substrate). Wafers are fabricated in a facility known as a wafer fab, or simply fab.•The five stages of IC fabrication are:Wafer preparation: silicon is purified and prepared into wafers.Wafer fabrication: microchips are fabricated in a wafer fab by either a merchant chip supplier, captive chip producer, fabless company or foundry.Wafer test: Each individual die is probed and electrically tested to sort for good or bad chips.Assembly and packaging: Each individual die is assembled into its electronic package.Final test: Each packaged IC undergoes final electrical test.•Key semiconductor trends are:Increase in chip performance through reduced critical dimensions (CD), more components per chip (Moore’s law, which predicts the doubling of components every 18-24 months) andreduced power consumption.Increase in chip reliability during usage.Reduction in chip price, with an estimated price reduction of 100 million times for the 50 years prior to 1996.The Electronic Era•The 1950s saw the development of many different types of transistor technology, and lead to the development of the silicon age.•The 1960s were an era of process development to begin the integration of ICs, with many new chip-manufacturing companies.•The 1970s were the era of medium-scale integration and saw increased competition in the industry, the development of the microprocessor and the development of equipment technology. •The 1980s introduced automation into the wafer fab and improvements in manufacturing efficiency and product quality.•The 1990s were the ULSI integration era with the volume production of a wide range of ICs with sub-micron geometries.Career paths•There are a wide range of career paths in semiconductor manufacturing, including technician, engineer and management.2Chapter 2 Characteristics of Semiconductor MaterialsAtomic Structure•The atomic model has three types of particles: neutral neutrons（不带电的中子）, positively charged protons（带正电的质子）in the nucleus and negatively charged electrons（带负电的核外电子） that orbit the nucleus. Outermost electrons are in the valence shell, and influence the chemical and physical properties of the atom. Ions form when an atom gains or loses one or more electrons.The Periodic Table•The periodic table lists all known elements. The group number of the periodic table represents the number of valence shell electrons of the element. We are primarily concerned with group numbers IA through VIIIA.•Ionic bonds are formed when valence shell electrons are transferred from the atoms of one element to another. Unstable atoms (e.g., group VIIIA atoms because they lack one electron) easily form ionic bonds.•Covalent bonds have atoms of different elements that share valence shell electrons.3Classifying Materials•There are three difference classes of materials:ConductorsInsulatorsSemiconductors•Conductor materials have low resistance to current flow, such as copper. Insulators have high resistance to current flow. Capacitance is the storage of electrical charge on two conductive plates separated by a dielectric material. The quality of the insulation material between the plates is the dielectric constant. Semiconductor materials can function as either a conductor or insulator.Silicon•Silicon is an elemental semiconductor material because of four valence shell electrons. It occurs in nature as silica and is refined and purified to make wafers.•Pure silicon is intrinsic silicon. The silicon atoms bond together in covalent bonds, which defines many of silicon’s properties. Silicon atoms bond together in set, repeatable patterns, referred to asa crystal.•Germanium was the first semiconductor material used to make chips, but it was soon replaced by silicon. The reasons for this change are:Abundance of siliconHigher melting temperature for wider processing rangeWide temperature range during semiconductor usageNatural growth of silicon dioxide•Silicon dioxide (SiO2) is a high quality, stable electrical insulator material that also serves as a good chemical barrier to protect silicon from external contaminants. The ability to grow stable, thin SiO2 is fundamental to the fabrication of Metal-Oxide-Semiconductor (MOS) devices. •Doping increases silicon conductivity by adding small amounts of other elements. Common dopant elements are from trivalent, p-type Group IIIA (boron) and pentavalent, n-type Group VA (phosphorus, arsenic and antimony).•It is the junction between the n-type and p-type doped regions (referred to as a pn junction) that permit silicon to function as a semiconductor.4Alternative Semiconductor Materials•The alternative semiconductor materials are primarily the compound semiconductors. They are formed from Group IIIA and Group VA (referred to as III-V compounds). An example is gallium arsenide (GaAs).•Some alternative semiconductors come from Group IIA and VIA, referred to as II-VI compounds. •GaAs is the most common III-V compound semiconductor material. GaAs ICs have greater electron mobility, and therefore are faster than ICs made with silicon. GaAs ICs also have higher radiation hardness than silicon, which is better for space and military applications. The primary disadvantage of GaAs is the lack of a natural oxide.5Chapter 3Device TechnologiesCircuit Types•There are two basic types of circuits: analog and digital. Analog circuits have electrical data that varies continuously over a range of voltage, current and power values. Digital circuits have operating signals that vary about two distinct voltage levels – a high and a low.Passive Component Structures•Passive components such as resistors and capacitors conduct electrical current regardless of how the component is connected. IC resistors are a passive component. They can have unwanted resistance known as parasitic resistance. IC capacitor structures can also have unintentional capacitanceActive Component Structures•Active components, such as diodes and transistors can be used to control the direction of current flow. PN junction diodes are formed when there is a region of n-type semiconductor adjacent to a region of p-type semiconductor. A difference in charge at the pn junction creates a depletion region that results in a barrier voltage that must be overcome before a diode can be operated. A bias voltage can be configured to have a reverse bias, with little or no conduction through the diode, or with a forward bias, which permits current flow.•The bipolar junction transistor (BJT) has three electrodes and two pn junctions. A BJT is configured as an npn or pnp transistor and biased for conduction mode. It is a current-amplifying device.6• A schottky diode is formed when metal is brought in contact with a lightly doped n-type semiconductor material. This diode is used in faster and more power efficient BJT circuits.•The field-effect transistor (FET), a voltage-amplifying device, is more compact and power efficient than BJT devices. A thin gate oxide located between the other two electrodes of the transistor insulates the gate on the MOSFET. There are two categories of MOSFETs, nMOS (n-channel) and pMOS (p-channel), each which is defined by its majority current carriers. There is a biasing scheme for operating each type of MOSFET in conduction mode.•For many years, nMOS transistors have been the choice of most IC manufacturers. CMOS, with both nMOS and pMOS transistors in the same IC, has been the most popular device technology since the early 1980s.•BiCMOS technology makes use of the best features of both CMOS and bipolar technology in the same IC device.•Another way to categorize FETs is in terms of enhancement mode and depletion mode. The major different is in the way the channels are doped: enhancement-mode channels are doped opposite in polarity to the source and drain regions, whereas depletion mode channels are doped the same as their respective source and drain regions.Latchup in CMOS Devices•Parasitic transistors can create a latchup condition(???????) in CMOS ICs that causes transistors to unintentionally（无心的） turn on. To control latchup, an epitaxial layer is grown on the wafer surface and an isolation barrier（隔离阻障）is placed between the transistors. An isolation layer can also be buried deep below the transistors.Integrated Circuit Productsz There are a wide range of semiconductor ICs found in electrical and electronic products. This includes the linear IC family, which operates primarily with anal3og circuit applications, and the digital IC family, which includes devices that operate with binary bits of data signals.7Chapter 4Silicon and Wafer Preparation8z Semiconductor-Grade Silicon•The highly refined silicon used for wafer fabrication is termed semiconductor-grade silicon (SGS), and sometimes referred to as electronic-grade silicon. The ultra-high purity of semiconductor-grade silicon is obtained from a multi-step process referred to as the Siemens process.Crystal Structure• A crystal is a solid material with an ordered, 3-dimensional pattern over a long range. This is different from an amorphous material that lacks a repetitive structure.•The unit cell is the most fundamental entity for the long-range order found in crystals. The silicon unit cell is a face-centered cubic diamond structure. Unit cells can be organized in a non-regular arrangement, known as a polycrystal. A monocrystal are neatly arranged unit cells.Crystal Orientation•The orientation of unit cells in a crystal is described by a set of numbers known as Miller indices.The most common crystal planes on a wafer are (100), (110), and (111). Wafers with a (100) crystal plane orientation are most common for MOS devices, whereas (111) is most common for bipolar devices.Monocrystal Silicon Growth•Silicon monocrystal ingots are grown with the Czochralski (CZ) method to achieve the correct crystal orientation and doping. A CZ crystal puller is used to grow the silicon ingots. Chunks of silicon are heated in a crucible in the furnace of the puller, while a perfect silicon crystal seed is used to start the new crystal structure.• A pull process serves to precisely replicate the seed structure. The main parameters during the ingot growth are pull rate and crystal rotation. More homogeneous crystals are achieved with a magnetic field around the silicon melt, known as magnetic CZ.•Dopant material is added to the melt to dope the silicon ingot to the desired electrical resistivity.Impurities are controlled during ingot growth. A float-zone crystal growth method is used toachieve high-purity silicon with lower oxygen content.•Large-diameter ingots are grown today, with a transition underway to produce 300-mm ingot diameters. There are cost benefits for larger diameter wafers, including more die produced on a single wafer.Crystal Defects in Silicon•Crystal defects are interruptions in the repetitive nature of the unit cell. Defect density is the number of defects per square centimeter of wafer surface.•Three general types of crystal defects are: 1) point defects, 2) dislocations, and 3) gross defects.Point defects are vacancies (or voids), interstitial (an atom located in a void) and Frenkel defects, where an atom leaves its lattice site and positions itself in a void. A form of dislocation is astacking fault, which is due to layer stacking errors. Oxygen-induced stacking faults are induced following thermal oxidation. Gross defects are related to the crystal structure (often occurring during crystal growth).Wafer Preparation•The cylindrical, single-crystal ingot undergoes a series of process steps to create wafers, including machining operations, chemical operations, surface polishing and quality checks.•The first wafer preparation steps are the shaping operations: end removal, diameter grinding, and wafer flat or notch. Once these are complete, the ingot undergoes wafer slicing, followed by wafer lapping to remove mechanical damage and an edge contour. Wafer etching is done to chemically remove damage and contamination, followed by polishing. The final steps are cleaning, wafer evaluation and packaging.Quality Measures•Wafer suppliers must produce wafers to stringent quality requirements, including: Physical dimensions: actual dimensions of the wafer (e.g., thickness, etc.).Flatness: linear thickness variation across the wafer.Microroughness: peaks and valleys found on the wafer surface.Oxygen content: excessive oxygen can affect mechanical and electrical properties.Crystal defects: must be minimized for optimum wafer quality.Particles: controlled to minimize yield loss during wafer fabrication.Bulk resistivity(电阻系数): uniform resistivity from doping during crystal growth is critical. Epitaxial Layer•An epitaxial layer (or epi layer) is grown on the wafer surface to achieve the same single crystal structure of the wafer with control over doping type of the epi layer. Epitaxy minimizes latch-up problems as device geometries continue to shrink.Chapter 5Chemicals in Semiconductor FabricationEquipment Service Chase Production BayChemical Supply Room Chemical Distribution Center Holding tank Chemical drumsProcess equipmentControl unit Pump Filter Raised and perforated floorElectronic control cablesSupply air ductDual-wall piping for leak confinement PumpFilterChemical control and leak detection Valve boxes for leak containment Exhaust air ductStates of Matter• Matter in the universe exists in 3 basic states (宇宙万物存在着三种基本形态): solid, liquid andgas. A fourth state is plasma.Properties of Materials• Material properties are the physical and chemical characteristics that describe its unique identity.• Different properties for chemicals in semiconductor manufacturing are: temperature, pressure andvacuum, condensation, vapor pressure, sublimation and deposition, density, surface tension, thermal expansion and stress.Temperature is a measure of how hot or cold a substance is relative to another substance. Pressure is the force exerted per unit area. Vacuum is the removal of gas molecules.Condensation is the process of changing a gas into a liquid. Vaporization is changing a liquidinto a gas.Vapor pressure is the pressure exerted by a vapor in a closed container at equilibrium.Sublimation is the process of changing a solid directly into a gas. Deposition is changing a gas into a solid.Density is the mass of a substance divided by its volume.Surface tension of a liquid is the energy required to increase the surface area of contact.Thermal expansion is the increase in an object’s dimension due to heating.Stress occurs when an object is exposed to a force.Process Chemicals•Semiconductor manufacturing requires extensive chemicals.• A chemical solution is a chemical mixture. The solvent is the component of the solution present in larger amount. The dissolved substances are the solutes.•Acids are solutions that contain hydrogen and dissociate in water to yield hydronium ions. A base is a substance that contains the OH chemical group and dissociates in water to yield the hydroxide ion, OH-.•The pH scale is used to assess the strength of a solution as an acid or base. The pH scale varies from 0 to 14, with 7 being the neutral point. Acids have pH below 7 and bases have pH values above 7.• A solvent is a substance capable of dissolving another substance to form a solution.• A bulk chemical distribution (BCD) system is often used to deliver liquid chemicals to the process tools. Some chemicals are not suitable for BCD and instead use point-of-use (POU) delivery, which means they are stored and used at the process station.•Gases are generally categorized as bulk gases or specialty gases. Bulk gases are the relatively simple gases to manufacture and are traditionally oxygen, nitrogen, hydrogen, helium and argon.The specialty gases, or process gases, are other important gases used in a wafer fab, and usually supplied in low volume.•Specialty gases are usually transported to the fab in metal cylinders.•The local gas distribution system requires a gas purge to flush out undesirable residual gas. Gas delivery systems have special piping and connections systems. A gas stick controls the incoming gas at the process tool.•Specialty gases may be classified as hydrides, fluorinated compounds or acid gases.Chapter 6Contamination Control in Wafer FabsIntroduction•Modern semiconductor manufacturing is performed in a cleanroom, isolated from the outside environment and contaminants.Types of contamination•Cleanroom contamination has five categories: particles, metallic impurities, organic contamination, native oxides and electrostatic discharge. Killer defects are those causes of failure where the chip fails during electrical test.Particles: objects that adhere to a wafer surface and cause yield loss. A particle is a killer defect if it is greater than one-half the minimum device feature size.Metallic impurities: the alkali metals found in common chemicals. Metallic ions are highly mobile and referred to as mobile ionic contaminants (MICs).Organic contamination: contains carbon, such as lubricants and bacteria.Native oxides: thin layer of oxide growth on the wafer surface due to exposure to air.Electrostatic discharge (ESD): uncontrolled transfer of static charge that can damage the microchip.Sources and Control of Contamination•The sources of contamination in a wafer fab are: air, humans, facility, water, process chemicals, process gases and production equipment.Air: class number designates the air quality inside a cleanroom by defining the particle size and density.Humans: a human is a particle generator. Humans wear a cleanroom garment and follow cleanroom protocol to minimize contamination.Facility: the layout is generally done as a ballroom (open space) or bay and chase design.Laminar airflow with air filtering is used to minimize particles. Electrostatic discharge iscontrolled by static-dissipative materials, grounding and air ionization.Ultrapure deiniozed (DI) water: Unacceptable contaminants are removed from DI water through filtration to maintain a resistivity of 18 megohm-cm. The zeta potential represents a charge on fine particles in water, which are trapped by a special filter. UV lamps are used for bacterial sterilization.Process chemicals: filtered to be free of contamination, either by particle filtration, microfiltration (membrane filter), ultrafiltration and reverse osmosis (or hyperfiltration).Process gases: filtered to achieve ultraclean gas.Production equipment: a significant source of particles in a fab.Workstation design: a common layout is bulkhead equipment, where the major equipment is located behind the production bay in the service chase. Wafer handling is done with robotic wafer handlers. A minienvironment is a localized environment where wafers are transferred on a pod and isolated from contamination.Wafer Wet Cleaning•The predominant wafer surface cleaning process is with wet chemistry. The industry standard wet-clean process is the RCA clean, consisting of standard clean 1 (SC-1) and standard clean 2 (SC-2).•SC-1 is a mixture of ammonium hydroxide, hydrogen peroxide and DI water and capable of removing particles and organic materials. For particles, removal is primarily through oxidation of the particle or electric repulsion.•SC-2 is a mixture of hydrochloric acid, hydrogen peroxide and DI water and used to remove metals from the wafer surface.•RCA clean has been modified with diluted cleaning chemistries. The piranha cleaning mixture combines sulfuric acid and hydrogen peroxide to remove organic and metallic impurities. Many cleaning steps include an HF last step to remove native oxide.•Megasonics(兆声清洗) is widely used for wet cleaning. It has ultrasonic energy with frequencies near 1 MHz. Spray cleaning will spray wet-cleaning chemicals onto the wafer. Scrubbing is an effective method for removing particles from the wafer surface.•Wafer rinse is done with overflow rinse, dump rinse and spray rinse. Wafer drying is done with spin dryer or IPA(异丙醇) vapor dry (isopropyl alcohol).•Some alternatives to RCA clean are dry cleaning, such as with plasma-based cleaning, ozone and cryogenic aerosol cleaning.Chapter 7Metrology and Defect InspectionIC Metrology•In a wafer fab, metrology refers to the techniques and procedures for determining physical and electrical properties of the wafer.•In-process data has traditionally been collected on monitor wafers. Measurement equipment is either stand-alone or integrated.•Yield is the percent of good parts produced out of the total group of parts started. It is an indicator of the health of the fabrication process.Quality Measures•Semiconductor quality measures define the requirements for specific aspects of wafer fabrication to ensure acceptable device performance.•Film thickness is generally divided into the measurement of opaque film or transparent film. Sheet resistance measured with a four-point probe is a common method of measuring opaque films (e.g., metal film). A contour map shows sheet resistance deviations across the wafer surface.•Ellipsometry is a nondestructive, noncontact measurement technique for transparent films. It works based on linearly polarized light that reflects off the sample and is elliptically polarized.•Reflectometry is used to measure a film thickness based on how light reflects off the top and bottom surface of the film layer. X-ray and photoacoustic technology are also used to measure film thickness.•Film stress is measured by analyzing changes in the radius of curvature of the wafer. Variations in the refractive index are used to highlight contamination in the film.•Dopant concentration is traditionally measured with a four-point probe. The latest technology is the thermal-wave system, which measures the lattice damage in the implanted wafer after ion implantation. Another method for measuring dopant concentration is spreading resistance probe. •Brightfield detection is the traditional light source for microscope equipment. An optical microscope uses light reflection to detect surface defects. Darkfield detection examines light scattered off defects on the wafer surface. Light scattering uses darkfield detection to detectsurface particles by illuminating the surface with laser light and then using optical imaging.•Critical dimensions (CDs) are measured to achieve precise control over feature size dimensions.The scanning electron microscope is often used to measure CDs.•Conformal step coverage is measured with a surface profiler that has a stylus tip.•Overlay registration measures the ability to accurately print photoresist patterns over a previously etched pattern.•Capacitance-voltage (C-V) test is used to verify acceptable charge conditions and cleanliness at the gate structure in a MOS device.Analytical Equipment•The secondary-ion mass spectrometry (SIMS) is a method of eroding a wafer surface with accelerated ions in a magnetic field to analyze the surface material composition.•The atomic force microscope (AFM) is a surface profiler that scans a small, counterbalanced tip probe over the wafer to create a 3-D surface map.•Auger electron spectroscopy (AES) measures composition on the wafer surface by measuring the energy of the auger electrons. It identifies elements to a depth of about 2 nm. Another instrument used to identify surface chemical species is X-ray photoelectron spectroscopy (XPS).•Transmission electron microscopy (TEM) uses a beam of electrons that is transmitted through a thin slice of the wafer. It is capable of quantifying very small features on a wafer, such as silicon crystal point defects.•Energy-dispersive spectrometer (EDX) is a widely used X-ray detection method for identifying elements. It is often used in conjunction with the SEM.• A focused ion beam (FIB) system is a destructive technique that focuses a beam of ions on the wafer to carve a thin cross section from any wafer area. This permits analysis of the wafermaterial.Chapter 8Gas Control in Process ChambersEtch process chambers••The process chamber is a controlled vacuum environment where intended chemical reactions take place under controlled conditions. Process chambers are often configured as a cluster tool. Vacuum•Vacuum ranges are low (rough) vacuum, medium vacuum, high vacuum and ultrahigh vacuum (UHV). When pressure is lowered in a vacuum, the mean free path(平均自由行程) increases, which is important for how gases flow through the system and for creating a plasma.Vacuum Pumps•Roughing pumps are used to achieve a low to medium vacuum and to exhaust a high vacuum pump. High vacuum pumps achieve a high to ultrahigh vacuum.•Roughing pumps are dry mechanical pumps or a blower pump (also referred to as a booster). Two common high vacuum pumps are a turbomolecular (turbo) pump and cryopump. The turbo pump is a reliable, clean pump that works on the principle of mechanical compression. The cryopump isa capture pump that removes gases from the process chamber by freezing them.。

mems器件的书以下是一些关于MEMS器件的书籍推荐：1. "MEMS: Design and Fabrication" by Tai-Ran Hsu –这本书是关于MEMS器件设计和制造的教科书，涵盖了MEMS的基本概念和技术，以及制造流程和工具的详细介绍。

2. "MEMS Mechanical Sensors" by Steve Beeby and Neil White –这本书着重介绍了MEMS机械传感器的原理和应用。

它包含了传感器设计和工作原理，以及微加工技术和封装等相关内容。

3. "MEMS and Microsystems: Design, Manufacture, and Nanoscale Engineering" by Tai-Ran Hsu –这本书是一本全面介绍MEMS和微系统的教材，包括设计、制造和纳米尺度工程等方面的内容。

4. "MEMS and Microstructures in Aerospace Applications" by Robert Osiander –这本书专注于MEMS和微结构在航空航天应用中的使用。

它涵盖了MEMS传感器、执行器、惯性导航系统、无线通信系统等领域的应用案例和技术。

5. "Introduction to Microelectromechanical Systems Engineering" by Nadim Maluf and Kirt Williams –这本书是一本广泛介绍MEMS工程的教材，包含了MEMS器件的设计、制造、材料和封装等方面的内容。

请注意，这些书籍是根据普遍认可和推荐的著作来推荐的，但无法保证其最新性和适应性。

在选择书籍之前，请考虑浏览图书的评论和内容摘要，以确保其符合您的具体需求和兴趣。

mems详细制造工艺英文回答：MEMS Fabrication Process.Microelectromechanical systems (MEMS) are miniaturized devices that combine electrical and mechanical componentson a single chip. They are fabricated using a variety of techniques, including photolithography, etching, deposition, and bonding.Photolithography is used to create patterns in a thin layer of photoresist on the surface of a substrate. The photoresist is exposed to ultraviolet light through a mask, which blocks the light in areas that will be etched away. The exposed photoresist is then developed, leaving behind a pattern of exposed substrate.Etching is used to remove the exposed substrate material. This can be done using a variety of etchants,including wet etchants, dry etchants, and plasma etchants. Wet etchants are typically acids or bases that dissolve the substrate material. Dry etchants are gases that react with the substrate material to form volatile products. Plasma etchants are gases that are ionized and then accelerated towards the substrate, where they react with the substrate material.Deposition is used to add material to the substrate. This can be done using a variety of techniques, including physical vapor deposition (PVD), chemical vapor deposition (CVD), and electrochemical deposition (ECD). PVD involves vaporizing a source material and then depositing it on the substrate. CVD involves reacting a gas with a precursor gas on the substrate surface to form a solid film. ECD involves reducing a metal ion in solution to form a metal film onthe substrate.Bonding is used to join two or more substrates together. This can be done using a variety of techniques, including adhesive bonding, thermal bonding, and anodic bonding. Adhesive bonding involves using an adhesive to join thesubstrates together. Thermal bonding involves heating the substrates to a temperature at which they will bond together. Anodic bonding involves applying a voltage to the substrates, which causes the formation of an oxide layerthat bonds the substrates together.MEMS devices are used in a wide variety of applications, including:Automotive.Biomedical.Consumer electronics.Industrial.Military.中文回答：MEMS 详细制造工艺。

mems器件的书-回复
关于MEMS器件的书籍有很多，以下是一些推荐：
1. "Microelectromechanical Systems: Fundamentals and Applications" by James R. Tilton: 这本书详细介绍了MEMS的基本原理、设计和制造方法，以及在各种应用中的使用。

2. "Introduction to Microelectromechanical Systems Engineering" by Mohammad R. Kozhin, Craig A. Johnson, and Thomas W. Kenny: 这本书以工程的角度介绍了MEMS的基本概念和设计原则，并包括了许多实例和习题。

3. "MEMS: Introduction and Fundamentals" by Mehrdad N. Gharavi: 这本书主要介绍了MEMS的基本概念、材料、设计和制造方法，适合初学者阅读。

4. "MEMS for Biomedical Applications" edited by Min-Feng Yu: 这本书主要关注了MEMS在生物医学领域的应用，包括生物传感器、微流控设备等。

5. "Micromachined Transducers Sourcebook" edited by Fred Halsall: 这本书涵盖了各种类型的MEMS传感器和执行器，包括光学、声学、力
学、化学等。

mems器件的书以下是几本关于Mems器件的书籍：1. "Fundamentals of Microfabrication and Nanotechnology" by Marc J. Madou - 这本书提供了关于微加工和纳米技术的基本知识，包括MEMS器件的设计、加工和应用。

2. "Introduction to Microelectromechanical Systems Engineering" by Nadim Maluf and Kirt Williams - 这本书介绍了MEMS技术的基本原理和设计方法，并提供了一些实际的例子和应用。

3. "MEMS for Automotive and Aerospace Applications" by S. O. Reza Moheimani - 这本书重点介绍了MEMS技术在汽车和航空航天领域的应用，包括传感器、执行器等方面。

4. "MEMS: Design and Fabrication" by Mohamed Gad-el-Hak - 这本书提供了MEMS器件设计和制造的详细指南，包括材料选择、加工过程、工具和技术。

5. "MEMS Mechanical Sensors" by Scott D. Collins - 这本书专注于MEMS技术在机械传感器方面的应用，包括压力传感器、加速度计和惯性导航系统等。

6. "MEMS: Applications" edited by Vikas Choudhary - 这本书收集了关于MEMS技术在各个领域应用的文章，包括医疗器械、通信设备、环境监测等。

这些书籍可以帮助读者了解MEMS器件的原理、设计和应用，对于学习和研究MEMS技术非常有帮助。

1An Introduction toMicro-fabrication Technology●Fundamental importance of MF technology●History: key inventions enabling the technology ●Essential features of the MF technology ●Technology development trendProf. Mingxiang WANG2It’s a Silicon EraWe are at the beginning of the silicon Era!The Information Age•Revolutionary development of microelectronics •Great social-economic impact by the development:–3C : Computer, Communication, Consumer electronics –Automation, Robotics…•Significant change in economic structures:• a new industry: IT industry •Internet: information highway–“www ”: World wide network of information–“Highway ”: optical-fiber cable, wireless, and others –“Cars ”: Multimedia system –Computer, mobile phone, TV, FAX …–All kinds of audio/video information transferred and provided•All based on “the Magic Si chips ” everywhere3Si Technology & Information Age•Microelectronics industry: the basis of the information age •Si based transistors are basic information carriers•Si/Semiconductor based micro-fabrication technology is the material/technology basis of the information ageInformation TechnologyComputer Multimedia CommunicationOptoelectronics ……Semiconductor Microelectronics4Historical milestones:key inventions enablingthe IC micro-fabrication technology •1st transistor 1947•1st junction transistor 1949•1st integrated circuit 1958•1st monolithic integrated circuit 1959•Invention of the planar process 1960•1st silicon MOSFET 19605Invention of Transistor•1947.12.23: Invention of pointcontact transistor by Bardeen &Brattain–1st paper on Transistor: “Thetransistor, a semiconductortriode”, Phys. Rev. 74, 230,1948–By Webster’s:Transistor = transfer + resistortransferring electrical signalacross a resistor6How does the 1st transistor works? John Bardeen, Nobel lecture, Dec.11, 1956 Semiconductor research leading to the pointcontact transistor7First transistor & its inventors 1947, John Bardeen, Walter Brattain & William Shockley,Bell lab (1956 Nobel Prize winner in Physics)8 Shockley developed basic theory of transistor (1948-1952)First PN Junction TransistorWilliam Shockley Gordon Teal Morgan SparksGordon Teal and Morgan Sparks made the first junction transistor in 1949,the construction of which eliminated many of the reliability problems of the point contact transistor.99/21/2013•1958.9.12 1st IC---“Solid Circuit” by J. Kilby of TI –Flip-flop phase shift oscillator–On Ge substrate–Mesa structure with 1 BJT, 3R, and 1C–Etching by black wax protection–Wire bond interconnect2000 Nobel Prize in Physics on Integrated Circuits (shared with Afilov and Kroemer )First Integrated Circuit101st monolithic IC by R.N. Noyce 1959 (Fairchild) –First micro-chip –On Si substrate–Flip-flop circuit with 6devices by Al interconnect –Based on Si BJT which is first made in 1954 (TI)First monolithic IC11Invention of Planar Process•1958-1960 b asic IC process developed: oxidation (Atalla; bell Lab), pn junction isolation (K. Levovec), Al film evaporation…•1960Si planar process inventedInventor ：Jean Hoerni －－Fairchild1213First MOS Transistors1st MOSFET Bell lab 1960•1959-63: MOS devices–1959: MOS capacitor (J. Moll; Stanford)–1960: Kahng & Atalla(Bell lab), structure same as modern MOSFETs –1960-63: research on Si surface & MOS devices (Sah, Deal, Grove…)–1963: concept of CMOS (Wanlass, Sah; Fairchild)14Modern Micro-Processor Unit1st CPU, 2300T Intel 4004, 1971, 8umIntel dual-core MPU, 410MT ,Nov. 2007, 45nm15Flowchart of IC fabrication16Essential Featuresof Micro-fabrication Technology●Extremely capital intensiveHeavy capital Investment for clean rooms & Fab equipments ●Batch Process:>100 Billion Transistors per wafer ●Outstanding Manufacturability : Yield>95% per lot●Extremely cheap productsContinuously lower price per function ●Technology widely extendable17Capital intensive●Heavy capital investment for -clean rooms -fab equipments-materials used in a fab: rigorous requirements ●Estimated cost for a fab-Intel’s Fab22 in Arizona (8-inch, 0.13μm, copper based) opened in October 2001 cost 2 billion USD (cost of 2 Tsing Ma Bridges!)-Cost for a new 12-inch 45-65nm generation fab cost about 10 billion USD->70% cost used for equipments●NOT affordable by most countries!18300mm Global Fab LandscapeUnited States IBM Bldg 323Infineon Richmond Intel D1C Intel D1D Intel F11x Intel F12C Micron MTC TI DMOS 6TI DMOS 7JapanElpida Fab 1Elpida Fab 2Renesas/ Trecenti Toshiba OitaSony Kumamoto Sony Fab 2 Nagasaki Toshiba Yokkaichi City NEC Elec Yamagata TaiwanPowerchip Fab 1ProMOS Fab 2TSMC Fab 12A & B UMC Fab 12AInotera (Nanya + Infineon)Powerchip Fab 1Powerchip Fab 2TSMC Fab 14SingaporeUMC SingaporeEuropeAMD Fab 36Infineon SC300Intel Fab 24Crolles2 (TD)(STM, Philips, Moto)STM CataniaKoreaSamsung Line 12Samsung Line 13Samsung Line 14Sources: Silicon Strategies, EE Times, Nikkei Microelectronics, Industry MeetingsChinaSMIC Fab 419Toshiba Oita Works 300 mm Fab TSMC300 mm Super clean room in Tsukuba,SeleteIntel fabFab20NikonArF Scanner l = 193nm 2004Contact mask aligner 1970’sMainstream photo-lithography21Single Crystal Silicon300mm and 400mm Silicon Ingots w/o a single defects22When do we start planning for nextwafer size transition?9 yrs + 2 yrs delay*9 yrs + 6 yrs delay? 9 yrs + ?yrs delay675mm/2025?450mm/2015?300mm/2001200mm/1990 (125/150mm -1981)We are hereWhen does this happen?23Batch process●Requirement of cost recoveryhave to produce >10,000 wafers per month to recover the cost of 12-inch fab investment●Batch process->100 Billion transistors per wafer fabricated in parallel-sometimes ~20 wafers per lot processed in parallel -extremely productive●The essential feature of the planar process ●Ensure that fabricated products are cheap24Intel 300 mm75 mm, 100 mm, 50 mmWafers25Outstanding Manufacturability●Yield >95%per lot to earn money -evaluated by chip function●About 108(0.1 billion) transistors per ULSI chip, which would FAIL if only one transistor, one metal line, one contact or one other component fails!●What’s the yield at transistor/component level to achieve 95% yield at chip level?●Reliability: lifetime >10yrs●What’s other technologies could have such ability? -yield, batch process, micro/nano-fabrication, …26Modern MPU Chip1st CPU, 2300T Intel 4004, 1971, 8um Intel dual-core MPU, 410MT ,Nov. 2007, 45nm27Inside the chips28Electron Micrograph on MOS interface29Continuously cheaper products●Moore’s law means exponential decay of the price per function●What’s the price of a “car” if Moore’s law also holds?●The continuous price reduction is a tremendous competitiveness over traditional technology●Cheap product means the tremendous impact of the new technology is affordable to everyone!●A simple and strong reason why Silicon Era becomes the reality30Technology extendable●It’s more than an IC technology!●It’s more than just 3Cs,the micro-fabrication technology is widelyextendable to address almost all issues in our life ●Solar cells, photo-voltaic industry, energy harvest ●LED lightings●Flat panel displays, Thin film electronics ●MEMS devices: Sensors and Actuators ●Bio-chips, Health care…●It’s another strong reason why we are in Silicon Era!31Other applications of micro-fabrication(Source: University of Florida)32MEMS devices: an extension of Siplanar processEtched profiles of MEMS structures33Technology Development Trends ●Moore’s Law:would continues for another 30yrs ●More than Moore (MtM):●Micro-Systems: SoC, SiPMoore’s Law•Double the number of transistor every 18-24 months •Exponential growth ofsemiconductor technology & industry (A common law at early stage for a new industry under rapid development)•Govern the trend since 1960 and would continue in the next 20-30 yrs •An economics law of technology and market expansionFirst proposed in 1965by Gordon Moore ,co-founder of Intel3435New Generations under Moore’s Law●A new generationper 18-24 months ●X0.7 Min. feature size scaling ●X2 increase in transistor density ●X1.5 faster device switching speed ●Reduced chip power●Reduced chip cost●Increased functionality3619001950196019702000Vacuum Tube Transistor IC LSI VLSI 10 cm cm mm 10 m m 100 nm In 100 yrs, the feature size reduced by 106times Technology driver: BJT —CMOS —DRAM/CPU —Flash —Communication10-1m10-2m10-3m10-5m10-7mDownsizing of the components has been the driving force for circuit evolution37Transistor Scaling38Device feature sizeIntel 90nm Tech. Node Transistor Smallest species: VirusIn another 30yrs, device feature size wouldapproach molecular size <1nm (could be a limit), before which Moore’s law still continues.The Paradox of Moore’s Law●As transistors grow smaller, opportunities grow largerAs the basic element of information,and the basis ofthe information society ，IC &related micro-fabrication technology have been deeply involving into all hi-tech fields.3940More than Moore’s Law●More than Moore (MtM) Law:●System level Integration: SoC, SiP , it is the system that matters !●Micro-fabrication technology follows the trend of SoC and SiP, under Moore’s law as well as under More than Morre’s Law .9/21/2013414344。