General DescriptionThe MAX8520/MAX8521 are designed to drive thermo-electric coolers (TE Cs) in space-constrained optical modules. Both devices deliver ±1.5A output current and control the TEC current to eliminate harmful current surges. On-chip FE Ts minimize external components and high switching frequency reduces the size of exter-nal components.The MAX8520/MAX8521 operate from a single supply and bias the TEC between the outputs of two synchronous buck regulators. This operation allows for temperature control without “dead zones” or other nonlinearities at low current. This arrangement ensures that the control system does not hunt when the set-point is very close to the natural operating point, requiring a small amount of heating or cooling. An analog control signal precisely sets the TEC current.Both devices feature accurate, individually-adjustable heating current limit and cooling current limit along with maximum TEC voltage limit to improve the reliability of optical modules. An analog output signal monitors the TEC current. A unique ripple cancellation scheme helps reduce noise.The MAX8520 is available in a 5mm x 5mm TQFN pack-age and its switching frequency is adjustable up to 1MHz through an external resistor. The MAX8521 is also available in a 5mm x 5mm TQFN as well as space-saving 3mm x 3mm UCSP™ and 36-bump WLP (3mm x 3mm) packages, with a pin-selectable switch-ing frequency of 500kHz or 1MHz.ApplicationsSFF/SFP Modules Fiber Optic Laser Modules Fiber Optic Network Equipment ATEBiotech Lab EquipmentFeatureso Circuit Footprint 0.31in 2o Low Profile Design o On-Chip Power MOSFETso High-Efficiency Switch-Mode Design o Ripple Cancellation for Low Noiseo Direct Current Control Prevents TEC Current Surges o 5% Accurate Adjustable Heating/Cooling Current Limits o 2% Accurate TEC Voltage Limito No Dead Zone or Hunting at Low Output Current o ITEC Monitors TEC Current o 1% Accurate Voltage Reference o Switching Frequency up to 1MHz o Synchronization (MAX8521)MAX8520/MAX8521Modules________________________________________________________________Maxim Integrated Products 1Ordering InformationFor pricing, delivery, and ordering information,please contact Maxim Direct at 1-888-629-4642,or visit Maxim’s website at .UCSP is a trademark of Maxim Integrated Products, Inc.Typical Operating CircuitPin Configurations appear at end of data sheet +Denotes a lead(Pb)-free/RoHS-compliant package.*EP = Exposed pad.**Four center bumps depopulated.M A X 8520/M A X 8521Smallest TEC Power Drivers for Optical ModulesABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.V DD to GND..............................................................-0.3V to +6V SHDN , MAXV, MAXIP, MAXIN,CTLI to GND.........................................................-0.3V to +6V COMP, FREQ, OS1, OS2, CS, REF,ITEC to GND...........................................-0.3V to (V DD + 0.3V)PVDD1, PVDD2 to GND.............................-0.3V to (V DD + 0.3V)PVDD1, PVDD2 to V DD ..........................................-0.3V to +0.3V PGND1, PGND2 to GND.......................................-0.3V to +0.3V COMP, REF, ITEC short to GND....................................Indefinite LX Current (Note 1)........................................±2.25A LX Current Continuous Power Dissipation (T A = +70°C)6 x 6 UCSP (derate 22mW/°C above +70°C)...............1.75W 20-Pin 5mm x 5mm x 0.9mm TQFN (derate 20.8mW/°Cabove +70°C) (Note 2)...................................................1.67W 36-Bump WLP (derate 22mW/°C above +70°C)............1.75W Operating Temperature Range ...........................-40°C to +85°C Maximum Junction Temperature.....................................+150°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°C Soldering Temperature (reflow)Lead(Pb)-Free (TQFN, WLP)........................................+260°C Containing Lead (UCSP).............................................+240°CELECTRICAL CHARACTERISTICSNote 1:LX has internal clamp diodes to PGND and PVDD. Applications that forward bias these diodes should take care not toexceed the IC’s package power dissipation limits.Note 2:Solders underside metal slug to PCB ground plane.PACKAGE THERMAL CHARACTERISTICS (Note 3)20 TQFNJunction-to-Ambient Thermal Resistance (θJA )...............30°C/W Junction-to-Case Thermal Resistance (θJC )......................2°C/W 6x6 UCSPJunction-to-Ambient Thermal Resistance (θJA )................65.5°C/W Junction-to-Case Thermal Resistance (θJC ).......................0°C/W36 WLPJunction-to-Ambient Thermal Resistance (θJA )..................38°C/W Junction-to-Case Thermal Resistance (θJC )......................4°C/WNote 3:Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to /thermal-tutorial .MAX8520/MAX8521Smallest TEC Power Drivers for OpticalModules_______________________________________________________________________________________3ELECTRICAL CHARACTERISTICS (continued)M A X 8520/M A X 8521Smallest TEC Power Drivers for Optical Modules 4_______________________________________________________________________________________ELECTRICAL CHARACTERISTICS(V DD = V PVDD1= V PVDD2= V SHDN = 5V, 1MHz mode (Note 4). PGND1 = PGND2 = GND, CTLI = MAXV = MAXIP = MAXIN = REF, T A = -40°C to +85°C , unless otherwise noted.) (Note 8)MAX8520/MAX8521Smallest TEC Power Drivers for OpticalModules_______________________________________________________________________________________5ELECTRICAL CHARACTERISTICS (continued)(V= V = V = V = 5V, 1MHz mode (Note 4). PGND1 = PGND2 = GND, CTLI = MAXV = MAXIP = MAXIN = REF,the MAX8521.Note 5:Includes power FET leakage.Note 6:Duty-cycle specification is guaranteed by design and not production tested.Note 7:CTLI Gain is defined as:Note 8:Specifications to -40°C are guaranteed by design and not production tested.Typical Operating Characteristics(V DD = 5V, circuit of Figure 1, T A = +25°C unless otherwise noted.)EFFICIENCY vs. TEC CURRENTV DD = 5V, R TEC = 2ΩTEC CURENT (A)E F F I C I E N C Y (%)1.41.20.810.40.60.2102030405060708090001.6EFFICIENCY vs. TEC CURRENT V DD = 3.3V, R TEC = 1.3ΩTEC CURRENT (A)E F F I C I E N C Y (%)1.41.20.810.40.60.21020304050607080901.6COMMON-MODE OUTPUT VOLTAGE RIPPLEMAX8520/21 toc03400ns/divV OS220mV/div AC-COUPLEDV OS120mV/div AC-COUPLED I TEC = 1AC 2 = C 7 = 1µFM A X 8520/M A X 8521Smallest TEC Power Drivers for Optical Modules 6_______________________________________________________________________________________DIFFERENTIALOUTPUT VOLTAGE RIPPLEMAX8520/21 toc04400ns/divV OS2 - V OS11mV/divAC-COUPLEDC 2 = C 7 = 1µFI TEC = 1AV DD RIPPLEMAX8520/21 toc05400ns/div V DD20mV/div AC-COUPLEDI TEC = 1ATEC CURRENT RIPPLEMAX8520/21 toc06400ns/div10mA/div AC-COUPLED0A1.5ATEC CURRENT vs. CTLI VOLTAGEMAX8520/21 toc0720ms/divV CTLI 1V/divI TEC1A/div0A 0VZERO-CROSSING TEC CURRENTMAX8520/21 toc081ms/divV CTLII00mV/divI TEC100mA/div0A 1.5VV ITEC vs. TEC CURRENTTEC CURRENT (A)V I T E C (V )1.51.00.5-0.5-1.0-1.50.51.01.52.02.53.0-2.02.0Typical Operating Characteristics (continued)(V DD = 5V, circuit of Figure 1, T A = +25°C unless otherwise noted.)I TEC vs. AMBIENT TEMPERATUREAMBIENT TEMPERATURE (°C)T E C C U R R E N T (A )+60+40+20-200.4600.4700.4800.4900.5000.5100.5200.450-40+80SWITCHING FREQUENCY vs. TEMPERATURETEMPERATURE (°C)S W I T C H I N G F R E Q U E N C Y (k H z )+80+60+40+200-2050060070080090010001100400-40MAX8520/MAX8521Smallest TEC Power Drivers for OpticalModules_______________________________________________________________________________________7SWITCHING FREQUENCY CHANGE vs. V DDV DD (V)S W I T C H I N G F R E Q U E N C Y C H A N G E (k H z )5.04.54.03.52004006008001000120003.05.5SWITCHING FREQUENCY vs. R EXTR EXT (k Ω)S W I T C H I N G F R E Q U E N C Y (k H z )140120100805006007008009001000110040060160V DD STEP RESPONSEMAX8520/21 toc1910ms/divV DD 2V/divI TEC10mA/div1A0VREFERENCE VOLTAGE CHANGE vs. V DDV DD (V)R E F E R E N C E V O L T A G E C H A N G E (m V )5.04.54.03.5-1.2-1.0-0.8-0.6-0.4-0.200.20.40.6-1.43.0 5.5REFERENCE VOLTAGE CHANGEvs. TEMPERATURETEMPERATURE (°C)R E F E R E N C E V O L T A G E C H A N G E (m V )+80+40+60+20-20-4-3-2-1012345-5-40REFERENCE VOLTAGE CHANGEvs. LOAD CURRENTLOAD CURRENT (mA)R E F E R E N C E V O L T A G E C H A N G E (m V )0.80.60.40.2-10-8-6-4-20-121.0STARTUP AND SHUTDOWN WAVEFORMSMAX8520/21 toc17200µs/divV SHDN 5V/div I TEC500mA/div I DD200mA/div 0mA0mA0V CTLI STEP RESPONSEMAX8520/21 toc181msV CTLI 1V/div I TEC 1A/div0A 1.5VTypical Operating Characteristics (continued)(V DD = 5V, circuit of Figure 1, T A = +25°C unless otherwise noted.)M A X 8520/M A X 8521Smallest TEC Power Drivers for Optical Modules 8_______________________________________________________________________________________Typical Operating Characteristics (continued)(V DD = 5V, circuit of Figure 1, T A = +25°C unless otherwise noted.)THERMAL STABILITY,COOLING MODEMAX8520/21 toc204s/divTEMPERATURE 0.001°C/div T TEC = +25°C T A = +45°CTHERMAL STABILITY,ROOM TEMPERATUREMAX8520/21 toc214s/divTEMPERATURE 0.001°C/div T TEC = +25°C T A = +25°CTHERMAL STABILITY,HEATING MODEMAX8520/21 toc224s/divTEMPERATURE 0.001°C/divT TEC = +25°C T A = +5°CPin DescriptionMAX8520/MAX8521Smallest TEC Power Drivers for OpticalModules_______________________________________________________________________________________9Pin Description (continued)M A X 8520/M A X 8521Smallest TEC Power Drivers for Optical Modules 10______________________________________________________________________________________Detailed DescriptionThe MAX8520/MAX8521 TE C drivers consist of two switching buck regulators that operate together to directly control the TEC current. This configuration cre-ates a differential voltage across the TE C, allowing bi-directional TE C current for controlled cooling and heating. Controlled cooling and heating allow accurate TEC temperature control to within 0.01°C. The voltage at CTLI directly sets the TEC current. An external thermal-control loop is typically used to drive CTLI. Figures 1and 2 show examples of the thermal-control-loop circuit.Ripple CancellationSwitching regulators like those used in the MAX8520/MAX8521 inherently create ripple voltage on the output.The dual regulators in the MAX8520/MAX8521 switch in-phase and provide complementary in-phase duty cycles so ripple waveforms at the TE C are greatly reduced. This feature suppresses ripple currents and electrical noise at the TEC to prevent interference with the laser diode.Switching FrequencyFor the MAX8521, FRE Q sets the switching frequency of the internal oscillator. With FREQ = GND, the oscilla-tor frequency is set to 500kHz. The oscillator frequency is 1MHz when FREQ = V DD .For the MAX8520, connect a resistor (R EXT in Figure 2)from FRE Q to GND. Choose R EXT = 60k Ωfor 1MHz operation, and R EXT = 150k Ωfor 500KHz operation. For any intermediary frequency between 500kHz and 1MHz, use the following equation to find the value of R EXT value needed for V DD = 5V:where R EXT is the resistance given in k Ω, and fs is the desired frequency given in MHz. Note that for V DD <5V, the frequency is reduced slightly, to the extent of about 7% when V DD reaches 3V. This should be taken into consideration when selecting the value for R EXT at known supply voltage.Voltage and Current-Limit SettingBoth the MAX8520 and MAX8521 provide control of the maximum differential TE C voltage. Applying a voltage to MAXV limits the maximum voltage across the TE C.The voltage at MAXIP and MAXIN sets the maximum positive and negative current through the TE C. These current limits can be independently controlled.Current Monitor OutputITEC provides a voltage output proportional to the TEC current (I TEC ). See the Functional Diagram for more detail:V ITEC = 1.5V +(8 (VOS1-VCS))Reference OutputThe MAX8520/MAX8521 include an on-chip voltage ref-erence. The 1.50V reference is accurate to 1% over temperature. Bypass REF with 0.1µF to GND. REF can be used to bias an external thermistor for temperature sensing as shown in Figures 1 and 2.Thermal and Fault-Current ProtectionThe MAX8520/MAX8521 provide fault-current protec-tion in either FE Ts by turning off both high-side and low-side FE Ts when the peak current exceeds 3A in either FE Ts. In addition, thermal-overload protection limits the total power dissipation in the chip. When the device’s die junction temperature exceeds +165°C, an on-chip thermal sensor shuts down the device. The thermal sensor turns the device on again after the junc-tion temperature cools down by +15°C.Design ProceduresDuty-Cycle Range SelectionBy design, the MAX8520/MAX8521 are capable of operating from 0% to 100% duty cycle, allowing both LX outputs to enter dropout. However, as the LX pulse width narrows, accurate duty-cycle control becomes difficult. This can result in a low-frequency noise appearing at the TEC output (typically in the 20kHz to 50kHz range). While this noise is typically filtered out by the low thermal-loop bandwidth, for best result, operate the PWM with a pulse width greater than 200ns. For 500kHz application, the recommended duty-cycle range is from 10% to 90%. For 1MHz application, it is from 20% to 80%.MAX8520/MAX8521Smallest TEC Power Drivers for OpticalModules______________________________________________________________________________________11Figure 1. MAX8521 Typical Application CircuitM A X 8520/M A X 8521Smallest TEC Power Drivers for Optical Modules 12______________________________________________________________________________________Figure 2. Typical Application Circuit for the MAX8520 with Reduced Op-Amp Count ConfigurationMAX8520/MAX8521Smallest TEC Power Drivers for OpticalModules______________________________________________________________________________________13Inductor SelectionThe MAX8520/MAX8521 dual buck converters operate in-phase and in complementary mode to drive the TEC differentially in a current-mode control scheme. At zero TEC current, the differential voltage is zero, hence the outputs with respect to GND are equal to half of V DD .As the TEC current demand increases, one output will go up and the other will go down from the initial point of 0.5V DD by an amount equal to 0.5 V TEC (V TEC = I TEC R TEC ). Therefore, the operating duty cycle of each buck converter depends on the operating I TEC and R TEC . Since inductor current calculation for heating and cooling are identical, but reverse in polarity, the calcu-lation only needs to be carried out for either one.For a given inductor, and input voltage, the maximum inductor ripple current happens when the duty cycle is at 50%. Therefore, the inductor should be calculated at 50% duty cycle to find the maximum ripple current. The maximum desired ripple current of a typical standard buck converter is in the range of 20% to 40% of the maximum load. The higher the value of the inductor, the lower the ripple current. However, the size will be phys-ically larger. For the TE C driver the thermal loop is inherently slow, so the inductor can be larger for lower ripple current for better noise and E MI performance.Picking an inductor to yield ripple current of 10% to 20% of the maximum TE C current is a good starting point.Calculate the inductor value as follows:where LIR is the selected inductor ripple-current ratio,I TEC(MAX)is the maximum TE C current, and fs is the switching frequencyAs an example, for V DD = 3.3V, LIR = 12%, and fs =1MHz, L = 4.58µHEven though each inductor ripple current is at its maxi-mum at 50% duty cycle (zero TE C current), the ripple cancels differentially because each is equal and in-phase.Output Filter Capacitor SelectionCommon-Mode Filter CapacitorsThe common-mode filter capacitors (C2 and C7 of Figure 1) are used as filter capacitors to ground for each output. The output ripple voltage depends on the capacitance, the E SR of these capacitors, and the inductor ripple current. Ceramic capacitors are recom-mended for their low E SR and impedance at high fre-quency.Figure 3. Functional Diagram of the Current-Control LoopM A X 8520/M A X 8521The output common-mode ripple voltage can be calcu-lated as follows:V RIPPLEpk-pk = LIR x I TEC(MAX)(ESR + 1/8 x C x fs)A 1µF ceramic capacitor with ESR of 10 m Ωwith LIR =12% and I TEC(MAX)= 1.5A will result in V RIPPLE(P-P)of 24.3mV. For size-constraint application, the capacitor can be made smaller at the expense of higher ripple voltage. However, the capacitance must be high enough so that the LC resonant frequency is less than 1/5 the switching frequency:where f is the resonant frequency of the output filter.Differential Mode Filter CapacitorThe differential-mode filter capacitor (C5 in Figure 1) is used to bypass differential ripple current through the TEC as the result of unequal duty cycle of each output.This happens when the TE C current is not at zero. As TE C current increases from zero, both outputs move away from the 50% duty-cycle point complementarily.The common-mode ripple decreases, but the differential ripple does not cancel perfectly, and there will be a resulting differential ripple. The maximum value happens when one output is at 75% duty cycle and the other is at 25% duty cycle. At this operating point, the differential ripple is equal to 1/2 of the maximum common-mode rip-ple. The TE C ripple current determines the TE C perfor-mance, because the maximum temperature differential that can be created between the terminals of the TE C depends on the ratio of ripple current and DC current.The lower the ripple current, the closer to the ideal maxi-mum. The differential-mode capacitor provides a low-impedance path for the ripple current to flow, so that the TE C ripple current is greatly reduced. The TE C ripple current then can be calculated as follows:I TEC(RIPPLE)= (0.5 x LIR x I TEC(MAX)) x (Z C5)/(R TEC+ R SENSE + Z C5)where Z C5is the impedance of C5 at twice the switching frequency, R TEC is the TE C equivalent resistance, and R SENSE is the current-sense resistor.Decoupling Capacitor SelectionDecouple each power supply input (V DD , PVDD1,PVDD2) with a 1µF ceramic capacitor close to the sup-ply pins. In applications with long distances between the source supply and the MAX8520/MAX8521, addi-tional bypassing may be needed to stabilize the input supply. In such cases, a low-ESR electrolytic or ceramic capacitor of 100µF or more at V DD is sufficient.Compensation CapacitorA compensation capacitor is needed to ensure current-control-loop stability (see Figure 3). Select the capacitor so that the unity-gain bandwidth of the current-control loop is less than or equal to 10% the resonant frequency of the output filter:where:f BW = Unity-gain bandwidth frequency, less than or equal to 10% the output filter resonant frequencyg m = Loop transconductance, typically 100µA/V C COMP = Value of the compensation capacitorR TEC = TEC series resistance, use the minimum resis-tance valueR SENSE = Sense resistorSetting Voltage and Current LimitsCertain TEC parameters must be considered to guarantee a robust design. These include maximum positive current,maximum negative current, and the maximum voltage allowed across the TEC. These limits should be used to set the MAXIP, MAXIN, and MAXV voltages.Setting Max Positive and Negative TEC Current MAXIP and MAXIN set the maximum positive and nega-tive TEC currents, respectively. The default current limit is ±150mV/R SENSE when MAXIP and MAXIN are con-nected to RE F. To set maximum limits other than the defaults, connect a resistor-divider from REF to GND to set V MAXI_. Use resistors in the 10k Ωto 100k Ωrange.V MAXI_is related to ITEC by the following equations:V MAXIP = 10(I TECP(MAX) R SENSE )V MAXIN = 10(I TECN(MAX) R SENSE )where I TECP(MAX)is the maximum positive TEC current and I TECN(MAX)is the negative maximum TEC current.Positive TEC current occurs when CS is less than OS1:I TEC x R SENSE = OS1 - CSwhen I TEC > 0A.I TEC R SENSE = CS - OS1when I TEC< 0A.Smallest TEC Power Drivers for Optical Modules 14______________________________________________________________________________________Take care not to exceed the positive or negative cur-rent limit on the TEC. Refer to the manufacturer’s data sheet for these limits.Setting Max TEC Voltage Apply a voltage to the MAXV pin to control the maxi-mum differential TEC voltage. V MAXV can vary from 0V to V REF. The voltage across the TE C is four times V MAXV and can be positive or negative:|V OS1- V OS2| = 4 x V MAXV or V DD, whichever is lower Set V MAXV with a resistor-divider between RE F and GND using resistors from 10kΩto 100kΩ. V MAXV can vary from 0V to V REF.Control Inputs/OutputsOutput Current Control The voltage at CTLI directly sets the TEC current. CTLI is typically driven from the output of a temperature con-trol loop. The transfer function relating current through the TEC (I TEC) and V CTLI is given by:I TEC= (V CTLI- V REF)/(10 R SENSE)where V REF is 1.50V and:ITEC = (V OS1- V CS)/R SENSECTLI is centered around REF (1.50V). I TEC is zero when CTLI = 1.50V. When V CTLI> 1.50V the current flow is from OS2 to OS1. The voltages on the pins relate as follows:V OS2> V OS1> V CSThe opposite applies when V CTLI< 1.50V current flows from OS1 to OS2:V OS2< V OS1< V CSShutdown Control The MAX8520/MAX8521 can be placed in a power-saving shutdown mode by driving SHDN low. When the MAX8520/MAX8521 are shut down, the TEC is off (OS1 and OS2 decay to GND) and supply current is reduced to 2mA (typ).ITEC Output ITEC is a status output that provides a voltage proportional to the actual TEC current. V ITEC= V REF when TEC current is zero. The transfer function for the ITEC output is:V ITEC= 1.50V + 8 (V OS1– V CS)Use ITE C to monitor the cooling or heating current through the TE C. For stability keep the load capaci-tance on ITEC to less than 150pF.Applications InformationThe MAX8520/MAX8521 typically drive a thermo-elec-tric cooler inside a thermal-control loop. TE C drive polarity and power are regulated based on temperature information read from a thermistor or other temperature-measuring device to maintain a stable control tempera-ture. Temperature stability of +0.01°C can be achievedwith carefully selected external components.There are numerous ways to implement the thermal loop. Figures 1 and 2 show designs that employ precision op amps, along with a DAC or potentiometer to set the con-trol temperature. The loop can also be implemented digi-tally, using a precision A/D to read the thermistor or other temperature sensor, a microcontroller to implement the control algorithm, and a DAC (or filtered-PWM signal) tosend the appropriate signal to the MAX8520/MAX8521CTLI input. Regardless of the form taken by the thermal-control circuitry, all designs are similar in that they read temperature, compare it to a set-point signal, and thensend an error-correcting signal to the MAX8520/MAX8521 that moves the temperature in the appropriate direction.PCB Layout and RoutingHigh switching frequencies and large peak currentsmake PCB layout a very important part of design. Good design minimizes excessive EMI and voltage gradientsin the ground plane, both of which can result in instabil-ity or regulation errors. Follow these guidelines for goodPCB layout:1) Place decoupling capacitors as close to the IC pinsas possible.2) Keep a separate power ground plane, which is con-nected to PGND1 and PGND2. PVDD1, PVDD2, PGND1 and PGND2 are noisy points. Connect decou-pling capacitors from PVDD_ to PGND_ as direct as possible. Output capacitors C2, C7 returns are con-nected to PGND plane.3) Connect a decoupling capacitor from V DD to GND. Connect GND to a signal ground plane (separate fromthe power ground plane above). Other V DD decoupling capacitors (such as the input capacitor) need to be connected to the PGND plane.4) Connect GND and PGND_ pins together at a single point, as close as possible to the chip.5) Keep the power loop, which consists of input capaci-tors, output inductors and capacitors, as compact andsmall as possible.MAX8520/MAX8521Smallest TEC Power Drivers for OpticalModules ______________________________________________________________________________________15M A X 8520/M A X 85216) To ensure high DC-loop gain and minimum loop error, keep the board layout adjacent to the negative input pin of the integrator (U2 in Figure1) clean and free of moisture. Any contamination or leakage current into this node can act to lower the DC gain of the integrator which can degrade the accuracy of the thermal loop. If space is available, it can also be helpful to surround the negative input node of the integrator with a grounded guard ring.Refer to the MAX8520/MAX8521 evaluation kit for a PCB layout example.Chip InformationPROCESS: BiCMOSSmallest TEC Power Drivers for Optical Modules 16______________________________________________________________________________________F6PVDD2LX2LX2LX1LX1PGND2PGND2PGND2PGND1PGND1PGND1OS2FREQ GND2GND2COMP SHDN VDD GND2GND2ITECGNDCTLIREFMAXVMAX8521MAXIP MAXIN PVDD2CS OS1PVDD1PVDD1F5F4F3F2F1E6E5E2E1D6D5D4D3D2D1C6C5C4C3C2C1B6B5B2B1A6A5A4A3A2A1+UCSP/WLPTOP VIEW BUMPS ON BOTTOMPin ConfigurationsPackage InformationFor the latest package outline information and land patterns (footprints), go to /packages . Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing per-tains to the package regardless of RoHS status.MAX8520/MAX8521Smallest TEC Power Drivers for OpticalModules______________________________________________________________________________________17Functional Diagram。
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