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于博士信号完整性研究网电源完整性设计详解作者：于争博士2009年4整理发布：Baidu文库浩书目 录1 为什么要重视电源噪声问题？....................................................................- 1 -2 电源系统噪声余量分析................................................................................- 1 -3 电源噪声是如何产生的？............................................................................- 2 -4 电容退耦的两种解释....................................................................................- 3 -4.1 从储能的角度来说明电容退耦原理。
..............................................- 3 -4.2 从阻抗的角度来理解退耦原理。
......................................................- 4 -5 实际电容的特性............................................................................................- 5 -6 电容的安装谐振频率....................................................................................- 8 -7 局部去耦设计方法......................................................................................- 10 -8 电源系统的角度进行去耦设计..................................................................- 12 -8.1 著名的Target Impedance（目标阻抗）..........................................- 12 -8.2 需要多大的电容量............................................................................- 13 -8.3 相同容值电容的并联........................................................................- 15 -8.4 不同容值电容的并联与反谐振（Anti-Resonance）......................- 16 -8.5 ESR对反谐振（Anti-Resonance）的影响......................................- 17 -8.6 怎样合理选择电容组合....................................................................- 18 -8.7 电容的去耦半径................................................................................- 20 -8.8 电容的安装方法................................................................................- 21 -9 结束语..........................................................................................................- 24 -电源完整性设计详解1、为什么要重视电源噪声问题？芯片内部有成千上万个晶体管，这些晶体管组成内部的门电路、组合逻辑、寄存器、计数器、延迟线、状态机、以及其他逻辑功能。
第9章高速信号的电源完整性分析在电路设计中，设计好一个高质量的高速PCB板，应该从信号完整性(SI——Signal Integrity)和电源完整性(PI——Power Integrity )两个方面来考虑。
尽管从信号完整性上表现出来的结果较为直接，但是信号参考层的不完整会造成信号回流路径变化多端，从而引起信号质量变差，连带引起了产品的EMI性能变差。
这将直接影响最终PCB板的信号完整性。
因此研究电源完整性是非常必要和重要的。
9.1 电源完整性概述虽然电子设计的发展已经有相当长的历史，但是高速信号是近些年才开始面对的问题，随之出现的电源完整性的许多概念并不为大多数人所了解。
这里，对其中涉及到的一些基本名词做些简单的介绍。
9.1.1 电源完整性的相关概念电源完整性(Power Integrity) ：是指系统供电电源在经过一定的传输网络后在指定器件端口相对该器件对工作电源要求的符合程度。
虽然电源完整性是讨论电源供给的稳定性问题，但由于地在实际系统中总是和电源密不可分的，通常把如何减少地平面的噪声也做为电源完整性的一部分讨论。
电源分配网络：电源分配网络的作用就是给系统内所有器件或芯片提供足够的电源,并满足系统对电源稳定性的要求。
同步开关噪声（Simultaneous Switch Noise，简称SSN）：是指当器件处于开关状态，产生瞬间变化的电流（di/dt），在经过回流途径上存在的电感时，形成交流压降，从而引起噪声，所以也称为Δi噪声。
同步开关噪声包括电子噪声、地弹噪声、回流噪声、断点噪声等。
它对电源完整性的影响表现为地弹和电源反弹。
地弹噪声：它是同步开关噪声对电源完整性影响的表现之一。
是指芯片上的地参考电压的跳动。
当大量芯片的输出同时开启时，将有一个较大的瞬态电流在芯片与板的电源平面流过，芯片封装与电源平面的电感和电阻会引发电源噪声，这样会在真正的地平面（0V）上产生电压的波动和变化，这个噪声会影响其它元器件的动作。
信号完整性与电源完整性的仿真分析与设计1简介信号完整性是指信号在通过一定距离的传输路径后在特定接收端口相对指定发送端口信号的还原程度。
在讨论信号完整性设计性能时，如指定不同的收发参考端口，则对信号还原程度会用不同的指标来描述。
通常指定的收发参考端口是发送芯片输出处及接收芯片输入处的波形可测点，此时对信号还原程度主要依靠上升/下降及保持时间等指标来进行描述。
而如果指定的参考收发端口是在信道编码器输入端及解码器输出端时，对信号还原程度的描述将会依靠误码率来描述。
电源完整性是指系统供电电源在经过一定的传输网络后在指定器件端口相对该器件对工作电源要求的符合程度。
同样，对于同一系统中同一个器件的正常工作条件而言，如果指定的端口不同，其工作电源要求也不同（在随后的例子中将会直观地看到这一点）。
通常指定的器件参考端口是芯片电源及地连接引脚处的可测点，此时该芯片的产品手册应给出该端口处的相应指标，常用纹波大小或者电压最大偏离范围来表征。
图一是一个典型背板信号传输的系统示意图。
本文中“系统”一词包含信号传输所需的所有相关硬件及软件，包括芯片、封装与PCB板的物理结构，电源及电源传输网络，所有相关电路实现以及信号通信所需的协议等。
从设计目的而言，需要硬件提供可制作的支撑及电信号有源/无源互联结构；需要软件提供信号传递的传输协议以及数据内容。
图1 背板信号传输的系统示意图在本文的以下内容中，将会看到由于这些支撑与互联结构对电信号的传输呈现出一定的频率选择性衰减，从而会使设计者产生对信号完整性及电源完整性的担忧。
而不同传输协议及不同数据内容的表达方式对相同传输环境具备不同适应能力，使得设计者需要进一步根据实际的传输环境来选择或优化可行的传输协议及数据内容表达方式。
为描述方便起见以下用“完整性设计与分析”来指代“信号完整性与电源完整性设计与分析”。
2 版图完整性问题、分析与设计上述背板系统中的硬件支撑及无源互联结构基本上都在一种层叠平板结构上实现。
信号完整性与电源完整性的仿真分析与设计李荔博士leo_le@安捷伦科技1简介信号完整性是指信号在通过一定距离的传输路径后在特定接收端口相对指定发送端口信号的还原程度。
在讨论信号完整性设计性能时，如指定不同的收发参考端口，则对信号还原程度会用不同的指标来描述。
通常指定的收发参考端口是发送芯片输出处及接收芯片输入处的波形可测点，此时对信号还原程度主要依靠上升/下降及保持时间等指标来进行描述。
而如果指定的参考收发端口是在信道编码器输入端及解码器输出端时，对信号还原程度的描述将会依靠误码率来描述。
电源完整性是指系统供电电源在经过一定的传输网络后在指定器件端口相对该器件对工作电源要求的符合程度。
同样，对于同一系统中同一个器件的正常工作条件而言，如果指定的端口不同，其工作电源要求也不同（在随后的例子中将会直观地看到这一点）。
通常指定的器件参考端口是芯片电源及地连接引脚处的可测点，此时该芯片的产品手册应给出该端口处的相应指标，常用纹波大小或者电压最大偏离范围来表征。
图一是一个典型背板信号传输的系统示意图。
本文中“系统”一词包含信号传输所需的所有相关硬件及软件，包括芯片、封装与PCB板的物理结构，电源及电源传输网络，所有相关电路实现以及信号通信所需的协议等。
从设计目的而言，需要硬件提供可制作的支撑及电信号有源/无源互联结构；需要软件提供信号传递的传输协议以及数据内容。
1001010…图1 背板信号传输的系统示意图在本文的以下内容中，将会看到由于这些支撑与互联结构对电信号的传输呈现出一定的频率选择性衰减，从而会使设计者产生对信号完整性及电源完整性的担忧。
而不同传输协议及不同数据内容的表达方式对相同传输环境具备不同适应能力，使得设计者需要进一步根据实际的传输环境来选择或优化可行的传输协议及数据内容表达方式。
为描述方便起见以下用“完整性设计与分析”来指代“信号完整性与电源完整性设计与分析”。
2 版图完整性问题、分析与设计上述背板系统中的硬件支撑及无源互联结构基本上都在一种层叠平板结构上实现。
引言电源完整性这一概念是以信号完整性为基础的，两者的出现都源自电路开关速度的提高。
当高速信号的翻转时间和系统的时钟周期可以相比时，具有分布参数的信号传输线、电源和地就和低速系统中的情况完全不同了。
与信号完整性是指信号在传输线上的质量相对应，电源完整性是指高速电路系统中电源和地的质量。
它在对高速电路进行仿真时，往往会因信号参考层的不完整造成信号回流路径变化多端，从而引起信号质量变差和产品的ＥＭＩ性能变差，并直接影响信号完整性。
为了提高信号质量、产品的ＥＭＩ性能，人们开始研究怎样为信号提供一个稳定、完整的参考平面，并随之提出了电源完整性的概念。
ＥＤＡ厂商Ｃａｄｅｎｃｅ公司资深技术工程师曾指出，在未来的三到五年内，电源完整性设计将取代信号完整性设计成为高速ＰＣＢ设计新的难点和重点。
电源完整性的影响因素及措施电源完整性的作用是为系统所有的信号线提供完整的回流路径。
但在技术高速发展以及生产成本的控制下，往往不能为所有的信号线提供理想而完整的回流路径，这就是说，在高速电路中，不能够简单地将电源和地当作理想的情况来处理。
这主要是因为地弹噪声太大、去耦电容设计不合理、回流影响严重、多电源／地平面的分割不当、地层设计不合理、电流分配不均匀、高频的趋肤效应导致系统阻抗变化等诸多因素都会破坏电源完整性。
地弹噪声地弹噪声也称为同步开关噪声（ＳＳＮ），通常认为是由电路的感应引起的。
当电路中有较大的瞬态电流出现时（比如多条信号线上的信号同时翻转），会在电路分布参数所引起的感性阻抗上产生瞬态电压，进而便引起ＳＳＮ。
芯片封装结构的ＳＳＮ是由于突变的电流流过封装结构的引脚、引线和焊盘等寄生电感所导致。
如芯片的多个输出管脚同时触发时，将有一个较大的瞬态电流在芯片与板的电源平面流过，芯片封装与电源平面的电感和电阻会引发电源噪声，这样会在真正的地平面（０Ｖ）上产生电压波动，此波动对其他共电源／地总线的静态驱动将构成严重的干扰，甚至引起误触发。
An Integrated Signal and Power Integrity Analysis for Signal Traces Through the Parallel Planes Using Hybrid Finite-Element andFinite-Difference Time-Domain TechniquesWei-Da Guo,Guang-Hwa Shiue,Chien-Min Lin,Member,IEEE,and Ruey-Beei Wu,Senior Member,IEEEAbstract—This paper presents a numerical approach that com-bines the?nite-element time-domain(FETD)method and the?-nite-difference time-domain(FDTD)method to model and ana-lyze the two-dimensional electromagnetic problem concerned in the simultaneous switching noise(SSN)induced by adjacent signal traces through the coupled-via parallel-plate structures.Applying FETD for the region having the source excitation inside and FDTD for the remaining regions preserves the advantages of both FETD ?exibility and FDTD ef?ciency.By further including the transmis-sion-line simulation,the signal integrity and power integrity is-sues can be resolved at the same time.Furthermore,the numer-ical results demonstrate which kind of signal allocation between the planes can achieve the best noise cancellation.Finally,a com-parison with the measurement data validates the proposed hybrid techniques.Index Terms—Differential signaling,?nite-element and?nite-difference time-domain(FETD/FDTD)methods,power integrity (PI),signal integrity(SI),simultaneous switching noise(SSN), transient analysis.I.I NTRODUCTIONI N RECENT years,considerable attention has been devotedto time-domain numerical techniques to analyze the tran-sient responses of electromagnetic problems.The?nite-differ-ence time-domain(FDTD)method proposed by Yee in1966 [1]has become the most well-known technique becauseit pro-vides a lot of attractive advantages:direct and explicit time-marching scheme,high numerical accuracy with a second-order discretization error,stability condition,easy programming,and minimum computational complexity[2].However,it is often in-ef?cient and/or inaccurate to use only the FDTD method to dealManuscript received March3,2006;revised November6,2006.This work was supported in part by the National Science Council,Republic of China,under Grant NSC91-2213-E-002-109,by the Ministry of Education under Grant93B-40053,and by Taiwan Semiconductor Manufacturing Company under Grant 93-FS-B072.W.-D.Guo,G.-H.Shiue,and R.-B.Wu are with the Department of Electrical Engineering and Graduate Institute of Communication Engi-neering,National Taiwan University,10617Taipei,Taiwan,R.O.C.(e-mail: f92942062@.tw;d9*******@.tw;rbwu@.tw).C.-M.Lin is with the Packaging Core Competence Department,Advanced Assembly Division,Taiwan Semiconductor Manufacturing Company,Ltd., 30077Taiwan,R.O.C.(e-mail:chienmin_lin@).Color versions of one or more of the?gures in this paper are available online at .Digital Object Identi?er10.1109/TADVP.2007.901595with some speci?c structures.Hybrid techniques,which com-bine the desirable features of the FDTD and other numerical schemes,are therefore being developed to improve the simula-tion capability in solving many realistic problems.First,the FDTD(2,4)method with a second-order accuracy in time and a fourth-order accuracy in space was incorporated to tackle the subgridding scheme[3]and a modi?ed form was employed to characterize the electrically large structures with extremely low-phase error[4].Second,the integration with the time-domain method of moments was performed to analyze the complex geometries comprising the arbitrary thin-wire and inhomogeneous dielectric structures[5],[6].Third,the?exible ?nite-element time-domain(FETD)method was introduced locally for the simulation of structures with curved surfaces [6]–[8].With the advent of high-speed digital era,the simultaneous switching noise(SSN)on the dc power bus in the multilayer printed circuit boards(PCBs)causes paramount concern in the signal integrity and power integrity(SI/PI)along with the electromagnetic interference(EMI).One potential excitation mechanism of this high-frequency noise is from the signal traces which change layers through the via transition[9]–[11]. In the past,the transmission-line theory and the two-dimen-sional(2-D)FDTD method were combined successfully to deal with the parallel-plate structures having single-ended via transition[12],[13].Recently,the differential signaling has become a common wiring approach for high-speed digital system designs in bene?t of the higher noise immunity and EMI reduction.Nevertheless,for the real layout constraints,the common-mode currents may be generated from various imbal-ances in the circuits,such as the driver-phase skew,termination diversity,signal-path asymmetries,etc.Both the differential-and common-mode currents can in?uence the dc power bus, resulting in the SSN propagating within the planes.While applying the traditional method to manage this case,it will need a much?ner FDTD mesh to accurately distinguish the close signals transitioning through the planes.Such action not only causesthe unnecessary waste of computer memory but also takes more simulation time.In order to improve the computa-tional ef?ciency,this paperincorporates theFETD method to the small region with two or more signal transitions inside,while the other regions still remain with the coarser FDTD grids.While the telegrapher’ｓequations of coupled transmission lines are further introduced to the hybrid FETD/FDTD techniques,the1521-3323/$25.00?2007IEEEFig.1.A typical four-layer differential-via structure.SI/PI co-analysis for differential tracesthrough the planes can be accomplished as demonstrated in Section II and the numerical results are shown in Section III.For a group of signal vias,the proposed techniques can also tell which kind of signal alloca-tion to achieve the best performance as presented in Section III. Section IV thus correlates the measurement results and their comparisons,followed by brief conclusions in Section V.II.S IMULATION M ETHODOLOGYA typical differential-via structure in a four-layer board is il-lustrated in Fig.1.Along the signal-?ow path,the whole struc-ture is divided into three parts:the coupled traces,the cou-pled-via discontinuities,and the parallel plates.This section will present how the hybrid techniques integrate the three parts to proceed with the SI/PI co-simulation.At last,the stability consideration and computational complexity of the hybrid tech-niques are discussed as well.A.Circuit SolverWith reference to Fig.2,if the even/odd mode propagation coef?cients and characteristic impedances are given,it is recog-nized that the coupled traces can be modeled by the equivalent ladder circuits,and the lossy effects can be well approxi-mated with the average values of individual and over the frequency range of interest.The transient signal propagation is thus characterized by thetelegrapher’s equations with the cen-tral-difference discretization both in time and space domains. The approach to predict the signal propagation through the cou-pled-via discontinuities is similar to that through the coupled traces except for the difference of model-extracting method.To characterize the coupled-via discontinuities as depicted in Fig.1,the structure can be separatedinto three segments:the via between the two solid planes,and the via above(and under)the upper(and lower)plane.Since the time delay of signals through eachsegment is much less than the rising edge of signal,the cou-pled-via structure can be transformed into a SPICE passive net-work sketched in Fig.3by full-wave simulation[14],where represents the voltage of SSN induced by the current on Ls2. By linking the extracted circuit models of coupled-via disconti-nuities,both the top-and bottom-layer traces together with suit-able driving sources and load terminations,the transient wave-forms throughout the interconnects are then characterized and can be used for the SI analyses.Fig. 2.The k th element of equivalent circuit model of coupled transmission lines.Fig.3.Equivalent circuit model of coupled-via structures.B.Plane SolverAs for the parallel-plate structure,because the separation between two solid planes is much smaller than the equiva-lent wavelength of signals,the electromagnetic?eld inside is supposed to be uniform along the vertical direction.Thence, the2-D numerical technique can be applied to characterize the SSN effects while the FETD method is set for the small region covering the signal transitions and the FDTD scheme is constructed in the most regular regions.The FETD algorithm[15]starts from Maxwell’s two curl-equations and the vector equation is obtained byin(1)where and denote the electric?eld and current density,re-spectively,in the lossless volume.Applying the weak-form formulation or the Galerkin’s procedure to(1)gives(2) where is the weighting function that can be arbitrarily de-?ned.In use of the?nite-element method,the variational for-mula is thus discretized to implement the later numerical com-putation.In the present case,the linear basis function is chosen to express the?elds inside eachtriangular element.After taking the volume integration over each element and assembling theFig.4.FEM mesh in the source region and its interface with the FDTD grids.integrals from all the elements,(2)can be simpli?ed into a ma-trix form of(3) where and are the coef?cient vectors of electric?eld andcurrent density,respectively.In addition,the values of all matrix elements in(3)are formulated asand(4)For the mesh pro?le as illustrated in Fig.4,the FETD re-gion is chosen to be a block replacing the prime FDTD region into which the via transition penetrates.This is an initial value problem in time with the previous and being the initial conditions aswell as the boundary value problem in space with being Dirichlet boundary condition.To solve the initial value problem in(3),the time derivative of electric?eld is approximated by the central difference,that is(5) As for the electric?eld in the second term of(3),it can be for-mulated by the Newmark–Beta scheme[16]to be read as(6)Fig.5.Simulation?owchart of hybrid FETD and FDTD techniques to perform the SI/PI co-analysis for the coupled-via structure as illustrated in Fig.1.Moreover,in the triangular elements with the via transition inside,the term in(3)as expressed bygrid area(7)is needed to serve asthe excitation of the parallel-plate structure with the current shown in Fig.3through the via structure between Layers2and3.It is worth noting that the via transition should be placed on the bary-center of each triangular element to achieve better accuracy.The hand-over schemefor the?eld in the overlapped region of FDTD and FETD can be depicted in Fig.5.Given the boundary ?eld calculated by the FDTD algorithm atthe time step ,all the?eld in the FETD region can be acquired through the matrix solution of(3).The SSN voltage in Fig.3 is then determined by(8)where is the averaging value of nodal electric-?elds enclosing the via transition,and is the separation between the planes.Once and at the FETD mesh nodes(node 1,2,3,and4in Fig.4)become available,together with the ob-tained voltage/current values from the circuit solver andelectric/ magnetic?elds of the FDTD region,the hybrid time-marching scheme for the next time step can be implemented and so on.As a result of using the integrated schemes,the current, arisen from the input signal through the via structure,can have the ability to induce the voltage noise propagating within theFig. 6.Physical dimensions of coupled traces and via pair.(a)Top view (Unit=mil).(b)Side view.parallel plates.After a period of time,owing to the plane reso-nanceand return path,the induced noise will causethe unwanted voltage?uctuation on the coupled traces by the presence of the ?nite SSN voltage.C.Stability Problem and Computational ComplexityIt is not dif?cult to manifest that the FETD algorithm is un-conditionally stable.Substituting(5),(6),and(7)into(3)yields the following difference equation:(9) where(10) the superscript“1”denotes the matrix inverse and the factorgrid areaWithout loss of generality,the time-stepping scheme in(9)is restated as(11)Applying the-transform technique to(11)and solving for ,de?ned as the-transform of,the result reads(12)along with the dependent,de?ned as the-transform of in(11).Regardless of the time step,it can be easily de-duced that the poles of(12)is just on the unit circle of plane. This proves that the time marching by(9)is absolutely stable. The stability condition of these hybrid techniques is thus gov-erned by the transmission-line theory and the FDTD algorithm in the regular region,which are already known.Concerning the computational complexity,because of the consistence of simulation engines used for the circuit solver,parison of differential-mode S-parameters from HFSS simulation and the equivalent circuit as depicted in Fig.3.the only work is to compare the ef?ciency of the hybrid FETD/FDTD technique with that of the traditional FDTD method.In use of only the FDTD scheme for cell discretization, the grid size should be chosen at most the spacing between the adjacent via transitions.However,as depicted in Fig.4, the hybrid techniques adopting the FEM mesh for the source region exhibit the great talent to segment the whole plane with the coarser FDTD grids.Owing to the sparsity of the FETD matrices in(4)and the much smaller number of unknowns,the computational time needed for each FETD operation can be negligible.The complexity of the hybrid techniques is therefore dominated by the FDTD divisions in the regular region.It is ev-ident that the total simulation time of the2-D FDTD algorithm is,where denotes the number of the division in the whole space[7].The coarser the FDTD grids,the smaller the number of the grids and unknowns.Hence,the present hybrid techniques can preserve high accuracy without sacri?cing the computational ef?ciency.III.N UMERICAL R ESULTSA.Coupled via TransitionConsider the geometry in Fig.1but with the coupled-via structure being2cm away from the center of parallel plates, which is set as the origin of the–plane.The size of the plane is1010cm and the separation between the two metal planes is20mils(0.05cm).The physical dimensions of the coupled traces and via pair are depicted in Fig.6.After extracting the -parameters from the full-wave simulation,their equivalent circuit models of coupled-via structures as sketched in Fig.3 can be thus constructed.In Fig.7,it is found that the differen-tial-mode-parameters of equivalent circuit models are in good agreement with those from the HFSS simulations[14]and the extracted parasitic values of inductive and capacitive lumped-el-ements are also listed in the attached table.The top-layer coupled traces are driven by differential Gaussian pulses with the rise time of100ps and voltage ampli-tude of2V while the traces are terminated with the matchedFig.8.Simulated TDR waveforms on the positive-signaling trace.(a)Late-time response for the signal skew of10ps excluding the multire?ection phe-nomenon of common-mode signal.(b)Late-time response while no signal skew.TABLE IC OMPARISON OF C OMPUTATIONAL C OMPLEXITY B ETWEEN THE T WO M ETHODS(T IME D URATION=2:5ns)(CPU:Intel P43.0GHz,RAM:2GHz)loads at their ends.For simplicity,the transmission-line losses are not considered in the following analyses for the transient responses.By using the same mesh discretization as illustrated in Fig.4,the resultant segmentation for the plane con?nes the ?exible FEM mesh in the vicinity of via transitions and the coarser FDTD division with the size of22mm elsewhere. Employing the perfect magnetic conductors for boundary conditions of the parallel-plate structure,the simulated TDR waveforms with and without the signal skew on the posi-tive-signaling trace are presented in Fig.8.In comparison of hybrid FETD/FDTD techniques and?ner FDTD method with center-to-center via spacing(0.66mm)as the grid size,the simulation results are in good agreement.Note that the voltage ?uctuation before900ps is induced by the incident signal passing through the coupled-via structure while the occurrence of late-time response is accompanied by the parallel-plate resonances.As for the signal skew of10ps,the voltage level of late-time response is found to be greater than that of no signal skew because of the existence of common-mode currents produced by the timing skew of differential signals.Moreover,the simulation time of both methods should be pro-portional to the number of grids multiplied by the total time steps.As the physical time duration is?xed,the decreaseof the FDTD division size would correspond to the increase of the total Fig.9.Parallel plane with three current sources inside.(a)3-D view.(b)Zoom-in view of three sources on the plane in(a).(c).FETD/FDTD mesh discretization.Fig.10.Simulated noise waveforms at the preallocated probe in reference to Fig.9(a).time steps.Consequently,asshown in Table I,it is demonstrated that the computational ef?ciency of the hybrid techniques is in-deed much better than that of the?ner FDTD method.B.Multiple Source TransitionIn addition to a pair of differential-via structure,there can be a group of signaling vias distributed in the various regions of planes.Considering the parallel-plate structure in Fig.9(a), three current sources are distributed around the center(0,0) and a probe is located at(1mm,9mm)to detect the voltage noise induced on the planes.The FEM meshes for the source region and the interface with the FDTD region are shown inFig.11.Parallel-plate structure with two differential pairs of current sources inside in reference to Fig.9(a).(a)Two differential pairs of sources on the plane in Fig.9(a).(b)FETD/FDTD mesh discretization.parison of the simulated noise waveforms between three casesof differential-sources on the plane as in Fig.9(a).Fig.9(c).The current sources are Gaussian pulses with the rise time of100ps and different current amplitudes of0.5,0.25, and0.3A.With the same settings of boundary conditions,the simulated voltage noise waveforms at the preallocated probe re-ferred to Fig.9(a)are presented in Fig.10.It is indicated that the hybrid FETD/FDTD techniques still reservesthe great accuracyin predicting the traveling-wave behavior of plane noise.In the modern digital systems,many high-speed devices employ the multiple differential-traces for the purpose of data transmission.These traces are usually close to each other and may simultaneously penetrate the multilayered planes through via transitions.Hence,it is imperious for engineers to know how to realize the best power integrity by suitably arranging the positions of differential vias.Reconsidering the parallel plates in Fig.9(a),instead,two dif-ferential-current sources around the center and the probe is re-located at(25mm,25mm)as shown in Fig.11along with their corresponding mesh pro?le.After serving for the same Gaussian pulses as input signals,the simulated waveforms at Fig.13.At time of400ps,the overall electric-?eld patterns of three cases of differential-source settings in reference to Fig.12.(a)Case1:one pair of dif-ferential sources.(b)Case2:two pairs of differential sources with the same polarity.(c)Case3:two anti-polarity pairs of differential sources.the probe are presented in Fig.12while three cases of source settings are pared with the noise waveform of one pair of differential sources,the signal allocations of mul-tiple differential-sources diversely in?uencethe induced voltage noise.For the more detailed understanding,Fig.13displays the overall electric-?eld patterns at the time of400ps for three casesFig.14.Speci?cations and measurement settings of test board.(a)Top view.(b)Side view.parisons between the simulated and measured waveforms at both the TDR end and the probe as in Fig.14.(a)The TDR waveforms.(b)The waveforms at the probe.of differential-source settings on the plane.Note that the out-ward-traveling electric?eld of Case3(the differential-sources with antipolarity)is the smallest?uctuation since the appear-ance of two virtual grounds provided by the positive-and-nega-tive polarity alternates the signal allocation.IV.E XPERIMENTAL V ERIFICATIONIn order to verify the accuracy of hybrid techniques,a test board was fabricated and measured by TEK/CSA8000B time-domain re?ectometer.The designed test board comprises the single-ended and differential-via structures,connecting with the corresponding top-and bottom-layer traces.The design speci?-cations and measurement settings of test board are illustrated in Fig.14.To perform the time-domain simulation,the launching voltage sources are drawn out of re?ectometer.As the driving Fig.16.Frequency-domain magnitude of the probing waveforms corre-sponding to Fig.15(b)and the plane resonances.signals pass through the differential vias,the parallel-plate structure is excited,incurring the SSN within the ter, the quiet trace will suffer form this voltage noise through the single-ended via transition.After extracting the equivalent circuit models of coupled-via structures and well dividing the parallel plates,the SI/PI co-analysis for test board can be achieved.Simulation results are compared with the measure-ment data as shown in Fig.15accordingly.As observed in Fig.15(a),the differential signals have the in-ternal skew of about30ps and the bulgy noise arising at about 500ps is due to the series-wound connector usedin the measure-ment.The capacitive effect of via discontinuities is occurred at about900ps,while the deviations between the simulation and measurement are attributed to the excessive high-frequency loss of input signals.For the zoom-in view of probing waveforms as in Fig.15(b),it is displayed that the comparison is still in good agreement except for the lossy effect not included in the time-domain simulation.Applying the fast Fourier transform, the frequency-domain magnitude of probing waveforms is ob-tained in Fig.16.In addition to the similar trend of time-domain simulation and measurement results,the peak frequencies cor-respond to the parallel-plate resonances of test board exactly. Hence,the exactitude of the proposed hybrid techniques can be veri?ed.V.C ONCLUSIONA hybrid time-domain technique has been introduced and applied successfully to perform the SI/PI co-analysis for the differential-via transitions in the multilayer PCBs.The signalpropagation on the differential traces is characterized by the known telegrapher’s equations and the parallel-plate structure is discretized by the combined FETD/FDTD mesh schemes.The coarser FDTD segmentation for most of regular regions inter-faces with an unconditionally stable FETD mesh for the local region having the differential-via transitions inside.In use of hybrid techniques,the computational time and memory requirement are therefore far less than those of a traditional FDTD space with the?ner mesh resolution but preserve the same degrees of numerical accuracy throughout the simulation.In face of the assemblages of multiple signal transitions in the speci?c areas,the hybrid techniques still can be adopted by slightly modifying the mesh pro?les in the local FETD re-gions.Furthermore,the numerical results demonstrate that the best signal allocation for PI consideration is positive-and-nega-tive alternate.Once the boundary conditions between the FETD and FDTD regions are well de?ned,it is expected that the hy-brid techniques have a great ability to deal with the more real-istic problems of high-speed interconnect designs concerned in the signal traces touted through the multilayer structures.R EFERENCES[1]K.S.Yee,“Numerical solution of initial boundary value problemsinvolving Maxwell’s equations in isotropic media,”IEEE Trans.Antennas Propag.,vol.AP-14,no.3,pp.302–307,May1966.[2]K.S.Kunz and R.J.Luebbers,The Finite Difference Time DomainMethod for Electromagnetics.Boca Raton,FL:CRC,1993,ch.2,3.[3]S.V.Georgakopoulos,R.A.Renaut,C.A.Balanis,and C.R.Birtcher,“A hybrid fourth-order FDTD utilizing a second-order FDTD subgrid,”IEEE Microw.Wireless Compon.Lett.,vol.11,no.11,pp.462–464,Nov.2001.[4]M. F.Hadi and M.Piket-May,“A modi?ed FDTD(2,4)scheme formodeling electrically large structures with high-phase accuracy,”IEEETrans.Antennas Propag.,vol.45,no.2,pp.254–264,Feb.1997.[5] A.R.Bretones,R.Mittra,and R.G.Martin,“A hybrid technique com-bining the method of moments in the time domain and FDTD,”IEEEMicrow.Guided Wave Lett.,vol.8,no.8,pp.281–283,Aug.1998.[6] A.Monorchio, A.R.Bretones,R.Mittra,G.Manara,and R.G.Martin,“A hybrid time-domain technique that combines the?nite element,?-nite difference and method of moment techniques to solve complexelectromagnetic problems,”IEEE Trans.Antennas Propag.,vol.52,no.10,pp.2666–2674,Oct.2004.[7]R.-B.Wu and T.Itoh,“Hybrid?nite-difference time-domain modelingof curved surfaces using tetrahedral edge elements,”IEEE Trans.An-tennas Propag.,vol.45,no.8,pp.1302–1309,Aug.1997.[8] D.Koh,H.-B.Lee,and T.Itoh,“A hybrid full-wave analysis of via-hole grounds using?nite-difference and?nite-element time-domainmethods,”IEEE Trans.Microw.Theory Tech.,vol.45,no.12,pt.2,pp.2217–2223,Dec.1997.[9]S.Chun,J.Choi,S.Dalmia,W.Kim,and M.Swaminathan,“Capturingvia effects in simultaneous switching noise simulation,”in Proc.IEEEpat.,Aug.2001,vol.2,pp.1221–1226.[10]J.-N.Hwang and T.-L.Wu,“Coupling of the ground bounce noise tothe signal trace with via transition in partitioned power bus of PCB,”in Proc.IEEE pat.,Aug.2002,vol.2,pp.733–736.[11]J.Park,H.Kim,J.S.Pak,Y.Jeong,S.Baek,J.Kim,J.J.Lee,andJ.J.Lee,“Noise coupling to signal trace and via from power/groundsimultaneous switching noise in high speed double data rates memorymodule,”in Proc.IEEE pat.,Aug.2004,vol.2,pp.592–597.[12]S.-M.Lin and R.-B.Wu,“Composite effects of re?ections and groundbounce for signal vias in multi-layer environment,”in Proc.IEEE Mi-crowave Conf.APMC,Dec.2001,vol.3,pp.1127–1130.[13]“Simulation Package for Electrical Evaluation and Design(SpeedXP)”Sigrity Inc.,Santa Clara,CA[Online].Available:[14]“High Frequency Structure Simulator”ver.9.1,Ansoft Co.,Pittsburgh,PA[Online].Available:[15]J.Jin,The Finite Element Method in Electromagnetics.New York:Wiley,1993,ch.12.[16]N.M.Newmark,“A method of computation for structural dynamics,”J.Eng.Mech.Div.,ASCE,vol.85,pp.67–94,Jul.1959.Wei-Da Guo was born in Taoyuan,Taiwan,R.O.C.,on September25,1981.He received the B.S.degreein communication engineering from Chiao-TungUniversity,Hsinchu,Taiwan,R.O.C.,in2003,andis currently working toward the Ph.D.degree incommunication engineering at National TaiwanUniversity,Taipei,Taiwan,R.O.C.His research topics include computational electro-magnetics,SI/PI issues in the design of high-speeddigital systems.Guang-Hwa Shiue was born in Tainan,Taiwan,R.O.C.,in1969.He received the B.S.and M.S.de-grees in electrical engineering from National TaiwanUniversity of Science and Technology,Taipei,Taiwan,R.O.C.,in1995and1997,respectively,and the Ph.D.degree in communication engineeringfrom National Taiwan University,Taipei,in2006.He is a Teacher in the Electronics Depart-ment of Jin-Wen Institute of Technology,Taipei,Taiwan.His areas of interest include numericaltechniques in electromagnetics,microwave planar circuits,signal/power integrity(SI/PI)and electromagnetic interference (EMI)for high-speed digital systems,and electrical characterization of system-in-package.Chien-Min Lin(M’92)received the B.S.degreein physics from National Tsing Hua University,Hsinchu,Taiwan,R.O.C.,the M.S.degree in elec-trical engineering from National Taiwan University,Taipei,Taiwan,R.O.C.,and the Ph.D.degree inelectrical engineering from the University of Wash-ington,Seattle.He was with IBM,where he worked on the xSeriesserver development and Intel,where he worked onadvanced platform design.In January2004,he joinedTaiwan Semiconductor Manufacturing Company, Ltd.,Taiwan,as a Technical Manager in packaging design and assembly vali-dation.He has been working on computational electromagnetics for the designs of microwave device and rough surface scattering,signal integrity analysis for high-speed interconnect,and electrical characterization of system-in-package.Ruey-Beei Wu(M’91–SM’97)received the B.S.E.E.and Ph.D.degrees from National Taiwan Univer-sity,Taipei,Taiwan,R.O.C.,in1979and1985,respectively.In1982,he joined the faculty of the Departmentof Electrical Engineering,National Taiwan Univer-sity,where he is currently a Professor and the De-partment Chair.He is also with the Graduate Instituteof Communications Engineering established in1997.From March1986to February1987,he was a Vis-iting Scholar at the IBM East Fishkill Facility,NY. From August1994to July1995,he was with the Electrical Engineering Depart-ment,University of California at Los Angeles.He was also appointed Director of the National Center for High-Performance Computing(1998–2000)and has served as Director of Planning and Evaluation Division since November2002, both under the National Science Council.His areas of interest include computa-tional electromagnetics,microwave and millimeter-wave planar circuits,trans-mission line and waveguide discontinuities,and interconnection modeling for computer packaging.。
