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MIL-M-38514E中文资料

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MIL-M-38510/14E21 March 2005__SUPERSEDINGMIL-M-38510/14D2 August 1982MILITARY SPECIFICATIONMICROCIRCUITS, DIGITAL, TTL, DATA SELECTORS/MULTIPLEXERS,MONOLITHIC SILICONThis specification is approved for use by all Depart-ments and Agencies of the Department of Defense.The requirements for acquiring the product herein shall consist of this specification sheet and MIL-PRF 385351. SCOPE1.1 Scope. This specification covers the detail requirements for monolithic, silicon, TTL, dataselectors/multiplexers, logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF-38535, (see 6.4).1.2 Part or Identifying Number (PIN). The PIN is in accordance with MIL-PRF-38535, and as specified herein.1.2.1 Device types. The device types are as follows:Device type Circuit01 Sixteen-input data selector/multiplexer, with enable02, 06 Eight-input data selector/multiplexer, with enable03 Dual, four-input data selector/multiplexer, with enable04 Dual, four-input data selector/multiplexer, without enable05 Quad, two-input data selector/multiplexer, with enable1.2.2 Device class. The device class is the product assurance level as defined in MIL-PRF-38535.1.2.3 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows:style Outline letter Descriptivedesignator Terminals PackageE GDIP1-T16 or CDIP2-T16 16 Dual-in-lineF GDFP2-F16 or CDFP3-F16 16 Flat-packJ GDIP1-T24 or CDIP2-T24 24 Dual-in-lineK GDFP2-F24 or CDFP3-F24 24 Flat-packZ GDFP7-F24 or CDFP8-F24 24 Flat-packComments, suggestions, or questions on this document should be addressed to: Commander, Defense Supply Center Columbus, ATTN: DSCC-VAS, P. O. Box 3990, Columbus, OH 43218-3990, or emailed to bipolar@. Since contact information can change, you may want to verify the currency of this address information using the ASSIST Online database at .5962 AMSC N/A FSC1.3 Absolute maximum ratings.Supply voltage range ...................................................... -0.5 V to +7.0 VInput voltage range ......................................................... -1.5 V at -12 mA to +5.5 VStorage temperature range ............................................ -65°C to +150°CMaximum power dissipation per gate, (P D) 1/Device type 01 ........................................................ 375 mWDevice types 02 and 06 ........................................... 268 mW03 ........................................................286 mWtypeDevice04 ........................................................248 mWtypeDeviceDevice type 05 ........................................................ 275 mWLead temperature (soldering 10 seconds) ......................300°CThermal resistance, junction-to-case (θJC)...................... (See MIL-STD-1835)Junction temperature (T J ) 2/.......................................... 175°C1.4 Recommended operating conditions.Supply voltage (V CC) ....................................................... 4.5 V minimum to 5.5 V maximumMinimum high level input voltage (V IH) ...........................2.0 V dcMaximum low level input voltage (V IL) ............................0.8 V dcMaximum low level output current (I IL) ............................ 16 mANormalized fanout (each output) 3/Low logic level ......................................................... 10 maximumHigh logic level ........................................................ 20 maximumCase operating temperature range (T C )......................... -55°C to 125°C2.0 APPLICABLE DOCUMENT2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification.This section does not include documents cited in other sections of this specification or recommended foradditional information or as examples. While every effort has been made to ensure the completeness of thislist, document users are cautioned that they must meet all specified requirements of documents cited insections 3, 4, or 5 of this specification, whether or not they are listed.2.2 Government documents.2.2.1 Specifications and standards. The following specifications and standards form a part of this specification to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.DEPARTMENT OF DEFENSE SPECIFICATIONSMIL-PRF-38535 - Integrated Circuits (Microcircuits) Manufacturing, General Specification for.DEPARTMENT OF DEFENSE STANDARDSMIL-STD-883 - Test Method Standard for Microelectronics.MIL-STD-1835 - Interface Standard Electronic Component Case Outlines(Copies of these documents are available online at /quicksearch/ or or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)_______1/ Must withstand the added P D due to short circuit condition (e.g. I OS test).2/ Maximum junction temperature should not be exceeded except in accordance with allowable shortduration burn-in screening condition in accordance with MIL-PRF-38535.3/ Device will fanout in both high and low levels to the specified number of inputs of the same device typeas that being tested.2.3 Order of precedence. In the event of a conflict between the text of this specification and the references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.3. REQUIREMENTS3.1 Qualification. Microcircuits furnished under this specification shall be products that are manufactured by a manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturers list before contract award (see4.3 and 6.3).3.2 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein.3.3 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein.3.3.1 Logic diagrams and terminal connections. The logic diagrams and terminal connections shall be as specified on figure 1 and 2.3.3.2 Truth tables. The truth tables shall be as specified on figure 3.3.3.4 Schematic circuit. The schematic circuit shall be maintained by the manufacturer and made available to the qualifying activity and the preparing activity upon request.3.3.5 Case outlines. Case outlines shall be as specified in 1.2.3.3.4 Lead material and finish. Lead material and finish shall be in accordance with MIL-PRF-38535 (see 6.6).3.5 Electrical performance characteristics. The electrical performance characteristics are as specified in table 1 and apply over the full recommended case operating temperature range, unless otherwise specified.3.6 Electrical test requirements. The electrical test requirements for each device class shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table III.3.7 Marking. Marking shall be in accordance with MIL-PRF-38535.3.8 Microcircuit group assignment. The devices covered by this specification shall be in microcircuit group number 4 (see MIL-PRF-38535, appendix A).TABLE I. Electrical performance characteristics.Limits Test Symbol Conditions-55°C ≤ T C ≤ +125°C unless otherwise specifiedDevice type Min MaxUnit High level output voltage V OHV CC= 4.5 VI OH = -.8 mAAll 2.4 V Low level output voltageV OL V CC = 4.5 V I OL = 16 mAAll 0.4 VInput clamp voltageV IC V CC = 4.5 V I IN = -12 mAAll -1.5 V 02, 03, 04 05, 06-0.7 -1.6 Low level input currentI ILV CC = 5.5 V V IN = 0.4 V01 -0.6 -1.6 mA High-level input currentI IH1 V CC = 5.5 V V IN = 2.5 V All 40 µA High-level input current I IH2 V CC = V IN = 5.5 V All 100 µA 01, 03, 06 -20 -55 mA Short circuit output currentI OSV CC = 5.5 V V OUT = 0 V 1/02, 04, 05-20 -120 mA 01 68 mA 02,06 48 mA 04 45 mA 03 52 mA Supply currentI CC V CC = 5.5 V05 50 mA Propagation delay time high-to-low level output from A, B, C or D to Wt PHL1 01 8 40 ns Propagation delay time low-to-high level output from A, B, C or D to W t PLH1 01 8 43 ns Propagation delay time high-to-low level output from strobe to Wt PHL2 01 6 37 ns Propagation delay time low-to-high level output from strobe to Wt PLH2 01 6 32 ns Propagation delay time high-to-low level output from E 0–E 15 to Wt PHL3 01 3 23 ns Propagation delay time low-to-high level output from E 0–E 15 to W t PLH3 R L = 390Ω ±5%, C L = 50 pF minimum(figure 4) 01 3 30 ns1/ Not more than one should be shorted at one time.TABLE I. Electrical performance characteristics - Continued.LimitsTest Symbol Conditions-55°C ≤ T C ≤ +125°Cunless otherwise specifiedDevice typeMin Max Unit02 6 40 Propagation delay time, high-to-low level output from A, B, or C to Wt PHL1 06 6 48 ns 02 6 38 Propagation delay time, low-to-high level output from A, B, or C to Wt PLH106 6 43 ns 02 8 49 Propagation delay time, high-to-low level output from A, B, or C to Y t PHL2 06 8 60 ns 02 8 45 Propagation delay time, low-to-high level output from A, B, or C to Y t PLH2 06 8 58ns 02 6 37Propagation delay time, high-to-low level output from strobe to Wt PHL3 06 6 38 ns Propagation delay time, low-to-high level output from strobe to Wt PLH3 02, 06 6 35 ns 02 8 46 Propagation delay time, high-to-low level output from strobe to Yt PHL4 06 8 52ns 02 8 42Propagation delay time, low-to-high level output from strobe to Yt PLH4 06 8 52 ns Propagation delay time, high-to-low level output from D 0-D 7 to Wt PHL5 02, 06 3 32 ns Propagation delay time, low-to-high level output from D 0-D 7 to Wt PLH5 02, 06 3 26 ns 02 6 41 Propagation delay time, high-to-low level output from D 0-D 7 to Y t PHL6 06 6 44 ns 02 6 33 Propagation delay time, low-to-high level output from D 0-D 7 to Y t PLH6 R L = 390Ω ±5%, C L = 50 pF minimum(figure 4) 06 6 36 ns Propagation delay time, high-to-low level output from data to Yt PHL1 03 3 29 ns Propagation delay time, low-to-high level output from data to Yt PLH1 03 3 28 ns Propagation delay time, high-to-low level output from A or B to Yt PHL2 03 6 44 ns Propagation delay time, low-to-high level output from A or B to Yt PLH2 03 6 42 ns Propagation delay time, high-to-low level output from strobe to Yt PHL3 03 6 32 ns Propagation delay time, low-to-high level output from strobe to Y t PLH3R L = 390Ω ±5%, C L = 50 pF minimum (figure 5)03 6 42 nsTABLE I. Electrical performance characteristics - Continued.LimitsTest Symbol Conditions-55°C ≤ T C ≤ +125°Cunless otherwise specifiedDevice typeMin Max UnitPropagation delay time high-to-low level output from data to Yt PHL1 04 3 41 ns Propagation delay time low-to-high level output from data to Yt PLH1 04 3 39 ns Propagation delay time high-to-low level output from data to Wt PHL2 04 3 25 ns Propagation delay time low-to-high level output from data to Wt PLH2 04 3 24 ns Propagation delay time high-to-low level output from A or B to Yt PHL3 04 6 51 ns Propagation delay time low-to-high level output from A or B to Yt PLH3 04 6 51 ns Propagation delay time high-to-low level output from A or B to WtPHL404 6 39 ns Propagation delay time low-to-high level output from A or B to W t PLH4 R L = 390Ω ±5%, C L = 50 pF minimum(figure 5)04634nsPropagation delay time high-to-low level output from A to Yt PHL1 05 6 49 ns Propagation delay time low-to-high level output from A to Yt PLH1 05 6 41 ns Propagation delay time high-to-low level output from strobe to Yt PHL205 3 39 ns Propagation delay time low-to-high level output from strobe to YtPLH205 3 33 ns Propagation delay time high-to-low level output from data to YtPHL305 3 25 ns Propagation delay time low-to-high level output from data to Y tPLH3R L = 390Ω ±5%, C L = 50 pF minimum (figure 6) 05 3 35 nsTABLE II. Electrical test requirements.Subgroups (see table III)MIL-PRF-38535 Test requirement Class SDevicesClass BDevicesInterim electrical parameters1 1Final electrical test parameters 1*, 2, 3, 7,9, 10, 11 1*, 2, 3, 7, 9Group A test requirements 1, 2, 3, 7, 8,9, 10, 111, 2, 3, 7, 8 9, 10, 11Group B electrical test parameterswhen using the method 5005 QCI option1, 2, 3 N/AGroups C end point electrical parameters 1, 2, 3 1, 2, 3Group D end point electrical parameters 1, 2, 3 1, 2, 3*PDA applies to subgroup 1.4. VERIFICATION4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not effect the form, fit, or function as described herein.4.2 Screening. Screening shall be in accordance with MIL-PRF-38535and shall be conducted on all devices prior to qualification and conformance inspection. The following additional criteria shall apply:a. The burn-in test duration, test condition, and test temperature, or approved alternatives shall be asspecified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in testcircuit shall be maintained under document control by the device manufacturer's Technology ReviewBoard (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring orpreparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and powerdissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883.b. Interim and final electrical test parameters shall be as specified in table II, except interim electricalparameters test prior to burn-in is optional at the discretion of the manufacturer.c. Additional screening for space level product shall be as specified in MIL-PRF-38535.4.3 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-38535.4.4 Technology Conformance Inspection (TCI). Technology conformance inspection shall be in accordance with MIL-PRF-38535 and herein for groups A, B, C, and D inspections (see 4.4.1 through 4.4.4).4.4.1 Group A inspection. Group A inspection shall be in accordance with table III of MIL-PRF-38535 and as follows:a. Tests shall be as specified in table II herein.b. Subgroups 4, 5, and 6, shall be omitted.4.4.2 Group B inspection. Group B inspection shall be in accordance with table II of MIL-PRF-38535.4.4.3 Group C inspection. Group C inspection shall be in accordance with table IV of MIL-PRF-38535 and as follows:a. End point electrical parameters shall be as specified in table II herein.b. The steady-state life test duration, test condition, and test temperature, or approved alternatives shall be asspecified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document control by the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, inaccordance with the intent specified in test method 1005 of MIL-STD-883.4.4.4 Group D inspection. Group D inspection shall be in accordance with table V of MIL-PRF-38535. End-point electrical parameters shall be as specified in table II herein.4.5 Methods of inspection. Methods of inspection shall be as specified in the appropriate tables and as follows:4.5.1 Voltage and current. All voltages given are referenced to the microcircuit ground terminal. Currents given are conventional current and positive when flowing into the referenced terminal.Figure 1. Terminal connections (top view).Figure 1. Terminal connections (top view) - Continued.Figure 1. Terminal connections (top view) - Continued.Figure 2. Logic diagrams.Figure 2. Logic diagrams – Continued.Figure 2. Logic diagrams – Continued.Figure 2. Logic diagrams – Continued.Device type 01INPUTS OUTPUT D C B A STROBE E0E1 E2 E3 E4E5E6E7E8E9E10E11E12 E13 E14 E15WX X X X H x x x x x x x x x x x x x x x x H L L L L L L x x x x x x x x x x x x x x x HL L L L L H x x x x x x x x x x x x x x x LL L L H L x L x x x x x x x x x x x x x x HL L L H L x H x x x x x x x x x x x x x x LL L H L L x x L x x x x x x x x x x x x x H L L H L L x x H x x x x x x x x x x x x x L L L H H L x x x L x x x x x x x x x x x x H L L H H L x x x H x x x x x x x x x x x x L L H L L L x x x x L x x x x x x x x x x x H L H L L L x x x x H x x x x x x x x x x x L L H L H L x x x x x L x x x x x x x x x x H L H L H L x x x x x H x x x x x x x x x x L L H H L L x x x x x x L x x x x x x x x x H L H H L L x x x x x x H x x x x x x x x x L L H H H L x x x x x x x L x x x x x x x x H L H H H L x x x x x x x H x x x x x x x x L H L L L L x x x x x x x x L x x x x x x x H H L L L L x x x x x x x x H x x x x x x x L H L L H L x x x x x x x x x L x x x x x x H H L L H L x x x x x x x x x H x x x x x x L H L H L L x x x x x x x x x x L x x x x x H H L H L L x x x x x x x x x x H x x x x x L H L H H L x x x x x x x x x x x L x x x x H H L H H L x x x x x x x x x x x H x x x x L H H L L L x x x x x x x x x x x x L x x x H H H L L L x x x x x x x x x x x x H x x x L H H L H L x x x x x x x x x x x x x L x x H H H L H L x x x x x x x x x x x x x H x x L H H H L L x x x x x x x x x x x x x x L x H H H H L L x x x x x x x x x x x x x x H x L H H H H L x x x x x x x x x x x x x x x L H H H H H L x x x x x x x x x x x x x x x H LWhen used to indicate an input condition, X = High logic level or low logic level.Figure 3. Truth tables.Device types 02 and 06INPUTS OUTPUTS C B A STROBE D0 D1D2D3D4D5D6D7Y WX X X H x x x x x x x x L HL L L L L x x x x x x x L HL L L L H x x x x x x x H LL L H L x L x x x x x x L HL L H L x H x x x x x x H LL H L L x x L x x x x x L HL H L L x x H x x x x x H LL H H L x x x L x x x x L HL H H L x x x H x x x x H LH L L L x x x x L x x x L HH L L L x x x x H x x x H LH L H L x x x x x L x x L HH L H L x x x x x H x x H LH H L L x x x x x x L x L HH H L L x x x x x x H x H LH H H L x x x x x x x L L HH H H L x x x x x x x H H LWhen used to indicate an input, X = Irrelevant.H = High level, L = Low level.ADDRESSDATA INPUTS STROBE OUTPUTINPUTSB A C0C1C2C3G YX X x x x x H LL L L x x x L LL L H x x x L HL H x L x x L LL H x H x x L HH L x x L x L LH L x x H x L HH H x x x L L LH H x x x H L HAddress inputs A and B are common to both sections.H = high level, L = low level, X = irrelevant.Figure 3. Truth tables – Continued.Device type 04Address inputsDatainputsOutputsB A C0C1C2C3Y W L L L X X X L H L L H X X X H L L H X L X X L HL H X H X X H LH L X X L X L HH L X X H X H LH H X X X L L HH H X X X H H L Address inputs A and B are common to both sections.H = High level, L = Low level, X = Irrelevant.Device type 05Strobe (enable) SelectinputDatainputsOutputG AB0B1YH XXXL L HXLL L HXHH L LLXL L LHXHAddress A and strobe G are common to all sections.H = High level, L = Low level, X = Irrelevant.FIGURE 3. Truth tables – Continued.FIGURE 4. Switching test for device types 01, 02, and 06.NOTES:1. The input pulse has the following characteristics: V OH = 3 V,V OL = 0 V, t1 = t0 = 10 ns, t p = 500 ns, PRR ≤ 1 MHz, dutycycle = 50% ±15%, and generator Z out≈ 50Ω.2. C L includes probe and jig capacitance.3. All diodes are 1N3064 or equivalent.4. Load circuits on a given output are only required where the specific testgiven in table III indicates “OUT” on that output. Load circuits mayotherwise be omitted.FIGURE 4. Switching test for device types 01, 02, and 06 - Continued.VOLTAGE WAVEFORMSSwitching time Output waveformCN to Y (types 03 and 04) ACN to W (type 04 only) BA orB to Y (types 03 and 04) AA orB to W (type 04 only) BG to Y (type 03 only) BNOTES:1. The pulse generator has the following characteristics: PRR ≤ 1 MHz,duty cycle = 50% ±15% and Z out≈ 50Ω.2. C L = 50 pF ±10% and includes probe and jig capacitance.3. All diodes are 1N3064, or equivalent.4. Load circuits on a given output are only required where the specific test given in table III indicates “OUT” on that output. Load circuits may otherwise be omitted.FIGURE 5. Switching test for device types 03 and 04.VOLTAGE WAVEFORMSInput OutputwaveformA to Y AB to Y AS to Y BNOTES:1. The pulse generator has the following characteristics: PRR ≤ 1 MHz,duty cycle = 50% ±15% and Z out≈ 50Ω.2. C L = 50 pF ±10% and includes probe and jig capacitance.3. All diodes are 1N3064 or equivalent.4. Load circuits on a given output are only required where the specific test given in table III indicates “OUT” on that output. Load circuits may otherwise be omitted.FIGURE 6. Switching test for device type 05.。

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MIL-DTL-83528C 中文

MIL-DTL-83528C 中文

详细说明书垫片材料，导电的、屏蔽垫片、电子的、弹性体、EMI / RFI通用规范本规范被国防部的所有部门和机构批准使用。

1. 范围1.1范围。

本规范规定了导电橡胶屏蔽垫圈的一般要求。

这些垫圈用于电磁干扰/射频干扰抑制应用。

1.2分类。

1.2.1部件或识别号(PIN)。

PIN如下面的例子所示1.2.1.1材料类型。

A.镀银，填充铜的有机硅在10 GHz时能产生110 dB的平面波屏蔽效果，并且连续使用温度范围为-55°C至+ 125°C。

B.镀银，铝填充的有机硅，在10 GHz的频率下具有100 dB的平面波屏蔽效果，连续使用温度范围为-55°C至+ 160°C。

C.镀银，填充铜的氟硅酮，在10 GHz下具有110 dB的平面波屏蔽效果，在-55°C至+ 125°C的连续使用温度范围内耐溶剂和喷气燃料。

D.镀银的铝填充氟硅树脂，在10 GHz时具有90 dB的平面波屏蔽效果，连续使用温度范围为-55°C至+ 160°C，并且耐溶剂和喷气燃料。

E.中等硬度的纯银填充有机硅，在-55°C至+ 160°C的连续使用温度范围内，在10 GHz时具有110 dB的平面波屏蔽效果。

F.纯银填充的氟硅酮，在10 GHz时具有110 dB的平面波屏蔽效果，在-65°C至+ 160°C的连续使用温度范围内耐溶剂和喷气燃料。

G.镀银，填充铜的有机硅，增强的膨胀铜箔，能够在-45°C至+ 125°C的连续使用温度范围内，在10 GHz下具有110 dB的平面波屏蔽效果。

H.高硬度，纯银填充的有机硅，在-55°C至+ 160°C的连续使用温度范围内，在10 GHz时具有110 dB的平面波屏蔽效果。

J.一种低硬度，纯银填充的有机硅，在-55°C至+ 160°C的连续使用温度范围内，在10 GHz 时具有80 dB的平面波屏蔽效果。

德国米铱线激光轮廓扫描传感器样册

德国米铱线激光轮廓扫描传感器样册

高分辨率满足扫描精细部件的要求，例如电气 插头针脚 改变测量区域以提高测量性能 scanCONTROL激光轮廓仪可以根据不同应用 要求，通过优化测量区域来提高数据处理速度 或成像像素（x轴或z轴）。除了处理速度以 外，数据采集点数，测量区域的高度和宽度都 可以预先设定。例如：在一条窄带区域上测 512个测量点（用于边沿测量），或者针对高 速应用，选择在一条宽带区域上测256个测量 点（用于表面测量）。共有128种预设定的测 量区域可供选择。
5
标准型 高频型 智能型 页码
量程 25 mm
scanCONTROL 2600-25 scanCONTROL 2650-25 scanCONTROL 2610-25 12 - 13
scanCONTROL 26x0 集成控制器，适合自动化应用领域
标准型 高频型 智能型 页码
量程 50 mm
scanCONTROL 2600-50 scanCONTROL 2650-50 scanCONTROL 2610-50 14 - 15
标准型 高频型 智能型 页码
量程 100 mm
scanCONTROL 2600-100 scanCONTROL 2650-100 scanCONTROL 2610-100 16 - 17
标准型 高频型 智能型 页码
量程 25 mm
scanCONTROL 2700-25 scanCONTROL 2750-25 scanCONTROL 2710-25 22 - 23
未过滤的轮廓信息
经过中位值滤波的轮廓信息
测量结果校准 与简单将摄像机与激光线合并使用的系统不 同， scanCONTROL系列轮廓仪输出的不仅是 像素值，还同时输出经过校准的坐标信息。每 支轮廓仪都附带一个校准报告。报告随产品一 同发出，用于验证每支轮廓仪探头的精度水 平。
MIL-PRF-38534G

MIL-PRF-38534G

MIL-PRF-38534G9 March 2009SUPERSEDINGMIL-PRF-38534F12 April 2006PERFORMANCE SPECIFICATIONHYBRID MICROCIRCUITS,GENERAL SPECIFICATION FORThis specification is approved for use by allDepartments and Agencies of the Department of Defense.This document is a performance specification. It is intended to provide the device manufacturers an acceptable established baseline in order to support Government microcircuit applications and logistic programs. The basic document has been structured as a performance specification that is supplemented with detailed appendices. These appendices provide guidance to manufacturers on demonstrated successful approaches to meeting defense performance requirements. These appendices are included as a performance benchmark and are intended to impose mandatory requirements.1. SCOPE1.1 Scope. This specification establishes the general performance requirements for hybrid microcircuits, multi-chip modules (MCM) and similar devices, and the verification requirements for ensuring that these devices meet the applicable performance requirements. Verification is accomplished through the use of one of two quality programs (Appendix A). The main body of this specification describes the performance requirements and the requirements for obtaining a Qualified Manufacturers List (QML) listing. The appendices of this specification are intended for guidance to aid a manufacturer in developing their verification program. Detail requirements, specific characteristics, and other provisions that are sensitive to the particular intended use should be specified in the applicable device acquisition specification.Comments, suggestions, or questions on this document should be addressed to: Defense Supply Center, Columbus, ATTN: DSCC-VAS, P. O. Box 3990, Columbus, OH 43218-3990, or emailed to PRF38534@. Since contact information can change, you may want to verify the currency of this address information using the ASSIST Online database at .AMSC N/A FSC 59621.2 Description of this specification. The intent of this specification is to allow the device manufacturer the flexibility to implement best commercial practices to the maximum extent possible while still providing a product which meets the military performance needs. Devices that are compliant to this specification are those that are capable of meeting the verification requirements outlined herein; and are built on a manufacturing line which is controlled by the manufacturer's quality management program and has been certified and qualified in accordance with the requirements herein. The certification and qualification requirements outlined herein are the requirements to be met by a manufacturer to be listed on the (QML). The manufacturer may modify, substitute, or delete the tests and inspections defined herein. This is accomplished by baselining a flow of tests and inspections that will assure that the devices are capable of meeting the generic verifications provided in this specification. This does not necessarily mean that compliant devices have been subjected to the generic performance verifications provided in this specification, just that compliant devices are capable of meeting them. It is the manufacturer's responsibility to ensure that their devices are capable of meeting the generic performance verifications applicable to each specified product assurance level.Appendix A defines the quality management program that may be implemented by the manufacturer. Appendix A includes an option to use a quality review board concept, hereafter referred to as the Technology Review Board (TRB) in this document, which may be used to modify the generic verification, design, and construction criteria provided in this specification. Appendix B is not currently being used. Appendix C defines generic performance verifications. These verifications consist of a series of tests and inspections which may be used to verify the performance of devices. They may be used as is or modified as allowed by this specification. Appendix D is not currently being used. Appendix E defines generic design and construction criteria relative to this technology, including rework limitations and major change testing guidance. Appendix F provides statistical sampling procedures. Appendix G provides the guidelines for a Radiation Hardness Assurance (RHA) Program.1.3 Classification. Five quality assurance levels are provided for in this specification. Four of these classes, in highest to lowest order, are K, H, G and D, as defined below. The fifth class is Class E, the quality level associated with a Class E device is defined by the acquisition document.1.3.1 Class K. Class K is the highest reliability level provided for in this specification. It is intended for space applications.1.3.2 Class H. Class H is the standard military quality level.1.3.3 Class G. Class G is a lowered confidence version of the standard military quality level (H) with QML listing in accordance with 4.5.2.2, a possibly lower temperature range (-40o C to +85o C), a manufacturer guaranteed capability to meet the Class H conformance inspection and periodic inspection testing, and a vendor specified incoming test flow. The device will meet the Class H requirements for in-process inspections and screening.1.3.4 Class D. Class D is a vendor specified quality level available to this specification. This is a possibly lower temperature range (0o C to +70o C) part with a vendor specified test flow available from a QML listed manufacturer.1.3.5 Class E. Class E designates devices which are based upon one of the other classes (K, H, or G) with exceptions taken to the requirements of that class. These exceptions are specified in the device acquisition document, therefore the device acquisition document should be carefully reviewed by the user to ensure that the exceptions taken will not adversely affect the performance of the system.2. APPLICABLE DOCUMENTS2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This section does not include documents cited in other sections of this specification or recommended for additional information or as examples. While every effort has been made to ensure the completeness of this list, document users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this specification, whether or not they are listed.2.2 Government documents.2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a part of this specification to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.2DEPARTMENT OF DEFENSE SPECIFICATIONSMIL-I-46058 - Insulating Compound, Electrical (For Coating Printed Circuit Assemblies).DEPARTMENT OF DEFENSE STANDARDSMIL-STD-883 - Test Method Standard Microcircuits.(Copies of these documents are available online at /quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)2.2.2 Other Government documents, drawings, and publications. The following other Government documents, drawings, and publications form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.Handbook H4/H8 - Commercial and Government Entity (CAGE) Handbook. 1/JEDEC Publication JEP133 - Guide for the Production and Acquisition of Radiation-Hardness- Assured Multichip Modules and Hybrid MicrocircuitsJESD22-A114 - Electrostatic Discharge (ESD) Sensitivity Testing Human Body Model(HBM)NAVSHIPS 0967-190-4010 - Manufacturer's Designating Symbols. 2/QML-38534 - Qualified Manufacturer's List of Products Qualified Under PerformanceSpecification MIL-PRF-38534, Hybrid Microcircuits GeneralSpecification For.(Copies of these documents are available online at /quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the text of this document and the references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.3. REQUIREMENTS3.1 Performance requirements for Class K devices. Class K devices shall be capable of meeting the Class K tests and inspections of Appendices C and E (see table I). This shall include the incoming inspection flow, the in-process inspection flow, the screening flow, and the conformance inspection and periodic inspection flow. These devices shall be specified over the temperature range of -55o C to +125o C or as specified in the device acquisition document. Manufacturers of these devices shall be fully certified and qualified in accordance with this specification. Verification of these performance requirements shall be performed as described in 4 herein.3.2 Performance requirements for Class H devices. Class H devices shall be capable of meeting the Class H tests and inspections of Appendices C and E (see table I). This shall include the incoming inspection flow, the in-process inspection flow, the screening flow, and the conformance inspection and periodic inspection flow. These devices shall be specified over the temperature range of -55o C to +125o C or as specified in the device acquisition document. Manufacturers of these devices shall be fully certified and qualified in accordance with this specification. Verification of these performance requirements shall be performed as described in 4 herein._________1/ Handbook H4/H8 has been replaced by Defense Logistics Information Services CAGE Code website at https:///bincs/begin_search.asp2/ NAVSHIPS 0967-190-4010 Manufacturer’s Designating Symbols is no longer available. All current product should use Commercial and Government Entity (CAGE) Code. See 3.7.5 (e) for the CAGE Code onlinedatabase website.33.3 Performance requirements for Class G devices. Class G devices shall be capable of meeting the Class H tests and inspections of Appendices C and E, except incoming inspection (see table I). This shall include the in-process inspection flow, the screening flow, and the conformance inspection and periodic Inspection flow. Compliance with the conformance inspection and periodic inspection flow shall be guaranteed by the manufacturer. Actual completion of conformance inspection and periodic inspection tests and inspections are optional and at the manufacturer's discretion. DSCC approval or notification is not required to eliminate conformance inspection and periodic inspection tests and inspections for this class of device; however, it is the manufacturer's responsibility to ensure that their devices are capable of passing these tests and inspections. These devices shall be specified over the temperature range of -40o C to +85o C or a wider range. Manufacturers of these devices shall be fully certified and QML listed in accordance with this specification. Verification of these performance requirements shall be performed as described in 4 herein.3.4 Performance requirements for Class E devices. Class E devices are devices which meet all of the requirements of one of the other classes (K, H, or G) with some exceptions taken. The device acquisition document shall clearly state which class the device is based upon (K, H, or G) and what exceptions are being taken. The users of these devices should carefully examine the device acquisition document to verify that the exceptions being taken will not adversely affect the system performance. Manufacturers of these devices shall be fully certified in accordance with this specification. Verification of the performance requirements shall be performed as described in paragraph4.3.5 Performance requirements for Class D devices. Class D devices are built and tested in accordance with the manufacturer's specified production and testing flow (see table I). These devices shall be capable of meeting the specified electrical tests. However, these devices are not required to meet any of the tests and inspections of this specification. These devices shall be specified over the temperature range of 0o C to +70o C or a wider range. Manufacturers of these devices shall be fully certified and QML listed in accordance with this specification. Verification of these Performance Requirements shall be performed as described in 4 herein.3.6 Performance requirements for Radiation Hardness Assurance (RHA) devices. Compliant RHA devices shall meet the additional performance requirements of Appendix G. Detailed information for producing and acquiring RHA devices can be found in JEDEC publication JEP133 Guide for the Production and Acquisition of Radiation-Hardness- Assured Multichip Modules and Hybrid Microcircuits.4TABLE I. Performance requirements summary.ClassTest flow orrequirement 1/DE 2/ G 2/ H 2/ K 2/Certification Required Required Required Required(Class H) Required (Class K)QML listing RequiredIAW 4.5.2.2RequiredIAW 4.5.2.2RequiredIAW 4.5.2.1RequiredIAW 4.5.2.1Incoming inspection (appendix C) Manufacturerspecified 3/Manufacturerspecified 3/Applicable(Class H)1/Applicable(Class K) 1/In-process inspections (appendix. C) Manufacturerspecified 3/Applicable(Class H) 1/Applicable1/Applicable1/Screening (appendix. C) Manufacturerspecified 3/Applicable(Class H) 1/Applicable(Class H)1/Applicable(Class K) 1/Conformance inspection and periodic inspection (appendix. C) Manufacturerspecified 3/Guaranteed(Class H) 4/Applicable(Class H)1/Applicable(Class K) 1/Temperature range5/ 0o C to +70o CRequired Iaccordancewith theApplicabledeviceclass andtheAcquisitionDocument-40o C to+85o C-55o C to+125o C-55o C to+125o C1/ For test flow implementation and available flexibility see 3.7.1.2/ Design and construction and rework criteria are as specified in Appendix E and shall be utilized in accordance with 3.7.1.3/ Manufacturer specified means that the manufacturer does not have to take the generic criteria of this specification into consideration during the establishment of its manufacturing and test flows. The manufacturer's flow may or may not meet the same requirements as the flow of this specification. In addition, the manufacturer may specify that they do not perform the particular test or inspection flow.4/ Guaranteed (Class H) means that the manufacturer is assuring that their devices shall meet the conformance inspection and periodic inspection test flow contained in tables C-Xa, C-Xb, C-Xc, and C-Xd, but may or may not actually perform the tests and inspections specified. Elimination of these tests and inspections does notnecessitate DSCC approval or notification.5/ Classes D and G may be specified at wider temperature ranges. Classes H and K shall be -55o C to +125o C unless otherwise specified in the acquisition document.53.7 General. The manufacturer of devices, in compliance with this specification, shall have and use production and test facilities and a verification program adequate to assure successful compliance with the provisions of this specification and the associated device acquisition specification. Adequacy of a device manufacturer to meet the requirements of this specification shall be determined by the Government qualifying activity. The individual item requirements shall be as specified in the associated device acquisition specification and as specified herein. Only devices which meet all the performance requirements of this specification and the associated device acquisition specification and have been adequately verified shall be marked as compliant and delivered. Monolithic microcircuits may be built to the Class K, H, G, or E performance requirements of this specification; however, monolithic microcircuits offered in compliance with this specification shall be specified on a Standard Microcircuit Drawing (SMD). Facilities and programs listed on the Qualified Manufacturer's List (QML) may be used for the manufacture of other than compliant devices; however, any use or reference to compliant device marking, Class K, H, G, or E certification status, or this specification in such a way as to state or imply equivalency (and thereby Government endorsement) in connection with noncompliant devices is prohibited and may be cause for revocation of certification or QML status (or both). Terms, definitions, methods, and symbols are in accordance with 6.4. Any defense specification or standard referred to in this specification may be replaced by an equivalent commercial standard as determined by the preparing activity.3.7.1 Implementation of this specification. All devices offered and shipped in compliance with this specification shall meet the performance requirements specified for the applicable device class. The manufacturer shall verify that devices meet the performance requirements of the applicable device class. The manufacturer is responsible for developing a verification program which shall meet this requirement. The appendices of this specification give standard methods for verifying that the devices meet the performance requirements (except for Class D). The manufacturer may address the requirements of this specification as written, adapt them to their products, or develop a new methodology. Prior to the manufacturer being certified, the actual verification program to be used shall be reviewed and approved by DSCC. Any deletions or changes to the test flow shall also be reviewed and approved by DSCC or the manufacturer's DSCC approved Technology Review Board (TRB) prior to implementation. In this manner, a manufacturer may use an alternative method to the method specified in this specification to evaluate their parts if the alternate method verifies the same performance requirement. Furthermore, the manufacturer may eliminate a test or inspection (or decrease the occurrence or sample size of the test or inspection) if it is shown that the test or inspection is not necessary or can be performed less frequently. It is the manufacturer's responsibility to show how their verification program (and any changes to it) meets the requirements of this specification. The manufacturer shall analyze the impact of major changes and their affect on previously approved modifications of tests (test optimization). See table II for clarification.6TABLE II. Implementation summary.Option Definition Typical examples Implementation proceduresMeet requirement as written The manufacturerperforms the test orrequirement as specified.Self explanatory The manufacturer implementsthe test or requirement intointernal documentation, verifiedduring certification.For TRB companies, alternatemethod and appropriatejustification are approved bythe manufacturer's TRB.Alternate method to the requirement The manufacturer assuresthat the intent of therequirement is met, butdoes not perform thetest/requirement exactly aswritten.- Replacement of a test withstatistical process control (SPC)or alternate method.- Historical data analysis showsthat the requirement is met.- Design verification/validationshows that the process is capableof meeting the requirement.- Requirement does not addressnew materials, technologies, ordesigns.For traditional companies,manufacturer proposes thealternate method andjustification to the qualifyingactivity for approval.The manufacturer provesthat the test or requirementis either:Non-value added - Test does not stress the processadequately (e.g., PIND forencapsulated parts).- Historical data analysis showsthat the test does not inducefailures.Elimination is achieved in thesame manner as alternatemethods described above.The product will not complywith the test orrequirement due totechnology limitations.- Configuration of the product (i.e.,size, mass, package) isincompatible with the test method.The exception shall bedocumented in the applicableacquisition document. Productis classified as Class E.Elimination of the requirementApplication has no need of the requirement. The device will not experience theparticular stress in the application.The exception shall bedocumented in the applicableacquisition document. Productis classified as Class E.3.7.2 Device acquisition specification. The preferred device acquisition document for devices built in full compliance with this specification is a SMD. Monolithic microcircuits built in compliance with this document shall be documented on an approved SMD.3.7.3 Design and construction. The design and construction of compliant devices shall address the limitations and guidelines of Appendix E.3.7.3.1 Lead finish. Appendix E provides the general interface requirements for lead finishes.3.7.4 QML qualification requirements. Hybrid microcircuits furnished under this specification shall be products which are authorized by the qualifying activity for listing on the QML. Qualification testing shall be performed in accordance with the agreed upon qualification plan. (See appendix C for guidance on qualification testing.)73.7.5 Marking of devices. Marking shall be in accordance with the requirements of this specification and the*device procurement specification. The marking shall be legible and complete, and shall meet the resistance tosolvents requirements of method 2015 of MIL-STD-883. When mechanical or laser marking is performed, it shall be clearly visible through those conformal coatings approved for use in MIL-I-46058 (see method 2015 of MIL-STD-883 if contrasting material or ink is used to highlight the trace). Mechanical or laser marked metal surfaces shall meet all applicable microcircuit finishes and shall not degrade the performance requirements of the device. Mechanical orlaser marking shall be approved by the qualifying activity. If any special marking is used, it shall in no way interfere with the marking required herein, and shall be visibly separated therefrom. The following marking shall be included on each microcircuit unless otherwise specified.a. Part or Identifying Number (PIN) (see 3.7.5.1).b. Index point (see 3.7.5.2).c. Lot identification code or date code (see 3.7.5.3).d. Device manufacturer's identification (see 3.7.5.4).e. Device manufacturer's CAGE CODE. The CAGE CODE online database is available at/bincs/begin_search.asp (see 3.7.5.5).f. Country of manufacture (see 3.7.5.6).g. Serialization, when applicable (see 3.7.5.7).h. Special marking (see 3.7.5.8).i. Electrostatic discharge (ESD) sensitivity identifier (see 3.7.5.8.2).j. Certification mark (see 3.7.5.8.3).Unless otherwise specified, the certification mark, the PIN, the inspection lot identification code, and the ESDidentifier shall be located on the top surface of flat packages or dual-in-line configurations and on either the top orthe side of cylindrical packages (TO configurations and similar configurations).3.7.5.1 Part or Identifying Number (PIN). Each Standard Microcircuit Drawing (SMD) microcircuit shall be markedwith the complete PIN, as specified in the SMD. The number sequence for MIL-PRF-38534 is 5962-XXXXXZZHYY, where:5962 - XXXXX ZZ H Y YFederal RHA Device QML Case Leadstock class designator type no. device outline finishdesignator (see 3.7.5.1.1) class (see 3.7.5.1.3) designator\ / designator (see 3.7.5.1.4)\/ (see 3.7.5.1.2)Drawing number3.7.5.1.1 Device type. The device type shall identify the circuit function as indicated in the SMD.3.7.5.1.2 Device class designator. This device class designator shall be a single letter identifying the quality levelin accordance with the SMD.3.7.5.1.3 Case outline. The case outline shall be designated by a single letter assigned to each outline withineach SMD.3.7.5.1.4 Lead finish. Lead frame or terminal material and finish shall be as specified (see Appendix E). The leadfinish shall be designated by a single letter as follows:8Finish letter Lead finish (see note)A Hot solder dipB Tin-lead plateC Gold plateX Finishes A, B, or C (see note)NOTE: Finish letter "X" shall not be marked on the microcircuit or its packaging. This designation is provided for use in drawings, part lists, acquisition orders, or other documentation where lead finishes A, B, and C are all considered acceptable and interchangeable without preference. For Government logistic support, the A lead finish will be acquired and supplied to the end user when the X is included in the PIN for lead finish. If the PIN is not available with the A lead finish, the same PIN will be acquired except with the C or B lead finish designator as determined by availability. Type C terminal material is a fired on metallization used with leadless chip carriers.3.7.5.2 Index point. The index point, tab, or other marking indicating the starting point for numbering of leads or for mechanical orientation shall be as specified and shall be applied so that it is visible from above when the microcircuit is installed in its normal mounting configuration. The outline of an equilateral triangle (i.e., !), which may be used as an electrostatic identifier (see 3.7.5.8.2), may also be used as the pin 1 identifier.3.7.5.3 Lot identification code (date code). Devices shall be marked by a unique code to identify the week of final seal. The first two numbers in the code shall be the last two digits of the number of the year, the third and fourth numbers shall be two digits indicating the calendar week of the year. When the number of the week is a single digit, it shall be preceded by a zero. Reading from left to right or from top to bottom, the code number shall designate the year and week, in that order (e.g., 8806 equals week 6 of 1988).3.7.5.4 Manufacturer's identification. Devices shall be marked with the name or trade mark of the manufacturer. The identification of the equipment manufacturer may appear on the device only if the equipment manufacturer is also the device manufacturer.3.7.5.5 Manufacturer's designating symbol. When space permits, the manufacturer may mark the CAGE code on devices. The manufacturer's designating symbol or CAGE code number shall be as listed on NAVSHIPS0967-190-4010 or cataloging Handbook H4/H8. NAVSHIPS 0967-190-4010 and Handbook H4/H8 are no longer being maintained. Manufacturing symbols found in NAVSHIPS 0967-190-4010 should no longer be used for current product. All current product should use the current manufacturers CAGE code. CAGE codes can be found using the online database references in 3.7.5.e. The designating symbol shall be used only by the manufacturer to whom it has been assigned and only on those devices manufactured at the manufacturer's plant. In the case of small devices, the manufacturer's designating symbol may be abbreviated by omitting the first "C" in the series of letters.3.7.5.6 Country of manufacture. The manufacturer shall indicate the country where the device was manufactured(i.e., substrate and element attach, interconnect, seal). At the option of the manufacturer, the country of manufacture marking may be omitted from the body of the device but shall be retained on the initial container.3.7.5.7 Serialization. Serialization allows traceability of electrical tests results (variables data) to an individual device.3.7.5.7.1 Class K serialization. Prior to the first recorded electrical measurement in screening, each Class K device shall be marked with a unique serial number assigned consecutively. Lot records shall be maintained to provide traceability from the serial number to the specific incoming inspection lots from which the elements originated.3.7.5.7.2 Class H and G serialization. Serialization of Class H and G devices shall only be required when specified in the device acquisition specification.3.7.5.8 Special marking. When the size of a package is insufficient to allow marking of special process identifiers on the top surface, the back side of the package may be used for these markings except the ESD identifier shall be marked on the top. Button cap flat packs with less than, or equal to, 16 leads may have the identifier marked on the ceramic. Back side marking with conductive or resistive ink shall be prohibited on nonconductive surfaces.3.7.5.8.1 Beryllium oxide package identifier. If a device package contains beryllium oxide, the device shall be marked with this designation: BeO.9。

超米特电子有限公司产品说明书

超米特电子有限公司产品说明书

1US Headquarters TEL +(1) 781-935-4850FAX +(1) 781-933-4318 • Europe TEL +(44) 1628 404000FAX +(44) 1628 404090Asia Pacific TEL +(852) 2 428 8008FAX +(852) 2 423 8253South America TEL +(55) 11 3917 1099FAX +(55) 11 3917 0817Superior elongation and tensilestrength help to prevent tearing in use due to mishandling. Typical properties for CHO-SEAL 1310 and 1273 materi-al are shown on pages 33 and 32respectively.High Shielding PerformanceCHO-SEAL 1310 material provides more than 80 dB of shielding effectiv-ness from 100 MHz to 10 GHz, while CHO-SEAL 1273 material provides more than 100 dB.Low Volume ResistivityBoth materials have exceptionally low volume resistivity, which makes them well suited for grounding appli-cations in which a flexible electrical contact is needed.Low Compression GasketSpacer gaskets are typicallydesigned to function under low deflec-tion forces. Chomerics uses design tools such as Finite Element Analysis (FEA) to accurately predict compres-sion-deflection behavior of various cross section options. Refer to page16.LCP Plastic SpacerLiquid crystal polymer (LCP)spacers, including those made with Vectra A130 material, provide aCHO-SEAL ®1310 or 1273Conductive ElastomersWith EMI spacer gaskets, shielding and grounding are provided by Chomerics’CHO-SEAL 1310 and 1273 conductive elastomers, specifi-cally formulated for custom shape molded parts. They provide excellent shielding and isolation against electro-magnetic interference (EMI), or act as a low impedance ground path between PCB traces and shielding media. Physically tough, these elas-tomers minimize the risk of gasket damage, in contrast to thin-walled extrusions or unsupported molded gaskets.Silicone-based CHO-SEAL 1310and 1273 materials offer excellent resistance to compression set over a wide temperature range, resulting in years of continuous service. CHO-SEAL 1310 material is filled with silver-plated-glass particles, while 1273 utilizes silver-plated-copper filler to provide higher levels of EMI shielding effectiveness.EMI Spacer GasketsThe unique design of Chomerics’EMI spacer gaskets features a thin plastic retainer frame onto which a conductive elastomer is molded. The elastomer can be located inside or outside the retainer frame, as well as on its top and bottom surface. EMI spacer gaskets provide a newapproach to designing EMI gaskets into handheld electronics such as dig-ital cellular phones. Board-to-board spacing is custom designed to fit broad application needs. Customized cross sections and spacer shapes allow for very low closure forcerequirements and a perfect fit in any design or device.Robotic InstallationSpacer gaskets can be installed quickly by robotic application. Integral locater pins in the plastic spacer help ensure accuratepositioning in both manual and pick-and-place assembly. Benefits include faster assembly and lower labor costs.The integrated conductive elastomer/plastic spacer gasket is a low cost,easily installed system for providing EMI shielding and grounding in small electronic enclosures.Figure 1Single Piece EMI Gasket/Locator PinsCHO-SEAL 1310 or 1273 Conductive Elastomer (Inside)Plastic Spacer Around Outsideor InsideApplications for EMI Spacer GasketsThe spacer gasket concept is especially suited to digital and dual board telephone handsets or other handheld electronic devices. It provides a low impedance path between peripheral ground traces on printed circuit boards and components such as:•the conductive coating on a plastic housing•another printed circuit board •the keypad assemblyTypical applications for EMI spacer gaskets include:•Digital cellular, handyphone and personal communications services (PCS) handsets •PCMCIA cards•Global Positioning Systems (GPS)•Radio receivers•Other handheld electronics, e.g.,personal digital assistants (PDAs)•Replacements for metal EMI shield-ing “fences” on printedcircuit boards in wireless tele-communications devicesstable platform for direct, highprecision molding of conductive elas-tomers. The Vectra A130 material described in Table 1 has excellent heat deflection temperature character-istics (489°F, 254°C). For weight con-siderations, the LCP has aspecific gravity of only 1.61. This plas-tic is also 100% recyclable.Typical EMI Spacer Gasket Design ParametersThe EMI spacer gasket concept can be considered using the design parameters shown in Table 2. Some typical spacer gasket profiles are shown below.Figure 2Typical Spacer Gasket Profiles3US Headquarters TEL +(1) 781-935-4850FAX +(1) 781-933-4318 • Europe TEL +(44) 1628 404000FAX +(44) 1628 404090Asia Pacific TEL +(852) 2 428 8008FAX +(852) 2 423 8253South America TEL +(55) 11 3917 1099FAX +(55) 11 3917 0817Finite Element AnalysisChomerics, a division of the Parker Hannifin Corporation’s Seal Group, is the headquarters of Parker Seal’s Elastomer Simulation Group. This unit specializes in elastomer finite element analysis (FEA) using MARC K6 series software as a foundation for FEA capability.Benefits of FEA include:•Quickly optimizing elastomer gasket designs•Allowing accurate predictions of alternate elastomer design concepts •Eliminating extensive trial and error prototype evaluationTypical use of FEA in EMI spacer gasket designs is to evaluate the force vs. deflection requirements of alternate designs.For example, onespacer design features a continuous bead of con-ductive elastomer molded onto a plastic spacer. An alternative designemploys an “interrupted bead,” where the interrup-tions (gaps left on the plastic frame) are sized to maintain the requiredlevel of EMI shielding. Figure 4illustrates these alternative designs.Gasket DeflectionFigure 5 compares the effect of continuous and interrupted elastomer gasket designs in terms of the force required to deflect the conductive elastomer. This actual cellular handset application required a spacer gasket with interrupted bead to meet desired deflection forces.Chomerics Designand Application ServicesChomerics will custom design a spacer for your application. Advice,analysis and design assistance will be provided by Chomerics Applications and Design engineers at no additional fee. Contact Chomerics directlyat the locations listed at the bottom of the page.Figure 3FEA Example of an EMISpacer Gasket Cross SectionFigure 4Continuous (top) and InterruptedElastomer GasketsFigure 5Typical Spacer Gasket Deflection。