MMBF4391LT1G;MMBF4393LT1G;MMBF4392LT1G;MMBF4393LT3G;MMBF4391LT1;中文规格书,Datasheet资料

Input/Output and Measurement ModulesThe rear of the SyncSystem 4380A is shown below. Modules can be operated in any of the six slots. The unit will automatically detect and configure the system based on the modules(s) installed. The module slots are identified by slot number so the operator can identify the modules' physical location in the chassis.Pulse Output Modules4394A: Pulse output (e.g., PPS, DC-IRIG), 4 ports, BNC(F)The 4394A module provides 4 pulse output ports. The output type of each port is individually user configurable. Users can change the signal types (PPS / DC IRIG), the PPS signal parameters, and the IRIG signal parameters. The 4394A module is tied to the UTC Epoch only.DescriptionSFP Ports (future use)10 MHz InputUSBEthernet GNSS Antenna In put6 hot-swappable expansion slotssupport a broad range of input/output modules4334A: Pulse output (e.g., PPS, DC-IRIG) - UTC Time and GPS TimeThe 4334A module provides two 1PPS outputs and two DC IRIG (B000) outputs.Outputs 1 and 2 are 1PPS and outputs 3 and 4 are DC IRIG. Users can changethe signal types (PPS/DC IRIG/Havequick), the PPS signal parameters, theIRIG signal types on individual output ports with 4 independent epochs, orHavequick (UTC Only). Users can select the output voltage on each port (0-3V or0-5V) based on the configuration. By default, the module ships set to 3V.4344A: 1PPS-10V Output ModuleThe factory default for this module provides four 1PPS outputs at 10V 0-PK. Valid PPS settings are 1PPS to 10MPPS. This module also allows configuration of the pulse period, pulse width and PPS rates.4391A/4331A : Code GeneratorsThe 4391A/4331A Code Generators can generate user defined bit streams witha known relationship to UTC. The code generation segment uses the local UTC estimate and a user-generated data file and produces a bit stream (derived from the user-generated file) whose first bit is aligned to within 1 ns of the local UTC estimate. On the 4391A Ports 1 and 2 are TTL into 50Ω and Ports 3 and 4 are >2.4V peak-to-peak into 50Ω (NRZ). On the 4331A Ports 1 - 4 are RS422 (1.5 V to 5.5V into 100Ω differential Triax). All 4 ports of each module are in phase.4391A: Code Generator Module4331A: RS-422 Code Generator Module4376A: Pulse Output Module (e.g., PPS, DC-IRIG), RS-422 (4 outputs), DB15(F) The 4376A module factory default for this module provides four 1PPS outputsusing a DB15 type connector. Users can change the PPS signal parameters onindividual signal outputs.4335A: Pulse, Timecode, Have Quick Output ModuleThe 4335A module provides two 1PPS outputs and two DC IRIG (B000) Outputs.Outputs 1 and 2 are 1PPS and Outputs 3 and 4 are DC IRIG. The output types areuser selectable/programmable. Users can change the signal types (PPS/DC IRIG/Havequick), the PPS signal parameters, the IRIG signal types on individual outputports with 4 independent epochs, or Havequick (UTC Only). Users are able toselect the output voltage on each port (0-3V or 0-5V) based on the configuration.Frequency Output ModulesThe SyncSystem 4380A supports a variety of frequency outputs modules. All mod-ules are all hot-swappable and do not require end user programming or configura-tion. The modules operate in any of the 6 module slots and output 10 MHz, 5 MHz or 1 MHz at +13 dbm.4395B-1: 1 MHZ Module4395B-5: 5 MHz Module4395B-10: 10 MHz ModuleAM IRIG Modules Array 4387A: Amplitude Modulated (AM) IRIG ModuleThis module provides four Amplitude Modulated (AM) IRIG Outputs or the NASA36Serial Time Code. Valid AM IRIG Codes are A (130, 133, 137), B (120, 123, 127), E (111,112, 121), G (141, 142, 147), and H (111, 112, 121, 122, 127). The default time code isB120. The 4387A-6V module provides 6 Vpp output signals.4337A and 4338A: Epoch Adjusted Timecode (AM) IRIG ModulesThis 4337A module provides four Amplitude Modulated (AM) IRIG Outputs tied to a single epoch where as the 4338A moduleallows each port to have its own unique epoch. The epoch can be user defined, UTC (default) [±offset], GPS time, or a configuredtime zone. Valid AM IRIG Codes are A (130, 133, 137), B (120, 123, 124, 127), E (111, 112, 121), G (141, 142, 147), and H (111, 112,121, 122, 127). The default time code is B120. B120 and B124 support the IEEE-1344 Control Functions.The [+/- offset] option with the UTC epoch allows users to add or subtract between 1 minute and 23 hours and 59 minutes fromthe current UTC Time. The GPS epoch outputs the GPS time scale (UTC with the current # of leap-seconds removed).A Time Zone Epoch can be specified and the IRIG Outputs will be set to that Time Zone and if the Control Function is set to 1344 the offset bits will indicate the direction and amount of time off from UTC (except for the three time zones occurring 45 minutes after the hour) and the Time Zones east of the GMT meridian (positive) or west of the GMT meridian (negative). For local offset control bits to be correct, hours must be between -15 and +15, minutes must be 0 or 30, and seconds must be zero. When a local time zone is specified, daylight savings time rules (if any) are applied automatically.each port.Communication/Telecom Modules4374A: T1/E1 Telecom ModuleThe 4374A module produces a 1.544 Mbps T1 (DS-1) or 2.048 Mbps compatibleoutput. Each port can independently be set to one of four output configurationoptions:0: B8ZS, ESF packets1: 1.544 MHz Square Wave2: B8ZS, D4 packets, All 1's3: B8ZS, D4 packets4: E1 HDB3 Framing5: 2.048 MHz Square Wave4332A: Time-of-Day (TOD) ModuleThis 4-port module can be used to serve as a reference input to devices such as the BlueSky™ GNSS Firewall, TimeProvider ® 4100, or other hardware. The outputs from this module support two sets of differential signals: 1PPS and Time-of-Day (TOD) as a serial time code. The default output format for the TOD card is ITU G8271.The 1PPS signal is on Pins 3 and 6 (Ground on Pins 4 and 5) and the TOD Signal ison Pins 7 and 8 on each RJ-45 connection.Input and Measurement Modules4382A: Phase Input Measurement ModuleThe 4382A is a four-channel phase measurement module capable of measuring the phase of 5 MHz or 10 MHz signals to high precision. The 4382A includes a multiple mixer measurement system all contained on a single plug-in card. The 4382A module measures the phase difference between an RF signal from the clock under test and a reference RF signal. The 4382A module can be configured to use the internal timebase of the SyncSystem 4380A or one of the four ports of the module can be configured as the reference RF signal. The SyncSystem 4380A uses measured IF phase differences tocompute input phase at a resolution of better than 100 femtoseconds.4393A Time Interval Counter (TIC) ModuleThis module has four input ports that can be used to measure the time interval between the internal 1PPS and up to four external sources and will work in any of the 6 module slots. The averaging period for the measurements is configurablefrom 1, 10, 20, 60, to 300 seconds.4383A: Time Interval Counter (TIC) ModuleThis module has four input ports that can be used to recover time from an IRIGtime source. Ports 1 and 2 support DC IRIG (Default B007) and Ports 3 and 4 sup-port AM IRIG (Default B127).The Microchip name and logo and the Microchip logo are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks mentioned herein are property of their respective companies.© 2022, Microchip Technology Incorporated and its subsidiaries. All Rights Reserved. 4/22 DS00004401A。

MMBT3904LT1G中⽂资料MMBT3904LT1Preferred DeviceGeneral Purpose Transistor NPN SiliconFeaturesPbFree Packages are AvailableMAXIMUM RATINGSTHERMAL CHARACTERISTICS2.Alumina = 0.4 0.3 0.024 in. 99.5% alumina.COLLECTOR1BASE2EMITTER/doc/cd6340d926fff705cc170a4c.htmlPreferred devices are recommended choices for future use and best overall value. Device Package Shipping?ORDERING INFORMATIONMMBT3904LT1SOT?233000 / Tape & Reel MMBT3904LT1G SOT?233000 / Tape & Reel MMBT3904LT3SOT?2310000 / Tape & ReelFor information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.SOT?23 (TO?236)CASE 318Style 6MARKINGDIAGRAM1AM1AM= Specific Device CodeMMBT3904LT3G SOT?2310000 / Tape & ReelELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted)OFF CHARACTERISTICSON CHARACTERISTICS (Note 3)SMALL?SIGNAL CHARACTERISTICSSWITCHING CHARACTERISTICSFigure 1. Delay and Rise Time Equivalent Test Circuit Figure 2. Storage and Fall Time Equivalent Test Circuit 010 < t1 < 500 m* T otal shunt capacitance of test jig and connectorsTYPICAL TRANSIENT CHARACTERISTICSFigure 3. CapacitanceREVERSE BIAS VOLTAGE (VOLTS)2.03.05.07.0101.00.1Figure 4. Charge DataI C , COLLECTOR CURRENT (mA)1.02.03.0 5.07.01020305070100200C A P A C I T A N C E (p F )1.02.03.0 5.07.010200.20.30.50.7T J = 25°C T J = 125°C7010020030050050T I M E (n s )5Figure 7. Storage Time I C , COLLECTOR CURRENT (mA)Figure 8. Fall Time I C , COLLECTOR CURRENT (mA)1030720 1.02.03.01020701005.07.0305020070100200300500501.02.03.010207051005.07.030502001030720t , S T O R A G E T I M E (n s )s ′TYPICAL AUDIO SMALL?SIGNAL CHARACTERISTICSNOISE FIGURE VARIATIONS(V CE = 5.0 Vdc, T A = 25°C, Bandwidth = 1.0 Hz)Figure 9. f, FREQUENCY (kHz)468101220.1Figure 10.R S , SOURCE RESISTANCE (k OHMS)N F , N O I S E F I G U R E (d B )1.02.04.01020400.20.401000.11.02.04.01020400.20.4100h PARAMETERS(V CE = 10 Vdc, f = 1.0 kHz, T A = 25°C)Figure 11. Current GainI C , COLLECTOR CURRENT (mA)7010020030050Figure 12. Output AdmittanceI C , COLLECTOR CURRENT (mA)h , C U R R E N T G A I Nh , O U T P U T A D M I T T A N C E ( m h o s )Figure 13. Input ImpedanceI C , COLLECTOR CURRENT (mA)Figure 14. Voltage Feedback RatioI C , COLLECTOR CURRENT (mA)3010050510202.03.05.07.0101.00.10.21.02.0 5.00.5100.30.5 3.00.72.05.010201.00.20.5o e h , V O L T A G E F E E D B A C K R A T I O (X 10 ) r e h , I N P U T I M P E D A N C E (k O H M S )i e 0.10.21.02.0 5.0100.30.5 3.00.10.21.02.0 5.0100.30.5 3.0210.10.21.02.0 5.0100.30.5 3.0f e m ?4TYPICAL STATIC CHARACTERISTICSFigure 15. DC Current GainI C , COLLECTOR CURRENT (mA)0.30.50.71.02.00.20.1h , D C C U R R E N T G A I N (N O R M A L I Z E D )0.5 2.0 3.010500.20.30.11.00.730205.07.0F E Figure 16. Collector Saturation RegionI B , BASE CURRENT (mA)0.40.60.81.00.20.1V , C O L L E C T O R E M I T T E R V O L T A G E (V O L T S )0.5 2.0 3.0100.20.301.00.7 5.07.0CE 0.070.050.030.020.01Figure 17. “ON” Voltages I C , COLLECTOR CURRENT (mA)0.40.60.8 1.01.20.2Figure 18. Temperature CoefficientsI C , COLLECTOR CURRENT (mA)V , V O L T A G E (V O L T S )0? 0.500.51.0C O E F F I C I E N T (m V / C )1.0 1.52.0°PACKAGE DIMENSIONSSOT?23 (TO?236)CASE 318?08ISSUE AHNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.MAXIMUM LEAD THICKNESS INCLUDES LEAD STYLE 6:PIN 1.BASE2.EMITTER3.COLLECTOR*For additional information on our Pb?Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT*ǒmm inchesǔSCALE 10:1Figure 19. SOT?23ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an EqualOpportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。

MMBF4391LT1,MMBF4392LT1,MMBF4393LT1JFET Switching TransistorsN−ChannelFeatures•Pb−Free Packages are AvailableMAXIMUM RATINGSRatingSymbol Value Unit Drain−Source Voltage V DS 30Vdc Drain−Gate Voltage V DG 30Vdc Gate−Source Voltage V GS 30Vdc Forward Gate CurrentI G(f)50mAdcTHERMAL CHARACTERISTICSCharacteristicSymbol Max Unit Total Device Dissipation FR−5 Board (Note 1) T A = 25°C Derate above 25°C PD2251.8mW mW/°C Thermal Resistance, Junction−to−Ambient R q JA 556°C/W Junction and Storage Temperature RangeT J , Tstg−55 to +150°CMaximum ratings are those values beyond which device damage can occur.Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.1.FR−5 = 1.0 0.75 0.062 in.Preferred devices are recommended choices for future use and best overall value.See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.ORDERING INFORMATIONELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted)CharacteristicSymbolMinMaxUnitOFF CHARACTERISTICS Gate−Source Breakdown Voltage (I G = 1.0 m Adc, V DS = 0)V (BR)GSS 30−VdcGate Reverse Current(V GS = 15 Vdc, V DS = 0, T A = 25°C)(V GS = 15 Vdc, V DS = 0, T A = 100°C)I GSS−− 1.00.20nAdc m Adc Gate−Source Cutoff Voltage(V DS = 15 Vdc, I D = 10 nAdc)MMBF4391LT1MMBF4392LT1MMBF4393LT1V GS(off)−4.0−2.0−0.5−10−5.0−3.0VdcOff−State Drain Current(V DS = 15 Vdc, V GS = −12 Vdc)(V DS = 15 Vdc, V GS = −12 Vdc, T A = 100°C)I D(off)−−1.01.0nAdc m AdcON CHARACTERISTICS Zero−Gate−Voltage Drain Current (V DS = 15 Vdc, V GS = 0)MMBF4391LT1MMBF4392LT1MMBF4393LT1I DSS50255.01507530mAdcDrain−Source On−Voltage (I D = 12 mAdc, V GS = 0)MMBF4391LT1(I D = 6.0 mAdc, V GS = 0)MMBF4392LT1(I D = 3.0 mAdc, V GS = 0)MMBF4393LT1V DS(on)−−−0.40.40.4VdcStatic Drain−Source On−Resistance (I D = 1.0 mAdc, V GS = 0)MMBF4391LT1MMBF4392LT1MMBF4393LT1r DS(on)−−−3060100WSMALL−SIGNAL CHARACTERISTICS Input Capacitance(V DS = 15 Vdc, V GS = 0, f = 1.0 MHz)C iss −14pF Reverse Transfer Capacitance(V DS = 0, V GS = 12 Vdc, f = 1.0 MHz)C rss−3.5pFORDERING INFORMATIONDeviceMarking Package Shipping †MMBF4391LT16J SOT−233000 / Tape & ReelMMBF4391LT1G 6J SOT−23(Pb−Free)MMBF4392LT16K SOT−23MMBF4392LT1G 6K SOT−23(Pb−Free)MMBF4393LT16G SOT−23MMBF4393LT1G6GSOT−23(Pb−Free)†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.TYPICAL CHARACTERISTICS, T U R N −O N D E L A Y T I M E (n s )d (o n )t I D , DRAIN CURRENT (mA), T U R N −O F F D E L A Y T I M E (n s )d (o f f )t Figure 3. Turn−Off Delay TimeI D , DRAIN CURRENT (mA)Figure 4. Fall Time10005.02.020101.0501002005001000Figure 5. Switching Time Test CircuitFigure 6. Typical Forward Transfer AdmittanceFigure 7. Typical CapacitanceI D , DRAIN CURRENT (mA)2.05.03.07.01020, F O R W A R D T R A N S F E R A D M I T T A N C E (m m h o s )f s V 102.0153.05.07.0V R , REVERSE VOLTAGE (VOLTS)C , C A P A C I T A N C E (p F )OUTPUTr t f ≤ 0.5 nsPULSE WIDTH = 2.0 m s DUTY CYCLE ≤ 2.0%R D’ = R D (R T + 50)R D + R T + 50Figure 8. Effect of Gate−Source Voltageon Drain−Source Resistance V GS , GATE−SOURCE VOLTAGE (VOLTS)r Figure 9. Effect of Temperature on Drain−SourceOn−State Resistance, D R A I N −S O U R C E O N −S T A T E D S (o n )R E S I S T A N C E (N O R M A L I Z E D )T channel , CHANNEL TEMPERATURE (°C)1.51.0r , D R A I N −S O U R C E O N −S T A T E D S (o n )R E S I S T A N C E (O H M S )NOTE 1The switching characteristics shown above were measured using a test circuit similar to Figure 5. At the beginning of the switching interval, the gate voltage is at Gate Supply V oltage (−V GG ). The Drain−Source V oltage (V DS ) is slightly lower than Drain Supply V oltage (V DD ) due to the voltage divider. Thus Reverse Transfer Capacitance (C rss ) of Gate−Drain Capacitance (C gd ) is charged to V GG + V DS .During the turn−on interval, Gate−Source Capacitance (C gs )discharges through the series combination of R Gen and R K . C gd must discharge to V DS(on) through R G and R K in series with the parallel combination of effective load impedance (R’D ) and Drain−Source Resistance (r DS ). During the turn−off, this charge flow is reversed.Predicting turn−on time is somewhat difficult as the channel resistance r DS is a function of the gate−source voltage. While C gs discharges, V GS approaches zero and r DS decreases. Since C gd discharges through r DS , turn−on time is non−linear. During turn−off,the situation is reversed with r DS increasing as C gd charges.The above switching curves show two impedance conditions; 1)R K is equal to R D’ which simulates the switching behavior of cascaded stages where the driving source impedance is normally the load impedance of the previous stage, and 2) R K = 0 (low impedance) the driving source impedance is that of the generator.Figure 10. Effect of I DSS on Drain−Source Resistance and Gate−Source VoltageI DSS , ZERO−GATE VOLTAGE DRAIN CURRENT (mA), D R A I N −S O U R C E O N −S T A T E D S (o n )r 2010304050304050607020R E S I S T A N C E (O H M S )1001.02.03.04.05.0, G A T E −S O U R C E V O L T A G E G S V (V O L T S )6.07.08.09.010706080901008090100110120130140150NOTE 2The Zero−Gate−V oltage Drain Current (I DSS ) is the principle determinant of other J−FET characteristics.Figure 10 shows the relationship of Gate−Source Off V oltage (V GS(off)) and Drain−Source On Resistance (r DS(on)) to I DSS . Most of the devices will be within ±10% of the values shown in Figure 10. This data will be useful in predicting the characteristic variations for a given part number. For example: Unknownr DS(on) and V GS range for an MMBF4392 The electrical characteristics table indicates that an MMBF4392 has an I DSS range of 25 to 75 mA. Figure 10 shows r DS(on) = 52 W for I DSS = 25 mA and 30 W for I DSS = 75 mA. The corresponding V GS values are 2.2 V and 4.8 V .PACKAGE DIMENSIONSSOT−23 (TO−236)CASE 318−08ISSUE ANNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEADTHICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.4.318−01 THRU −07 AND −09 OBSOLETE, NEW STANDARD 318−08.VIEW CDIM A MIN NOM MAX MIN MILLIMETERS0.89 1.00 1.110.035INCHESA10.010.060.100.001b 0.370.440.500.015c 0.090.130.180.003D 2.80 2.90 3.040.110E 1.20 1.30 1.400.047e 1.78 1.90 2.040.070L 0.100.200.300.0040.0400.0440.0020.0040.0180.0200.0050.0070.1140.1200.0510.0550.0750.0810.0080.012NOM MAX L1STYLE 10:PIN 1.DRAIN2.SOURCE3.GATE2.10 2.40 2.640.0830.0940.104H E 0.350.540.690.0140.0210.029SOLDERING FOOTPRINT**For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。

MMBF4391LT1,MMBF4392LT1,MMBF4393LT1JFET Switching Transistors N−ChannelFeatures•Pb−Free Packages are AvailableMAXIMUM RATINGSTHERMAL CHARACTERISTICSMaximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.1.FR−5 = 1.0 0.75 0.062 in.SOT−23CASE 318STYLE 10MARKINGDIAGRAMxx M1232 SOURCE3GATE1 DRAINxx= Specific Device CodeM= Date CodeSee detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.ORDERING INFORMATIONSee specific marking information in the device marking section on page 2 of this data sheet.DEVICE MARKING INFORMATIONELECTRICAL CHARACTERISTICS (T= 25°C unless otherwise noted)OFF CHARACTERISTICSON CHARACTERISTICSSMALL−SIGNAL CHARACTERISTICS ORDERING INFORMATIONSpecifications Brochure, BRD8011/D.TYPICAL CHARACTERISTICS, T U R N −O N D E L A Y T I M E (n s )d (o n )t I D , DRAIN CURRENT (mA), T U R N −O F F D E L A Y T I M E (n s )d (o f f )t Figure 3. Turn−Off Delay TimeI D , DRAIN CURRENT (mA)Figure 4. Fall Time5.02.020101.0501002005001000Figure 5. Switching Time Test CircuitFigure 6. Typical Forward Transfer AdmittanceFigure 7. Typical CapacitanceI D , DRAIN CURRENT (mA)2.05.03.07.01020, F O R W A R D T R A N S F E R A D M I T T A N C E (m m h o s )f s V 102.0153.05.07.0V R , REVERSE VOLTAGE (VOLTS)C , C A P A C I T A N C E (p F )OUTPUTr t f ≤ 0.5 nsPULSE WIDTH = 2.0 m s DUTY CYCLE ≤ 2.0%R D’ = R D (R T + 50)R D + R T + 50Figure 8. Effect of Gate−Source Voltageon Drain−Source Resistance V GS , GATE−SOURCE VOLTAGE (VOLTS)r Figure 9. Effect of Temperature on Drain−SourceOn−State Resistance, D R A I N −S O U R C E O N −S T A T E D S (o n )R E S I S T A N C E (N O R M A L I Z E D )T channel , CHANNEL TEMPERATURE (°C)1.51.0r , D R A I N −S O U R C E O N −S T A T E D S (o n )R E S I S T A N C E (O H M S )NOTE 1The switching characteristics shown above were measured using a test circuit similar to Figure 5. At the beginning of the switching interval, the gate voltage is at Gate Supply V oltage (−V GG ). The Drain−Source V oltage (V DS ) is slightly lower than Drain Supply V oltage (V DD ) due to the voltage divider. Thus Reverse Transfer Capacitance (C rss ) of Gate−Drain Capacitance (C gd ) is charged to V GG + V DS .During the turn−on interval, Gate−Source Capacitance (C gs )discharges through the series combination of R Gen and R K . C gd must discharge to V DS(on) through R G and R K in series with the parallel combination of effective load impedance (R’D ) and Drain−Source Resistance (r DS ). During the turn−off, this charge flow is reversed.Predicting turn−on time is somewhat difficult as the channel resistance r DS is a function of the gate−source voltage. While C gs discharges, V GS approaches zero and r DS decreases. Since C gd discharges through r DS , turn−on time is non−linear. During turn−off, the situation is reversed with r DS increasing as C gd charges. The above switching curves show two impedance conditions;1) R K is equal to R D’ which simulates the switching behavior of cascaded stages where the driving source impedance is normally the load impedance of the previous stage, and 2) R K = 0 (low impedance) the driving source impedance is that of the generator.Figure 10. Effect of I DSS on Drain−Source Resistance and Gate−Source VoltageI DSS , ZERO−GATE VOLTAGE DRAIN CURRENT (mA), D R A I N −S O U R C E O N −S T A T E D S (o n )r 2010304050304050607020R E S I S T A N C E (O H M S )1001.02.03.04.05.0, G A T E −S O U R C E V O L T A G E G S V (V O L T S )6.07.08.09.010706080901008090100110120130140150NOTE 2The Zero−Gate−V oltage Drain Current (I DSS ) is the principle determinant of other J−FET characteristics.Figure 10 shows the relationship of Gate−Source Off V oltage (V GS(off)) and Drain−Source On Resistance (r DS(on)) to I DSS . Most of the devices will be within ±10% of the values shown in Figure 10. This data will be useful in predicting the characteristic variations for a given part number. For example: Unknownr DS(on) and V GS range for an MMBF4392 The electrical characteristics table indicates that an MMBF4392 has an I DSS range of 25 to 75 mA. Figure 10 shows r DS(on) = 52 Ohms for I DSS = 25 mA and 30Ohms for I DSS = 75 mA. The corresponding V GS values are 2.2 V and 4.8 V .PACKAGE DIMENSIONSSOT−23 (TO−236)CASE 318−08ISSUE AJ*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*ǒmm inchesǓSCALE 10:1STYLE 10:PIN 1.DRAIN2.CSOURCE3.GATEON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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