NTMFS4833NPower MOSFET30 V, 191 A, Single N−Channel, SO−8 FL Features•Low R DS(on) to Minimize Conduction Losses•Low Capacitance to Minimize Driver Losses •Optimized Gate Charge to Minimize Switching Losses •These are Pb−Free Devices*Applications•CPU Power Delivery•DC−DC Converters•Low Side SwitchingMAXIMUM RATINGS (T J = 25°C unless otherwise stated)Parameter Symbol Value Unit Drain−to−Source Voltage V DSS30V Gate−to−Source Voltage V GS±20VContinuous DrainCurrent R q JA(Note 1)SteadyState T A = 25°C I D26A T A = 85°C19Power DissipationR q JA (Note 1)T A = 25°C P D 2.35WContinuous Drain Current R q JA (Note 2)T A = 25°C ID16A T A = 85°C12Power DissipationR q JA (Note 2)T A = 25°C P D0.91WContinuous Drain Current R q JC (Note 1)T C = 25°C I D191A T C = 85°C138Power DissipationR q JC (Note 1)T C = 25°C P D125WPulsed Drain Current T A = 25°C,t p = 10 m sI DM288AOperating Junction and Storage Temperature T J, T STG−55 to+150°CSource Current (Body Diode)I S104A Drain to Source dV/dt dV/dt6V/ns Single Pulse Drain−to−Source AvalancheEnergy (T J = 25°C, V DD = 30 V, V GS = 10 V,I L = 35 A pk, L = 1.0 mH, R G = 25 W)EAS612.5mJLead Temperature for Soldering Purposes(1/8″ from case for 10 s)T L260°CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1.Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.2.Surface−mounted on FR4 board using the minimum recommended pad size. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.V(BR)DSS R DS(ON) MAX I D MAX30 V2.0 m W @ 10 V191 A3.0 m W @4.5 VDevice Package Shipping†ORDERING INFORMATIONNTMFS4833NT1G SO−8 FL(Pb−Free)1500/T ape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.NTMFS4833NT3G SO−8 FL(Pb−Free)5000/T ape & ReelTHERMAL RESISTANCE MAXIMUM RATINGSParameterSymbol Value UnitJunction−to−Case (Drain)R q JC 1.0°C/W Junction−to−Ambient – Steady State (Note 3)R q JA 53.2Junction−to−Ambient – Steady State (Note 4)R q JA137.83.Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.4.Surface−mounted on FR4 board using the minimum recommended pad size.ELECTRICAL CHARACTERISTICS (T J = 25°C unless otherwise specified)ParameterSymbolTest ConditionMinTypMaxUnitOFF CHARACTERISTICSDrain−to−Source Breakdown Voltage V (BR)DSS V GS = 0 V, I D = 250 m A30V Drain−to−Source Breakdown Voltage Temperature Coefficient V (BR)DSS /T J 17mV/°C Zero Gate Voltage Drain CurrentI DSSV GS = 0 V,V DS = 24 VT J = 25 °C 1m A T J = 125°C10Gate−to−Source Leakage Current I GSS V DS = 0 V, V GS = ±20 V±100nAON CHARACTERISTICS (Note 5)Gate Threshold VoltageV GS(TH)V GS = V DS , I D = 250 m A1.52.5V Negative Threshold Temperature Coefficient V GS(TH)/T J 7.12mV/°CDrain−to−Source On ResistanceR DS(on)V GS = 10 V to11.5 V I D = 30 A 1.3 2.0m WI D = 15 A 1.3V GS = 4.5 VI D = 30 A 2.3 3.0I D = 15 A2.3Forward Transconductanceg FS V DS = 15 V, I D = 15 A30SCHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance C ISS V GS = 0 V, f = 1 MHz, V DS = 12 V5600pFOutput CapacitanceC OSS 1200Reverse Transfer Capacitance C RSS 650Total Gate Charge Q G(TOT)V GS = 4.5 V, V DS = 15 V; ID = 30 A 3958nCThreshold Gate Charge Q G(TH) 6.0Gate−to−Source Charge Q GS 16Gate−to−Drain Charge Q GD 17Total Gate ChargeQ G(TOT)V GS = 11.5 V, V DS = 15 V;I D = 30 A 88nC SWITCHING CHARACTERISTICS (Note 6)Turn−On Delay Time t d(ON)V GS = 4.5 V, V DS = 15 V, I D = 15 A,R G = 3.0 W25nsRise Timet r 34Turn−Off Delay Time t d(OFF)35Fall Timet f 17Turn−On Delay Time t d(ON)V GS = 11.5 V, V DS = 15 V,I D = 15 A, R G = 3.0 W 14ns Rise Timet r 19Turn−Off Delay Time t d(OFF)50Fall Timet f105.Pulse Test: pulse width v 300 m s, duty cycle v 2%.6.Switching characteristics are independent of operating junction temperatures.ELECTRICAL CHARACTERISTICS (T J = 25°C unless otherwise specified)Parameter UnitMaxTypMinTest ConditionSymbolDRAIN−SOURCE DIODE CHARACTERISTICSForward Diode Voltage V SD VGS = 0 V,I S = 30 AT J = 25°C−0.8 1.0V T J = 125°C−0.68−Reverse Recovery Time t RRV GS = 0 V, dIS/dt = 100 A/m s,I S = 30 A −38−nsCharge Time t a−19−Discharge Time t b−19−Reverse Recovery Charge Q RR−36−nC PACKAGE PARASITIC VALUESSource Inductance L ST A = 25°C −0.50−nHDrain Inductance L D−0.005−nH Gate Inductance L G− 1.84−nH Gate Resistance R G− 1.0−W5.Pulse Test: pulse width v 300 m s, duty cycle v 2%.6.Switching characteristics are independent of operating junction temperatures.I D , D R A I N C U R R E N T (A M P S )0R D S (o n ), D R A I N −T O −S O U R C E R E S I S T A N C E (W )Figure 5. On−Resistance Variation withTemperature T J , JUNCTION TEMPERATURE (°C)Figure 6. Drain−to−Source Leakage Currentvs. VoltageV DS , DRAIN−TO−SOURCE VOLTAGE (VOLTS)R D S (o n ), D R A I N −T O −S O U R C E R E S I S T A N C E (N O R M A L I Z E D )−5025−255075151030012520502520010025751001251501751505C , C A P A C I T A N C E (p F )1000t , T I M E (n s )10010Figure 11. Maximum Rated Forward BiasedSafe Operating Area V DS , DRAIN−TO−SOURCE VOLTAGE (VOLTS)1000I D , D R A I N C U R R E N T (A M P S )101100T J , STARTING JUNCTION TEMPERATURE (°C)Figure 12. Maximum Avalanche Energy vs.Starting Junction TemperatureE 0.010.1Figure 13. Avalanche Characteristics10,0001100PULSE WIDTH (m s)I D , D R A I N C U R R E N T (A M P S )1010110001001,000PACKAGE DIMENSIONSSO−8 FLAT LEAD (DFN6)CASE 488AA−01ISSUE BSTYLE 1:PIN 1.SOURCE2.SOURCE3.SOURCE4.GATE5.DRAIN6.DRAINM 3.00 3.40q0 −−−_ 3.8012 _NOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.BOTTOM VIEW2 XDIM MIN NOM MILLIMETERS A 0.900.99A10.00−−−b 0.330.41c 0.230.28D 5.15 BSC D1 4.50 4.90D2 3.50−−−E 6.15 BSC E1 5.50 5.80E2 3.45−−−e 1.27 BSC G 0.510.61K 0.51−−−L 0.510.61L10.050.17MAX 1.200.050.510.335.104.226.104.300.71−−−0.710.20ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。
