A3211-12-Datasheet

APPLICATIONS
Hybrid Passenger Vehicles
Hybrid Buses
Hybrid Trucks
Off-Highway Vehicles

©2011 A123 Systems, Inc. All rights reserved. MD100103-04
CORPORATE HEADQUARTERS A123 Systems, Inc. 200 West Street Waltham, MA 02451 (617) 778-5700

700
800
900
©2011 A123 Systems, Inc. All rights reserved. MD100103-04
Nanophosphate® High Power Lithium Ion Cell AHR32113M1Ultra -B
Power (Watts)
POWER
700 600 500 400 300 200 100
0 0%
CYCLE LIFE
100%
90%
10s Pulse Power Capability at 23°C, Using FreedomCAR HPPC
Power (nominal, W/kg) Speci c Energy (nominal, Wh/kg) Energy Density (nominal, Wh/L) Operating Temperature Storage Temperature
32 x 113 205 4.5/4.3 14.6 550 3.3 2700 71 161 -30°C to 55°C -40°C to 60°C
Test Result

DS91M125 125 MHz 1:4 M-LVDS Repeater withLVDS Input Evaluation KitUSER MANUALPart Number: DS91M125EVK NOPBFor the latest documents concerning these products and evaluation kit, visit . Schematics andgerber files are also available at OverviewThe purpose of this document is to familiarize you with the DS91M125 evaluation board, suggest the test setup procedures and instrumentation, and to guide you through some typical measurements that will demonstrate the performance of the device. The board enables the user to examine performance and all functions of theDS91M125 as a standalone device.The DS91M125 is a high-speed 1:4 M-LVDS repeater with an LVDS input designed for multipoint applications with multiple drivers or receivers. The device conforms to TIA/EIA-899 standard. It utilizes M-LVDS technology for low power, high-speed and superior noise immunity.DescriptionFigure 1 below represents the top layer drawing of the board with the silkscreen annotations. It is a 2.5 x 3 inch 4 layer printed circuit board (PCB) that features a single DS91M125 (U2) device.Figure 1 -DS91M125EVK Top View DrawingDS91M125 Evaluation in a Point-to-Point LinkThe following is a recommended procedure for using and evaluating the DS91M125EVK. Figure 2 depicts a typical setup and instrumentation used.1. Select a single DS91M125 evaluation board.2. Apply the power to the board (3.3 V typical) between J3 and J4 power tabs, observe the value of I CC,and compare it with the expected value (refer to the datasheet) to ensure that the devices arefunctional.3. Enable one of the U2 driver outputs. This is accomplished by setting the DE0-3 pin to VDD (JP3-6).4. Connect a signal source to the driver input (DI+, DI-). The signal needs to be an LVDS/M-LVDS/CML/LVPECL compliant signal. Refer to the DS91M125 datasheet for the receiver inputcompatibility.5. Connect one of the U2 outputs (A0-3/B0-3) to an oscilloscope and observe the waveforms.Figure 2 – DS91M125 Test SetupFigure 3 shows an eye diagram acquired at the output of the DS91M125 driver loaded with a 100-ohm resistor. The generator connected to the driver input simulated a 100 Mbps PRBS-7 NRZ.Figure 3 – DS91M125 OutputIMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements,improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right, or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.Reproduction of this information with alteration is an unfair and deceptive business practice.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice.TI is not responsible or liable for any such statements.TI products are not authorized for use in safety-critical applications(such as life support)where a failure of the TI product would reasonably be expected to cause severe personal injury or death,unless officers of the parties have executed an agreement specifically governing such use.Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications,and acknowledge and agree that they are solely responsible for all legal,regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications,notwithstanding any applications-related information or support that may be provided by TI.Further,Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or"enhanced plastic."Only products designated by TI as military-grade meet military specifications.Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk,and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS16949requirements.Buyers acknowledge and agree that,if they use any non-designated products in automotive applications,TI will not be responsible for any failure to meet such requirements.Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAudio /audio Automotive and Transportation /automotiveAmplifiers Communications and Telecom /communicationsData Converters Computers and Peripherals /computersDLP®Products Consumer Electronics /consumer-appsDSP Energy and Lighting /energyClocks and Timers /clocks Industrial /industrialInterface Medical /medicalLogic Security /securityPower Mgmt Space,Avionics and Defense /space-avionics-defense Microcontrollers Video and Imaging /videoRFID OMAP Mobile Processors /omapWireless Connectivity /wirelessconnectivityTI E2E Community Home Page Mailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2012,Texas Instruments Incorporated。

2012/08/01- 1 -ConfidentialNT991411/4” HD CMOS Image SensorN o v at e k Co nf i de nt i a l I n f or ma t io n f or Le ed o Us e On l y2012/08/01- 2 -ConfidentialTable of Contents1. F EATURES (6)2. K EY P ERFORMANCE .......................................................................................................................................6 3. G ENERAL D ESCRIPTION .................................................................................................................................7 4. B LOCK D IAGRAM .. (7)5. P IN C ONFIGURATION ......................................................................................................................................86. P IN D ESCRIPTIONS .........................................................................................................................................97. P ACKAGE O UTLINE .......................................................................................................................................108. R EFERENCE C IRCUIT ...................................................................................................................................119.P OWER S EQUENCE ......................................................................................................................................12 9.1. Power On Sequence with Internal VDD .....................................................................................................12 9.2. Power On Sequence with External VDD ...................................................................................................12 9.3. Power Off Sequence with Internal VDD .....................................................................................................13 9.4. Power Off Sequence with External VDD ...................................................................................................13 9.5.Power Down Sequence ................................................................................................................................14 10.F UNCTION D ESCRIPTION ..........................................................................................................................15 10.1. Pixel Array ......................................................................................................................................................15 10.2. Default Readout Order .................................................................................................................................15 10.3. Analog Gain Control ......................................................................................................................................16 10.4. 10-Bit ADC ......................................................................................................................................................16 10.5. Image Windowing ..........................................................................................................................................16 10.6. Output Format ................................................................................................................................................17 10.7. MSB/LSB Swap .............................................................................................................................................19 10.8. Special Effects ...............................................................................................................................................20 10.9. Gamma Correction ........................................................................................................................................21 10.10. Luminance Acculation Mode ...................................................................................................................21 11. T WO -W IRE S ERIAL I NTERFACE B US . (22)11.1. Single Read from Random Location ..........................................................................................................24 11.2. Single Read from Current Location ............................................................................................................24 11.3.Sequential Read, Start from Random Location ........................................................................................24 11.4.Sequential Read, Start from Current Location ..........................................................................................25 11.5.Single Write to Random Location ...............................................................................................................25 11.6.Sequential Write, Start at Random Location (26)12.JPEG O UTPUT T IMING (27)N o v at e k Co nf i de nt i a l I n f or ma t io n f or Le ed o Us e On l y2012/08/01- 3 -Confidential12.1. Valid Mode (27)12.2. Frame Mode 0 (27)12.3. Frame Mode 1 (28)13. CCIR656 O UTPUT T IMING .......................................................................................................................29 14.C ONTROL R EGISTERS ..............................................................................................................................30 14.1.Sensor Control Registers (0x3000) (30)14.2. SOC Control Registers (0x3200)................................................................................................................37 14.3. SOC Lens Shading Correction Registers (0x3210).................................................................................38 14.4. SOC Statistic Registers (0x3250)...............................................................................................................40 14.5. SOC Gamma Registers (0x3270)...............................................................................................................41 14.6. SOC Auto-White Balance Registers (0x3290)..........................................................................................42 14.7. SOC Auto-Exposure Registers (0x32B0)..................................................................................................43 14.8. SOC Scaler Registers (0x32E0).................................................................................................................45 14.9. SOC Output Format and Specical Effects Registers (0x32F0)..............................................................46 14.10. Image Quality Control Registers (0x3300)...........................................................................................48 14.11. JPEG Encoder Registers (0x3400)........................................................................................................49 15. C HIEF R AY A NGLE ...................................................................................................................................50 16.E LECTRICAL C HARACTERISTICS ................................................................................................................51 16.1. Absolute Maximum Ratings .........................................................................................................................51 16.2. DC Characteristics ........................................................................................................................................51 16.3.AC Characteristics (52)15. SMT R EFLOW P ROFILE (53)N o v at e k Co nf i de nt i a l I n f or ma t io n f or Le ed o Us e On l y2012/08/01- 4 -ConfidentialFiguresFig. 1 Block Diagram (7)Fig. 2 Pin Configuration .....................................................................................8 Fig. 3 Package Outline . (10)Fig. 4 Reference Circuit (11)Fig. 5 Power On Sequence with Internal VDD .................................................................12 Fig. 6 Power On Sequence with External VDD . (12)Fig. 7 Power Off Sequence with Internal VDD (13)Fig. 8 Power Off Sequence with External VDD (13)Fig. 9 Power Down Sequence with Internal VDD (14)Fig. 10 Power Down Sequence with External VDD .............................................................14 Fig. 11 Color Filter Array Layout .............................................................................15 Fig. 12 Default Readout Order ..............................................................................15 Fig. 13 Image Windowing . (16)Fig. 14 HREF Timing (16)Fig. 15 VSYNC Timing .....................................................................................17 Fig. 16 Output Format -- YCbCr .............................................................................17 Fig. 17 Output Format -- RGB565...........................................................................17 Fig. 18 Output Format -- RGB555...........................................................................18 Fig. 19 Output Format -- RGB444x ..........................................................................18 Fig. 20 Output Format -- RGBx444..........................................................................18 Fig. 21 Examples of Connections with External Devices ........................................................19 Fig. 22 Special Effects .....................................................................................20 Fig. 23 Gamma Correction (21)Fig. 24 Luminance Acculation Mode (21)Fig. 25 Single read from random location (24)Fig. 26 Single read from current location (24)Fig. 27 Sequential read, start from random location ............................................................25 Fig. 28 Sequential read, start from current location .............................................................25 Fig. 29 Single write to random location .......................................................................26 Fig. 30 Sequential write, start at random location .. (26)Fig. 31 JPG_Output_Mode = 0..............................................................................27 Fig. 32 JPG_Output_Mode = 1..............................................................................27 Fig. 33 JPG_Output_Mode = 2 (28)N o v at e k Co nf i de nt i a l I n f or ma t io n f or Le ed o Us e On l y2012/08/01- 5 -ConfidentialFig. 34 CCIR656 Output Timing – Dummy Line (29)Fig. 35 CCIR656 Output Timing – Active Line (29)Fig. 36 Chief Ray Angle (50)Fig. 37 SMT Rwflow Profile (53)N o v at e k Co nf i de nt i a l I n f or ma t io n f or Le ed o Us e On l y2012/08/01- 6 -Confidential1. Features⏹ Low dark current⏹ Auto black level calibration⏹ Two wire serial interface, 16-bit address and 8-bit data⏹ Support output format: YCbCr (4:2:2), RGB565, RGB555, RGB444, Raw, CCIR656, and JPEG also.⏹ Support image size: HD (1280 x 720), and any size from scaling down ⏹ Lens shading correction⏹ Automatic control functions: Auto-Exposure control(AE), Auto-White Balance(AWB)⏹ Including: Sharpness, noise reduction, defect correction, gamma, color saturation adjust.⏹ Specical effects included.⏹ Embedded 1.5V regulator for core power ⏹ Target module size: 8mm x 8mm ⏹Multi-Sensor Mode for 3D application.2. Key PerformanceParameter ValueArray Size1284x 724 Digital1.5V ± 5%Analog 3.0V ~ 3.6VPower Supply I/O1.7V ~ 3.6VPixel Size 3.0 μm x 3.0 μm Image Area3852 μm x 2172 μm ADC Resolution 10 bitsShutter Electronic Rolling Shutter 640x36060 fpsFrame rateHD (1280x720)30 fpsColor Filter Arrays RGB Bayer pattern Maximum Data Rate 40Mp/s Maximum Clock Rate80MHz215 mW @ HD JPG Power ConsumptionStandby: < 10 uAN o v at e k Co nf i de nt i a l I n f or ma t io n f or Le ed o Us e On l y2012/08/01- 7 -Confidential3. General DescriptionThe NT99141 is such a high performance image sensor that by incorporating a 1284H x 724V image array, anon-chip 10 bits ADC, and embedded image signal processor all the required image signal processing functions - including sharpness, noise reduction, defect correction, gamma, and color saturation adjust - are in defaultsupported, while its easy controllability and usability are maintained by the two-wire serial interface bus.It is suitable for use in products such as cellular phones and PC cameras.4. Block DiagramPixel arrayAnalog processingColumn decoderRow decoderADCDigital image processorTiming controlTwo-wire serial interface busScalerSCLK SDATAJPEG RGBYUV data outputRaw data outputFig. 1 Block DiagramN o v at e k Co nf i de nt i a l I n f or ma t io n f or Le ed o Us e On l y2012/08/01- 8 - Confidential5. Pin Configuration(Top view)FA1A2A3A4A5B1B2B3B4B5C1C2C3D1D4D5E1E2E3E4E5VDDIO D1RESETNAGNDAVDDSDATAMCLKVDD D3D5VDDIO D6D4D0DGNDD2NCNCAVDDNCAVDD ABCDE12345A6B6C7D6E6D7PCLKGPINCAVDD6A7D9A8VSYNCB7D8B8HREFC8DGNDD2D3PWRDN SCLKD7NCD8AVDDPIXE7AGNDE8AGNDPIX78Fig. 2 Pin ConfigurationN o v at e k Co nf i de nt i a l I n f or ma t io n f or Le ed o Us e On l y2012/08/01- 9 -Confidential6. Pin DescriptionsI = input portO = output port with normal driving/sinking I/O = bi-directional port with normal driving/sinkingThe Reset column below shows the pin’s default state after a power reset. Pin No. Name Type Reset Descriptions A1 VDDIO Power - Digital power for I/O A2 VDD Power - Digital core power A3 D3 O - Data output 3 A4 D5 O - Data output 5 A5 VDDIO Power - Digital power for I/O A6 D7 O - Data output 7 A7 D9O - Data output 9 A8 VSYNC O - Vertical synchronization B1 D1 O - Data output 1 B2 MCLK I - System clock input B3 D2 O - Data output 2 B4 D4 O - Data output 4 B5 D6 O - Data output 6 B6 PCLK O - Pixel clock output B7 D8 O - Data output 8 B8 HREF O - Horizontal reference C1 SDATA I/O - Two-wire serial interface bus data I/O C2 DGND Ground - Digital ground C3 D0 O - Data output 0 C7 GPI I - Multi-sensor function C8 DGND Ground - Digital groundD1 RESETN I - Power on reset, active low0: reset1: normalD2 SCLK I - Two-wire serial interface bus clock inputD3 PWRDN I - Power down mode select, active high0: normal mode1: power down modeD4 NC - - NC D5 NC - - NC D6 NC - - NC D7 NC- - NC D8 AVDDPIX Power - Pixel power E1 AGND Ground - Analog ground E2 AVDD Power - Analog power E3 AVDD Power - Analog power E4 NC - - NC E5 AVDD Power - Analog power E6 AVDD Power - Analog power E7 AGND Ground - Analog ground E8AGNDPIXGround - Pixel groundNote: D[9:0] is 10-bit Raw output(D9: MSB, D0: LSB), D[9:2] is 8-bit YUV/RGB/JPEG outpu t N ov at e k Co nf i de nt i a l I n f or ma t io n f or Le ed o Us e On l y2012/08/01- 10 -Confidential7. Package OutlineFig. 3 Package OutlineN o v at e k Co nf i de nt i a l I n f or ma t io n f or Le ed o Us e On l yNT991418. Reference CircuitU1 NT99141 AVDD AVDD E2 E3 E5 E6 D8 E8 E1 E7 C8 C2 C8 A2 A1 A5 AVDD AVDD AVDD AVDD AVDDPIX AGNDPIX AGND AGND DGND DGND VDD VDDIO VDDIO MCLK PCLK HREF VSYNC D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 SDATA SCLK PWRDN RESETN0.1uF 0.1uF 0.1uF 0.1uF AGND DGND C6 C70.1uF 0.1uF 0.1uF VDDIOmatio norAGNDC7 D4 D5 D6 D7 E4NC NC NC NC NC NCfoR1NOTE: VDDIO should be 2.3V or higher when using the internal regulator for digital power VDDNo va2012/08/01te kConfidentialInfFig. 4Reference Circuit- 11 -rL ee0doDGNDC1C2C3C4C5B2 B6 B8 A8 C3 B1 B3 A3 B4 A4 B5 A6 B7 A7 C1 D2 D3 D1With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantability, fitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any such information.UseO nlyMCLK PCLK HS VS D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 SDA SCK PWDN RSTConfidentialNT991419. Power SequenceWhen power is applied to the NT99141, the following power sequences have to follow up.9.1.PWRDNPower On Sequence with Internal VDDLHRESETNT1MCLKVDDIOrL eeT2doT1: > 300 MCLK cycle T2: ≧ 0 T3: ≧ 0 T4: > 300 MCLK cycle VDDIO, AVDD & AVDDPIX may rise in any order : Don’AVDDfoT3 T4I2CFig. 5Power On Sequence with Internal VDDPWRDNor9.2.Power On Sequence with External VDDLInfmatio nAVDDPIXHT1ialRESETNMCLKVDDideT1: > 300 MCLK cycle T2: ≧ 0 T3: ≧ 0 T4: ≧ 0 T5: > 300 MCLK cycle VDD, VDDIO, AVDD & AVDDPIX may rise in any order : Don’ntVDDIOT2AVDDAVDDPIXte kCoT3nfT4 T5No vaI2CFig. 6Power On Sequence with External VDD - 12 Confidential2012/08/01With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantability, fitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any such information.Ust care: Valid signal: Valid signaleO nlyt careNT99141T1: ≧ 0 T2: ≧ 0 VDDIO, AVDD & AVDDPIX may fall in any orderVDDIOT1T2Fig. 7Power Off Sequence with Internal VDD9.4.VDDPower Off Sequence with External VDDfo tio nT3: T4: T5:rL ee≧0 ≧0 ≧0VDD, VDDIO, AVDD & AVDDPIX may fall in any order T5VDDIOT3AVDDmaT4Fig. 8Power Off Sequence with External VDDNo va2012/08/01te kConfidentialInfAVDDPIXor- 13 -doConfidentialAVDDPIXWith respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantability, fitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any such information.UsAVDDeO nly9.3.Power Off Sequence with Internal VDDNT991419.5.the below.Power Down SequenceThe NT99141 enter power down mode when PWRDN=”H”. The detail timing sequence, please seeEscape power down mode into normal mode PWRDN = “ H” : enter power down modePWRDNT1rL eeT2doT 1 > 1ms T 2 > 300 MCLK cycleMCLKFig. 9Power Down Sequence with Internal VDDenter power down modeor9.5.2.Power Down Sequence with External VDDT1PWRDNialntInfmaT2 T1 > 500us T3 T2 > 1ms T3 > 300 MCLK cycleMCLKI2CConfideFig. 10Power Down Sequence with External VDDNo va2012/08/01te k- 14 -tio nI2CEscape power down mode into normal modefoWith respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantability, fitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any such information.UsConfidential9.5.1.Power Down Sequence with Internal VDDeO nlyNT9914110. Function Description10.1. Pixel ArrayThe NT99141, a 1/4” CMOS image sensor with resolution of 1280H x 720V pixels, arranges its CFA (color filter array) as a Bayer pattern, as shown in Fig. 11.R G R GFig. 11G B G BR G R GG B G BR G R GG B G BR G R GG B B G10.2.Default Readout OrderWhen the image of a scene is projected onto the active surface of the sensor, as shown in Fig. 12錯誤! 找不到such a way that the image becomes mirrored in the horizontal and/or flipped in the vertical direction.orNT99141 Top Viewma參照來源。

Descriptions:1. Delta will not guarantee the performance of the products if the application condition fallsoutside the parameters set forth in the specification.2. A written request should be submitted to Delta prior to approval if deviation from thisspecification is required.3. Please exercise caution when handling fans. Damage may be caused when pressure is appliedto the impeller, if the fans are handled by the lead wires, or if the fans are hard-dropped to the production floor.4. Except as pertains to some special designs, there is no guarantee that the products will be freefrom any such safety problems or failures as caused by the introduction of powder, droplets of water or encroachment of insect into the hub.5. The above-mentioned conditions are representative of some unique examples and viewed as thefirst point of reference prior to all other information.6. It is very important to establish the correct polarity before connecting the fan to the powersource. Positive (+) and Negative (-). Damage may be caused to the fans if connection is with reverse polarity, as there is no foolproof method to protect against such error.7. Delta fans are not suitable where any corrosive fluids are introduced to their environment.8. Please ensure all fans are stored according to the storage temperature limits specified. Do notstore fans in a high humidity environment. We highly recommend performance testing is conducted before shipping, if the fans have been stored over 6 months.9. Not all fans are provided with the Lock Rotor Protection feature. If you impair the rotation ofthe impeller for the fans that do not have this function, the performance of those fans will lead to failure.10. Please be cautious when mounting the fan. Incorrect mounting of fans may cause excessresonance, vibration and subsequent noise.11. It is important to consider safety when testing the fans. A suitable fan guard should be fitted tothe fan to guard against any potential for personal injury.12. Except where specifically stated, all tests are carried out at relative (ambient) temperature andhumidity conditions of 25o C, 65%. The test value is only for fan performance itself.13. Be certain to connect an “over 4.7µF” capacitor to the fan externally when the application callsfor using multiple fans in parallel, to avoid any unstable power.分销商库存信息: DELTA-PRODUCT-GROUPS AFB1212HHE。