OB6561P Design Guide

L6563引脚定义1、INV：误差放大器反向输入端。

PFC预调节器的输出电压信息通过一个电阻分压流入此脚.此脚正常特性为高阻抗，但是如果运用了跟踪Boost功能，一个用TBO（6脚)编程的内部电流产生器将被激活。

它将从此脚吸入电流来改变输出电压，所以它跟踪了主电压。

2、COMP：误差放大器的输出端。

需要再此脚与INV（1脚）之间加入一个补偿网络来达到控制环路的稳定和确保高PF和低THD。

3、MULT：乘法器的主输入。

此脚通过一个电阻分压连接到整流后的主电压端，并且给电流环路提供一个正弦参考。

此脚上的电压也被用来得到主电压的有效值信息。

4、CS：输入到PWM比较器。

流入MOSFET的电流通过一个电阻感测，其感测后的结果电压加入到此脚与内部的参考进行比较来决定MOSFET的开关。

一个第二次的比较水平1。

7V来探测不正常的电流（比如：由于BOOST电感保护）,一旦发生这种情况，关断IC，将其损耗降低到几乎与启动时同样的水平，将PWM_LATCH （8脚）置为高电平。

此功能在L6563A中没有。

5、VFF：1/V2的乘法器的第二个输入端。

一个电容和并联电阻必须从此脚连接到GND。

他们完成内部的峰值保持电路，此峰值保持电路从主电压的有效值获得信息。

此脚的电压直流水平与MULT脚(3脚）的峰值电压相等,此电压补偿依赖于主电压的控制环路增益.不要将此脚直接连接到GND.6、TBO：跟踪BOOST功能。

此脚提供一个缓冲VFF电压。

通过一个电阻将此脚连接到GND来定义从INV（1脚）流入的电流.在这种情况下，输出电压相对主电压成比例的变化（跟踪BOOST）.如果不用此功能将此脚悬空。

7、PFC_OK：PFC预调节输出电压监测或使能功能端.此脚通过一个电阻分压来感测PFC预调节输出电压,也被用作保护目的。

如果此脚电压超过2。

5V,IC被关断，其损耗降低到接近启动时的水平并且此情况被锁住.PWM_LATCH脚被置为高电平。

L6561功率因数校正1■■特征非常精确的可调输出过电压保护微功率启动电流(50µATYP.)非常低的电源电流（4mA TYP.)内部启动定时器片上电流检测滤波器禁止功能1%精密(@ T j= 25°C)内部参考电压过渡模式操作图腾柱输出电流：±400mADIP-8/SO-8套餐图1.软件包DIP-8SO-8■订购代码表1.部件号L6561L6561DL6561D013TR包装DIP-8SO-8带卷■■■■■■■2描述L6561是改良版的L6560 stan-dard功率因数修正器.完全兼容with the standard version, it has a superior perfor-mant乘数使设备的工作能力，在宽输入电压范围的应用ing（从85V到265V)了一个良好的THD.此外当前开始向上在数已减少tensmA和禁用的功能已经实现，教育署对ZCD针，保证较低的电流消费模式下的立场.图2.框图COMP2INV12.5V-+在混合BCD技术变现，该芯片提供以下好处：–微功率启动电流– 1%高精度内部参考电压– (Tj = 25°C)–软输出过电压保护–无需外部低通滤波器需要对电流，租金感–非常低的静态电流最低，es功耗图腾柱输出级驱动能力一个电源MOS或源IGBT和汇电流租金的±400mA.设备运行中tran-sition模式，它是电子灯优化镇流管应用，AC-DC适配器和SMPS.MULT3440KCSMULTIPLIERVOLTAGE REGULATOR OVER-VOLTAGEDETECTION-+5pFV 8VINTERNALSUPPLY 7VR1+UVLORSDRIVERQ720VGDR2V2.1V1.6VZERO CURRENTDETECTORSTARTER6GNDJune 2004-+-DISABLE5ZCDREV的. 161/13L6562中文数据手册,L6562 Datasheet PDF,L6562芯片中文资料【L6561表2.绝对最大额定值符号I VccI GDINV, COMPMULTCSZCDP totT jT stg针871, 2, 345I q+ I Z; (I GD= 0)图腾柱输出电流(2µs) 峰值模拟输入和输出电流检测输入零电流检测器功率消耗@T amb= 50 °C结温工作范围贮藏温度(DIP-8)(SO-8)参数价值30±700-0.3到7-0.3到750（源）-10（汇）10.65-40到150-55到150单位mAmAVVmAmAWW°C°C图3.引脚连接（顶视图）INV COMP MULTCS 1234DIP88765V CCGDGNDZCD热数据表3.符号R th j-amb参数结到环境的热阻苏8150MINIDIP100单位°C/W表4.引脚说明N. 12345 6 78名称INVCOMPMULTCSZCDGNDGDV CC功能反相误差放大器的输入.一个电阻分压器的输出之间连接稳压这一点，提供电压反馈.误差放大器的输出.一个反馈补偿网络之间设置这个引脚和INV引脚.乘法器的输入阶段.一个电阻分压器连接到这个引脚的整流电源.一个电压信号，比例整流电源，出现在该引脚.输入到控制回路比较.该感应电流通过电阻和由此产生的电压施加到该管脚.零电流检测输入.如果是连接到GND,设备被禁用.当前返回驱动器和控制电路.门驱动器输出.一个推挽输出级可驱动峰值目前电源MOS400mA（源和接收器）.电源电压驱动器和控制电路.(1)参数由设计保证，而不是在生产测试.2/13L6561电气特性表5.(V CC = 14.5V; T amb = -25°C 到125°C ，除非另有规定）符号V CC V CC ON V CC OFF Hys I START-UI q I CCIqV ZV INV针88888888881齐纳电压电压反馈输入门槛线路调整I INV G V GB I COMPV COMP221电流输入偏置电压增益增益带宽源电流灌电流上钳位电压低钳位电压乘第V MULT ∆VCS-----------------∆VmultKV CS I CS t d (H-L)4444V ZCD53线性工作电压输出最大.斜坡V MULT 从= 0V 到0.5V V COMP =上钳位电压V MULT = 1V VCOMP= 4V V MULT = 2.5VV COMP =上钳位电压V OS = 00到31.650到3.51.9VV COMP = 4V, V INV = 2.4V V COMP = 4V, VINV= 2.6VI SOURCE = 0.5mA I Sink = 0.5mA-22.5开环60误差放大器部分T amb = 25°C 12V < VCC< 18VV CC = 12到18V2.4652.442-0.1801-44.55.82.25-82.5 2.5352.565-1V V mV µA dB MHzmA mA V V参数工作范围启动阈值关断阈值迟滞启动电流静态电流工作电源电流静态电流C L = 1nF @ 70KHz 在OVP 条件Vpin1= 2.7VV PIN5≤150mV,V CC > V CC off V PIN5≤150mV, V CC< VCC offI CC = 25mA2018前开启(VCC=11V)测试条件后开启最小.11118.72.220129.52.5502.641.41.45020Typ.最大.181310.32.89045.52.12.19022单位V V V V µA mA mA mA mA µA V电源电压一节当前节供应Gain 电流检测基准钳电流输入偏置到输出的延电流检测失调输入阈值电压上升边缘迟滞上钳位电压上钳位电压(1)(1)0.451.60.61.7-0.0520002.10.751.8-1450151/VV µA ns mVV 电流检测比较器零电流检测器0.34.54.70.55.15.20.75.96.1V V VV ZCD V ZCD55I ZCD = 20µA I ZCD = 3mA3/13L6561电气特性表5.（续）(V CC = 14.5V; T amb = -25°C 到125°C ，除非另有规定）符号V ZCD I ZCD I ZCD I ZCD V DIS I ZCD V GD针5555557参数低钳位电压灌电流偏置源出电流能力灌电流能力禁用门槛禁用后，重新启动电流漏失电压V ZCD < Vdis ; V CC> VCCOFFI GDsource = 200mA I GDsource = 20mA I GDsink = 200mA I GDsink = 20mAt r t f I GD off I OVP7772输出电压上升时间输出电压下降时间IGD 灌电流OVP 触发电流阈值静态OVP重新启动定时器t START启动定时器70150400µsC L = 1nF C L = 1nF V CC =3.5V VGD= 1V5352.1404010402.25测试条件I ZCD = -3mA 1V ≤V ZCD ≤4.5V-33150-100200-2001.20.7最小.0.3Typ.0.652-1010250-300211.50.3100100-452.4最大.1单位V µAmA mA mV µAV V V V ns ns mAµA V输出部分输出过压段3过电压保护OVP输出电压，预计将在电路的PFC 接近其标称值操作保存.这是由两个外部电阻R1和R2比例设置（见图.5),同时考虑到非反相误差放大器的输入偏置内部L6561在2.5V.在稳态条件下，通过R1和R2电流为：V 出–2.5 2.5V-I R1sc= ------------------------- =I R2= ------------R1R2并且，如果外部补偿网络是由只有一个电容Ccomp ,电流通过Ccomp输出电压等于zero.When 突然增大电流通过R1变为：V outsc +∆V 出–2.5I R1= ---------------------------------------------------- =I R1sc +∆I R1-R1由于电流通过R2不改变，∆I R1必须流过电容器Ccomp 并输入误差放大器.这个电流进行监测，当内L6561达到约37µA 了多输出电压钳被迫减少，从而减少电源得出的能量.如果电流超过40µA,保护的OVP 触发（动态OVP),和外部功率晶体管切换到关闭电流降至大约比10µA.但是，如果过压仍然存在，一个内部比较器（静态OVP)证实了OVP 条件外部电源开关保持关闭（见图.4）.最后，过压触发OVP 功能是：∆V 出= R 1· 40µA.为R 典型值1, R 2和C 显示在应用电路.可设置过压indepen -4/13L6561判断的平均输出电压.在设置过压阈值精度的7% ov-ervoltage值（例如∆V= 60V ± 4.2V).3.1 Disable功能零电流检测器(ZCD)引脚可用于设备以及禁用.通过接地ZCD电压年龄的设备被禁用减低1.4mA典型(@ 14.5V电源电压，电源电流消耗，年龄）.释放ZCD引脚的内部启动定时器将重新启动设备.图4.过电压V OUT nominalI SC 40µA 10µAé / A输出2.25V动态OVP静态OVP D97IN592A 图5.过电压保护电路Ccomp.+VoR11 R2-+2.5V-2.25V ∆I +E/A∆I2X PWM DRIVER40µAD97IN5915/13L6561图6.典型应用电路(80W, 110VAC)D1 BYT03-400C6TR7 (*)950KC3 680nF68K52174+Vo=240VPo=80WR3 (*)240KBRIDGE+ 4 x 1N4007FUSE 4A/250V-Vac(85V to 135V)NTCR1010KD3 1N4150D21N5248BR210010nFR1C11µF250VR9 (*)950K8R510L65613C222µF25VC710nF6MOSSTP7NA40C5100µF315VR6 (*)0.311WR810K1%D97IN549B-(*) R3 = 2 x 120KΩR6 = 0.619Ω/2R7 = 2 x 475KΩ, 1%R9 = 2 x 475KΩTRANSFORMERT: core THOMSON-CSF B1ET2910A (ETD 29 x 16 x 10mm) OR EQUIVALENT (OREGA 473201A7) primary 90T of Litz wire 10 x 0.2mmsecondary 11T of #27 AWG (0.15mm)gap 1.8mm for a total primary inductance of 0.7mH图7.典型应用电路(120W, 220VAC)D1 BYT13-600 C6TR7 (*)998KC3 1µF68K52174+Vo=400V Po=120WR3 (*)440KBRIDGE+ 4 x 1N4007FUSE 2A/250V-Vac(175V to 265V)NTCR1010KD3 1N4150D21N5248BR210010nFR1C1560nF400VR9 (*)1.82M8R510L65613C222µF25VC710nF6MOSSTP5NA50C556µF450VR6 (*)0.411WR86.34K1%D97IN550B-(*) R3 = 2 x 220KΩR6 = 0.82Ω/2R7 = 2 x 499KΩ, 1%R9 = 2 x 909KΩTRANSFORMERT: core THOMSON-CSF B1ET2910A (ETD 29 x 16 x 10mm) OR EQUIVALENT (OREGA 473201A8) primary 90T of Litz wire 10 x 0.2mmsecondary 7T of #27 AWG (0.15mm)gap 1.25mm for a total primary inductance of 0.8mH图8.典型应用电路(80W,宽范围电源）D1 BYT13-600C6TR7 (*)998KC3 1µF68K52174+Vo=400VPo=80WR3 (*)240KBRIDGE+ 4 x 1N4007FUSE 4A/250V-Vac(85V to 265V)NTC R1010K D3 1N4150D21N5248BR210012nFR1C1 1µF 400V R9 (*)1.24M8R510L65613C222µF25VC710nF6MOSSTP8NA50C547µF450VR6 (*)0.411WR86.34K1%D97IN553B-(*) R3 = 2 x 120KΩR6 = 0.82Ω/2R7 = 2 x 499KΩ, 1%R9 = 2 x 620KΩTRANSFORMERT: core THOMSON-CSF B1ET2910A (ETD 29 x 16 x 10mm) OR EQUIVALENT (OREGA 473201A8) primary 90T of Litz wire 10 x 0.2mmsecondary 7T of #27 AWG (0.15mm)gap 1.25mm for a total primary inductance of 0.8mH6/13L6561图9.电气原理演示板(EVAL6561-80)D1STTH1L06R4 180 kR5180 kTD81N4150C5 12 nFR14100R1 750 kD21N5248BR668 kR50 12 kC3 470 nFR12750 kR11750 kVo=400VPo=80WNTC2.5BRIDGEFUSE 4A/250V +W04MC11 µF400VC231 µFR2750 k836C210nF52174R733C647 µF450VVac (85V to 265V)-L6561MOSSTP8NM50R310 kC2922 µF25VC4100 nFD3 1N4148C710 µF35 VR1691 kR15220R90.411WR100.411WR139.53 k-Boost Inductor Spec (ITACOIL E2543/E)E25x13x7 core, 3C85 ferrite1.5 mm gap for 0.7 mH primary inductancePrimary: 105 turns 20x0.1 mmSecondary: 11 turns 0.1mmTHD REDUCER (optional)图10. EVAL6561-80: PCB和组件布局（顶视图，实际尺寸57x108mm)表6. EVAL6561-80:评价结果.V in（VAC）85110135175220265针(W)87.285.284.283.583.182.9V o(Vdc)400.1400.1400.1400.1400.1400.1∆Vo(Vdc)141414141414Po (W)80.780.780.780.780.780.7η(%)92.894.795.896.697.197.3W / O型THD减速PF0.9990.9960.9890.9760.9400.890THD (%)3.75.06.28.310.713.7与THD减速PF0.9990.9960.9890.9760.9410.893THD (%)2.93.23.74.35.68.17/13L6561图11. OVP电流阈值随温度D94IN047A 图13.电源电流与电源电压I CC(mA)10D97IN548AIOVP(µA)4151 400.50.10.05390.010.005发光= 1nFf = 70KHz电讯局长= 25˚C 05101520V CC(V)38-50 -250255075100 125 T (˚C)图12.欠压阈值分离与温度的关系V CC-ON(V)131211V CC-OFF(V)109-2502550T (˚C)75100125D94IN044A图14.电压反馈输入阈值与温度的关系V REF(V)D94IN048A2.502.482.46-50050100T (˚C)8/13L6561图15.输出饱和电压和接收器当前VPIN7(V)VCC = 14.5V 2.0D94IN046图17.乘数特征系列V CS(pin4)(V)upper voltageclampD97IN555AV COMP(pin2)(V)3.5水槽 1.61.41.25.04.54.03.21.51.01.00.80.6 0.50.40.20100200300400 IGD (mA)03.02.82.60.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5V MULT(pin3) (V)图16.输出饱和电压与源电流VPIN7(V)VCC = 14.5VVCC -0.5D94IN053VCC -1.0VCC -1.5VCC -2.0消息来源0100200300400 IGD (mA)9/13L6561图18. DIP-8机械尺寸数据与包装mm暗淡.最小.Aa1Bbb1DEee3e4FIL Z3.187.952.547.627.626.65.083.811.520.1250.511.150.3560.2041.650.550.30410.929.750.3130.1000.3000.3000.2600.2000.1500.060TYP.3.320.0200.0450.0140.0080.0650.0220.0120.4300.384最大.最小.TYP.0.131最大.寸外形与机械数据DIP-810/13L6561图19. SO-8机械尺寸数据与包装mm暗淡.最小.AA1A2BCD(1)EeH h L k ddd 5.800.250.401.350.101.100.330.194.803.801.276.200.501.270.2280.0100.016TYP.最大.1.750.251.650.510.255.004.00最小.0.0530.0040.0430.0130.0070.1890.150.0500.2440.0200.050TYP.最大.0.0690.0100.0650.0200.0100.1970.157寸外形与机械数据0˚（分钟），8˚（最大）0.100.004Note: (1) Dimensions D does not include mold flash, protru-sions or gate burrs.Mold flash, potrusions or gate burrs shall not exceed0.15mm (.006inch) in total (both side).SO-80016023 C11/13L6561表7.修订历史记录日期一月2004 June 2004修订1516创刊号改良的样式符合期待与“企业技术刊物设计指南“.改变了功率放大器的输入连接到乘数（图2).更改说明12/13L6561提供的资料被认为是准确和可靠.然而，意法半导体的后果不承担任何责任这类信息也不对任何第三方的专利或可能导致其使用的其他权利的侵犯使用.未授通过暗示或以其他方式意法半导体的任何专利或专利的权利.本出版物中提到的规格如有变更，恕不另行通知.本刊物并取代以前提供的所有信息.意法半导体的产品不做为关键元件的授权使用寿命支持设备或系统未经明确的书面意法半导体的批准.ST的标志是意法半导体公司的注册商标.所有其他名称均为其各自所有者的财产© 2004意法半导体-版权所有意法半导体公司集团澳大利亚-比利时-巴西-加拿大-中国-捷克共和国-芬兰-法国-德国- Hong Kong -印度-以色列-意大利-日-马来西亚-马耳他-摩洛哥-新加坡-西班牙-瑞典-瑞士-英国-美国13/13。

1Rev 0DESCRIPTIONElectrical Evaluation for LTC6561Four-Channel Transimpedance Amplifierwith Output MultiplexingDemonstration circuit 2808A features the LTC ®6561 four-channel transimpedance amplifier (TIA) with output multiplexing. The DC2808A accepts voltage pulses and converts them to current for the TIA. The board can also be used to measure bandwidth and channel isolation with a network analyzer . The LTC6561, which features 74KΩ transimpedance gain and 30uA linear input current range, is ideal for LIDAR receivers using Avalanche Photodiodes (APD). The LTC6561 operates from 5V single supply and consumes only 220mW. Utilizing the LTC6561’s outputAll registered trademarks and trademarks are the property of their respective owners.BOARD PHOTOMUX, multiple LTC6561 devices can combine into a single output. The LTC6561’s fast overload recovery makes it well suited for LIDAR receivers. The LTC6561’s single-ended output can swing 2V P-P into a 100Ω load. The LTC6561 is packaged in a compact 4mm × 4mm 24-pin leadless QFN package with an exposed pad for thermal management and low inductance.Design files for this circuit board are available.Figure 1. Connection Diagram2Rev 0QUICK START PROCEDURE1) Connect a voltage pulse generator to the input to J1, J2, J3, and J4. These inputs are 50Ω terminated to ground, and then AC-coupled. A 2k series resistor converts the voltage to a current. Refer to the input circuit descrip-tion for details. As an input example, a 25dB attenuator can be used to scale down the pulse generators output that is set to 1V P-P . This will produce a peak current that is approximately 28uA. The combination of 100pFAC-coupled input and 1000pF AC-coupled output limits the DC2808A repetition rate to less than 100 KHz. 2) Connect J7 to an oscilloscope that is 50Ω terminated or other 50Ω systems. J7 is AC-coupled with a 1000pF capacitor.3) Connect a 5V low-noise power supply shown in Figure 1. V CCO is hardwired to V CC by default.OUTPUT CIRCUIT DESCRIPTIONINPUT CIRCUIT DESCRIPTIONFor convenience, the LTC6561 offers two outputs: OUTTERM pin has an internal series 50Ω source resistor , and OUT pin has a direct connection. The schematic is shown in Figure 3. Only one output can be used to moni-tor at a time. The DC2808A output stage is AC-coupled 50Ω source to allow for interfacing to 50Ω systems. J7 is populated by default; this configuration connects to OUT pin on the LTC6561. J8 and its passives can be populated to use the OUTTERM pin. The LTC6561 imple-ments a class B output stage, a 1K pull-down resistor on OUTTERM provide a DC path to ground. This helps the LT6561 output pull to ground when the LTC6561 output is AC-coupled.The input stage, shown in Figure 2, is AC-coupled and 50Ω terminated to allow for interfacing to voltage pulse generators. A series resistor is used to convert the voltagepulse to a current pulse. This allows the use of a pulse generator to inject a current into the TIA. The following equation should be used to calculate the injected current to the LTC6561:I LTC6561=V INPP /2k ΩEQ1The DC2808A allows insertion of excess capacitance C9, C12, C21, C24 respectively to simulate the effect of sensor (APD) capacitance on rise time and bandwidth.R1C270603Figure 2. Input Circuit for DC2808AFigure 3. Ouput Circuit for DC2808AOUTR10R21OUTTERM OPTR9C163Rev 0The LTC6561 multiplexing capability allows compact mul-tichannel designs without external multiplexers. To set the channel on the DC2808A, JP2 and JP3 are used. By placing the jumper in the 1 position, the channel select pinThe outputs of the LTC6561 can be wire OR’d together to combine multiple inputs. When the OMUX pin is high, the LTC6561s output goes to a high impedance state. When the OMUX pin is low, the LTC6561 is enabled. Only one LTC6561 can be enabled at a time. Source resistors are necessary to avoid reflections from the paths that are inactive. Be sure to keep the output lengths as short as possible to mitigate the effects of transmission line stubs. Figure 4 shows how multiple LTC6561 are connected. Both J7 (Out Pin) or J8 (OUTTERM Pin) can be used to implement output MUXing. By replacing C16 or C21 respectively with a 0Ω 0402 resistor , the output can be DC coupled to connect multiple DC2808A boards. A DC block can then be used to interface with 50Ω systems.will be tied to VCC. In the 0 position, the channel select pin will float and the internal pull-down resistors pulls the channel to ground. Refer to Table 1 for channel selection.USING THE LTC6561 CHANNEL SELECTSCONNECTING MULTIPLE LTC6561S FOR OUTPUT MUXINGFigure 4. Diagram of Wire OR’d Outputs of Multiple LTC6561'sTable 1. Channel SelectionCHSEL1 (JP3)CHSEL0 (JP2)ACTIVE CHANNEL0010121031144Rev 0LAYOUT CONSIDERATIONSThe DC2808A layout is optimized to maximize the LTC6561’s performance. The V REF . capacitor for IN1 and IN4 should be orthogonal to the input trace. This orienta-tion helps to reduce coupling from the input to V REF . The V REF . capacitors for IN2 and IN3 should be placed as close as possible. Local bypass for V CCO and V CC should be asclose as possible to the LTC6561. The ground pad in the center of the LTC6561 is important for dissipating the heat from the die and to minimize the ground inductance. Maximizing the number of vias and employing multiple ground plane layers will most effectively heat sink the LTC6561. Figure 5 shows the DC2808A layout.The input of the DC2808A is shown in Figure 6 and is attenuated by 25dB. A 25dB reduction of 300mV is 16.9mV. Using Equation 1, the peak current that the TIA sees is 8.4uA. Thus, the output of the DC2808A should be 310 mV since the scope is 50Ω terminated.INPUT AND OUTPUTFigure 5. Recomended Layout (Left) Top Layer (Right) Bottom LayerFigure 6. Scope Shoot of DC2808ATOP LAYERBOTTOM LAYER5Rev 0Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.EXTERNAL CONNECTIONSConnections:J1, J2, J3, J4: IN1, IN2, IN3, IN4 – The LTC6561’s IN1, IN2, IN3, and IN4 channels. The input stage is AC-coupled and then 50Ω terminated to allow for interfacing to volt-age pulse generators.J7: OUT - the analog output of the LTC6561.J8: OUTTERM - the analog output of the LTC6561 with the internal 50Ω series resistor .Turrets:E1: V CC – LTC6561 V CC analog input. The V CCO analog input is connected to this node when JP1 is in the V CC position.E2: V CCO – LTC6561 V CCO analog input when JP1 is in the external (EXT) position.E3, E4: GND – the DC2808A ground.Jumpers:JP1: V CCO_SEL – selects the input for the LTC6561 V CCO to V CC turret (V CC ) or external (EXT) through the V CCO turret. V CCO is hardwired to V CC by default.JP2: CHSEL0 – The LTC6561 LSB for channel selection. JP3: CHSEL1 – The LTC6561 MSB for channel selection.JP4: O_MUX – Enables (EN) or disables (DIS) the LTC6561 output. The output goes high impedance when the LTC6561 O_MUX is disabled. The power of the LTC6561 will not be reduced in either mode.6Rev 0ANALOG DEVICES, INC. 201904/19ESD CautionESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.Legal Terms and ConditionsBy using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONL Y. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer , assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer , their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer . Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT . ADI SPECIFICALL Y DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT , OR CONSEQUENTIAL DAMAGES RESUL TING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT . Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW . This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.。

1/9AN1757APPLICATION NOTEApril 20041INTRODUCTIONConceived on the same core of the L6561 and pin-to-pin compatible with it (see fig. 1), the L6562 is the new ST's Transition Mode (TM) controller for high Power Factor Corrector stages: the replacement can be done with minimum or no modification of a stage designed with the L6561.As the building blocks of these two IC's are the same (fig. 1), one can design with the L6562 using the guidelines given for L6561, in particular in the ST Application Note 966 ("L6561, enhanced transition mode power factor corrector"). All the documentation produced for L6561 can be easily adapted to the L6562 ([1] [2] [3] [4]).The first paragraph of this Application Note is dedicated to explain the differences in terms of Electrical Charac-teristics between these two controllers: it will be clear that these modifications do not require component chang-ing when switching from L6561 to L6562.Besides providing good results in term of power factor, this new IC considerably reduces the Total Harmonic Distortion (THD) without need for external components: an innovative circuit improves the behavior of the sys-tem reducing the conduction dead-angle that occurs to the AC input current near the zero-crossings of the line voltage (paragraph 3) making easier the compliancy with regulation.The increased gate driver capability (typically 600mA sourcing and 800mA sinking) makes the L6562 suitable for a wide range of applications (with output power up to 300W).Based on that, L6562 can be fit the following applications: Lighting, IEC61000-3-2 compliant SMPS (TV, Desktop, PC, Monitors…), hi-end AC-DC adapter/charger, entry level server & web server.2L6562 VS. L6561: ELECTRICAL CHARACTERISTICS DIFFERENCESA series of tables will follow highlighting the differences between L6561 and L6562 in terms of Electrical Char-acteristics; at the end of each section, a short description explains the impact of these differences on the appli-cation and the consequent benefits.Figure 1. Block Diagramby Luca SalatiSWITCHING FROM THE L6561 TO THE L6562AN1757 APPLICATION NOTE2/9ELECTRICAL CHARACTERISTICSThe supply voltage upper limit is extended to 22V (min.) to provide more headroom for supply voltage changes.This also makes it easier to fit the supply voltage of the L6562 to that of the cascaded DC-DC converter control IC.The consumption of the chip has been reduced providing an advantage in terms of power dissipation on the start-up resistors, if used, and consumption of the self-supply circuit.The improved control process allows reducing the statistical spread of this parameter; this change does not im-pact on the application design but improves reliability of IC's quiescent pointThe improved control process allows reducing the statistical spread of this parameter; this change does not im-pact on the application design but improves reliability of IC's quiescent point.SymbolParameterTest conditionL6561L6562UnitMinTypMaxMinTypMaxSUPPLY VOLTAGE V CC Operating range After turn-on 10.31810.322V V ZZener voltagefor L6561: I CC =25mA for L6562: I CC =20mA182022222528VSUPPLY CURRENT SymbolParameterTest condition L6561L6562Unit I ST ART -UP Start-up currentbefore turn-on (V CC=11V)2050904070µA I Q Quiescent current After turn-on 2.64 2.5 3.75mA I CC Operating Supply Current@ 70KHz45.5 3.55mA I QQuiescent currentDuring OVP (either static or dynamic) or V ZCD ≤150mV2.12.2mAMULTIPLIER INPUT SymbolParameterTest conditionL6561L6562Unit K Gain V MULT =1V, V COMP =4V 0.45 0.60.750.50.60.71/VERROR AMPLIFIER Symbol Parameter Test condition L6561L6562Unit I COMP Source CurrentV COMP =4V, V INV =2.4V-2 -4 -8 -2-3.5-5mA V COMPUpper clamp voltage I SOURCE =0.5mA 5.8 5.3 5.76V Lower clamp voltage I SINK = 0.5 mA2.252.12.252.4VCURRENT SENSE COMPARATOR Symbol Parameter Test conditionL6561L6562Unit td (H-L)Delay to Output200450200350ns Current sense offset15mV V COMP =0V 30mV V COMP =2.5V5mV3/9AN1757 APPLICATION NOTEThe maximum propagation delay (Delay to output) of the current loop has been reduced: this provides advan-tages at both light load (lowering the minimum duty cycle) and heavy load (reducing the amount of peak inductor current exceeding the programmed value).Offset of the current sense comparator: in the L6561 it depends on the manufacturing process; in the L6562such parameter is kept under control because it defines the amount of correction introduced by the internal THD corrector circuit (see paragraph "3. THD optimizer circuit").Upper clamp voltage: the change does not have impact on the application design; it just reflects a change of internal structure that reduces temperature drift.The source and sink current capabilities for the L6562 are lower than the relevant in the L6561: this is the effect of the reduced spread of these two parameters. From the application design point of view this leads to a higher value for the minimum resistance connected between the auxiliary winding and the ZCD pin (R6 in the schematic of Figure 5). Generally this is not a key issue because the value for this resistor is kept much higher than the minimum calculated, to achieve optimum MOSFET turn-on.The restart threshold, not specified in the L6561 though present, is specified in the L6562.The restart current after disable has been reduced to limit IC consumption while disabled.The improved control process allows reducing the statistical spread of this parameter; this change does not im-pact on the application designThis parameter, not specified in the L6561 though present, is specified in the L6562ZERO CURRENT DETECTOR SymbolParameterTest conditionL6561L6562Unit V ZCDH Upper clamp voltage for L6561: I ZCD =-3mAfor L6562: I ZCD =-2.5mA 4.7 5.26.1 5.0 5.76.5V I ZCDsrc Source current capability-3-10-2.5-5.5mA I ZCDsnk Sink current capabil-ity3102.5mA V ZCDen Restart threshold 350mV I ZCDresRestart current after disable-100-200-3003075µASTARTER Symbol Parameter Test conditionL6561L6562Unit t ST ARTStart Timer period7015040075130300µsOUTPUT OVERVOLTAGE Symbol Parameter Test conditionL6561L6562Unit Hys.Dynamyc OVP Hys-teresys30µAAN1757 APPLICATION NOTE4/9ELECTRICAL CHARACTERISTICS (continued)Dropout voltage: this is a fixed offset due to the internal driver structure that has been changed.Current Rise and fall time: the driver modification has led to a lower driver dynamic resistance and the effect is the reduction of fall and rise time of the driver current.Output Clamp voltage: the high-level voltage of this pin is clamped at about 12V to avoid excessive gate volt-ages in case the pin is supplied with a high Vcc.(*): the aim of this feature is to avoid undesired MOSFET turn-on due to spurious spikes when the IC is under UVLO condition. In the L6561 this feature is characterized through the current that the GD pin is able to sink under the given test conditions.For the L6562 it is guaranteed that over the whole UVLO range, the GD pin is able to sink up to 10mA without exceeding 1.1V, a voltage definitely lower than the turn-on threshold of the MOS.3THD OPTIMIZER CIRCUITThe L6562 is equipped with a special circuit that reduces the conduction dead-angle occurring to the AC input current near the zero-crossings of the line voltage (crossover distortion). In this way the THD (Total Harmonic Distortion) of the current is considerably reduced, as shown in fig. 2.Figure 2. L6562 vs. L6561: THDGATE DRIVER Symbol ParameterTest condition L6561L6562Unit V OH Dropout voltageI Gdsource = 20 mA0.712 2.6V I GDsource = 200 mA 1.22 2.53V V OL I GDsink = 200 mA1.50.9 1.9V tf Current fall time 401003070ns tr Current rise time 401004080ns V Oclamp Output clamp volt-ageI GDsource = 5mA; Vcc = 20V not present101215V (*)I GD Sink Current V CC =3.5V V GD = 1V 510mA (*)UVLO saturationVcc = 0 to Vccon, I sink =10mA1.1VAN1757 APPLICATION NOTE A major cause of this distortion is the inability of the system to transfer energy effectively when the instanta-neous line voltage is very low. This effect is magnified by the high-frequency filter capacitor placed after the bridge rectifier, which retains some residual voltage that causes the diodes of the bridge rectifier to be reverse-biased and the input current flow to temporarily stop.To overcome this issue, the circuit embedded in the L6562 forces the PFC pre-regulator to process more energy near the line voltage zero-crossings as compared to that commanded by the control loop. This will result in both minimizing the time interval where energy transfer is lacking and fully discharging the high-frequency filter ca-pacitor after the bridge.Figure 3 shows the THD corrector circuit block diagram and the waveforms in the significant points; the multiplier has two inputs: the first one is a fraction of the rectified input voltage and the second one is the output of L6562 error amplifier. The multiplier output is the product of these two quantities and (ideally) is a rectified sinusoid whose peak amplitude decreases by increasing the input voltage.This waveform represents the threshold that the current sense voltage must cross to trigger the PWM compar-ator (see fig. 1).Essentially the THD improvement circuit artificially increases the ON-time of the power switch with a positive offset added to the output of the multiplier in the proximity of the line voltage zero-crossings. This offset is re-duced as the instantaneous line voltage increases, so that it becomes negligible as the line voltage moves to-ward the top of the sinusoid.The effect of the circuit is shown in the figure 4, where the key waveforms of a standard TM PFC controller are compared to those of the L6562.To maximally benefit from the THD optimizer circuit, the high-frequency filter capacitor after the bridge rectifier should be minimized, compatibly with EMI filtering needs. A large capacitance, in fact, introduces a conduction dead-angle of the AC input current in itself - even with an ideal energy transfer by the PFC pre-regulator - thus making the action of the optimizer circuit little effective.Figure 3. THD corrector: block diagram5/9AN1757 APPLICATION NOTE6/9Figure 4. Effect of THD optimizer circuitFigure 5. EVAL6562N-80W schematicImains Vdrain Imains Vdrain Input current Input currentMOSFET's drain voltageMOSFET's drain voltageRectified mains voltage Rectified mains voltageInput currentInput currentT1FUSEB1C1R1R5R6C5NTC R4D8D2D18521R14C3C23R5R51R2R11R12V O =400VP O =80W+7/9AN1757 APPLICATION NOTEPART LISTT1: Boost Inductor Spec (ITACOIL E2543/E)–E25x13x7 core, 3C85 ferrite–1.5mm gap for 0.7mH primary inductance –Primary: 105 turns (20 x 0.1mm)–Secondary: 11 turns (0.1mm)Figure 6. EVAL6562N-80W: efficiency (left, in %) and Power Factor (right) vs. input voltageR1750k Ω 1%R14100Ω, 5%C647µF, 450VR2750k Ω 1%R15shorted C7N.A.R310k Ω 1%R5012k ΩC23330nF R4, R5180k Ω 5%R51N. A.C2922µF, 25V R668k Ω 5%NTC 2.5D1STTH1L06R733ΩC10.47µF 400VD21N5248B R847k ΩC210nF D81N4148R9, R100.82Ω, 0.6W C30.68µF Q1 (TO220)STP8NM50R11, R12750k Ω, 1%C4100nF BRIDGE DF06M R139.53k Ω, 1%C512nFFUSE4A/250VAN1757 APPLICATION NOTEFigure 7. EVAL6562N-250 schematicPART LIST:R1, R2910kΩ 1%R179.53KΩ, 1%C9OPEN R313kΩ 1%R18SHORT D11N4148 R4, R5180kΩ 5%R19SHORT D2 (DO-201AD)STTH3L06 R6100Ω 5%C11µF, 400V D3ZENER 18V R747kΩ 5%C222µF, 25V D41N5406R8, R11, R14OPEN C3100nF D51N4148 R920kΩ C4, C510nF Q1 (TO220)STP20NM50 R1033Ω, 5%C6680nF BRIDGE STBR606 (ST) R12, R130.33Ω, 1W C7220nF FUSE4A/250V R15, R16750KΩ, 1%C8100µF 450V NTC 2.5 HEATSINKER: Aavid Thermalloy Max Clip S508T1: Boost Inductor Spec: EB0057-C (COILCRAFT)8/9Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronics.All other names are the property of their respective owners© 2004 STMicroelectronics - All rights reservedSTMicroelectronics GROUP OF COMPANIESAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States9/9AN1757 APPLICATION NOTEFigure 8. PF vs. Input VoltageFigure 9. THD vs. Input VoltageFigure 10. Efficiency ( %) vs. Input VoltageL6562-250W demo board evaluation:REFERENCESAN1007: "L6561 - BASED SWITCHER REPLACES MAG AMPS IN SILVER BOXES"AN1059: "DESIGN EQUATIONS OF HIGH - POWER - FACTOR FLYBACK CONVERTERS BASED ON THEL6561"AN1060: "FLYBACK CONVERTERS WITH THE L6561 PFC CONTROLLER"AN1089: "CONTROL LOOP MODELING OF L6561 - BASED TM PFC"。