CD74HCT563ME4中文资料
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PACKAGE 20 Ld CERDIP 20 Ld CERDIP 20 Ld CERDIP 20 Ld PDIP 20 Ld PDIP 20 Ld SOIC 20 Ld PDIP 20 Ld PDIP 20 Ld SOIC
2
元器件交易网 CD54/74HC533, CD54/74HCT533, CD54/74HC563, CD74HCT563
Absolute Maximum Ratings
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V DC Input Diode Current, IIK
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time 2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max) 6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
O3
O4
O5
O6
O7
TRUTH TABLE
OUTPUT ENABLE
LATCH ENABLE
DATA
Q OUTPUT
L
H
H
L
L
H
L
H
L
L
l
H
L
L
h
L
H
X
X
Z
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, Z = High Impedance State, l = Low voltage level one set-up time prior to the high to low latch enable transition, h = High voltage level one set-up time prior to the high to low latch enable transition.
Thermal Information
Thermal Resistance (TyE (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . .
69
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . .
1
元器件交易网 CD54/74HC533, CD54/74HCT533, CD54/74HC563, CD74HCT563
Pinouts
CD54HC533, CD54HCT533 (CERDIP)
CD74HC533, CD74HCT533 (PDIP)
TOP VIEW
OE 1 Q0 2 D0 3 D1 4 Q1 5 Q2 6 D2 7 D3 8 Q3 9 GND 10
The ’HC533, ’HCT533, ’HC563, and CD74HCT563 are high-speed Octal Transparent Latches manufactured with silicon gate CMOS technology. They possess the low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LSTTL devices.
• TCyLp=ic1a5l pPFr,oTpAag=a2ti5oonCD(eDlaatya=to13Onustpaut tV) CC = 5V, • Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC
The ’HC533 and ’HCT533 are identical in function to the ’HC563 and CD74HCT563 but have different pinouts. The ’HC533 and ’HCT533 are similar to the ’HC373 and ’HCT373; the latter are non-inverting types.
20 VCC 19 Q0 18 Q1 17 Q2 16 Q3 15 Q4 14 Q5 13 Q6 12 Q7 11 LE
Functional Block Diagram
HC/HCT533
D0
D1
D2
D3
D4
D5
D6
D7
DO G
DO G
DO G
DO G
DO G
DO G
DO G
DO G
LE
OE
O0
O1
O2
58
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Ordering Information
PART NUMBER CD54HC533F3A CD54HC563F3A CD54HCT533F3A CD74HC533E CD74HC563E CD74HC563M CD74HCT533E CD74HCT563E CD74HCT563M
TEMP. RANGE (oC)
For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±35mA DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA DC Drain Current, per Output, IO
High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs
[ /Title (CD74H C533, CD74H CT533, CD74H C563, CD74H CT563) /Subject (High Speed
The outputs are transparent to the inputs when the latch enable (LE) is high. When the latch enable (LE) goes low the data is latched. The output enable (OE) controls the three-state outputs. When the output enable (OE) is high the outputs are in the high impedance state. The latch operation is independent of the state of the output enable.