A Highly Digital VCO-Based ADC Architecture for
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高三科技创新英语阅读理解20题1<背景文章>Artificial intelligence (AI) is making significant inroads into the field of healthcare. AI has the potential to revolutionize medical diagnosis and treatment. One of the most prominent applications of AI in healthcare is in medical imaging. AI algorithms can analyze medical images such as X-rays, CT scans, and MRIs with a high degree of accuracy. This helps radiologists detect diseases and abnormalities more quickly and accurately.Another area where AI is making an impact is in drug discovery. By analyzing large amounts of data, AI can help identify potential drug candidates and predict their efficacy. This can significantly reduce the time and cost of drug development.AI also has the potential to improve patient care by providing personalized treatment plans. By analyzing a patient's medical history, genetic information, and other factors, AI can recommend personalized treatment options that are tailored to the individual patient's needs.However, the use of AI in healthcare also presents some challenges. One of the main challenges is the need for large amounts of high-quality data. AI algorithms require large amounts of data to train and improve their accuracy. Another challenge is the need for regulatory approval. As withany new technology, there is a need for regulatory frameworks to ensure the safety and effectiveness of AI in healthcare.Despite these challenges, the potential benefits of AI in healthcare are significant. As the technology continues to develop and improve, it is likely that we will see even more applications of AI in healthcare in the future.1. What is one of the most prominent applications of AI in healthcare?A. Surgical procedures.B. Medical imaging.C. Patient transportation.D. Hospital administration.答案:B。
Radio Design Considerations for EDGE HandsetsPatrick MorganWireless Product Marketing ManagerSilicon Laboratories Inc.Enhanced Data Rates for GSM Evolution (EDGE) is a standard adopted to enable the delivery of high-speed data services via the existing GSM cell phone network. As the name implies, EDGE builds on the widely deployed GSM/GPRS networks across North America, Europe and Asia. Camera phones, on-line audio and video and messaging are just some of the applications driving the demand for data over cell phone networks. Peak theoretical data rates with EDGE are up to three times faster than with GPRS. Therefore, when designing handsets for EDGE, designers must examine key radio design requirements such as receiver AM suppression, transmitter modulation spectrum, receive-band noise and transmitter current consumption.EDGE Modulation and Data RatesTo permit high-speed data, a new modulation called 8-PSK must be supported in addition to the GMSK modulation used for GSM/GPRS. To ensure backwards compatibility, EDGE radios must support the capability for 8-PSK modulation with no compromise to GSM/GPRS performance.Various EDGE radio architectures have been proposed to support both GMSK and 8-PSK modulation. Radios based on polar loop or polar modulation promise to provide high power-added efficiency (PAE) at the expense of additional calibration and complexity required to support the power control feedback loop. Alternative radios support EDGE by adding a linear transmitter for 8-PSK modulation to an existing GSM/GPRS transceiver. This approach has the benefit of supporting 8-PSK modulation while preserving excellent GSM/GPRS performance.EDGE Radio RequirementsReceiver requirements are very similar between GSM/GPRS and EDGE, with the added complexity that either GMSK or 8-PSK modulated blockers may be present. Because EDGE supports a new modulation onto the existing GSM/GPRS network, new transmitter requirements are introduced in addition to those for GSM/GPRS. Transmitter RequirementsTable 1 shows key transmitter requirements for a mobile handset EDGE radio derived from the 3GPP specification [1,2]. The transmitter requirements for 8-PSK are generally relaxed or equivalent to GMSK. The output power is lower by 6 dB in the low bands and 4 dB in the high bands, and the output spectrum at the 400 kHz offset is relaxed by 6 dB. However, unlike GMSK signals where the transmitter may compress the signal amplitude, for 8-PSK signals the transmitter must maintain linearity during the burst to preserve both amplitude and phase.*Requirement for low band (850, 900) / high band (1800, 1900)**Requirement for low band (850, 900) only***Requirement for phase error (GMSK) or EVM (8-PSK)Table 1: EDGE Radio Transmitter RequirementsReceiver AM SuppressionIn a real-world environment, the desired signal is often corrupted with interfering signals from neighboring cell phones or other equipment. The 3GPP standard requires the handset to reliably detect a small desired signal in the presence of large blockers under a variety of fading conditions that correspond to typical urban or rural environments. Depending on the receiver architecture, strong blockers may create nonlinearities that distort or even completely prevent the desired signal from being detected [3].Figure 1 shows the effect of blockers on the desired signal for two receiver architectures. The small desired signal and the large blocking signal are applied at the antenna. In a direct conversion receiver, the blocker passes through the switch, SAW, and low-noise amplifier (LNA) and can leak over to the local oscillator (LO) side of the mixer. If the leakage is excessive, the blocker mixes with itself and produces a dc offset at the output that corrupts the downconverted signal. In a digital low-IF receiver, the dc offset is mixed away from the signal and filtered out.FilteredDC Figure 1: EDGE Receiver Architectures and AM SuppressionFor the direct conversion receiver, the dc offset at the output of the receiver cannot be easily filtered since the longest time constant that can fit within the bit interval (Tb / 2 ~1.8 µs) still creates a filter that removes much of the desired signal (fc ~ 88 kHz). A software correction can be applied by the baseband DSP across multiple bursts to effectively synthesize a narrower filter [4]. However, approximately 0.5 dB of desired signal is lost with this approach [5]. Furthermore, it is not clear how well the dc correction software algorithm will perform in the presence of blockers that are amplitude modulated, such as those produced by 8-PSK EDGE and W-CDMA or during the AM suppression test when the blocker appears at the midamble of the burst [5].An additional concern relates to the integration of the synthesizer loop filter. Typically, these are not integrated on direct conversion transceivers. In that case, not only does the total bill-of-materials increase due to the need for precision low-noise components, but a coupling mechanism is also created for external noise sources that occur at the PCB level to add to the phase noise of the local oscillator. If the phase noise is excessive, the blocker can mix with the phase noise to produce additional low frequency distortion that corrupts the received signal. This effect is called “reciprocal mixing” and is well-known in communications systems design [6].Compared to the direct-conversion receiver, the digital low-IF receiver provides superior suppression of dc offsets; so, the baseband software dc offset calibration can beremoved [7, 8]. Synthesizer loop filters and tuning components are integrated so reciprocal mixing due to external phase noise sources is prevented. The cost to obtain this improved performance is more integrated circuitry on the transceiver to implement the dual ADC, digital filtering, and dual DAC.Transmitter Modulation Spectrum and NoiseIn GSM/GPRS, the prevalent transmitter architecture is based on the offset phase-locked loop (OPLL). The OPLL provides excellent filtering of in-band noise to meet the challenging modulation spectrum requirements for GMSK [9]. Out-of-band noise is typically suppressed with additional filtering of the transmitter voltage controlled oscillator (VCO) phase noise to meet the receive band noise requirement. However, since the OPLL supports phase modulation only with no support for amplitude modulation required for 8-PSK modulation, designing EDGE radios requires a re-consideration of the transmitter architecture.Figure 2 shows two possible EDGE transmitter architectures. In a polar loop transmitter, the signal is applied to the power amplifier (PA) through separate amplitude and phase feedback pathways [10,11]. Polar modulation is a variant of polar loop that operates without feedback so no coupler is required [12,13]. In a linear upconversion transmitter, the signal amplitude and phase are launched together. During GMSK transmission, the baseband I/Q signals modulate the OPLL and the direct upconversion mixer and VGA are bypassed. During 8-PSK transmission, the OPLL is unmodulated and held in a carrier wave (CW) mode to act as a local oscillator that upconverts the baseband I/Q signal.The principal design challenge to the polar loop or polar modulation architectures is the need for precise matching of the amplitude and phase delays through the feedback loops. Simulations indicate that the modulation spectrum will fail specification at the 400 kHz offset if the delay mismatch is approximately 30 ns or greater [14]. However, a maximum 30 ns time constant constrains the filter bandwidth on the transmitter VCO to be at least 5 MHz, which limits suppression of the out-of-band VCO phase noise.GMSKFigure 2: EDGE Transmitter Architectures and Signal PathwaysTo attempt to balance these conflicting requirements for polar, previous approaches have employed extensive PA calibration techniques. However, the amplitude feedback pathway contains an envelope detector that varies differently with process, supply voltage and temperature than the phase discriminator circuitry in the phase feedback pathway. Variations in PA output phase and amplitude are difficult to model further complicating the calibration. Under conditions of high PA gain with a weak output signal (i.e. ramping or under mismatched conditions), the loop may become unstable. Compared to polar loop and polar modulation, which are not yet proven in production, the linear transmitter architecture is the only architecture currently in production for GSM/EDGE handsets and is also used for CDMA and W-CDMA handsets. Unlike polar modulation, which requires a special or customized PA, the linear transmitter architecture allows designers to select PAs from a number of vendors.Highly Integrated EDGE RadiosRadios based on highly-integrated components offer many advantages to handset designers. Compared to discrete solutions, highly-integrated solutions require fewer components to procure and stock. Performance is superior due to the elimination of unwanted interference and noise coupling to sources external to the integrated circuit. Test coverage at the component level can also be improved, ensuring higher handset manufacturing yield and fewer field returns.Figure 3 shows one approach to developing a highly-integrated EDGE radio based on the Silicon Laboratories Aero™ II transceiver. The Aero II transceiver offers the industry’s highest integration for GSM/GPRS. All sensitive components are integrated including RF and IF VCOs, VCO tuning components, all loop filters, and all digitally-controlled crystal oscillator (DCXO) components in a single 5 x 5 mm package. The companion chip supports linear upconversion for transmission of 8-PSK signals.Integrated RX SAW Silicon LaboratoriesAero II TransceiverFigure 3: EDGE Radio Based on Silicon Laboratories Aero II TransceiverConclusionAfter years of development, EDGE technology is now active on GSM/GPRS networks worldwide. To support EDGE handset development, radios based on a digital low-IF receiver and a linear transmitter promise excellent receiver AM suppression and transmitter performance with nearly equivalent transmitter current compared to other architectures. As EDGE technology becomes mainstream, it is expected that continued integration efforts will drive the total handset radio bill-of-materials to be equivalent with GSM/GPRS and provide a pathway to very highly integrated 3G radios.R EFERENCES[1] 3GPP, “GSM/EDGE Radio Access Network; Radio Transmission and Reception”, TS45.005, version 6.0.0, November 2002.[2] 3GPP, “GSM/EDGE Radio Access Network; Mobile Station (MS) Conformance Specification Part 1”, TS51.010-1, version 5.8.0, May 2004.[3] R. G. Meyer and A. K. Wong, “Blocking and Desensitization in RF Amplifiers”, vol. 30, no. 8, pp. 944-946, August 1995.[4] J. Strange and S. Atkinson, “A Direct Conversion Transceiver for Multi-Band GSM Application”, IEEE Radio Frequency Integrated Circuits Symposium, pp. 25-28, May 2000.[5] P. N. Morgan, “Optimizing RF Performance for Multi-Mode Handsets”, Communications Design Conference, CDC-P730, March 2004.[6] B. Razavi, RF Microelectronics, Prentice-Hall, 1999.[7] J. Crols and M. Steyaert, “Low-IF Topologies for High-Performance Analog Front-Ends of Fully Integrated Receivers”, IEEE Trans. Circuits Systems II, vol. 45, pp. 269-282, March 1998.[8] S. Tadjpour, E. Cijvat, E. Hegazi, and A. A. Abidi, “A 900-MHz Dual-Conversion Low-IF GSM Receiver in 0.35 µm CMOS”, IEEE J. Solid State Circuits, vol. 36, pp. 1992-2002, December 2001.[9] B. Razavi, “RF Transmitter Architectures and Circuits”, IEEE Custom Integrated Circuits Conference, pp. 197-204, 1999.[10] T. J. Fergus, “EDGE Modulation – How Linearization Improves Amplifier Performance”, RF Design, pp. 18-30, October 2002.[11] T. Sowlati, D. Rozenblit, E. MacCarthy, M. Damgaard, R. Pullela, D. Koh, and D. Ripley, “Quad-Band GSM/GPRS/EDGE Polar Loop Transmitter”, IEEE Intl. Solid-State Circuits Conference, pp. 186-187, March 2004. [12] A. Hadjichristos, “Transmit Architectures and Power Control Schemes for Low Cost Highly Integrated Transceiver for GSM/EDGE Applications”, IEEE Intl. Symposium on Circuits and Systems, vol. 3, pp. 610 – 613, May 2003.[13] E. McCune and W. Sander, “EDGE Transmitter Alternative Using Nonlinear Polar Modulation”, IEEE Intl. Symposium on Circuits and Systems, vol. 3, pp. 594 – 597, May 2003.[14] Silicon Laboratories estimates.。
中国研究人员开发高性能集成固态量子存储器Chinese researchers develop high-performance integrated solid-state quantum memoryw小乔在哪里Chinese researchers have developed a high-fidelity integrated solid-state quantum memory, making important progress in the field of quantum storage and laying a solid foundation for developing a quantum network.中国研究人员开发了一种高保真集成固态量子存储器,在量子存储领域取得了重要进展,并为发展量子网络奠定了坚实的基础。
The achievement was made by a team of researchers led by Li Chuanfeng and Zhou Zongquan with the University of Science and Technology of China. It has been published in the journals Optica and Applied Physics Reviews.这项成就是由中国科技大学的李传峰和周宗权带领的研究团队取得的。
这项成果已经发表在《光学》和《应用物理综述》杂志上。
As a core device for constructing a quantum network, quantum memory can effectively overcome channel loss, expand the distance of quantum communication, and integrate quantum computing and quantum sensing resources in different locations.量子存储器作为构建量子网络的核心元件,可以有效地克服信道损失,扩大量子通信距离,并在不同位置集成量子计算和量子传感资源。
基于无机钙钛矿(CsPbX3)量子点的发光二极管近年来,半导体量子点因其独特的光学性质,例如不同的发射波长,窄的发射光谱,以及高的发光效率等,近年来受到了广泛的关注。
所有这些极具吸引力的特性使得量子点成为下一代照明和显示器件以及光通信技术的优秀首选。
自从1994年,第一个CdSe量子点发光器件(QLEDs)被报道之后,包括硫化镉,碲化镉,铟@ ZnSeS,和Cu掺杂ZnInS在内的各种量子点相继被报道。
显然,过去20年研究QLEDs的主要材料都局限在纤锌矿和闪锌矿镉的量子点。
在过去的两年中,卤化物钙钛矿材料由于其出色的性能,被证明是令人惊叹的半导体材料,无论它是应用于太阳能电池,还是发光二极管亦或是激光器。
然而,有机–无机混合卤化物钙钛矿材料的稳定性是一个关键问题(CH3NH3PbX3, X = I, Br, Cl)。
与其相比较而言,所有无机钙钛矿材料具有较高的稳定性并且在各种光电器件中有着巨大潜能。
为了将高稳定性和量子限制效应整合在一起,科瓦连科和同事制作铯铅的卤化物(CsPbX3,X = Cl,Br,I)量子点,此卤化物具有出色的光学性能,尤其是可调谐、高量子产率的光致发光(PL)。
这个灵感来自近代激光和CH3NH3PbX3发光二极管,这些所有的无机钙钛矿型量子点所拥有的巨大潜能,会使它在QLED的应用中成为一种新型的发光材料。
到目前为止,所有的关于铅铯的无机钙钛矿纳米晶还未见报道。
这里,我们第一次制备出了这种铯铅无机钙钛矿纳米晶,其高质量的量子点通过将硬脂酸铯(CsSt)以热注入的方式滴入PbBr2溶液中合成。
发光波长可以通过量子点的大小和更换不同的卤族元素进行改变(Cl,Br,I)。
量子点能很容易地在各种非极性溶剂中扩散(比如:甲苯、辛烷、己烷),其中这里的非极性溶剂指基于用溶液法制备光电器件的旋涂液。
典型QLED装置由ITO / PEDOT:PSS/PVK/QDs/ TPBi /LiF/Al组成,电致发光呈现出蓝光,绿光,黄光,这表明所有的无机钙钛矿型量子点可能成为一种新的应用于低成本显示、照明和光通信技术的材料。
第42卷第10期2023年10月硅㊀酸㊀盐㊀通㊀报BULLETIN OF THE CHINESE CERAMIC SOCIETY Vol.42㊀No.10October,2023g-C 3N 4/Ag 基二元复合光催化剂降解环境污染物的研究进展柏林洋1,蔡照胜2(1.江苏旅游职业学院,扬州㊀225000;2.盐城工学院化学化工学院,盐城㊀224051)摘要:光催化技术在太阳能资源利用方面呈现出良好的应用前景,已受到世界各国的广泛关注㊂g-C 3N 4是一种二维结构的非金属聚合物型半导体材料,具有合成简单㊁成本低㊁化学性质稳定㊁无毒等特点,在环境修复和能量转化方面应用潜力较大㊂但g-C 3N 4存在对可见光吸收能力差㊁比表面积小和光生载流子复合速率高等缺点,限制了其实际应用㊂构筑异质结光催化剂是提高光催化效率的有效途径之一㊂基于Ag 基材料的特点,前人对g-C 3N 4/Ag 基二元复合光催化剂进行了大量研究,并取得显著成果㊂本文总结了近年来AgX(X =Cl,Br,I)/g-C 3N 4㊁Ag 3PO 4/g-C 3N 4㊁Ag 2CO 3/g-C 3N 4㊁Ag 3VO 4/g-C 3N 4㊁Ag 2CrO 4/g-C 3N 4㊁Ag 2O /g-C 3N 4和Ag 2MoO 4/g-C 3N 4复合光催化剂降解环境污染物的研究进展,并评述了g-C 3N 4/Ag 基二元复合光催化剂目前面临的主要挑战,展望了其未来发展趋势㊂关键词:g-C 3N 4;Ag 基材料;二元复合光催化剂;光催化性能;环境污染物中图分类号:TQ426㊀㊀文献标志码:A ㊀㊀文章编号:1001-1625(2023)10-3755-09Research Progress on g-C 3N 4/Ag-Based Binary Composite Photocatalysts for Degradation of Environmental PollutantsBAI Linyang 1,CAI Zhaosheng 2(1.Jiangsu Institute of Tourism,Yangzhou 225000,China;2.School of Chemistry and Chemical Engineering,Yancheng Institute of Technology,Yancheng 224051,China)Abstract :Photocatalysis technology shows a good application prospect in the utilization of solar energy resource and has attracted worldwide attention.g-C 3N 4is a two-dimensional polymeric metal-free semiconductor material with the characteristics of facile synthesis,low cost,high chemical stability and non-toxicity,which has great potential in environmental remediation and energy conversion.However,g-C 3N 4has the drawbacks of poor visible light absorption capacity,low specific surface area and high recombination rate of photogenerated charge carriers,which limits its practical application.Constructing heterojunction photocatalyst has become one of effective pathways for boosting photocatalytic efficiency.Based on the inherent merits of Ag-based materials,a lot of researches have been carried out on g-C 3N 4/Ag-based binary photocatalysts and prominent results have been achieved.Recent advances on AgX (X =Cl,Br,I)/g-C 3N 4,Ag 3PO 4/g-C 3N 4,Ag 2CO 3/g-C 3N 4,Ag 3VO 4/g-C 3N 4,Ag 2CrO 4/g-C 3N 4,Ag 2O /g-C 3N 4and Ag 2MoO 4/g-C 3N 4composite photocatalysts for the degradation of environmental pollutants were summarized.The major challenges of g-C 3N 4/Ag-based binary composite photocatalysts were reviewed and the future development trends were also forecast.Key words :g-C 3N 4;Ag-based material;binary composite photocatalyst;photocatalytic performance;environmental pollutant㊀收稿日期:2023-05-15;修订日期:2023-06-12基金项目:江苏省高等学校自然科学研究面上项目(19KJD530002)作者简介:柏林洋(1967 ),男,博士,副教授㊂主要从事光催化材料方面的研究㊂E-mail:linybai@通信作者:蔡照胜,博士,教授㊂E-mail:jsyc_czs@0㊀引㊀言随着全球经济的快速增长和工业化进程的加快,皮革㊁印染㊁制药和化工等行业排放的环境污染物总量3756㊀陶㊀瓷硅酸盐通报㊀㊀㊀㊀㊀㊀第42卷也不断增长㊂这些环境污染物存在成分复杂㊁毒性大㊁难以降解等特点,对人们的身体健康和生态环境产生严重威胁,已成为制约经济和社会发展的突出问题㊂如何实现环境污染物的高效降解是目前亟待解决的重要问题㊂效率低㊁能耗高及存在二次污染是利用传统处理方法处置环境污染物的主要缺陷[1]㊂光催化技术作为一种新型的绿色技术,具有环境友好㊁成本低㊁反应效率高和无二次污染等优点,在解决环境污染问题方面具有很大的发展潜力,深受人们的关注[2-4]㊂g-C3N4属于一种非金属聚合物型半导体材料,具有二维分子结构,即C原子和N原子通过sp2杂化形成的共轭石墨烯平面结构,具有适宜的禁带宽度(2.7eV)和对460nm以下可见光良好的响应能力㊂g-C3N4具有合成原料成本低㊁制备工艺简单㊁耐酸耐碱和稳定性好等特点,在催化[5]㊁生物[6]和材料[7]等领域应用广泛㊂然而,g-C3N4较小的比表面积㊁较弱的可见光吸收能力和较快的光生载流子复合率等不足导致其光量子利用率不高,给实际应用带来较大困难[8]㊂为了克服上述问题,前人提出了对g-C3N4进行形貌调控[9]㊁元素掺杂[10-11]和与其他半导体耦合[12-13]等方法㊂其中,将g-C3N4与其他半导体耦合形成异质结光催化剂最为常见㊂Ag基半导体材料因具有成本合理㊁光电性能好和光催化活性高等特点而深受青睐,但仍存在光生载流子快速复合和光腐蚀等缺陷㊂近年来,人们将Ag基材料与g-C3N4进行复合,整体提高了复合光催化剂的催化性能,并由此取得了大量极有价值的科研成果㊂本文综述了近年来g-C3N4/Ag银基二元复合光催化剂的制备方法㊁性能和应用等方面的研究现状,同时展望了未来的发展趋势,期望能为该领域的研究人员提供新的思路㊂1㊀g-C3N4/Ag基二元复合光催化剂近年来,基于Ag基半导体材料能与g-C3N4能带结构匹配的特点,构筑g-C3N4/Ag基异质结型复合光催化体系已成为国内外的研究热点㊂这类催化剂通常采用沉淀法在g-C3N4表面负载Ag基半导体材料㊂其中,Ag基体的成核和生长是关键问题㊂通过对Ag基材料成核和生长工艺的控制,实现了Ag基材料在g-C3N4上的均匀分布㊂此外,通过对g-C3N4微观结构进行调控,使其具有较大的比表面积和较高的结晶度,从而进一步提高复合光催化剂的催化性能㊂相对于纯g-C3N4和Ag基光催化剂,g-C3N4/Ag基二元复合光催化剂通过两组分的协同效应和界面作用,不仅能提高对可见光的吸收利用率,而且能有效抑制g-C3N4和Ag基材料中光生e-/h+对的重组,从而提高复合光催化剂的活性和稳定性㊂在g-C3N4/Ag基二元复合光催化材料中,以AgX(X=Cl,Br,I)/g-C3N4㊁Ag3PO4/g-C3N4㊁Ag2CO3/g-C3N4㊁Ag3VO4/g-C3N4㊁Ag2CrO4/g-C3N4㊁Ag2O/g-C3N4和Ag2MoO4/g-C3N4为典型代表㊂1.1㊀AgX(X=Cl,Br,I)/g-C3N4二元复合光催化剂AgX(X=Cl,Br,I)在杀菌㊁有机污染物降解和光催化水解产氢等方面展现出优异的性能㊂但AgX (X=Cl,Br,I)是一种光敏材料,在可见光下容易发生分解,形成Ag0,从而影响其催化活性及稳定性㊂将AgX(X=Cl,Br,I)与g-C3N4复合是提升AgX(X=Cl,Br,I)使用寿命㊁改善光催化性能最有效的方法之一㊂Li等[14]采用硬模板法制备出一种具有空心和多孔结构的高比表面积g-C3N4纳米球,并以其为载体,通过沉积-沉淀法得到AgBr/g-C3N4光催化材料㊂XRD分析显示AgBr的加入并没有改变g-C3N4的晶体结构,瞬态光电流试验表明AgBr/g-C3N4光电流密度高于g-C3N4,橙黄G(OG)染料经10min可见光照射后的降解率达到97%㊂Shi等[15]报道了利用沉淀回流法制备AgCl/g-C3N4光催化剂,研究了AgCl的量对催化剂结构及光催化降解草酸性能的影响,确定了最佳修饰量,分析了催化剂用量㊁草酸起始浓度㊁酸度和其他有机成分对光催化活性影响,通过自由基捕获试验揭示了光降解反应中起主要作用的活性物质为光生电子(e-)㊁羟基自由基(㊃OH)㊁超氧自由基(㊃O-2)和空穴(h+)㊂彭慧等[16]采用化学沉淀法制备具有不同含量AgI的AgI/g-C3N4光催化剂,SEM测试表明AgI纳米颗粒分布在层状结构g-C3N4薄片的表面,为催化反应提供了更多的活性位㊂该系列催化剂应用于光催化氧化降解孔雀石绿(melachite green,MG)的结果显示,AgI/g-C3N4(20%,质量分数,下同)的光催化性能最好,MG经2h可见光辐照后去除率达到99.8%㊂部分AgX(X=Cl,Br,I)/g-C3N4二元复合光催化剂的研究现状如表1所示㊂第10期柏林洋等:g-C 3N 4/Ag 基二元复合光催化剂降解环境污染物的研究进展3757㊀表1㊀AgX (X =Cl ,Br ,I )/g-C 3N 4二元复合光催化剂光降解环境污染物的研究现状Table 1㊀Research status of AgX (X =Cl ,Br ,I )/g-C 3N 4binary composite photocatalysts forphotodegradation of enviromental pollutantsPhotocatalytst Synthesis method TypePotential application Photocatalytic activity Reference AgBr /g-C 3N 4Sonication-assisted deposition-precipitation II-schemeDegradation of RhB,MB and MO 100%degradation for RhB,95%degradation for MB and 90%degradation for MO in 10min [17]AgCl /g-C 3N 4Precipitation Z-schemeDegradation of RhB and TC 96.1%degradation for RhB and 77.8%degradation for TC in 120min [18]AgCl /g-C 3N 4Solvothermal +in situ ultrasonic precipitation Z-scheme Degradation of RhB 92.2%degradation in 80min [19]AgBr /g-C 3N 4Deposition-precipitation II-schemeDegradation of MO 90%degradation in 30min [20]AgI /g-C 3N 4In-situ growth II-scheme Degradation of RhB 100%degradation in 60min [21]㊀㊀Note:MO-methyl orange,RhB-rhodamine B,TC-tetracycline hydrochloride,MB-methyl blue.1.2㊀Ag 3PO 4/g-C 3N 4二元复合光催化剂纳米Ag 3PO 4禁带宽度为2.5eV 左右,对可见光有很好的吸收作用,且光激发后具有很强的氧化性,在污染物降解和光解水制氢等领域有良好的应用前景[22]㊂但是,纳米Ag 3PO 4易团聚,光生载流子的快速重组使光催化活性大大降低,此外,Ag 3PO 4还易受光生e -的腐蚀,从而影响稳定性㊂Ag 3PO 4与g-C 3N 4复合可显著降低e -/h +对的重组,有效提高光催化性能㊂Wang 等[23]采用原位沉淀法获得Z-型异质结构g-C 3N 4/Ag 3PO 4复合光催化剂,并有效地提高了e -/h +对的分离效率㊂TEM 结果显示,Ag 3PO 4粒子被g-C 3N 4纳米片所覆盖,UV-DRS 结果表明,Ag 3PO 4的添加使g-C 3N 4吸收边发生红移,且吸收光强度显著增强,光降解实验结果显示,30%g-C 3N 4/Ag 3PO 4光催化剂在40min 内能去除约90%的RhB㊂胡俊俊等[24]利用了原位沉淀法合成了一系列Ag 3PO 4/g-C 3N 4复合光催化剂,研究了Ag 3PO 4和g-C 3N 4的物质的量比对催化剂在可见光下催化降解MB 性能的影响,发现在最优组分下,MB 经可见光辐照30min 后可以被完全降解㊂Mei 等[25]采用焙烧-沉淀法制备了一系列Ag 3PO 4/g-C 3N 4复合光催化剂,并用于可见光条件下降解双酚A(bisphenol A,BPA),发现Ag 3PO 4质量分数为25%时,光催化降解BPA 的性能最好,3h 能降解92.8%的BPA㊂潘良峰等[26]采用化学沉淀法制备出一种具有空心管状的Ag 3PO 4/g-C 3N 4光催化剂,SEM 结果表明,Ag 3PO 4颗粒均匀分布于空心管状结构g-C 3N 4的表面,两者形成一个较强异质结构,将其用于盐酸四环素(tetracycline hydrochloride,TC)光催化降解,80min 能降解98%的TC㊂Deonikar 等[27]研究了采用原位湿化学法合成催化剂过程中使用不同溶剂(去离子水㊁四氢呋喃和乙二醇)对Ag 3PO 4/g-C 3N 4的结构和光降解MB㊁RhB 及4-硝基苯酚性能的影响,发现不同溶剂对复合光催化剂的形貌有着重要影响,从而影响光催化性能,其中以四氢呋喃合成的复合光催化剂的催化降解性能最佳,这是由于g-C 3N 4纳米片均匀包裹在Ag 3PO 4的表面,从而促使两者界面形成较为密切的相互作用,有利于e -/h +对的分离㊂部分Ag 3PO 4/g-C 3N 4二元复合光催化剂的研究进展见表2㊂表2㊀Ag 3PO 4/g-C 3N 4二元复合光催化剂光降解环境污染物的研究现状Table 2㊀Research status of Ag 3PO 4/g-C 3N 4binary composite photocatalysts for photodegradation of environmental pollutantsPhotocatalyst Synthesis method Type Potential application Photocatalytic activity Reference g-C 3N 4/Ag 3PO 4In situ precipitation Z-scheme Degradation of BPA 100%degradation in 180min [28]g-C 3N 4/Ag 3PO 4Hydrothermal Z-schemeDecolorization of MB Almost 93.2%degradation in 25min [29]g-C 3N 4/Ag 3PO 4In situ prepcipitation II-scheme Reduction of Cr(VI)94.1%Cr(VI)removal efficiency in 120min [30]g-C 3N 4/Ag 3PO 4Chemical precipitation Z-scheme Degradation of RhB 90%degradation in 40min [31]g-C 3N 4/Ag 3PO 4In situ precipitation Z-scheme Degradation of levofloxacin 90.3%degradation in 30min [32]Ag 3PO 4/g-C 3N 4Chemical precipitation Z-schemeDegradation of gaseous toluene 87.52%removal in 100min [33]Ag 3PO 4/g-C 3N 4Calcination +precipitation Z-scheme Degradation of diclofenac (DCF)100%degradation in 12min [34]Ag 3PO 4/g-C 3N 4In situ deposition Z-scheme Degradation of RhB and phenol 99.4%degradation in 9min for RhB;97.3%degradation in 30min for phenol [35]3758㊀陶㊀瓷硅酸盐通报㊀㊀㊀㊀㊀㊀第42卷续表Photocatalyst Synthesis method Type Potential application Photocatalytic activity Reference Ag3PO4/g-C3N4In situ hydrothermal II-scheme Degradation of sulfapyridine(SP)94.1%degradation in120min[36] Ag3PO4/g-C3N4In situ growth Z-scheme Degradation of berberine100%degradation in15min[37] g-C3N4/Ag3PO4In situ deposition Z-scheme Degradation of ofloxacin71.9%degradation in10min[38] Ag3PO4/g-C3N4Co-precipitation Z-scheme Degradation of MO98%degradation in10min[39]g-C3N4/Ag3PO4Calcination+precipitation Z-scheme Degradation of MO,RhB and TC95%degradation for MO in30min;[40]96%degradation for RhB in15min;80%degradation for TC in30min1.3㊀Ag2CO3/g-C3N4二元复合光催化剂Ag4d轨道和O2p轨道杂化,形成Ag2CO3的价带(valence band,VB);Ag5s轨道和Ag4d轨道进行杂化,形成Ag2CO3导带(conduction band,CB),而CB中原子轨道杂化会降低Ag2CO3带隙能,从而提高光催化活性[41]㊂纳米Ag2CO3带隙能约为2.5eV,可见光响应性好,在可见光作用下表现出良好的光催化降解有机污染物特性[42-43]㊂然而,经长时间光照后,Ag2CO3晶粒中Ag+会被光生e-还原成Ag0,导致其光腐蚀,引起光催化性能下降[44]㊂Ag2CO3与g-C3N4耦合,能够有效地抑制光腐蚀,促进e-/h+对的分离,进而改善光催化性能㊂An等[45]通过构筑Z型核壳结构的Ag2CO3@g-C3N4材料来增强Ag2CO3和g-C3N4界面间的相互作用,从而有效防止光腐蚀发生,加速光生e-/h+对的分离,实现了催化剂在可见光辐照下高效降解MO㊂Yin等[46]通过水热法制备Ag2CO3/g-C3N4光催化剂,探讨了g-C3N4的含量㊁合成温度对催化剂结构和光降解草酸(oxalic acid,OA)性能的影响,获得最优条件下合成的催化剂能在45min光照时间内使OA去除率达到99.99%㊂Pan等[41]采用煅烧和化学沉淀两步法,制备了一系列Ag2CO3/g-C3N4光催化剂,TEM结果显示,Ag2CO3纳米粒子均匀分布在g-C3N4纳米片表面,且形貌规整㊁粒径均一,光催化性能测试结果表明,60% Ag2CO3/g-C3N4光催化活性最高,MO和MB分别经120和240min可见光光照后,其降解率分别为93.5%和62.8%㊂Xiu等[47]使用原位水热法构筑了Ag2CO3/g-C3N4光催化剂,光降解试验结果表明,MO经可见光辐照1h的去除率为87%㊂1.4㊀Ag3VO4/g-C3N4二元复合光催化剂纳米Ag3VO4带隙能约为2.2eV,可用于催化可见光降解环境污染物,是一种具有应用前景的新型半导体材料㊂然而,如何提高Ag3VO4光催化性能,仍然是学者研究的重点㊂构建Ag3VO4/g-C3N4异质结催化剂是提高Ag3VO4的催化性能的一种有效方法㊂该方法能够降低Ag3VO4光生载流子的复合率,拓宽可见光的吸收范围㊂Hind等[48]通过溶胶凝胶法制备出一种具有介孔结构的Ag3VO4/g-C3N4复合光催化剂,该复合催化剂经60min可见光照射能将Hg(II)全部还原,其光催化活性分别是Ag3VO4和g-C3N4的4.3倍和5.4倍,主要是由于异质结界面处各组分间紧密结合以及催化剂具有较高的比表面积和体积比,从而促进光生载流子的分离㊂蒋善庆等[49]利用化学沉淀法制备了系列Ag3VO4/g-C3N4催化剂,催化性能研究结果表明,Ag3VO4负载量为20%(质量分数)时,其光催化降解微囊藻毒素的效果最好,可见光辐照100min后降解率为85.43%,而g-C3N4在相同条件下的降解率仅为18.76%㊂1.5㊀Ag2CrO4/g-C3N4二元复合光催化剂纳米Ag2CrO4具有特殊的晶格和能带结构,其带隙能为1.8eV,可见光响应良好,是一种非常理想的可见光区半导体材料㊂然而,Ag2CrO4存在自身的电子结构和晶体的缺陷,导致其光催化效率性能较差,严重影响了实际应用[50-52]㊂将Ag2CrO4与g-C3N4复合形成异质结光催化剂是提高其光催化效率和稳定性的一种有效途径,因为Ag2CrO4在光照下产生的光生e-快速地迁移到g-C3N4表面,可避免光生e-在Ag2CrO4表面聚集而引起光腐蚀㊂Ren等[53]利用SiO2为硬模板,以氰胺为原料,合成出具有中空介孔结构的g-C3N4,再通过化学沉淀法制备了系列g-C3N4/Ag2CrO4光催化剂,并将其用于RhB和TC的可见光降解,研究发现g-C3N4/Ag2CrO4催化剂具有较高比表面积和丰富的孔道结构,在可见光辐射下表现出较高的光催化活性㊂Rajalakshmi等[54]利用水热方法合成了一系列Ag2CrO4/g-C3N4光催化剂,并将其用于对硝基苯酚的光催化降解,结果表明,Ag2CrO4质量分数为10%时,其降解率达到97%,高于单组分g-C3N4或Ag2CrO4,原因是与第10期柏林洋等:g-C 3N 4/Ag 基二元复合光催化剂降解环境污染物的研究进展3759㊀Ag 2CrO 4和g-C 3N 4界面间形成了S-型异质结,能提高e -/h +对的分离效率㊂1.6㊀Ag 2O /g-C 3N 4二元复合光催化剂纳米Ag 2O 是一种理想的可见光半导体材料,在受到光辐照后,其电子发生跃迁,CB 上光生e -能够将Ag 2O 晶粒中Ag +还原成Ag 0,而VB 上h +能够使Ag 2O 的晶格氧氧化为O 2,导致其结构不稳定㊂然而,纳米Ag 2O 在有机物污染物降解方面表现出良好的稳定性[55],这是因为Ag 2O 的表面会随着光化学反应的进行被一定数量的Ag 0纳米粒子所覆盖,而Ag 0纳米粒子作为光生e -陷阱,能够降低e -在Ag 2O 表面的富集,同时,由于光生h +具有较强的氧化性能力,既能实现对有机污染物的直接氧化,又能避免其对晶格氧的氧化,从而提高了纳米Ag 2O 光催化活性和稳定性㊂Liang 等[56]在常温下采用简易化学沉淀法制备了p-n 结Ag 2O /g-C 3N 4复合光催化剂,研究发现,起分散作用的g-C 3N 4为Ag 2O 纳米颗粒的生长提供了大量成核位点并限制了Ag 2O 纳米颗粒聚集,p-n 结的形成以及在光化学反应过程中生成的Ag 纳米粒子,加速了光生载流子的分离和迁移,拓宽了光的吸收范围,在可见光和红外光照下降解RhB 溶液过程中表现出良好的催化活性,其在可见光和红外光照下反应速率分别是g-C 3N 4的26倍和343倍㊂Jiang 等[57]通过液相法制备了一系列介孔结构的g-C 3N 4/Ag 2O 光催化剂,试验结果表明,Ag 2O 的添加显著提高了g-C 3N 4/Ag 2O 光催化剂的吸光性能和比表面积,因此对光催化性能的提升有促进作用,当Ag 2O 含量为50%时,光催化分解MB 的效果最好,经120min 可见光光照后,MB 的脱除率达到90.8%,高于g-C 3N 4和Ag 2O㊂Kadi 等[58]以Pluronic 31R 1表面活性剂为软模板,以MCM-41为硬模板,合成出具有多孔结构的Ag 2O /g-C 3N 4光催化剂,TEM 结果显示,球形Ag 2O 的纳米颗粒均匀地分布于g-C 3N 4的表面,催化性能评价表明0.9%Ag 2O /g-C 3N 4复合光催化剂光催化效果最佳,60min 能完全氧化降解环丙沙星,其降解效率分别是Ag 2O 和g-C 3N 4的4倍和10倍㊂1.7㊀Ag 2MoO 4/g-C 3N 4二元复合光催化剂Ag 2MoO 4具有良好的导电性㊁抗菌性㊁环保性,以及优良的光催化活性,在荧光材料㊁导电玻璃㊁杀菌剂和催化剂等方面有着广阔的应用前景[59]㊂但Ag 2MoO 4带隙大(3.1eV),仅能对紫外波段光进行响应,限制了其对太阳光的利用㊂当Ag 2MoO 4与g-C 3N 4进行耦合时,可以将其对太阳光的吸收范围由紫外拓展到可见光区,从而提高太阳光的利用率㊂Pandiri 等[60]通过水热合成的方法,制备出β-Ag 2MoO 4/g-C 3N 4异质结光催化剂,SEM 结果显示该催化剂中β-Ag 2MoO 4纳米颗粒均匀地分布在g-C 3N 4纳米片的表面,光催化性能测试结果表明在3h 的可见光照射下,其降解能力是β-Ag 2MoO 4和g-C 3N 4机械混合物的2.6倍,主要原因在于β-Ag 2MoO 4和g-C 3N 4两者界面间形成更为紧密的异质结,使得e -/h +对被快速分离㊂Wu 等[61]采用简单的原位沉淀方法成功构建了Ag 2MoO 4/g-C 3N 4光催化剂,并将其应用于MO㊁BPA 和阿昔洛韦的降解,结果表明该催化剂显示出良好的太阳光催化活性,这主要是因为Ag 2MoO 4和g-C 3N 4界面间存在着一定的协同效应,可有效地提高对太阳光的利用率,降低载流子的复合概率㊂2㊀g-C 3N 4/Ag 基二元复合光催化剂电荷转移机理模型研究g-C 3N 4/Ag 基二元复合光催化剂在可见光的辐照下,价带电子发生跃迁,产生e -/h +对㊂e -被催化剂表面吸附的O 2捕获产生㊃O -2,并进一步与水反应生成㊃OH,形成的三种活性自由基(h +㊁㊃O -2和㊃OH),实现水中有机污染物的高效降解(见图1)㊂而光催化反应机理与载流子的迁移机制密切相关㊂目前,g-C 3N 4/Ag 基二元复合光催化剂体系中主要存在三种不同的光生载流子的转移机制,分别为I 型㊁II 型和Z 型㊂图1㊀g-C 3N 4/Ag 基二元复合光催化剂降解有机污染物的光催化反应机理Fig.1㊀Photocatalytic reaction mechanism of g-C 3N 4/Ag-based binary composite photocatalyst for degradation of organic pollutants3760㊀陶㊀瓷硅酸盐通报㊀㊀㊀㊀㊀㊀第42卷2.1㊀I 型异质结载流子转移机理模型图2(a)为I 型异质结构中的光生e -/h +对转移示意图㊂半导体A 和半导体B 均对可见光有响应,其中,半导体A 的带隙较宽,半导体B 的带隙较窄,并且半导体B 的VB 和CB 均位于半导体A 之间,在可见光的照射下,e -发生跃迁,从CB 到VB,半导体A 的CB 上的e -和VB 上的h +分别向半导体B 的CB 和VB 转移,从而实现了e -/h +对的分离㊂以Ag 2O /g-C 3N 4复合催化剂为例[58],当Ag 2O 和g-C 3N 4相耦合时,因为g-C 3N 4的VB 具有更正的电势,h +被转移到Ag 2O 的VB 上,同时,光激发e -在g-C 3N 4的CB 上,其电势较负,e -便传输到Ag 2O 的CB 上,CB 上e -与O 2结合形成㊃O -2,并进一步与H +结合生成了㊃OH,而有机物污染物被Ag 2O 的价带上h +氧化分解生成CO 2和H 2O㊂2.2㊀II 型异质结载流子转移机理模型II 型异质结是一种能级交错带隙型结构,如图2(b)所示,其中半导体A 的CB 电位较负,在可见光照射下,e -从CB 上转移到半导体B 的CB 上,h +从半导体B 的VB 转移到半导体A 的VB 上,从而使e -/h +对得以分离㊂以Ag 3PO 4@g-C 3N 4为例[62],由于g-C 3N 4的CB 的电势较Ag 3PO 4低,光生e -从g-C 3N 4迁移到Ag 3PO 4的CB 上,而Ag 3PO 4的CB 电势较g-C 3N 4高,h +从Ag 3PO 4的VB 迁移到g-C 3N 4的VB 上,从而实现e -/h +对的分离,g-C 3N 4表面的h +可直接氧化降解MB,而Ag 3PO 4表面积聚的电子又会被氧捕获,产生H 2O 2,并进一步分解成㊃OH,从而加快MB 的降解㊂上述I 型和II 型结构CB 的氧化能力和VB 还原能力低于单一组分,造成复合半导体的氧化还原能力降低[63]㊂2.3㊀Z 型异质结载流子转移机理模型构建Z 型异质结光光催化剂使得e -和h +沿着特有的方向迁移,有效解决复合催化剂氧化还原能力降低问题[64]㊂Z 型异质结催化剂e -/h +对的迁移方向如图2(c)所示,e -从半导体B 的电势较高的CB 转移到半导体A 的电势较低的VB 进行复合,从而实现半导体A 的e -和半导体B 的h +发生分离㊂h +在半导体B 表面氧化性能更强,在半导体A 上e -具有较高还原特性,两者共同作用使环境污染物得以顺利降解㊂为了更好地解释Z 型异质结h +和e -迁移机理,以Ag 3VO 4/g-C 3N 4复合光催化剂为例[48],复合光催化剂经可见光激发后,Ag 3VO 4和g-C 3N 4都发生了e -跃迁,在Ag 3VO 4的CB 上e -与g-C 3N 4的VB 上h +进行复合时,e -对Ag 3VO 4的腐蚀作用被削弱,同时,也实现了g-C 3N 4的CB 上e -和Ag 3PO 4的价带上h +发生分离,g-C 3N 4的CB 上e -具有较强的还原性,将Hg 2+还原成Hg 0,而Ag 3PO 4的VB 上h +具有较强的氧化性,可将HOOH氧化生成CO 2和H 2O㊂图2㊀电子-空穴对转移机理示意图Fig.2㊀Schematic diagrams of electron-hole pairs transfer mechanism 3㊀结语和展望g-C 3N 4/Ag 基二元复合光催化剂因其较强的可见光响应和优异的光催化性能,在环境污染物的降解方面具有广阔的发展空间㊂近年来,国内外研究人员在理论研究㊁制备方法和光催化性能等多个领域取得了重要进展,为光催化理论的发展奠定了坚实的基础㊂然而,g-C 3N 4/Ag 基二元复合光催化剂在实际应用中还面临诸多问题,如制备工艺复杂㊁光腐蚀㊁光催化剂回收利用困难㊁光催化降解污染物的反应机理尚不明确等,第10期柏林洋等:g-C3N4/Ag基二元复合光催化剂降解环境污染物的研究进展3761㊀现有的光催化降解模型仍有较大的分歧,亟待深入研究㊂为了获得性能优良的g-C3N4/Ag基复合光催化剂,实现产业化应用,应进行以下几方面的研究:1)在g-C3N4/Ag基二元光催化剂的基础上,构建多元复合光催化剂,是进一步提升光生载流子分离效率的有效㊁可靠手段,也是当今和今后光催化剂的研究重点㊂2)对g-C3N4/Ag基二元光催化剂体系中e-/h+对的转移㊁分离和复合等过程进行系统研究,并阐明其光催化反应机制㊂3)针对当前合成的g-C3N4材料多为体相,存在着颗粒大㊁比表面积小㊁活性位少等缺陷,应通过对g-C3N4材料的形状㊁形貌及尺寸的调控,来实现Ag 基材料在g-C3N4材料表面的均匀分布,降低e-/h+对的重组概率,从而大幅度提高复合光催化剂的性能㊂4)Ag基材料的光腐蚀是导致光催化活性和稳定性下降的重要因素,探索一种更为有效的光腐蚀抑制机制,是将其推广应用的关键㊂5)当前合成的g-C3N4/Ag基二元复合光催化剂多为粉末状,存在着易团聚㊁难回收等问题,从而限制了其循环利用㊂因此,需要开展g-C3N4/Ag基二元复合光催化剂回收和再利用的研究,这将有利于社会效益和经济效益的提高㊂参考文献[1]㊀LIN Z S,DONG C C,MU W,et al.Degradation of Rhodamine B in the photocatalytic reactor containing TiO2nanotube arrays coupled withnanobubbles[J].Advanced Sensor and Energy Materials,2023,2(2):100054.[2]㊀DIAO Z H,JIN J C,ZOU M Y,et al.Simultaneous degradation of amoxicillin and norfloxacin by TiO2@nZVI composites coupling withpersulfate:synergistic effect,products and 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Digital Radio Receiver Copyright © 2015 by Silicon Laboratories 3.3.2015DescriptionThe Si4629 single-chip digital receiver is a 100% CMOS digital radio broadcast receiver IC from Silicon Labs. It provides significant advances in size, power consumption, and performance to enable HD Radio/DAB/DAB+ services reception in automotive infotainment systems and car radios.The Si4629 data receiver offers a complete and cost-effective platform to support global analog and digital AM, FM, and VHF band III radio standards by integrating multiband RF tuner, demodulator, and channel decoder on a single die. The high level of integration and complete system production test simplifies design-in, increases system quality, and improves reliability and manufacturability.The Si4629 supports worldwide analog AM and FM radio reception and incorporates a fully integrated decoder for the European Radio Data System (RDS) and the North American Radio Broadcast Data System (RDBS), including all required symbol decoding, block synchronization, error detection, and error correction functions.Leveraging Silicon Laboratories' proven and patented digital low intermediate frequency (Low-IF) receiver architecture, the Si4629 delivers superior RF performance and interference rejection. The solution offers auto-calibrated digital tuning, and proven AM/FM seek Features-Worldwide FM band support (76–108 MHz)-Worldwide AM band support (520–1710 kHz)-LW band support (144–288 kHz)-DAB/DAB+ Band III support (168–240 MHz)-Advanced RDS/RDBS decoder -AM/FM HD Radio™ support -Integrated HD blend-Supports WorldDMB Receiver Profiles I, II, III, and IV -Integrated SRAM supporting time and frequency de-interleaving-Advanced seek functionality-Complete on-chip channel decode-Full range of analog and digital signal quality metrics -Fully-integrated VCO/PLL/synthesizer-Fully-integrated advanced AGC and alignment -SPI, I 2C control interfaces -7x7 mm 48-pin QFN package -Pb-free/RoHS compliant -AEC-Q100 qualifiedApplications-OEM automotive infotainment systems -Aftermarket car radio systems-OEM automotive PND docking systemsSelected Electrical SpecificationsParameter Symbol Test Condition Min Typ Max UnitAM Input Frequency F rf520—1710kHzFM Input Frequency F rf76—108MHz DAB Input Frequency168—240MHz Analog Supply Voltage V A— 1.71 1.8 2.0V Interface Supply Voltage V IO— 1.62 1.8 3.6V Core Digital Supply Voltage V CORE— 1.62 1.8 2.0V Memory Supply Voltage V MEM— 1.62 1.8 2.0VDimension Min Nom MaxA0.800.850.90A10.000.020.05b0.180.250.30D7.00BSCD2 5.20 5.30 5.40e0.50BSCE7.00BSCE2 5.20 5.30 5.40L0.300.400.50aaa0.15bbb0.10ddd0.05eee0.08Notes:1.All dimensions are shown in millimeters (mm) unless otherwise noted.2. Dimensioning and Tolerancing per ASME Y14.5M-1994.3. This drawing conforms to the JEDEC Solid State Outline MO-220, Variation VKKD-4.4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.Digital Radio Receiver Copyright © 2015 by Silicon Laboratories 3.3.2015 Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders。
刘树萍,邢珂,韩博林,等. 电致化学发光传感技术的种类及在食品分析中的研究进展[J]. 食品工业科技,2024,45(1):325−334.doi: 10.13386/j.issn1002-0306.2022110292LIU Shuping, XING Ke, HAN Bolin, et al. Types of Electrochemiluminescence Sensing Techniques and Research Progress in Food Analysis[J]. Science and Technology of Food Industry, 2024, 45(1): 325−334. (in Chinese with English abstract). doi:10.13386/j.issn1002-0306.2022110292· 专题综述 ·电致化学发光传感技术的种类及在食品分析中的研究进展刘树萍1, *,邢 珂2,韩博林2,关桦楠2,*(1.哈尔滨商业大学旅游烹饪学院,黑龙江哈尔滨 150028;2.哈尔滨商业大学食品工程学院,黑龙江哈尔滨 150028)摘 要:电致化学发光传感技术(Electrochemiluminescence ,ECL )是一种结合了电化学和光化学的分析方法,因其可控性强、灵敏度高和响应速度快等优势在食品分析领域引起了广泛关注。
ECL 是通过改变发射物或共反应物的浓度,使其信号强度发生变化,从而实现对目标物质的灵敏检测。
首先,该文总结了经典ECL 检测体系及基于新型发射物和共反应物的检测体系,并重点介绍了新型发射物中金属纳米团簇和量子点的最新进展,举例阐述其ECL 传感器的结构和检测原理。
其次,综述了ECL 传感器在食品分析领域中的研究进展。
最后对ECL 传感技术的未来发展趋势进行了展望,为食品中营养成分和污染物的检测提供参考,同时也促进该技术的进一步研究,助力未来食品检测发展。
二维钙钛矿dh 能级science nature 2021 -回复二维钙钛矿(二维Cesium Lead Iodide Perovskite)是一种具有强大光电性能的新型材料,其能级结构的性质与功能已成为科学家们关注的焦点之一。
近期,一项关于二维钙钛矿能级结构的研究成果在《Science》和《Nature》等顶级科学期刊上发表,为我们对该材料的了解和应用提供了重要的参考。
首先,二维钙钛矿的能级结构是什么?二维钙钛矿由钙、铯、铅和碘等元素组成,具有具有较大的光吸收系数、高载流子迁移率和较长的载流子寿命等特点。
在过去的研究中,科学家们通过实验和理论模拟等方法发现,二维钙钛矿的能级结构是由价带和导带组成的带隙形成的。
然而,具体的能级位置和能带形状如何,科学家们对此知之甚少。
因此,这项最新的研究旨在通过实验和计算两个方面的探索,揭示二维钙钛矿的能级结构并揭示其内在的光电转换机理。
这项研究首次成功合成了大尺寸二维钙钛矿晶体,并通过光电子能谱、拉曼光谱和电子传输测量等手段对其进行了表征。
在光电子能谱测量中,科学家们使用了高分辨率的能量分辨率光电子能谱仪对二维钙钛矿样品进行了测试。
通过观察样品的电子能谱分布和峰值位置,他们成功地量化了钙钛矿的价带和导带能级位置,并确定了带隙的大小。
实验结果表明,二维钙钛矿的带隙较宽,与其优良的光吸收性能相符。
为了更加深入地理解二维钙钛矿的能级结构,科学家们还运用密度泛函理论(DFT)等计算方法,从理论上预测和解释了实验观测到的能级结构。
通过模拟计算,他们得出了二维钙钛矿的电子结构和能带图,并与实验结果进行了对比。
这一研究揭示了二维钙钛矿的能态分布和能带形状,进一步验证了实验观测结果。
此外,研究团队还探究了二维钙钛矿的光电转换机理。
他们利用拉曼光谱技术研究了钙钛矿的晶格振动模式,发现能级结构与光激发和载流子传输之间存在着密切的联系。
这一发现为二维钙钛矿的光电转换机理提供了有力的证据,可能促进相关光伏材料的设计和应用。
Fields of Advanced DifficultyPractical1. Synthetic techniques: filtration, recrystallisation, drying of precipitates, thin layer chromatography.2. Use of a simple digital conductivity meter.SafetyThe participants of the Olympiad must be prepared to work in a chemical laboratory and be aware of the necessary rules and safety procedures. The organizers will enforce the safety rules given in Appendix A of the IChO Regulations during the Olympiad.The Preparatory Problems are designed to be carried out only in properly equipped chemical laboratories under competent supervision. We did not include specific and detailed safety and disposal instructions as regulations are different in each country. Mentors must carefully adapt the problems accordingly.The safety (S) and risk (R) phrases associated with the materials used are indicated in the problems. See the Appendix B of the Regulations for the meaning of the phrases. The Regulations are available on our website.Materials marked with a dagger, †, will not be used at the Olympiad.Practical problemsProblem P1 The preparation and analysis of polyiodide saltsThe propensity for iodine to catenate is well illustrated by the numerous polyiodides, which crystallise from solutions containing iodide ions and iodine. The stoichiometryof the crystals and the detailed geometry of the polyhalide depend very sensitively on the relative concentrations of the components and the nature of the cation.In this experiment, you will generate and crystallise a quaternary ammonium polyiodide salt of the form Me4N+I n– (n = 3, 5 or 7) and then titrate the amount of iodine in the anion using sodium thiosulphate. From the results of this analysis, you can determine which anion is present in your salt.ExperimentalTwo salts, A and B, of different composition may be prepared by using different quantities of starting materials, as shown below. You can carry out the experimentfor either one or both.Salt A Salt Bmass of NMe4I / g 1.00 0.50mass of iodine / g 1.26 1.26 Preparation1. Add the iodine to a 100 cm3 beaker containing 25 cm3 ethanol and a magnetic bar. Heat and stir the solution until all the iodine has dissolved, then add the tetramethylammonium iodide. Continue to stir with moderate heating until no white solid remains. Do not allow the solution to boil at any time.2. Allow the solution to cool slowly to room temperature and finally in an ice bathover about 15 – 20 minutes.3. Collect the product under suction (Hirsch funnel) and wash on the filter with cold ethanol (10 cm3) followed by ether (10 cm3) using a disposable pipette.4. Allow the product to dry on the filter for several minutes, and then transfer the crystals onto a filter paper. Place into a desiccator and leave under vacuum to dry.Analysis5. Weigh approximately 0.5g of the product onto a weighing boat using a four decimal place balance. Record the weight accurately.6. Using a distilled water wash-bottle, carefully transfer all the weighed product into a 250 cm3 bottle.7. Add approximately 25 cm3 of dichloromethane, replace the stopper and shake to extract the iodine into the organic layer.8. Fill a 50 cm3 burette with sodium thiosulfate (0.100M) using a small glass funnel.9. Remove the funnel and titrate the iodine by running small quantities of the sodium thiosulfate from the burette and then replacing the stopper and shaking the bottle.10. The end-point is very sharp and is given by the removal of all iodine colour from the dichloromethane.QuestionsFrom the results of the titrations, calculate the formulae of the salts A and B. What are the shapes of the anions?Substance R phrases S phrasestetramethylammoniumsolid 36/37/38 26-36 iodideiodine solid 20/21-50 23-25-61 sodium thiosulfate 0.1 M solution 36/37/38 24/25 dichloromethane liquid 40 23-24/25-36/37Problem P2 The Williamson Synthesis of EthersSymmetrical aliphatic ethers may be prepared from the simpler primary andsecondary alcohols by heating with sulphuric acid, but dehydration to the alkene is an important competing reaction. The sulphuric acid process is unsuited to the preparation of ethers from tertiary alcohols and of unsymmetrical ethers.The Williamson synthesis, using an alkyl halide and a metal alkoxide, is of broader scope and can be used to obtain symmetrical or unsymmetrical ethers. For the latter type, either of two combinations of reactants is possible.The proper choice depends mainly upon the structure of the alkyl halides involved. Competition arises between the substitution reaction (S N 2) to an ether ( 1° > 2° >> 3° halides ) and the elimination of HX to form an alkene ( 3° >> 2° > 1° halides ). Therefore 3° halides are not suitable for the reaction, but ethers having a 3° alkyl group can be prepared from a 3° alkoxide and a 1° halide.The Williamson synthesis is an excellent method for the preparation of alkylaryl ethers – 1° and 2° alkyl halides react readily with sodium or potassium phenoxides. In this experiment benzyl chloride is reacted with 4-chlorophenol under basic conditions to produce an ether.The use of a fume cupboard protective clothing including gloves is essential for this experiment.+HO Cl Ph Cl O Ph KOHExperimentalAdd absolute ethanol (50 cm 3) to potassium hydroxide pellets (0.87g) in a 100 cm 3 round bottomed flask with a ground-glass joint.Add 4-Chlorophenol (2g) followed by benzyl chloride (1.8 cm 3) and lithium iodide (approx. 20 mg - the end of a micro-spatula).Add a boiling stick, fit the flask with a condenser and heat under gentle reflux for 1 hour (an isomantle is recommended but keep careful control of the heating to maintain gentle reflux otherwise vigorous bumping can occur).Allow the reaction mixture to cool and pour onto ice/water (150 cm 3) with swirling.Isolate the crude product by suction filtration and wash with ice-cold water (3 x 10 cm3). Press dry on the filter.The crude product should be recrystallised from aqueous ethanol. This entails dissolving your compound in the minimum volume of boiling ethanol and then adding water dropwise until the first crystals appear. Then set the hot solution aside to cool in the usual manner.Record the yield of your product and run a thin layer chromatogram on a silica plate using ether/petroleum ether 2:8 as the eluent. Record the R f value. Measure and record the m.p.Questions1. What is the role of the lithium iodide added to the reaction mixture?2. Substantial increases in the rate of reaction are often observed if S N2 reactions are carried out in solvents such as dimethylformamide (DMF) or dimethylsulphoxide (DMSO). Suggest why this is so.Substance R phrases S phrasesbenzyl chloride †liquid 45-22-23-37/38-48/22-4153-454-chlorophenol solid 20/21/22-51/53 28-61 potassium hydroxide solid 22-34-35 26-36/37/39-45lithium iodide solid 36/37/38-61 22-26-45-36/37/39-53diethyl ether liquid 12-19-66-67 9-16-29-33 petroleum ether †liquid 45-22 53-45 † This compound will not be used at the OlympiadProblem P3 Selective Reduction of a Highly Unsaturated ImineSodium borohydride is a selective reducing agent. In this experiment you will condense 3-nitroaniline with cinnamaldehyde to produce the highly unsaturated intermediate A (an imine). This is then selectively reduced with sodium borohydride to produce B. The structure of B can be deduced from the 1H NMR spectrum.CHO+NO2H2N4BN NO2AThe experiment illustrates the classic method of imine formation (azeotropic removal of water).Experimentalbottomed flask, together with a few anti-bumping granules. Set up the flask fordistillation as shown above using an isomantle or steam bath as the heat source. Use a graduated measuring cylinder to collect the distillate.Add dropwise a solution of cinnamaldehyde (2.9 g) in absolute ethanol (5 cm3) through the thermometer inlet. Turn on the heat source and distil off approx. 22 cm3 of solvent over a period of about 30 minutes. During the distillation dissolve with stirring sodium borohydride (0.76 g) in 95% ethanol (20 cm3).After the 22 cm3 of solvent has distilled off, disconnect the apparatus. Set aside a small sample of the residue A which remains in the flask for thin layer chromatography. Then add 95 % ethanol (20 cm3) to the flask to dissolve the remaining residue. To this solution of A add VERY CAREFULLY the sodium borohydride solution. This must be added slowly and with constant swirling of the reaction flask (vigorous effervescence occurs). After the addition, heat the mixture under reflux for 15 minutes, then cool the flask and pour the contents into water (50 cm3). The product B, should crystallise out slowly on standing in an ice bath. Recrystallise your product from 95% ethanol.Record the yield of your product. Run a thin layer chromatogram of your product B and the sample of A on a silica plate using hexane/ethyl acetate 1:1 as the eluent. Record the R f value of each. Measure and record the m.p. of B. Predict the structure of B using the 1H NMR spectrum given below.QuestionsIn the preparation of A why is absolute ethanol and not 95% used? Why is the solvent removed during the reaction? SubstanceR phrases S phrases 3-nitroanilinesolid 33-23/24/25-52/53 28-45-36/37-61 cinnamaldehyde liquid 41 26-39sodium borohydride solid 25-34-43 26-27-28-45-36/37/39hexane liquid 11-38-48/20-51/53-62-65-67 9-16-29-33-36/37-61-62ethyl acetate liquid11-36-66-67 16-26-33 Problem P4 A Simple Aldol CodensationThe Claisen-Schmidt reaction involves the synthesis of an α,β-unsaturated ketone by the condensation of an aromatic aldehyde with a ketone. The aromatic aldehyde possesses no hydrogens α-to the carbonyl group, it cannot therefore undergo self condensation but reacts rapidly with the ketone present.The initial aldol adduct cannot be isolated as it dehydrates readily under the reaction conditions to give an α,β-unsaturated ketone. This unsaturated ketone also possesses activated hydrogens α-to a carbonyl group and may condense with another molecule of the aldehyde.+NaOH Product XO OIn this experiment you will carry out the base catalysed aldol condensation of p -tolualdehyde with acetone. The product will be purified by recrystallisation and itsstructure determined using the spectra provided.ExperimentalDissolve p-tolualdehyde (2.5 cm3) and acetone (1 cm3) in ethanol (25 cm3) contained in a stoppered flask. Add bench sodium hydroxide solution (5 cm3of aqueous 10%) and water (20 cm3). Stopper the flask and shake it for 10 minutes, releasing the pressure from time to time. Allow the reaction mixture to stand for 5-10 minutes with occasional shaking and then cool in an ice bath. Collect the product by suction filtration, wash it well on the filter with cold water and recrystallise from ethanol.Record the yield of your product. Run a thin layer chromatogram on a silica plate using ether/petroleum ether 2:8 as the eluent and record the R f value of the product. Measure and record the m.p. of X.Elemental analysis of X reveals it to have 88.99% carbon and 6.92% hydrogen. Use this information together with the NMR spectra to suggest a structure for X.Substance R phrases S phrasesp-tolualdehyde solid 22-36/37/38 26-36 acetone liquid 11-36-66-67 9-16-26 sodium hydroxide 10% aq. solution 36/38 26 diethyl ether liquid 12-19-66-67 9-16-29-33 petroleum ether †liquid 45-22 53-45† This compound will not be used at the OlympiadProblem P5 The Menshutkin ReactionThe nucleophilic substitution reaction between a tertiary amine and an alkyl halide is known as the Menshutkin reaction. This experiment investigates the rate law for the reaction between the amine known as DABCO (1,4-diazabicylo[2.2.2]octane) and benzyl bromide:N NPh Br NNBr+ +DABCOIt is possible for the second nitrogen in the DABCO molecule to react with a second benzyl bromide. However, in this experiment the DABCO will always be in excess so further reaction is unlikely. The reaction could proceed by either the S N1 or the S N2 mechanism. In this experiment, you will confirm that the order with respect to benzyl bromide is 1 and determine the order with respect to DABCO. This should enable you to distinguish between the two possible mechanisms.As the reaction proceeds neutral species, DABCO and benzyl bromide, are replaced by charged species, the quaternary ammonium ion and Br–. Therefore the electrical conductivity of the reaction mixture increases as the reaction proceeds and so the progress of the reaction can be followed by measuring the electricalconductivity as a function of time. Benzyl bromide is a lacrymator. This experiment should be performed in a fume cupboard.The Method in Principle The rate law for the reaction can be written asα]RBr][DABCO [d ]d[Br -k t = [1]where we have assumed that the order with respect to the benzyl bromide, RBr, is 1 and the order with respect to DABCO is α.In the experiment, the concentration of DABCO is in excess and so does not change significantly during the course of the reaction. The term α[DABCO]k on the right-hand side of Eqn. [1] is thus effectively a constant and so the rate law can be writtenRBr][d ]d[Br app -k t = where α[DABCO]app k k = [2]k app is the apparent first order rate constant under these conditions; it is not really a rate "constant", as it depends on the concentration of DABCO.To find the order with respect to DABCO we measure k app for reactionmixtures with different excess concentrations of DABCO. From Eqn. [2], and taking logs, we findDABCO]ln[ln ln app α+=k k [3]So a plot of ln k app against ln [DABCO] should give a straight line of slope α. k app may be found by measuring the conductance at time t , G (t ), and at time infinity, G ∞. In the supplementary material it is shown that a graph of ln[G ∞ –G (t )] against t should be a straight line with slope k app.In practice it is rather inconvenient to measure conductance at time infinity but this can be avoided by analysing the data using the Guggenheim method. In this method each reading of the conductance at time t , is paired up with another at time t + ∆, G (t +∆), where ∆ is a fixed time interval that needs to be at least a half-life. As shown in the supplementary material, a plot of ln[G (t +∆)–G (t )] against time should be a straight line of slope –k app . For example, suppose we take measurements at fixed regular intervals, say each 30 s and choose an appropriate value of ∆, say 3minutes (180 s). The plot made is of the points {x,y} = {0, ln[G(180)-G(0)]},{30, ln[G(210)-G(30)]}, {60, ln[G(240)-G(60)]}, ...The ApparatusCheap conductivity meters are commercially available, for example the Primo5 conductivity stick meter from Hanna instruments works well with this practical. These simply dip into the solution and the conductance of the solution can be read off the digital display./product/PRIMO5-Conductivity-stick-meter/PRIMO5/ ProcedureYou are provided with the following solutions, all in ethanol: 0.15, 0.20 and 0.25mol dm–3 DABCO, and approx. 0.6 mol dm–3 benzyl bromide (this must be freshly made up). You should measure k app for each of these solutions by measuring the conductance as a function of time and then analysing the data using the Guggenheim method. From the three values of k app, the order with respect to DABCO can be found by plotting ln k app against ln [DABCO], as shown by Eqn. [3]. Ideally we ought to keep the reagents and the reaction mixture in a thermostat. However, as the heat evolved is rather small, the temperature will remain sufficiently constant for our purposes.Kinetic Runs1. Rinse the conductivity dipping electrode with ethanol from a wash bottle, catching the waste in a beaker. Allow the excess ethanol to drain off and gently dry the electrode with tissue.2. Transfer 10 cm3 of the DABCO solution to a clean dry boiling tube.3. Add 100 l of the benzyl bromide solution.4. Insert and withdraw the dipping electrode of the conductance meter a few times in order to mix the solution and then, with the electrode in place, start the stop-watch.5. Record the conductance at 30 second intervals (it is essential to make the measurements at regular intervals), starting with the first reading at 30 seconds and continuing until there is no further significant change in the conductance, or for 10 minutes, whichever is the shorter time.6. From time to time, gently lift the electrode in and out so as to stir the solution.7. Once the measurements have been made, remove the electrode, discard the solution and clean the electrode as in step 1.8. Make the measurements for the 0.15 mol dm –3 solution of DABCO, and then for the 0.20 and 0.25 mol dm –3 solutions.Data AnalysisFor each run determine k app using the Guggenheim method – three minutes is about right for the fixed interval ∆. Then plot ln k app against ln [DABCO] and hence determine the order with respect to DABCO. SubstanceR phrases S phrases DABCO 0.15, 0.20 and 0.25 Msolutions in ethanol11-22-36/37/38 26-37 benzyl bromide 0.6 M solution inethanol 36/37/38 26-39Supplementary informationThe key to this experiment is how to use the measured conductance of the reaction mixture to determine the first order rate constant, k app . The first stage is simply to integrate the rate law; to do this we note that for each benzyl bromide molecule that reacts one bromide ion is generated so that at any time [Br –] = [RBr]init – [RBr], where[RBr]init is the initial concentration of benzyl bromide. Thus the rate equation can be written in terms of [Br –] by putting [RBr] = [RBr]init – [Br –]; integration is then straightforward:()()⎰⎰=--=t k k t d ]Br [RBr][]d[Br ]Br [RBr][d ]d[Br app -init --init app - i.e. ()const. ]Br [RBr][ln app -init +=--t kThe constant can be found by saying that at time zero, [Br –] = 0, hence ()const. RBr][ln init =-hence ()()init app -init RBr][ln ]Br [RBr][ln -=--t kwhich can be written ()]exp[1RBr][]Br [app init -t k --= [4]When the reaction has gone to completion, at time infinity, the concentration of bromide is equal to the initial concentration of RBr so Eqn. [4] can be written()]exp[1]Br []Br [app --t k --=∞ [5]where ∞]Br [- is the concentration of Br – at time infinity. Equation [5] says that the concentration of Br – approaches a limiting value of ∞]Br [- with an exponential law.A similar relationship can be written for the other product, the quaternary ammonium ion, whose concentration will be written ]Br R [4+.()]exp[1]Br R []Br R [app 44t k --=∞++ [6]We will assume that the conductance of the reaction mixture, G , is proportional to the concentration of the charged species present:]N R []Br [4N R -Br 4-+++=λλGwhere λ are simply the constants of proportionality.Using Eqns. [5] and [6] to substitute for the concentration of Br – and R 4N + we find(){}(){}()()()[7]]exp[1 ]exp[1]Br R [][Br ]exp[1]Br R []exp[1]Br [app app 4N R Br app 4N Rapp Br 4-4-t k G t k t k t k G --=--+-=--+---=∞∞+∞∞+∞++λλλλ where we have recognised that()∞+∞++-]Br R [][Br 4N R Br 4-λλ is the conductance at time infinity, G ∞.Equation [7] can be rearranged to give a straight line plot:]exp[1app t k G G -=-∞t k G G app 1ln -=⎪⎪⎭⎫ ⎝⎛-∞ or t k G G G app ln -=⎪⎪⎭⎫ ⎝⎛-∞∞or ()∞∞+-=-G t k G G ln ln appHence a plot of ()G G -∞ln against t should be a straight line with slope k app . The Guggenheim MethodFrom Eqn. [9] the conductance at time t , G (t ), can be written()]exp[1)(t k G t G app --=∞At some time (t + ∆) later the conductance is G (t + ∆)())](exp[1)(∆+--=∆+∞t k G t G appThe difference G (t + ∆) – G (t ) is()]exp[1)](exp[1)()(t k t k G t G t G app app -+-∆+--=-∆+∞())](exp[]exp[∆+---=∞t k t k G app app ()]exp[1]exp[∆---=∞app app k t k G Taking logarithms of both sides gives, from the last line,()()]exp[1ln ln )()(ln ∆--+-=-∆+∞app app k t k G t G t GThis implies that a plot of ())()(ln t G t G -∆+ against time should be a straight line of slope –k app ; to make this plot there is no need to know the value of the conductance atinfinite time, G ∞, and this is the main advantage of the Guggenheim method.。
A Highly Digital VCO-Based ADC Architecture forCurrent Sensing ApplicationsPraveen Prabha,Member,IEEE,Seong Joong Kim,Student Member,IEEE,Karthikeyan Reddy,Sachin Rao,Member,IEEE,Nathanael Griesert,Arun Rao,Greg Winter,and Pavan Kumar Hanumolu,Senior Member,IEEEAbstract—This paper presents a voltage-controlled oscillator (VCO)based current to digital converter for sensor readout applications.Second order noise shaping of the quantization error is achieved by using implicit capacitance of the sensor to realize a passive integrator and a VCO-based quantizer.The non-linearity in voltage to frequency conversion of the VCO is tackled by placing the VCO in a loop consisting of a simple digital IIRfilter and a passive integrator.The IIRfilter provides large gain within the signal bandwidth and suppresses VCO input swing.As a result,non-linearity of the VCO is not exercised,thus greatly improving the proposed architecture's immunity to VCO nonlinearity.The use of a digitalfilter instead of an analog loop filter eases the design and makes it scaling friendly.Designed for an ambient light sensor application,the proposed circuit achieves 900pA accuracy over an input current range of4 A.Fabricated in a0.18m CMOS process,the readout circuit consumes a total of77.8A current,and occupies an active area of0.36mm. Index Terms—VCO based ADC,time based ADC,analog-to-dig-ital conversion,current sensor,delta-sigma modulation,digital readout circuits,ambient light sensor,sensor applications.I.I NTRODUCTIONM ONOLITHIC current sensorsfind many applications in image sensing[1],biomedical[2],[3]and automotive applications.Consequently,power efficient sensor interface cir-cuits have gained prominence in recent years.In addition,ar-chitectures that are suitable for implementation in highly-scaled CMOS logic processes are also advantageous.The focus of this paper is the design of a power efficient current sensing readout using mostly digital circuits.A typical current sensing system consists of a sensor element that produces an output current proportional to the sensed quan-tity followed by a current(or voltage)to digital converter.Be-cause sensor output is a analog signal,current(voltage)to dig-Manuscript received December08,2014;revised February10,2015; accepted March06,2015.This paper was approved by Guest Editor Andrea Mazzanti.This work was supported in part by Texas Instruments and Systems on Nanoscale Information fabriCs(SONIC),one of the six SRC STARnet Centers,sponsored by MARCO and DARPA.P.Prabha was with Oregon State University,Corvallis,OR97331USA,and is now with Broadcom,Irvine,CA92619USA(e-mail:prabha.praveen@gmail. com).S.J.Kim and P.K.Hanumolu are with the University of Illinois at Urbana-Champaign,Urbana,IL61801USA.K.Reddy is with Linear Technology,Milpitas,CA95035USA.S.Rao is with Qualcomm,Santa Clara,CA95051USA.N.Griesert,A.Rao,and G.Winter are with Texas Instruments Inc.,Grass Valley,CA95945USA.Digital Object Identifier10.1109/JSSC.2015.2414428ital converter is more generally represented as a analog to digital converter(ADC).ADC output is typically further processed by a digital signal processor before acting on the information gath-ered by the sensor.Several techniques were proposed to effi-ciently convert sensor information to digital output and they are summarized in Fig.1.In the trans-impedance amplifier(TIA)based architecture[4], [5]shown in Fig.1(a),TIA converts input current to output voltage,which is digitized using an ADC.Intrinsic ca-pacitance associated with the sensor is shown as and a feed-back capacitor,,is used tofilter noise at high frequencies. In addition to linearizing current-to-voltage conversion,opamp also helps bias the sensor by forcing the sensor node voltage, ,to the desired reference voltage,.While a TIA-based interface is simple to implement,it needs a large feedback re-sistor for sensing low current levels,an amplifier with stringent stability,noise,and accuracy requirements,and a high resolu-tion voltage-domain ADC.In the second approach,sensor current is converted into a frequency output followed by a frequency to digital converter (FDC)[6].Such an architecture is known as pulse frequency modulation(PFM)since the output frequency is modulated by the input signal[7].Circuit implementing PFM consists of a self-resetting comparator that produces a pulse waveform whose frequency is proportional to the input current(see Fig.1(b)).Output frequency is measured using the FDC,which can be implemented using a simple counter that is reset atfixed time intervals.The operation of the PFM is as follows.During the reset phase,comparator input voltage,,is reset to a known voltage(usually to supply voltage,).Once the reset switch,implemented by transistor,,turns off,node voltage gets discharged by the input current till it reaches. The time to discharge is inversely proportional to the input current.Once crosses,comparator output changes polarity and transistor,resets again.This self-resetting process results in an oscillatory output whose frequency,, can be calculated to be:(1) where is the turn-off time of comparator output,which includes comparator and reset switch delay.As seen from(1), output frequency is directly proportional to input current,, for small turn-off times.Current to frequency conversion gain0018-9200©2015IEEE.Personal use is permitted,but republication/redistribution requires IEEE permission.See /publications_standards/publications/rights/index.html for more information.Fig.1.Prior-art current sensing ADC architectures:(a)Trans-impedance amplifier based ADC.(b)Pulse frequency modulation based ADC.(c)Dual slope ADC.is determined by reset voltage,,bias voltage,,and the sensor capacitance,.A major drawback of this approach is the non-linearity caused by non-zero reset time due tofinite comparator and reset switch delay[6].In addition,based on the voltage coefficient of sensor capacitance,,ripple on sensor node voltage can cause large variations in. This in turn changes the conversion gain as a function of input current and appears as non-linearity of the current to frequency transfer characteristic.The third and perhaps most popular technique is using a dual slope ADC architecture[8]–[10]depicted in Fig.1(c).It oper-ates in two phases.In thefirst phase,sensor output current is integrated for afixed number of clock cycles(amounting to a duration of).In the second phase,integrated output voltage is discharged using afixed reference current until comparator output changes polarity.The number of clock cycles counted in the second phase(amounting to a duration of)is related to the input signal as[11](2) In practice,errors such as capacitor leakage,charge injec-tion,and non-linearity of opamp and capacitor also greatly ef-fect conversion accuracy.The value of integration capacitance is based on the desired input current range,clock frequency,and dynamic range.Incremental data converter(IDC)[12]is another architec-ture suitable for low-bandwidth high resolution applications. An IDC is essentially a discrete time delta-sigma ADC that is reset periodically to perform sample-by-sample conversion. Since memory isflushed out after a reset period,they can be multiplexed easily with many channels.However,they have lower signal to quantization noise ratio(SQNR)and higher con-version time than their delta sigma counterparts.This is usu-ally tackled by using either a higher order modulator[13]or a two-step architecture[14].Because of low signal bandwidth, IDC performance is often limited byflicker noise.Techniques such as chopper stabilization are used to reduce inputflicker noise but they are difficult to implement for an IDC since it has a TIA-based front end circuit.In contrast to the prior art that requires precision analog circuitry,we consider the use of voltage-controlled oscilla-tors(VCO)implemented using CMOS inverter-based ring oscillators to perform accurate current to digital conversion. VCO based ADCs also referred to as VCO quantizers(VCOQ) have recently emerged as an attractive alternative for classical voltage,current or charge-based analog to digital converters [15]–[17].Implemented using mostly digital circuits,they achievefirst order noise shaping without using feedback and provide inherent anti-aliasing[18].However,their performance is severely limited by the non-linearity of VCO's voltage-to-fre-quency(V-to-F)transfer characteristic.This paper presents a current sensing VCO based ADC architecture[19]that uses synthesized digital logic to tackle V-to-F non-linearity.De-signed for an ambient light sensor application,the prototype achieves900pA accuracy for an input current range of4A while consuming77.8A quiescent current.The rest of the paper is organized as follows.Section II pro-vides a brief overview of VCO based ADCs and discusses existing analog techniques to tackle V-to-F non-linearity. Proposed architecture is presented in Section III and circuit design details are discussed in Section IV.Measured results are provided in Section V and conclusions are drawn in Section VI.II.VCO B ASED S ENSOR R EADOUTFig.2shows one possible realization of the sensor readout circuit using a VCO based ADC.Analogous to the PFM type readout architecture in Fig.1(b),the sensor output voltage,, is converted to frequency,,by a VCO and digitized using an FDC.An FDC is most commonly implemented using a set offlip-flops and an XOR gate as shown in Fig.2.Flip-flop FF1 acting as a phase detector samples and quantizes VCO output phase at a sampling rate of,while FF2and XOR gate per-form digital differentiation of the quantized VCO phase to gen-erate digital output.Because phase detection range of FF1isPRABHA et al.:A HIGHLY DIGITAL VCO-BASED ADC ARCHITECTURE FOR CURRENT SENSING APPLICATIONS3Fig.2.Possible realization of sensor readout circuit using a VCO basedADC.Fig.3.Equivalent block diagram of VCOQ.limited to to prevent overloading of FF1[20].The behavior of VCOQ is captured by its equivalent block diagram shown in Fig.3[21].Since VCO integrates phase con-tinuously (phase is the time integral of frequency),it is rep-resented as a continuous time phase integrator with a gain of[Hz/V].FDC is modeled as a phase quantizer followed by a digital differentiator.VCO output phase is quantized at a fixed sampling rate,,and phase quantization error (intro-duced by FF1in Fig.2)is denoted by .Because is filtered by the digital differentiator,it gets first order noise shaped by the noise transfer function,NTF,given by(3)For input frequencies much smaller than the sampling rate,digital differentiator performs the inverse operation of continuous-time integration.Thus,the signal transfer func-tion (STF)is just a gain at low frequencies.In addition to exhibiting noise shaping,a VCO-based ADC provides inherent anti-aliasing since the signal gets filtered by a continuous time integrator prior to the sampling operation [22].A.Non-Linearity of VCOQSo far we have assumed that the VCO frequency is linearly dependent on input voltage.However,in practice,V-to-F char-acteristic of the VCO is highly non-linear [23],which severely limits the performance of VCOQ.Transistor level simulations indicate that at best 6bit linearity can be achieved.Fig.4quan-tifies the effect of VCO non-linearity on the proposed readout circuit.The simulated V-to-F characteristic of a current con-trolled ring oscillator VCO is shown in Fig.4(a).For small con-trol voltage variation,V-to-F characteristic appears relatively linear but it becomes grossly non-linear at larger control volt-ages.As illustrated by the simulated spectrum (see Fig.4(b))of the VCOQ output,V-to-F non-linearity limits the spurious freedynamic range (SFDR)to about 32dB.In a DC sensing appli-cation,this non-linearity manifests as deviation from the ideal DC transfer characteristic (input vs.output)and worsens the in-tegral non-linearity (INL).Many of the recent research efforts on VCO based ADCs are therefore focused on reducing the impact of V-to-F non-lin-earity on ADC performance.In [21],[24],[25],VCOQ is em-bedded in a feedback loop as shown in Fig.5and a high gain loop filter was used to suppress non-linearity to the extent of filter gain in the signal bandwidth.To better understand the im-pact of feedback on non-linearity suppression,it is instructive to evaluate input voltage swing of the VCOQ,:(4)where,and represent the transfer function of the loop filter,and gain of VCOQ,and DAC,respec-tively.Since loop gain is designed to be very large,(5)Equation (5)shows that the VCOQ input swing is not affected by the gain of loop filter but is only suppressed by the product of VCOQ and DAC gains.Therefore,the loop filter suppresses non-linearity not by reducing input swing of VCOQ,but by at-tenuating it when referred back to the input.Since the gain of a practical VCOQ is quite limited (see Appendix),the large loop gain is provided mostly by the loop filter.However,design of such high gain analog filter particularly in smaller geometry pro-cesses is difficult.We propose a new closed loop architecture that tries to suppress VCO non-linearity without using a high gain analog loop filter.III.P ROPOSED A RCHITECTUREA simplified block diagram of the proposed sensor current readout circuit is shown in Fig.6[19].Similar to the approach depicted in Fig.2,the difference between sensor output and feedback current is integrated on the intrinsic ca-pacitance of the sensor to generate voltage,,which is dig-itized by VCOQ to produce output digital word,.VCOQ output is filtered by the IIR filter and is fed to a DAC,which generates feedback current,.Designing the IIR filter to have infinite DC gain ensures the VCOQ output and its input are centered around zero and bias voltage ,respectively.As a result,VCOQ non-linearity is not exercised,thereby greatly improving the overall linearity of the sensor readout circuit.As a side benefit,the sensor is also biased to voltage be-cause in steady-state.Furthermore,since VCOQ has 1st order noise shaping,the proposed architecture exhibits 2nd order noise shaping,due to the additional filtering provided by .Fig.7shows the implementation of digital IIR filter.It is com-posed of an accumulator and a feed-forward path across the ac-cumulator resulting in a filter transfer function,,equal to:(6)4IEEE JOURNAL OF SOLID-STATE CIRCUITS,VOL.50,NO.8,AUGUST2015Fig.4.Simulated characteristics of VCOQ readout circuit:(a)VCO frequency tuning curve.(b)Output spectrum of the VCOQ readoutcircuit.Fig.5.Non-linearity suppression by embedding VCOQ in a feedbackloop.Fig.6.Conceptual block diagram of the proposed VCO basedADC.Fig.7.Digital filter architecture.Accumulator provides the needed high DC gain and the feed-forward path stabilizes the feedback loop that is otherwise un-stable because of the presence of two integrators:digital accu-mulator in the IIR filter and passive integrator at the input.The feed-forward path gain is set to 8considering ease of imple-mentation and the trade off between ripple caused on the VCOQ input voltage and modulator stability.A.VCO QuantizerThe block diagram of VCOQ is shown in Fig.8.It consists of a transconductor that converts the difference between sense node voltage,,and bias voltage,,intocurrentFig.8.Schematic of the VCO Quantizer with FDC.and feeds it to the current-controlled oscillator (CCO).Usingthe front-end stage as depicted,instead of controlling the VCO directly with ,offers flexibility in appropriately biasing the sensor.In steady state,because DC gain of the IIR filter is infinite,,resulting in the sensor to be biased at.Further,can be set to any voltage within the input common-mode range of the stage.The FDC is implemented using a counter-based architecture.The commonly used frequency detection scheme using flip-flop as a 1bit phase quantizer followed by a XOR-based digital dif-ferentiator requires the VCO frequency to be less than sampling rate,which is difficult to achieve at low sampling rates.For in-stance,sampling frequency,,of about 160kHz is found to be sufficient to meet the signal-to-quantization error and signal bandwidth requirements.With kHz,must be less than 80kHz,which is difficult to implement with a reason-able .In contrast to this behavior,a counter-based FDC measures frequency by taking the difference between the number of VCO cycles in two consecutive cycles of the 160kHz sampling clock.As a result,can be much larger than .The counter counts the number of positive (or negative)edges of the VCO output clock for the duration of one sampling clock cycle and stores it in a register.The stored count is a measure of the ac-cumulated phase at the end of that clock cycle.A digital dif-ferentiator is used to subtract consecutive stored count values to determine the frequency information in digital form.Notice that a roll over counter (instead of a resetting counter that is reset at fixed clock edges)is employed to eliminate detrimental effects of finite reset time on noise shaping [20].As a result,counter output overflows,but this does not pose a problem pro-vided 2's complement phase wrapping logic is used.Fig.9il-lustrates how the 2's complement subtraction is able to retrieve the right frequency output in spite of an overflow.In this ex-ample,,which is the correct digital output evenPRABHA et al.:A HIGHLY DIGITAL VCO-BASED ADC ARCHITECTURE FOR CURRENT SENSING APPLICATIONS5Fig.9.Example illustration of phase wrappinglogic.Fig.10.Architecture of the feedback DAC.though there was an overflow.Note that output is delayed by one clock due to the presence of a sampling register.B.Feedback DACFig.10shows the architecture of feedback DAC.Since the IIR filter output,,is 10bits long,using a Nyquist-rate DAC requires a large number of very small unit elements.To avoid this,10bit is truncated to 9levels using a 1st order dig-ital before feeding it to a 9-level current-mode DAC.The truncation error introduced by the modulator is made lower than the FDC quantization error by clocking it at 2.56MHz,which is 16times faster than .The modulator is im-plemented using error-feedback architecture.Dynamic element matching (DEM)implemented using 1st order data weighted averaging (DWA)algorithm is used to suppress DAC unit ele-ment current mismatch errors.The DAC unit elements are sized for 8bit matching and the DWA improves the linearity to more than 12bits.Because excess loop delay (ELD)in the feed-back path is negligible compared to the clock period,stability is not compromised and hence ELD compen-sation is not needed in this design.The entire digital section of the VCOQ is synthesized using standard place and route tools.C.Small Signal ModelThe continuous time (CT)small signal model of the proposed current readout circuit is shown in Fig.11.Because loop band-width is much smaller than the sampling clock frequency,this CT model accurately captures the behavior.The differentiator block is modeled using as its transfer function.TheDACFig.11.Equivalent continuous time model of the proposed readoutcircuit.Fig.12.Simulated DC variation of VCO input voltage.and blocks are denoted by their gainsand ,re-spectively.is the CT equivalent of.The loop gainis given by(7)The sensitivity ofto input current is quantified by using the transfer function given below:(8)For large loop gain(9)The gain fromto is zero at DC because of the infinite gain provided by the IIR filter.In other words,due to the presence of the accumulator.This makes the VCO input voltage insensitive to input current at low frequencies.Variation of VCO input voltage as a function of input current obtained using behavioral simulations is plotted in Fig.12.Without the accumulator in the feedback path,the VCO voltage varies by more than 295mV from the nominal value of .Such large variation would exercise the non-linear portion of the VCO and degrade the performance.In addition,the gain of VCOwould vary significantly,which causes large variation in loop dynamics.Adding the accumulator in the feedback path mini-mizes variation to a practically negligible level.As a result,VCO input node behaves like a virtual ground much like the in-verting input of a high gain analog amplifier.6IEEE JOURNAL OF SOLID-STATE CIRCUITS,VOL.50,NO.8,AUGUST2015Fig.13.Simulated output spectrum of the proposed ADC.The simulated magnitude spectrum of the output using a dis-crete-time model is depicted in Fig.13.The ADC behaves like a continuous time modulator with a digital in its feed-back path.Due to the presence of two integrators,2nd order noise shaping is achieved.The expression for NTF calculated from the discrete model is equal to:(10) where(11) Equation(10)shows that the NTF has two zeros on unit circle confirming the2nd order noise shaping around DC.The out of band portion of the spectrum in Fig.13contains nulls at mul-tiples of(160kHz)because of the up sampling operation inside the digital modulator.Since the modulator is clocked at,8nulls can be observed within(see Fig.13).Idle tones caused by limit cycle behavior for DC input can be observed in the output spectrum.However,performance degradation due to these tones is negligible in this design.IV.B UILDING B LOCKSThe prototype current readout circuit is designed for an am-bient light sensor measurement system that uses a commercial discrete photo-diode such as TEMD6010FX01[26].The SNR target for this particular application was72dB.Since the diode requires around5V reverse bias,analog sections of the VCO and DAC are designed with thick oxide devices operating at5V supply while rest of the building blocks are designed to operate with1.8V supply.A.VCO DesignThe schematic of the VCO is shown in Fig.14.A resistively degenerated nMOS differential pair is used as the stage. Because voltage offset caused by the mismatch between input pair transistors appears across the sensor,it is minimized by up-sizing the transistors appropriately.A large degenerationre-sistor is used to increase linear input range of VCO and re-duce noise contribution of the input pair.However,linearity and Fig.14.Schematic of the VCO.lower noise are obtained at the expense of reduced since the degeneration resistor reduces the equivalent of the input pair.Loading on each side of the differential pair is matched by using a dummy load,which helps to ensure matching of the cur-rents in both the arms when.The delay cells in the ring oscillator are implemented using CMOS inverters that are sized to achieve a center frequency of2.56MHz with a bias current of400nA.Fortunately,the VCO phase noise re-quirement is greatly relaxed due to the presence of an integrator preceding it.In other words,the phase noise when referred back to the input as a current noise gets attenuated by the inverse of passivefilter transfer function,,providing large suppres-sion at low frequencies.An output buffer converts delay cell output to rail-to-rail CMOS levels.B.DAC DesignThe schematic of the9-level feedback DAC is shown in Fig.15.It is implemented as a9-level thermometric current steering architecture.Thermometric coding is used for guar-anteed monotonicity at the expense of slight increase in area.A non-return-to-zero(NRZ)switching scheme,compared to return-to-zero(RZ)scheme,is employed to minimize jitter sensitivity.A bipolar DAC is used to interface the ADC with sensors that either source or sink current.Because sensor bias voltage is close to5V,triple cascoding is employed in the implementation of DAC current sources to obtain large output impedance.Since DAC output node is biased to a voltage close to the supply,nMOS cells are used.Note that pMOS current sources pump in a constant current while only the nMOS cells perform current steering in accordance with the input.This implementation has less spurious tones(at the expense of more power)compared to the implementation where both nMOS and pMOS cells switch simultaneously with the input code.The presence of a single-ended sensor current input made it difficult to implementflicker noise reduction techniques like chopper stabilization in the prototype,and hence the performance gets limited by DACflicker noise.We minimized the impact of DACflicker noise by using large transistors and degeneration resistors inside DAC.Simulated total DAC integratedflicker noise in signal bandwidth is found to be around200pA.PRABHA et al.:A HIGHLY DIGITAL VCO-BASED ADC ARCHITECTURE FOR CURRENT SENSING APPLICATIONS7Fig.15.Schematic of the current-steering DAC.C.Digital Building BlocksThe digital section of the proposed ADC that includes the FDC,filter,digital modulator and DEM are syn-thesized and laid out using standard place and route tools.A 10.24MHz external clock from an arbitrary waveform gener-ator is used to generate internal clocks for the digital sections and DAC.This high frequency clock is used to generate four phases of2.56MHz clock that are needed for accurately timing the input data for the DAC,DEM and digital modulator.V.M EASUREMENT R ESULTSA prototype of the proposed current readout circuit was fabricated in0.18m CMOS process and it occupies an active area of0.36mm.Fig.16shows the measurement setup. Low dropout regulators(LDO)are used to generate clean on-board supplies from an external5V supply.An accurate input current is provided using a Keithley6221current source. Capacitance of the input current source will change the passive integrator transfer function.Fortunately,this only changes the NTF slightly without much degradation in the performance. The output digital data is captured using TLA7000series logic analyzer from Tektronix and post processing is done using MATLAB.The measured DC transfer characteristic with a of 3.25V,is shown in Fig.17.The prototype achieves a gain and offset corrected accuracy of900pA within an input range of 4 A.The full scale input current is limited by the maximum DAC current.Below1nA input,resolution is limited by the test setup.The measured DC variation of VCO input(withV)with the input current is shown in Fig.18(a).Excel-lent regulation of VCO input voltage validates the effective-ness of accumulator in suppressing VCO input voltage vari-ation.After the input reaches DAC full scale level,thefeed-back is unable totrack the input and VCO input voltage droops Fig.16.Measurement setup.Fig.17.Measured DC transfer curve.down.Fig.18(b)shows the measured transient error voltage on the VCO input.Due to the high gain of accumulator path,the steady-state ripple is only10mV.The error voltage ripple is lim-ited mostly by the switching activity of the DAC.Fig.19shows the measured spectrum of the prototype with idle input.As can be seen from the spectrum,the in-band performance gets limited by theflicker noise.Total integrated noise in signal bandwidth of1.25Hz is found to be around72.3dBFS.The die photo-graph is shown in Fig.20.The total current consumption is77.8A out of which 62.5A is consumed from the5V supply and15.3A from the 1.8V supply.Table I summarizes the performance comparison and summary of the proposed pared to prior-art, the proposed architecture demonstrates the use of VCO-based quantizer using mostly digital circuits for wide dynamic range sensor readout applications.VI.C ONCLUSIONA highly digital architecture for current readout in sensor ap-plications is proposed.Second order noise shaping of the quan-tization error is achieved by using implicit capacitance of the sensor to realize a passive integrator and a VCO-based quan-tizer.VCO's voltage-to-frequency non-linearity that severely limits the performance of VCO-based quantizers is mitigated by using a digital IIRfilter implemented using a simple accumu-lator with a feed-forward path across it.The accumulator pro-vides infinite DC gain and the feed-forward path introduces a。