HD74HCT1G14CM中文资料

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4.13 —
IOH = –2 mA
— 0.1
VIN = VIH IOL = 20 µA
— 0.33
IOL = 2 mA

±1.0 µA VIN = VCC or GND

10.0 µA VIN = VCC or GND


2.0 —
2.9 mA One input VIN = 2.4 V,
other input VCC or GND
4
HD74HCT1G14
Switching Characteristics
Item
Symbol Ta = 25°C
Min
Typ
Output rise / fall time tTLH

6
t THL
Propagation delay time tPLH—10t PHL—
10
(CL = 15 pF, tr = tf = 6 ns, VCC = 5 V)
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This value is limited to 5.5 V maximum.
2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use.
VCC
Input voltage range *1
VI
Output voltage range *1, 2 VO
Input clamp current
I IK
Output clamp current
I OK
Continuous output current IO
Continuous current through ICC or IGND VCC or GND
tTHL
90% 1.3 V
tPHL
10%
tf = 6 ns
90% 1.3 V 10%
tTLH 90%
1.3 V 10% tPLH
3V GND VOH VOL
6
Package Dimensions
1.3 ± 0.2
(0.65)
(0.65)
5 – 0.2 ± 0.05 2.0 ± 0.2
HD74HCT1G14
Maximum power dissipation PT at Ta = 25°C (in still air) *3
–0.5 to 7.0 –0.5 to VCC + 0.5 –0.5 to VCC + 0.5 ±20 ±20 ±25 ±25
200
V
V
V
Output : H or L
mA VI < 0 or VI > VCC mA VO < 0 or VO >VCC mA VO = 0 to VCC mA
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support.
HD74HCT1G14
Inverter with Schmitt–trigger Input
ADE-205-305B (Z) 3rd. Edition April 2001
Description
The HD74HCT1G14 is high speed CMOS schmitt–trigger inverter using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS–TTL series. The internal circuit of three stages construction with buffer provides wide noise margin and stable output.
Features
• The basic gate function is lined up as hitachi uni logic series.
• Supplied on emboss taping for high speed automatic mounting.
• TTL compatible input level. Supply voltage range : 4.5 to 5.5 V Operating temperature range : –40 to +85°C
Max 1.9 2.1 1.2 1.4 — — — — 0.1 0.26 ±0.1 1.0
Ta = –40 to 85°C Unit Test Conditions Min Max
1.2 1.9 V
1.4 2.1
0.5 1.2 V
0.6 1.4
0.4 — V
0.4 —
4.4 —
V
VIN = VIL IOH = –20 µA
7
HD74HCT1G14
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document.
— — 10 — —

pF
(CL = 50 pF, tr = tf = 6 ns)
Note: CPD is equivalent capacitance inside of the IC calculated from the operating current without load (see test circuit). The average operating current without load is calculated according to the expression below. ICC (opr) = CPD • VCC • fIN + ICC
Pin Arrangement
Output Y L H
NC 1 IN Y 2 GND 3
5 VCC 4 OUT Y
(Top view)
2
HD74HCT1G14
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit Test Conditions
Supply voltage range
As of January, 2001
Unit: mm
0.15+–
0.1 0.05
0 – 0.1
(0.425) 1.25 ± 0.1 (0.425) 2.1 ± 0.3
(0.2) 0.9 ± 0.1
Hitachi Code JEDEC EIAJ Mass (reference value)
CMPAK-5 — Conforms 0.006 g
4.5 — 14 25 —
31 ns Test circuit
Propagation delay time tPLH
4.5 — 16.4 27 —
31 ns Test circuit
t PHL
4.5 — 16.4 27 —
31
Input capacitance
CIN
— — 2.5 5 —
5
pF
Equivalent capacitance CPD
3. The maximum package power dissipation was caluculated using a junction temperature of 150°C.