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MEMORY存储芯片STM32F070CBT6中文规格书

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This is information on a product in full production. February 2017DocID027114 Rev 3ARM®-based 32-bit MCU, up to 128 KB Flash, USB FS 2.0, 11 timers, ADC, communication interfaces, 2.4 - 3.6 VDatasheet - production dataFeatures•Core: ARM® 32-bit Cortex®-M0 CPU,frequency up to 48 MHz•Memories–32 to 128 Kbytes of Flash memory–6 to 16 Kbytes of SRAM with HW parity•CRC calculation unit•Reset and power management–Digital & I/Os supply: VDD = 2.4 V to 3.6 V–Analog supply: VDDA = VDD to 3.6 V–Power-on/Power down reset (POR/PDR)–Low power modes: Sleep, Stop, Standby•Clock management–4 to 32 MHz crystal oscillator–32 kHz oscillator for RTC with calibration–Internal 8 MHz RC with x6 PLL option–Internal 40 kHz RC oscillator•Up to 51 fast I/Os–All mappable on external interrupt vectors–Up to 51 I/Os with 5V tolerant capability•5-channel DMA controller•One 12-bit, 1.0 µs ADC (up to 16 channels)–Conversion range: 0 to 3.6 V–Separate analog supply: 2.4 V to 3.6 V•Calendar RTC with alarm and periodic wakeupfrom Stop/Standby•11 timers–One 16-bit advanced-control timer forsix-channel PWM output–Up to seven 16-bit timers, with up to fourIC/OC, OCN, usable for IR controldecoding–Independent and system watchdog timers–SysTick timer•Communication interfaces–Up to two I2C interfaces–Fast Mode Plus (1 Mbit/s) support, with20 mA current sink–SMBus/PMBus support (on single I/F)–Up to four USARTs supporting mastersynchronous SPI and modem control; onewith auto baud rate detection–Up to two SPIs (18 Mbit/s) with 4 to 16programmable bit frames–USB 2.0 full-speed interface with BCD andLPM support•Serial wire debug (SWD)•All packages ECOPACK®2

LQFP64 10x10 mm

LQFP48 7x7 mmTSSOP20Functional overviewSTM32F070CB/RB/C6/F6

DocID027114 Rev 3DocID027114 Rev 3STM32F070CB/RB/C6/F6Functional overview3.13 Inter-integrated circuit interfaces (I2C)Up to two I2C interfaces (I2C1 and I2C2) can operate in multimaster or slave modes. Both can support Standard mode (up to 100 kbit/s) or Fast mode (up to 400 kbit/s). I2C1 also supports Fast Mode Plus (up to 1 Mbit/s), with 20 mA output drive.Both support 7-bit and 10-bit addressing modes, multiple 7-bit slave addresses (two addresses, one with configurable mask). They also include programmable analog and digital noise filters.

In addition, I2C1 provides hardware support for SMBUS 2.0 and PMBUS 1.1: ARP capability, Host notify protocol, hardware CRC (PEC) generation/verification, timeouts verifications and ALERT protocol management.The I2C interfaces can be served by the DMA controller.Refer to Table 6 for the differences between I2C1 and I2C2.

3.14 Universal synchronous/asynchronous receiver/transmitter (USART)The device embeds up to four universal synchronous/asynchronous receivers/transmitters that communicate at speeds of up to 6 Mbit/s. Table 5. Comparison of I2C analog and digital filters -Analog filterDigital filterPulse width of suppressed spikes ≥50 nsProgrammable length from 1 to 15 I2C peripheral clocksBenefitsAvailable in Stop mode1.Extra filtering capability vs.standard requirements.2.Stable lengthDrawbacksVariations depending on temperature, voltage, process-

Table 6. STM32F070CB/RB/C6/F6 I2C implementation(1)

1.X = supported.I2C featuresI2C1I2C2(2)

2.Only available on STM32F070xB devices.7-bit addressing modeXX10-bit addressing modeXXStandard mode (up to 100 kbit/s)XXFast mode (up to 400 kbit/s)XXFast Mode Plus (up to 1 Mbit/s), with 20mA output drive I/Os X-Independent clockX-SMBusX-Wakeup from STOP--Functional overviewSTM32F070CB/RB/C6/F6DocID027114 Rev 3Table 7 gives an overview of features as implemented on the available USART interfaces. All USART interfaces can be served by the DMA controller.

3.15 Serial peripheral interface (SPI)Up to two SPIs are able to communicate up to 18 Mbit/s in slave and master modes in full-duplex and half-duplex communication modes. The 3-bit prescaler gives 8 master mode frequencies and the frame size is configurable from 4 bits to 16 bits. SPI1 and SPI2 are identical and implement the set of features shown in the following table.Table 7. STM32F70x0 USART implementation(1)

1.X = supported.USART modes/featuresSTM32F070x6STM32F070xBUSART1USART2USART1USART2USART3USART4Hardware flow control for modemXXXXXContinuous communication using DMAXXXX-Multiprocessor communicationXXXXXSynchronous modeXXXXXSmartcard mode-----Single-wire Half-duplex communicationXXXXXIrDA SIR ENDEC block-----LIN mode-----Dual clock domain and wakeup from Stop mode-----Receiver timeout interruptX-X--Modbus communication-----Auto baud rate detection (supported modes)4-4--Driver EnableXXXXXUSART data length7, 8 and 9 bitsDocID027114 Rev 3STM32F070CB/RB/C6/F6Functional overview

3.16 Universal serial bus (USB)The STM32F070CB/RB/C6/F6 embeds a full-speed USB device peripheral compliant with the USB specification version 2.0. The internal USB PHY supports USB FS signaling, embedded DP pull-up and also battery charging detection according to Battery Charging Specification Revision 1.2. The USB interface implements a full-speed (12 Mbit/s) function interface with added support for USB 2.0 Link Power Management. It has software-configurable endpoint setting with packet memory up-to 1 KB and suspend/resume support. It requires a precise 48 MHz clock which can be generated from the internal main PLL (the clock source must use an HSE crystal oscillator).3.17 Serial wire debug port (SW-DP)An ARM SW-DP interface is provided to allow a serial wire debugging tool to be connected to the MCU.Table 8. STM32F070CB/RB/C6/F6 SPI implementation(1)

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This is information on a product in full production. August 2018DS7147 Rev 10Value line, 16-MHz STM8S 8-bit MCU, 8-Kbyte Flash memory, 128-byte data EEPROM, 10-bit ADC, 3 timers, UART, SPI, I²CDatasheet - production dataFeaturesCore•16 MHz advanced STM8 core with Harvardarchitecture and 3-stage pipeline•Extended instruction setMemories•Program memory: 8 Kbyte Flash memory; dataretention 20 years at 55 °C after 100 cycles•RAM: 1 Kbyte•Data memory: 128 bytes true data EEPROM;endurance up to 100 k write/erase cyclesClock, reset and supply management•2.95 V to 5.5 V operating voltage•Flexible clock control, 4 master clock sources–Low-power crystal resonator oscillator–External clock input–Internal, user-trimmable 16 MHz RC–Internal low-power 128 kHz RC•Clock security system with clock monitor•Power management–Low-power modes (wait, active-halt, halt)–Switch-off peripheral clocks individually–Permanently active, low-consumptionpower-on and power-down resetInterrupt management•Nested interrupt controller with 32 interrupts•Up to 27 external interrupts on 6 vectorsTimers•Advanced control timer: 16-bit, 4 CAPCOMchannels, 3 complementary outputs, dead-time insertion and flexible synchronization•16-bit general purpose timer, with 3 CAPCOMchannels (IC, OC or PWM)•8-bit basic timer with 8-bit prescaler•Auto wakeup timer•Window and independent watchdog timersCommunications interfaces •UART with clock output for synchronousoperation, SmartCard, IrDA, LIN master mode•SPI interface up to 8 Mbit/s•I2C interface up to 400 Kbit/sAnalog to digital converter (ADC)•10-bit ADC, ± 1 LSB ADC with up to 5multiplexed channels, scan mode and analogwatchdogI/Os•Up to 28 I/Os on a 32-pin package including 21high-sink outputs•Highly robust I/O design, immune againstcurrent injectionDevelopment support•Embedded single-wire interface module(SWIM) for fast on-chip programming and non-intrusive debugging

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Write Protect Features Device resets when VCC is below thresholdTime delay write disable after Power-upWrite enable/disable instructions and automatic write disable after erase or programSoftware and Hardware (/WP pin) write protection using Status RegistersAdditional Individual Block/Sector Locks for array protectionWrite Protection using Power-down instructionLock Down write protection for Status Register until the next power-upOne Time Program (OTP) write protection for array and Security Registers using Status Register**Note: This feature is available upon special order. Please contact Winbond for details.

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July 2018DS5792 Rev 13Features

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January 2017DocID022265 Rev 7ARM®-based 32-bit MCU, 16 to 64 KB Flash, 11 timers, ADC,

DAC and communication interfaces, 2.0-3.6 V

Datasheet - production data

Features

•Core: ARM® 32-bit Cortex®-M0 CPU,frequency up to 48 MHz

•Memories

–16 to 64 Kbytes of Flash memory–8 Kbytes of SRAM with HW parity checking

•CRC calculation unit

•Reset and power management

–Digital and I/O supply: VDD = 2.0 V to 3.6 V–Analog supply: VDDA = from VDD to 3.6 V–Power-on/Power down reset (POR/PDR)–Programmable voltage detector (PVD)–Low power modes: Sleep, Stop, Standby–VBAT supply for RTC and backup registers

•Clock management

–4 to 32 MHz crystal oscillator–32 kHz oscillator for RTC with calibration–Internal 8 MHz RC with x6 PLL option–Internal 40 kHz RC oscillator

•Up to 55 fast I/Os

–All mappable on external interrupt vectors–Up to 36 I/Os with 5 V tolerant capability