Photothermal Response in Dual-Gated Bilayer Graphene

专利名称：用于调节半导体器件的载流子迁移率的结构和方法专利类型：发明专利
发明人：布鲁斯·B·多斯,杨海宁,朱慧珑
申请号：CN200410087007.8
申请日：20041022
公开号：CN1612327A
公开日：
20050504
专利内容由知识产权出版社提供
摘要：在制造互补的金属氧化物半导体(CMOS)场效应晶体管(包括nMOS和pMOS晶体管)的过程中，根据层和隔离应力层相互的以及在选定位置具有附加层的其它结构的性能，通过将各种不同的应力膜涂覆到nMOS或pMOS晶体管(或其两者)上来提高或调节载流子迁移率。

这样，可增大单一芯片或基片上的两种晶体管的载流子迁移率，从而改善CMOS器件和集成电路的性能。

申请人：国际商业机器公司
地址：美国纽约
国籍：US
代理机构：中国国际贸易促进委员会专利商标事务所
代理人：付建军
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聚合物包覆改善二维钙钛矿(FPEA)_(2)PbI_(4)光学性能马鹏飞;徐公杰
【期刊名称】《光学仪器》
【年(卷),期】2022(44)5
【摘要】环境因素(如光照、水蒸气、氧气等)会引发二维钙钛矿材料的降解,其稳定性极大地限制该材料的进一步发展及市场化进程。

利用氟化物的强稳定性与疏水性,将其以含氟苯乙胺的形式引入二维钙钛矿的有机层,可以有效地改善二维钙钛矿稳定性,但是荧光效率有所降低。

针对这一问题,本文采用聚苯乙烯(PS)、聚甲基丙烯酸甲酯(PMMA)、环烯烃聚合体(COP)三种高分子聚合物对二维钙钛矿薄膜进行包覆,使其荧光强度分别得到2.2、1.3和1.4倍的改善,光照稳定性分别得到3.3、3.1和3.9倍的提升,并进一步验证湿度稳定性。

该研究为二维钙钛矿薄膜在光电器件上的开发提供了新思路。

【总页数】8页(P77-83)
【作者】马鹏飞;徐公杰
【作者单位】上海理工大学光电信息与计算机工程学院
【正文语种】中文
【中图分类】O
【相关文献】
1.绝缘氧化物包覆对钙钛矿太阳电池性能及界面电荷复合动力学的影响
2.聚丙烯酰胺聚合物包覆的研磨碳酸钙对纸张性能指标影响的探讨
3.基于
FA_(0.85)Cs_(0.15)PbI_(3)钙钛矿的光电探测器及其图像传感应用4.Br/Cl掺杂CH_(3)NH_(3)PbI_(3)钙钛矿薄膜的光学性能5.CH_(3)NH_(3)PbI_(3)钙钛矿薄膜阵列光电探测器
因版权原因，仅展示原文概要，查看原文内容请购买。

专利名称：一种以温度高效调控水相中酶促反应的方法专利类型：发明专利
发明人：杨晓曦
申请号：CN201310393094.9
申请日：20130903
公开号：CN104419697A
公开日：
20150318
专利内容由知识产权出版社提供
摘要：本发明公开了一种以温度高效调控水相中酶促反应的方法，其特征是：合成智能高分子凝胶PNIPAM，并将该凝胶研磨成颗粒添加到海藻酸钠固载酶的催化体系中，以32℃为调控的分界温度，利用温度的小幅度变化，循环控制水相中酶促反应速率，实现对反应的“开”、“关”式调控。

本发明实现了对水相中酶促反应的高效、灵敏、可循环的控制，解决了水相中酶促反应难于控制反应速率的问题。

申请人：杨晓曦
地址：100872 北京市海淀区中关村大街59号中国人民大学
国籍：CN
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Semiconductor Manufacturing Technology半导体制造技术Instructor’s ManualMichael QuirkJulian SerdaCopyright Prentice HallTable of Contents目录OverviewI. Chapter1. Semiconductor industry overview2. Semiconductor materials3. Device technologies—IC families4. Silicon and wafer preparation5. Chemicals in the industry6. Contamination control7. Process metrology8. Process gas controls9. IC fabrication overview10. Oxidation11. Deposition12. Metallization13. Photoresist14. Exposure15. Develop16. Etch17. Ion implant18. Polish19. Test20. Assembly and packagingII. Answers to End-of-Chapter Review QuestionsIII. Test Bank (supplied on diskette)IV. Chapter illustrations, tables, bulleted lists and major topics (supplied on CD-ROM)Notes to Instructors:1)The chapter overview provides a concise summary of the main topics in each chapter.2)The correct answer for each test bank question is highlighted in bold. Test bankquestions are based on the end-of-chapter questions. If a student studies the end-of-chapter questions (which are linked to the italicized words in each chapter), then they will be successful on the test bank questions.2Chapter 1Introduction to the Semiconductor Industry Die:管芯 defective:有缺陷的Development of an Industry•The roots of the electronic industry are based on the vacuum tube and early use of silicon for signal transmission prior to World War II. The first electronic computer, the ENIAC, wasdeveloped at the University of Pennsylvania during World War II.•William Shockley, John Bardeen and Walter Brattain invented the solid-state transistor at Bell Telephone Laboratories on December 16, 1947. The semiconductor industry grew rapidly in the 1950s to commercialize the new transistor technology, with many early pioneers working inSilicon Valley in Northern California.Circuit Integration•The first integrated circuit, or IC, was independently co-invented by Jack Kilby at Texas Instruments and Robert Noyce at Fairchild Semiconductor in 1959. An IC integrates multiple electronic components on one substrate of silicon.•Circuit integration eras are: small scale integration (SSI) with 2 - 50 components, medium scale integration (MSI) with 50 – 5k components, large scale integration (LSI) with 5k to 100kcomponents, very large scale integration (VLSI) with 100k to 1M components, and ultra large scale integration (ULSI) with > 1M components.1IC Fabrication•Chips (or die) are fabricated on a thin slice of silicon, known as a wafer (or substrate). Wafers are fabricated in a facility known as a wafer fab, or simply fab.•The five stages of IC fabrication are:Wafer preparation: silicon is purified and prepared into wafers.Wafer fabrication: microchips are fabricated in a wafer fab by either a merchant chip supplier, captive chip producer, fabless company or foundry.Wafer test: Each individual die is probed and electrically tested to sort for good or bad chips.Assembly and packaging: Each individual die is assembled into its electronic package.Final test: Each packaged IC undergoes final electrical test.•Key semiconductor trends are:Increase in chip performance through reduced critical dimensions (CD), more components per chip (Moore’s law, which predicts the doubling of components every 18-24 months) andreduced power consumption.Increase in chip reliability during usage.Reduction in chip price, with an estimated price reduction of 100 million times for the 50 years prior to 1996.The Electronic Era•The 1950s saw the development of many different types of transistor technology, and lead to the development of the silicon age.•The 1960s were an era of process development to begin the integration of ICs, with many new chip-manufacturing companies.•The 1970s were the era of medium-scale integration and saw increased competition in the industry, the development of the microprocessor and the development of equipment technology. •The 1980s introduced automation into the wafer fab and improvements in manufacturing efficiency and product quality.•The 1990s were the ULSI integration era with the volume production of a wide range of ICs with sub-micron geometries.Career paths•There are a wide range of career paths in semiconductor manufacturing, including technician, engineer and management.2Chapter 2 Characteristics of Semiconductor MaterialsAtomic Structure•The atomic model has three types of particles: neutral neutrons（不带电的中子）, positively charged protons（带正电的质子）in the nucleus and negatively charged electrons（带负电的核外电子） that orbit the nucleus. Outermost electrons are in the valence shell, and influence the chemical and physical properties of the atom. Ions form when an atom gains or loses one or more electrons.The Periodic Table•The periodic table lists all known elements. The group number of the periodic table represents the number of valence shell electrons of the element. We are primarily concerned with group numbers IA through VIIIA.•Ionic bonds are formed when valence shell electrons are transferred from the atoms of one element to another. Unstable atoms (e.g., group VIIIA atoms because they lack one electron) easily form ionic bonds.•Covalent bonds have atoms of different elements that share valence shell electrons.3Classifying Materials•There are three difference classes of materials:ConductorsInsulatorsSemiconductors•Conductor materials have low resistance to current flow, such as copper. Insulators have high resistance to current flow. Capacitance is the storage of electrical charge on two conductive plates separated by a dielectric material. The quality of the insulation material between the plates is the dielectric constant. Semiconductor materials can function as either a conductor or insulator.Silicon•Silicon is an elemental semiconductor material because of four valence shell electrons. It occurs in nature as silica and is refined and purified to make wafers.•Pure silicon is intrinsic silicon. The silicon atoms bond together in covalent bonds, which defines many of silicon’s properties. Silicon atoms bond together in set, repeatable patterns, referred to asa crystal.•Germanium was the first semiconductor material used to make chips, but it was soon replaced by silicon. The reasons for this change are:Abundance of siliconHigher melting temperature for wider processing rangeWide temperature range during semiconductor usageNatural growth of silicon dioxide•Silicon dioxide (SiO2) is a high quality, stable electrical insulator material that also serves as a good chemical barrier to protect silicon from external contaminants. The ability to grow stable, thin SiO2 is fundamental to the fabrication of Metal-Oxide-Semiconductor (MOS) devices. •Doping increases silicon conductivity by adding small amounts of other elements. Common dopant elements are from trivalent, p-type Group IIIA (boron) and pentavalent, n-type Group VA (phosphorus, arsenic and antimony).•It is the junction between the n-type and p-type doped regions (referred to as a pn junction) that permit silicon to function as a semiconductor.4Alternative Semiconductor Materials•The alternative semiconductor materials are primarily the compound semiconductors. They are formed from Group IIIA and Group VA (referred to as III-V compounds). An example is gallium arsenide (GaAs).•Some alternative semiconductors come from Group IIA and VIA, referred to as II-VI compounds. •GaAs is the most common III-V compound semiconductor material. GaAs ICs have greater electron mobility, and therefore are faster than ICs made with silicon. GaAs ICs also have higher radiation hardness than silicon, which is better for space and military applications. The primary disadvantage of GaAs is the lack of a natural oxide.5Chapter 3Device TechnologiesCircuit Types•There are two basic types of circuits: analog and digital. Analog circuits have electrical data that varies continuously over a range of voltage, current and power values. Digital circuits have operating signals that vary about two distinct voltage levels – a high and a low.Passive Component Structures•Passive components such as resistors and capacitors conduct electrical current regardless of how the component is connected. IC resistors are a passive component. They can have unwanted resistance known as parasitic resistance. IC capacitor structures can also have unintentional capacitanceActive Component Structures•Active components, such as diodes and transistors can be used to control the direction of current flow. PN junction diodes are formed when there is a region of n-type semiconductor adjacent to a region of p-type semiconductor. A difference in charge at the pn junction creates a depletion region that results in a barrier voltage that must be overcome before a diode can be operated. A bias voltage can be configured to have a reverse bias, with little or no conduction through the diode, or with a forward bias, which permits current flow.•The bipolar junction transistor (BJT) has three electrodes and two pn junctions. A BJT is configured as an npn or pnp transistor and biased for conduction mode. It is a current-amplifying device.6• A schottky diode is formed when metal is brought in contact with a lightly doped n-type semiconductor material. This diode is used in faster and more power efficient BJT circuits.•The field-effect transistor (FET), a voltage-amplifying device, is more compact and power efficient than BJT devices. A thin gate oxide located between the other two electrodes of the transistor insulates the gate on the MOSFET. There are two categories of MOSFETs, nMOS (n-channel) and pMOS (p-channel), each which is defined by its majority current carriers. There is a biasing scheme for operating each type of MOSFET in conduction mode.•For many years, nMOS transistors have been the choice of most IC manufacturers. CMOS, with both nMOS and pMOS transistors in the same IC, has been the most popular device technology since the early 1980s.•BiCMOS technology makes use of the best features of both CMOS and bipolar technology in the same IC device.•Another way to categorize FETs is in terms of enhancement mode and depletion mode. The major different is in the way the channels are doped: enhancement-mode channels are doped opposite in polarity to the source and drain regions, whereas depletion mode channels are doped the same as their respective source and drain regions.Latchup in CMOS Devices•Parasitic transistors can create a latchup condition(???????) in CMOS ICs that causes transistors to unintentionally（无心的） turn on. To control latchup, an epitaxial layer is grown on the wafer surface and an isolation barrier（隔离阻障）is placed between the transistors. An isolation layer can also be buried deep below the transistors.Integrated Circuit Productsz There are a wide range of semiconductor ICs found in electrical and electronic products. This includes the linear IC family, which operates primarily with anal3og circuit applications, and the digital IC family, which includes devices that operate with binary bits of data signals.7Chapter 4Silicon and Wafer Preparation8z Semiconductor-Grade Silicon•The highly refined silicon used for wafer fabrication is termed semiconductor-grade silicon (SGS), and sometimes referred to as electronic-grade silicon. The ultra-high purity of semiconductor-grade silicon is obtained from a multi-step process referred to as the Siemens process.Crystal Structure• A crystal is a solid material with an ordered, 3-dimensional pattern over a long range. This is different from an amorphous material that lacks a repetitive structure.•The unit cell is the most fundamental entity for the long-range order found in crystals. The silicon unit cell is a face-centered cubic diamond structure. Unit cells can be organized in a non-regular arrangement, known as a polycrystal. A monocrystal are neatly arranged unit cells.Crystal Orientation•The orientation of unit cells in a crystal is described by a set of numbers known as Miller indices.The most common crystal planes on a wafer are (100), (110), and (111). Wafers with a (100) crystal plane orientation are most common for MOS devices, whereas (111) is most common for bipolar devices.Monocrystal Silicon Growth•Silicon monocrystal ingots are grown with the Czochralski (CZ) method to achieve the correct crystal orientation and doping. A CZ crystal puller is used to grow the silicon ingots. Chunks of silicon are heated in a crucible in the furnace of the puller, while a perfect silicon crystal seed is used to start the new crystal structure.• A pull process serves to precisely replicate the seed structure. The main parameters during the ingot growth are pull rate and crystal rotation. More homogeneous crystals are achieved with a magnetic field around the silicon melt, known as magnetic CZ.•Dopant material is added to the melt to dope the silicon ingot to the desired electrical resistivity.Impurities are controlled during ingot growth. A float-zone crystal growth method is used toachieve high-purity silicon with lower oxygen content.•Large-diameter ingots are grown today, with a transition underway to produce 300-mm ingot diameters. There are cost benefits for larger diameter wafers, including more die produced on a single wafer.Crystal Defects in Silicon•Crystal defects are interruptions in the repetitive nature of the unit cell. Defect density is the number of defects per square centimeter of wafer surface.•Three general types of crystal defects are: 1) point defects, 2) dislocations, and 3) gross defects.Point defects are vacancies (or voids), interstitial (an atom located in a void) and Frenkel defects, where an atom leaves its lattice site and positions itself in a void. A form of dislocation is astacking fault, which is due to layer stacking errors. Oxygen-induced stacking faults are induced following thermal oxidation. Gross defects are related to the crystal structure (often occurring during crystal growth).Wafer Preparation•The cylindrical, single-crystal ingot undergoes a series of process steps to create wafers, including machining operations, chemical operations, surface polishing and quality checks.•The first wafer preparation steps are the shaping operations: end removal, diameter grinding, and wafer flat or notch. Once these are complete, the ingot undergoes wafer slicing, followed by wafer lapping to remove mechanical damage and an edge contour. Wafer etching is done to chemically remove damage and contamination, followed by polishing. The final steps are cleaning, wafer evaluation and packaging.Quality Measures•Wafer suppliers must produce wafers to stringent quality requirements, including: Physical dimensions: actual dimensions of the wafer (e.g., thickness, etc.).Flatness: linear thickness variation across the wafer.Microroughness: peaks and valleys found on the wafer surface.Oxygen content: excessive oxygen can affect mechanical and electrical properties.Crystal defects: must be minimized for optimum wafer quality.Particles: controlled to minimize yield loss during wafer fabrication.Bulk resistivity(电阻系数): uniform resistivity from doping during crystal growth is critical. Epitaxial Layer•An epitaxial layer (or epi layer) is grown on the wafer surface to achieve the same single crystal structure of the wafer with control over doping type of the epi layer. Epitaxy minimizes latch-up problems as device geometries continue to shrink.Chapter 5Chemicals in Semiconductor FabricationEquipment Service Chase Production BayChemical Supply Room Chemical Distribution Center Holding tank Chemical drumsProcess equipmentControl unit Pump Filter Raised and perforated floorElectronic control cablesSupply air ductDual-wall piping for leak confinement PumpFilterChemical control and leak detection Valve boxes for leak containment Exhaust air ductStates of Matter• Matter in the universe exists in 3 basic states (宇宙万物存在着三种基本形态): solid, liquid andgas. A fourth state is plasma.Properties of Materials• Material properties are the physical and chemical characteristics that describe its unique identity.• Different properties for chemicals in semiconductor manufacturing are: temperature, pressure andvacuum, condensation, vapor pressure, sublimation and deposition, density, surface tension, thermal expansion and stress.Temperature is a measure of how hot or cold a substance is relative to another substance. Pressure is the force exerted per unit area. Vacuum is the removal of gas molecules.Condensation is the process of changing a gas into a liquid. Vaporization is changing a liquidinto a gas.Vapor pressure is the pressure exerted by a vapor in a closed container at equilibrium.Sublimation is the process of changing a solid directly into a gas. Deposition is changing a gas into a solid.Density is the mass of a substance divided by its volume.Surface tension of a liquid is the energy required to increase the surface area of contact.Thermal expansion is the increase in an object’s dimension due to heating.Stress occurs when an object is exposed to a force.Process Chemicals•Semiconductor manufacturing requires extensive chemicals.• A chemical solution is a chemical mixture. The solvent is the component of the solution present in larger amount. The dissolved substances are the solutes.•Acids are solutions that contain hydrogen and dissociate in water to yield hydronium ions. A base is a substance that contains the OH chemical group and dissociates in water to yield the hydroxide ion, OH-.•The pH scale is used to assess the strength of a solution as an acid or base. The pH scale varies from 0 to 14, with 7 being the neutral point. Acids have pH below 7 and bases have pH values above 7.• A solvent is a substance capable of dissolving another substance to form a solution.• A bulk chemical distribution (BCD) system is often used to deliver liquid chemicals to the process tools. Some chemicals are not suitable for BCD and instead use point-of-use (POU) delivery, which means they are stored and used at the process station.•Gases are generally categorized as bulk gases or specialty gases. Bulk gases are the relatively simple gases to manufacture and are traditionally oxygen, nitrogen, hydrogen, helium and argon.The specialty gases, or process gases, are other important gases used in a wafer fab, and usually supplied in low volume.•Specialty gases are usually transported to the fab in metal cylinders.•The local gas distribution system requires a gas purge to flush out undesirable residual gas. Gas delivery systems have special piping and connections systems. A gas stick controls the incoming gas at the process tool.•Specialty gases may be classified as hydrides, fluorinated compounds or acid gases.Chapter 6Contamination Control in Wafer FabsIntroduction•Modern semiconductor manufacturing is performed in a cleanroom, isolated from the outside environment and contaminants.Types of contamination•Cleanroom contamination has five categories: particles, metallic impurities, organic contamination, native oxides and electrostatic discharge. Killer defects are those causes of failure where the chip fails during electrical test.Particles: objects that adhere to a wafer surface and cause yield loss. A particle is a killer defect if it is greater than one-half the minimum device feature size.Metallic impurities: the alkali metals found in common chemicals. Metallic ions are highly mobile and referred to as mobile ionic contaminants (MICs).Organic contamination: contains carbon, such as lubricants and bacteria.Native oxides: thin layer of oxide growth on the wafer surface due to exposure to air.Electrostatic discharge (ESD): uncontrolled transfer of static charge that can damage the microchip.Sources and Control of Contamination•The sources of contamination in a wafer fab are: air, humans, facility, water, process chemicals, process gases and production equipment.Air: class number designates the air quality inside a cleanroom by defining the particle size and density.Humans: a human is a particle generator. Humans wear a cleanroom garment and follow cleanroom protocol to minimize contamination.Facility: the layout is generally done as a ballroom (open space) or bay and chase design.Laminar airflow with air filtering is used to minimize particles. Electrostatic discharge iscontrolled by static-dissipative materials, grounding and air ionization.Ultrapure deiniozed (DI) water: Unacceptable contaminants are removed from DI water through filtration to maintain a resistivity of 18 megohm-cm. The zeta potential represents a charge on fine particles in water, which are trapped by a special filter. UV lamps are used for bacterial sterilization.Process chemicals: filtered to be free of contamination, either by particle filtration, microfiltration (membrane filter), ultrafiltration and reverse osmosis (or hyperfiltration).Process gases: filtered to achieve ultraclean gas.Production equipment: a significant source of particles in a fab.Workstation design: a common layout is bulkhead equipment, where the major equipment is located behind the production bay in the service chase. Wafer handling is done with robotic wafer handlers. A minienvironment is a localized environment where wafers are transferred on a pod and isolated from contamination.Wafer Wet Cleaning•The predominant wafer surface cleaning process is with wet chemistry. The industry standard wet-clean process is the RCA clean, consisting of standard clean 1 (SC-1) and standard clean 2 (SC-2).•SC-1 is a mixture of ammonium hydroxide, hydrogen peroxide and DI water and capable of removing particles and organic materials. For particles, removal is primarily through oxidation of the particle or electric repulsion.•SC-2 is a mixture of hydrochloric acid, hydrogen peroxide and DI water and used to remove metals from the wafer surface.•RCA clean has been modified with diluted cleaning chemistries. The piranha cleaning mixture combines sulfuric acid and hydrogen peroxide to remove organic and metallic impurities. Many cleaning steps include an HF last step to remove native oxide.•Megasonics(兆声清洗) is widely used for wet cleaning. It has ultrasonic energy with frequencies near 1 MHz. Spray cleaning will spray wet-cleaning chemicals onto the wafer. Scrubbing is an effective method for removing particles from the wafer surface.•Wafer rinse is done with overflow rinse, dump rinse and spray rinse. Wafer drying is done with spin dryer or IPA(异丙醇) vapor dry (isopropyl alcohol).•Some alternatives to RCA clean are dry cleaning, such as with plasma-based cleaning, ozone and cryogenic aerosol cleaning.Chapter 7Metrology and Defect InspectionIC Metrology•In a wafer fab, metrology refers to the techniques and procedures for determining physical and electrical properties of the wafer.•In-process data has traditionally been collected on monitor wafers. Measurement equipment is either stand-alone or integrated.•Yield is the percent of good parts produced out of the total group of parts started. It is an indicator of the health of the fabrication process.Quality Measures•Semiconductor quality measures define the requirements for specific aspects of wafer fabrication to ensure acceptable device performance.•Film thickness is generally divided into the measurement of opaque film or transparent film. Sheet resistance measured with a four-point probe is a common method of measuring opaque films (e.g., metal film). A contour map shows sheet resistance deviations across the wafer surface.•Ellipsometry is a nondestructive, noncontact measurement technique for transparent films. It works based on linearly polarized light that reflects off the sample and is elliptically polarized.•Reflectometry is used to measure a film thickness based on how light reflects off the top and bottom surface of the film layer. X-ray and photoacoustic technology are also used to measure film thickness.•Film stress is measured by analyzing changes in the radius of curvature of the wafer. Variations in the refractive index are used to highlight contamination in the film.•Dopant concentration is traditionally measured with a four-point probe. The latest technology is the thermal-wave system, which measures the lattice damage in the implanted wafer after ion implantation. Another method for measuring dopant concentration is spreading resistance probe. •Brightfield detection is the traditional light source for microscope equipment. An optical microscope uses light reflection to detect surface defects. Darkfield detection examines light scattered off defects on the wafer surface. Light scattering uses darkfield detection to detectsurface particles by illuminating the surface with laser light and then using optical imaging.•Critical dimensions (CDs) are measured to achieve precise control over feature size dimensions.The scanning electron microscope is often used to measure CDs.•Conformal step coverage is measured with a surface profiler that has a stylus tip.•Overlay registration measures the ability to accurately print photoresist patterns over a previously etched pattern.•Capacitance-voltage (C-V) test is used to verify acceptable charge conditions and cleanliness at the gate structure in a MOS device.Analytical Equipment•The secondary-ion mass spectrometry (SIMS) is a method of eroding a wafer surface with accelerated ions in a magnetic field to analyze the surface material composition.•The atomic force microscope (AFM) is a surface profiler that scans a small, counterbalanced tip probe over the wafer to create a 3-D surface map.•Auger electron spectroscopy (AES) measures composition on the wafer surface by measuring the energy of the auger electrons. It identifies elements to a depth of about 2 nm. Another instrument used to identify surface chemical species is X-ray photoelectron spectroscopy (XPS).•Transmission electron microscopy (TEM) uses a beam of electrons that is transmitted through a thin slice of the wafer. It is capable of quantifying very small features on a wafer, such as silicon crystal point defects.•Energy-dispersive spectrometer (EDX) is a widely used X-ray detection method for identifying elements. It is often used in conjunction with the SEM.• A focused ion beam (FIB) system is a destructive technique that focuses a beam of ions on the wafer to carve a thin cross section from any wafer area. This permits analysis of the wafermaterial.Chapter 8Gas Control in Process ChambersEtch process chambers••The process chamber is a controlled vacuum environment where intended chemical reactions take place under controlled conditions. Process chambers are often configured as a cluster tool. Vacuum•Vacuum ranges are low (rough) vacuum, medium vacuum, high vacuum and ultrahigh vacuum (UHV). When pressure is lowered in a vacuum, the mean free path(平均自由行程) increases, which is important for how gases flow through the system and for creating a plasma.Vacuum Pumps•Roughing pumps are used to achieve a low to medium vacuum and to exhaust a high vacuum pump. High vacuum pumps achieve a high to ultrahigh vacuum.•Roughing pumps are dry mechanical pumps or a blower pump (also referred to as a booster). Two common high vacuum pumps are a turbomolecular (turbo) pump and cryopump. The turbo pump is a reliable, clean pump that works on the principle of mechanical compression. The cryopump isa capture pump that removes gases from the process chamber by freezing them.。

石墨烯光电子器件的应用研究进展李绍娟;甘胜;沐浩然;徐庆阳;乔虹;李鹏飞;薛运周;鲍桥梁【摘要】自2004年被发现以来，石墨烯因其卓越的光学和电学性能及其与硅基半导体工艺的兼容性，备受学术界和工业界的广泛关注。

作为一种独特的二维原子晶体薄膜材料，石墨烯有着优异的机械性能、超高的热导率和载流子迁移率、超宽带的光学响应谱及极强的非线性光学特性，使其在新型光学和光电器件领域具有得天独厚的优势。

一系列基于石墨烯的新型光电器件先后被研制出，已显示出优异的性能和良好的应用前景。

此外，近期石墨烯表面等离子体激元的发现及太赫兹器件的研究进一步促进了石墨烯基光电器件的蓬勃发展。

综述重点总结近年来石墨烯在超快脉冲激光器、光调制器、光探测器以及表面等离子体领域的应用研究进展，并进一步分析目前所面临的主要问题、挑战及其发展趋势。

%Graphene has very significant optical and electronic properties, which attract enormous attention. As a unique two-di-mensional crystal with one atom thickness, it has high electron and thermal conductivities in addition to ? exibility, robustness and impermeability to gases. Its ultra-broad band optical response and excellent non-linear optical properties make it a wonderful material for developing next generation photonic and optoelectronic devices. The fabrication of graphene-based devices is compatible with the existing semiconductor process, which has stimulated lots of graphene-based hybrid silicon-CMOS ( Complementary metal-oxide-semiconductor transistor) applications. Here we review the latest progress in graphene-based photonic and optoelectronic devices, ranging from pulsed lasers, modulators and photodetectors to optical sensors. Other exciting topicssuch as graphene surface plas-mons and their terahertz applications are also discussed.【期刊名称】《新型炭材料》【年(卷),期】2014(000)005【总页数】28页(P329-356)【关键词】石墨烯;脉冲激光器;光调制器;光探测器;表面等离子体;太赫兹【作者】李绍娟;甘胜;沐浩然;徐庆阳;乔虹;李鹏飞;薛运周;鲍桥梁【作者单位】苏州大学功能纳米与软物质研究院，苏州纳米科技协同创新中心，江苏省碳基功能材料与器件高技术研究重点实验室，江苏苏州 215123;苏州大学功能纳米与软物质研究院，苏州纳米科技协同创新中心，江苏省碳基功能材料与器件高技术研究重点实验室，江苏苏州 215123;苏州大学功能纳米与软物质研究院，苏州纳米科技协同创新中心，江苏省碳基功能材料与器件高技术研究重点实验室，江苏苏州 215123;苏州大学功能纳米与软物质研究院，苏州纳米科技协同创新中心，江苏省碳基功能材料与器件高技术研究重点实验室，江苏苏州 215123;苏州大学功能纳米与软物质研究院，苏州纳米科技协同创新中心，江苏省碳基功能材料与器件高技术研究重点实验室，江苏苏州 215123;苏州大学功能纳米与软物质研究院，苏州纳米科技协同创新中心，江苏省碳基功能材料与器件高技术研究重点实验室，江苏苏州 215123;苏州大学功能纳米与软物质研究院，苏州纳米科技协同创新中心，江苏省碳基功能材料与器件高技术研究重点实验室，江苏苏州215123;苏州大学功能纳米与软物质研究院，苏州纳米科技协同创新中心，江苏省碳基功能材料与器件高技术研究重点实验室，江苏苏州 215123【正文语种】中文【中图分类】TM9101 前言硅基光电子技术曾被寄希望于能够实现未来的超高速宽带数据通讯，然而，由于硅基器件目前面临着难以进一步微型化、集约化等问题，从而阻碍了其在高速、宽带数据计算和传输领域的应用。

专利名称：一种用于单球水平的抗肿瘤药物筛选微流控芯片及应用
专利类型：发明专利
发明人：秦建华,石杨,李艳峰
申请号：CN201310655993.1
申请日：20131204
公开号：CN104689860A
公开日：
20150610
专利内容由知识产权出版社提供
摘要：一种用于单球水平的抗肿瘤药物筛选微流控芯片及应用，该方法的步骤为利用热熔后的SU-8模板制作PDMS通道芯片模板；可一步法制作多个尺寸的凹陷小孔，用于形成大小不同的肿瘤微球。

微流控芯片为2层芯片，含有12个平行的微流控单元，该芯片可以用于肿瘤细胞的单球水平的抗肿瘤药物筛选，该方法无需昂贵的刻蚀设备，具有操作简单、快速，实验成本低廉，不涉及有机试剂，环境友好，可与其它技术集成化的优点。

申请人：中国科学院大连化学物理研究所
地址：116023 辽宁省大连市中山路457号
国籍：CN
代理机构：沈阳晨创科技专利代理有限责任公司
代理人：张晨
更多信息请下载全文后查看。

石墨烯幅相解耦超表面石墨烯幅相解耦超表面的创作：石墨烯幅相解耦超表面是一种新型材料，具有许多令人惊叹的特性。

它能够将电磁波进行有效的调控，实现对光的精确控制。

石墨烯的独特结构使其具有优异的电子传导性能和光学特性，因此被广泛应用于光学器件和电子器件中。

这种超表面的设计灵感源自自然界中的蝴蝶翅膀。

蝴蝶翅膀的表面由微小的鳞片组成，每个鳞片都具有特定的形状和结构，能够精确地控制光的传播和反射。

石墨烯幅相解耦超表面的设计原理也类似，通过微观结构的精确控制，实现对电磁波的高度调控。

石墨烯的单层结构具有极高的柔韧性和可调性，可以通过施加外界电场或物理变形来调节其电子和光学性质。

利用这一特性，石墨烯幅相解耦超表面可以实现对电磁波的幅度和相位的独立调控。

通过调节石墨烯的形变或电子能带结构，可以实现对光的幅度和相位进行精确调节，从而实现对光的聚焦、散射、反射等功能。

石墨烯幅相解耦超表面不仅可以用于光学器件的设计，还可以应用于天线设计、传感器、光电器件等领域。

在天线设计中，石墨烯幅相解耦超表面可以实现对电磁波的高效聚焦和辐射，提高天线的性能。

在传感器领域，石墨烯幅相解耦超表面可以实现对光的高度敏感，从而提高传感器的灵敏度和响应速度。

在光电器件中，石墨烯幅相解耦超表面可以实现对光的高效控制和传输，提高光电器件的工作效率。

石墨烯幅相解耦超表面的应用前景广阔，但目前仍面临许多挑战。

首先，石墨烯的制备和控制技术还不够成熟，需要进一步改进和优化。

其次，石墨烯幅相解耦超表面的设计和制备需要高度的精确性和稳定性，对工艺的要求较高。

最后，石墨烯幅相解耦超表面在实际应用中还需要解决与其他材料的兼容性和可靠性等问题。

石墨烯幅相解耦超表面是一种具有巨大潜力的新型材料，能够实现对电磁波的高度调控。

它的独特性能和广泛应用前景使其成为当前研究热点之一。

随着石墨烯技术的不断发展和进步，相信石墨烯幅相解耦超表面在光学器件、天线设计、传感器等领域将有更广泛的应用和突破。

第53卷第4期2024年4月人㊀工㊀晶㊀体㊀学㊀报JOURNAL OF SYNTHETIC CRYSTALS Vol.53㊀No.4April,2024简㊀㊀讯半导体晶圆检测关键连续波深紫外激光光源研制徐国锋,王正平,王树贤,武㊀奎,梁㊀飞,路大治,张怀金,于浩海(山东大学晶体材料研究院,晶体材料国家重点实验室,济南㊀250100)深紫外激光是半导体领域的关键光源㊂基于非线性频率变换的全固态深紫外激光具有结构紧凑㊁价格低廉等优势,有广泛需求㊂受限于晶体非线性系数较线性介电常数小数个数量级,深紫外激光通常以具有高峰值(千瓦级)的脉冲形式获得,连续波深紫外激光效率较低,其实用化极其困难㊂高峰值的紫外激光通常会对半导体表面及内部产生损伤,限制了半导体晶圆缺陷等装备的应用和发展㊂当前,晶圆检测用关键瓦级连续波深紫外激光器制备技术被国外极少数几家企业高度垄断,我国相关研究和产业化技术急需发展㊂在我国多个项目的持续支持下,基于前期研究,山东大学晶体材料国家重点实验室于浩海教授㊁张怀金教授相关团队提出了瓦级连续波深紫外激光器设计方案,并解决了稳定性㊁高效输出及紫外损伤的系列工程化难题,研制出国内首台瓦级连续波深紫外激光器整机(见图1),激光波长为261nm,功率波动RMS <1%,达到实用化要求,稳定性等关键指标达到国际文献报道最优水平㊂与国外高度垄断的266nm 激光器相比,该激光器具有结构更紧凑㊁波长更短㊁效率更高㊁分辨率更高等优势,填补了国内市场空白,为我国晶圆检测装备的全国产化自主研发奠定了关键光源基础㊂同时,针对SiC㊁GaN 等宽禁带半导体的检测需求,也研制出了瓦级320nm 连续波深紫外激光器整机(见图2),可服务于我国第三代半导体产业的高速发展㊂目前,上述成果的核心技术已转让到有维光电有限公司,着力开展批量化生产㊂图1㊀瓦级261nm 连续波深紫外激光器㊂(a)整机照片;(b)激光光谱及功率稳定性(RMS =0.66%)图2㊀瓦级320nm 连续波深紫外激光器㊂(a)整机照片;(b)激光光谱及功率稳定性(RMS =0.81%)。